integration of hardffault logger

STM32L476_ParaMETEO/src/subdir.mk

@@ -12,6 +12,7 @@ C_SRCS += \
 ../src/aprsis.c \
 ../src/backup_registers.c \
 ../src/button_parameteo.c \
+../src/debug_hardfault.c \
 ../src/delay.c \
 ../src/dummy.c \
 ../src/event_log.c \
@@ -44,6 +45,7 @@ OBJS += \
 ./src/aprsis.o \
 ./src/backup_registers.o \
 ./src/button_parameteo.o \
+./src/debug_hardfault.o \
 ./src/delay.o \
 ./src/dummy.o \
 ./src/event_log.o \
@@ -76,6 +78,7 @@ C_DEPS += \
 ./src/aprsis.d \
 ./src/backup_registers.d \
 ./src/button_parameteo.d \
+./src/debug_hardfault.d \
 ./src/delay.d \
 ./src/dummy.d \
 ./src/event_log.d \

include/memory_map.h

@@ -34,6 +34,16 @@
 #define MEMORY_MAP_EVENT_LOG_START				0x0805A800
 #define MEMORY_MAP_EVENT_LOG_END				0x0807CFFF
 
-#define MEMORY_MAP_FLASH_END	FLASH_BANK1_END
+#define MEMORY_MAP_FLASH_END					FLASH_BANK1_END
+
+#define MEMORY_MAP_SRAM1_NOINIT							0x10002000
+
+#define MEMORY_MAP_SRAM1_LOG_AREA_START					MEMORY_MAP_SRAM1_NOINIT		        // RAM2_NOINIT (xrw)      	: ORIGIN = 0x10002000, LENGTH = 24K
+#define MEMORY_MAP_SRAM1_LOG_AREA_END					(MEMORY_MAP_SRAM1_HFAULT_LOG_START - 1)
+
+#define MEMORY_MAP_SRAM1_HFAULT_LOG_32BWORDS_SIZE		12
+#define MEMORY_MAP_SRAM1_HFAULT_LOG_START				(SRAM2_BASE + SRAM2_SIZE - sizeof(uint32_t) * MEMORY_MAP_SRAM1_HFAULT_LOG_32BWORDS_SIZE)
+#define MEMORY_MAP_SRAM1_HFAULT_LOG_END					(SRAM2_BASE + SRAM2_SIZE - 1)       // last byte, which could be read and write
+
 
 #endif /* MEMORY_MAP_H_ */

system/src/cmsis/stm32l4xx/stm32l4xx_it.c

@@ -21,6 +21,7 @@
 /* Includes ------------------------------------------------------------------*/
 #include "main.h"
 #include "stm32l4xx_it.h"
+#include "debug_hardfault.h"
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
 /* USER CODE END Includes */
@@ -87,6 +88,20 @@ void HardFault_Handler(void)
 {
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
+    __asm__("MOVS R0, #4");
+    __asm__("MOV R1, LR");
+    __asm__("TST R1, R0");     // Test LR (EXC_RETURN[2])
+    __asm__("ITE NE");
+    __asm__("MRSNE R1, PSP");  // EXC_RETURN[2] = 1
+    __asm__("MRSEQ R1, MSP");  // EXC_RETURN[2] = 0
+
+    __asm__("LDR R0, =debug_hardfault_stack_pointer_value");
+    __asm__("STR R1, [R0]"); // Store PSP into stack_pointer
+
+    DEBUG_STACKFRAME_STORE(debug_hardfault_stack_pointer_value, DEBUG_HARDFAULT_SOURCE_HFLT);
+
+    DEBUG_STACKFRAME_CHECKSUM
+
   /* USER CODE END HardFault_IRQn 0 */
   while (1)
   {
@@ -103,6 +118,20 @@ void MemManage_Handler(void)
 {
   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 
+    __asm__("MOVS R0, #4");
+    __asm__("MOV R1, LR");
+    __asm__("TST R1, R0");     // Test LR (EXC_RETURN[2])
+    __asm__("ITE NE");
+    __asm__("MRSNE R1, PSP");  // EXC_RETURN[2] = 1
+    __asm__("MRSEQ R1, MSP");  // EXC_RETURN[2] = 0
+
+    __asm__("LDR R0, =debug_hardfault_stack_pointer_value");
+    __asm__("STR R1, [R0]"); // Store PSP into stack_pointer
+
+    DEBUG_STACKFRAME_STORE(debug_hardfault_stack_pointer_value, DEBUG_HARDFAULT_SOURCE_MMUFLT);
+
+    DEBUG_STACKFRAME_CHECKSUM
+
   /* USER CODE END MemoryManagement_IRQn 0 */
   while (1)
   {
@@ -119,6 +148,20 @@ void BusFault_Handler(void)
 {
   /* USER CODE BEGIN BusFault_IRQn 0 */
 
+    __asm__("MOVS R0, #4");
+    __asm__("MOV R1, LR");
+    __asm__("TST R1, R0");     // Test LR (EXC_RETURN[2])
+    __asm__("ITE NE");
+    __asm__("MRSNE R1, PSP");  // EXC_RETURN[2] = 1
+    __asm__("MRSEQ R1, MSP");  // EXC_RETURN[2] = 0
+
+    __asm__("LDR R0, =debug_hardfault_stack_pointer_value");
+    __asm__("STR R1, [R0]"); // Store PSP into stack_pointer
+
+    DEBUG_STACKFRAME_STORE(debug_hardfault_stack_pointer_value, DEBUG_HARDFAULT_SOURCE_BUSFLT);
+
+    DEBUG_STACKFRAME_CHECKSUM
+
   /* USER CODE END BusFault_IRQn 0 */
   while (1)
   {
@@ -135,6 +178,20 @@ void UsageFault_Handler(void)
 {
   /* USER CODE BEGIN UsageFault_IRQn 0 */
 
+    __asm__("MOVS R0, #4");
+    __asm__("MOV R1, LR");
+    __asm__("TST R1, R0");     // Test LR (EXC_RETURN[2])
+    __asm__("ITE NE");
+    __asm__("MRSNE R1, PSP");  // EXC_RETURN[2] = 1
+    __asm__("MRSEQ R1, MSP");  // EXC_RETURN[2] = 0
+
+    __asm__("LDR R0, =debug_hardfault_stack_pointer_value");
+    __asm__("STR R1, [R0]"); // Store PSP into stack_pointer
+
+    DEBUG_STACKFRAME_STORE(debug_hardfault_stack_pointer_value, DEBUG_HARDFAULT_SOURCE_USAGEFLT);
+
+    DEBUG_STACKFRAME_CHECKSUM
+
   /* USER CODE END UsageFault_IRQn 0 */
   while (1)
   {

system/src/cmsis/stm32l4xx/system_stm32l4xx.c

@@ -222,6 +222,11 @@ void SystemInit(void)
   SCB->CPACR |= ((3UL << 20U)|(3UL << 22U));  /* set CP10 and CP11 Full Access */
 #endif
 
+  /* Enable usage, bus and memory faults */
+  SCB->SHCSR |= SCB_SHCSR_USGFAULTACT_Msk;
+  SCB->SHCSR |= SCB_SHCSR_BUSFAULTENA_Msk;
+  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+
   /* Reset the RCC clock configuration to the default reset state ------------*/
   /* Set MSION bit */
   RCC->CR |= RCC_CR_MSION;