2022-04-20 20:53:10 +00:00
|
|
|
#include "main.h"
|
2021-06-13 06:36:32 +00:00
|
|
|
|
2021-05-30 11:54:25 +00:00
|
|
|
#ifdef STM32F10X_MD_VL
|
|
|
|
#include <stm32f10x_rcc.h>
|
|
|
|
#include <stm32f10x_iwdg.h>
|
|
|
|
#include <stm32f10x.h>
|
2021-09-23 08:07:10 +00:00
|
|
|
#include <drivers/f1/gpio_conf_stm32f1x.h>
|
2021-05-30 11:54:25 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef STM32L471xx
|
2021-07-03 07:18:19 +00:00
|
|
|
#include <stm32l4xx_hal_cortex.h>
|
2021-05-30 11:54:25 +00:00
|
|
|
#include <stm32l4xx.h>
|
|
|
|
#include <stm32l4xx_ll_iwdg.h>
|
|
|
|
#include <stm32l4xx_ll_rcc.h>
|
2021-05-30 14:27:41 +00:00
|
|
|
#include <stm32l4xx_ll_gpio.h>
|
2021-07-03 16:45:32 +00:00
|
|
|
#include "cmsis/stm32l4xx/system_stm32l4xx.h"
|
2022-01-24 20:51:45 +00:00
|
|
|
|
|
|
|
#include "gsm/sim800c.h"
|
2022-01-26 23:22:05 +00:00
|
|
|
#include "gsm/sim800c_engineering.h"
|
2022-01-27 23:08:01 +00:00
|
|
|
#include "gsm/sim800c_poolers.h"
|
2022-04-10 19:47:42 +00:00
|
|
|
#include "gsm/sim800c_gprs.h"
|
2022-04-20 20:30:29 +00:00
|
|
|
#include "http_client/http_client.h"
|
|
|
|
|
2022-02-23 22:05:39 +00:00
|
|
|
|
|
|
|
#include "aprsis.h"
|
2022-04-29 14:29:37 +00:00
|
|
|
#include "api/api.h"
|
2022-04-19 17:56:53 +00:00
|
|
|
#include "drivers/l4/pwm_input_stm32l4x.h"
|
2021-05-30 11:54:25 +00:00
|
|
|
#endif
|
|
|
|
|
2019-01-26 22:18:25 +00:00
|
|
|
#include <delay.h>
|
|
|
|
#include <LedConfig.h>
|
2017-08-20 12:41:17 +00:00
|
|
|
#include <stdio.h>
|
|
|
|
#include <stdlib.h>
|
|
|
|
#include <string.h>
|
|
|
|
|
2019-01-27 13:23:20 +00:00
|
|
|
#include "packet_tx_handler.h"
|
2021-01-12 14:19:31 +00:00
|
|
|
|
2017-08-20 12:41:17 +00:00
|
|
|
#include "station_config.h"
|
2021-04-05 19:48:23 +00:00
|
|
|
#include "config_data_externs.h"
|
2021-04-29 21:27:48 +00:00
|
|
|
#include "configuration_handler.h"
|
2017-08-20 12:41:17 +00:00
|
|
|
|
|
|
|
#include "diag/Trace.h"
|
|
|
|
#include "antilib_adc.h"
|
|
|
|
#include "afsk_pr.h"
|
|
|
|
#include "TimerConfig.h"
|
|
|
|
#include "PathConfig.h"
|
2020-06-14 13:33:27 +00:00
|
|
|
#include "LedConfig.h"
|
2020-06-11 18:36:36 +00:00
|
|
|
#include "io.h"
|
2021-05-12 20:52:06 +00:00
|
|
|
#include "float_to_string.h"
|
2021-08-22 18:30:22 +00:00
|
|
|
#include "pwr_save.h"
|
2022-04-03 15:59:00 +00:00
|
|
|
#include <wx_pwr_switch.h>
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2019-01-27 13:23:20 +00:00
|
|
|
#include "it_handlers.h"
|
|
|
|
|
2017-08-20 12:41:17 +00:00
|
|
|
#include "aprs/digi.h"
|
|
|
|
#include "aprs/telemetry.h"
|
|
|
|
#include "aprs/dac.h"
|
|
|
|
#include "aprs/beacon.h"
|
|
|
|
|
2019-04-03 09:41:37 +00:00
|
|
|
#include "ve_direct_protocol/parser.h"
|
|
|
|
|
2019-01-26 22:18:25 +00:00
|
|
|
#include "rte_wx.h"
|
2019-04-03 09:41:37 +00:00
|
|
|
#include "rte_pv.h"
|
2019-04-16 21:33:41 +00:00
|
|
|
#include "rte_main.h"
|
2020-10-30 12:02:07 +00:00
|
|
|
#include "rte_rtu.h"
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2019-01-26 22:18:25 +00:00
|
|
|
#include <wx_handler.h>
|
2017-08-20 12:41:17 +00:00
|
|
|
#include "drivers/dallas.h"
|
|
|
|
#include "drivers/i2c.h"
|
2019-12-26 19:55:47 +00:00
|
|
|
#include "drivers/analog_anemometer.h"
|
2017-08-20 12:41:17 +00:00
|
|
|
#include "aprs/wx.h"
|
2020-03-21 16:46:16 +00:00
|
|
|
|
2020-09-20 12:13:24 +00:00
|
|
|
#include "../system/include/modbus_rtu/rtu_serial_io.h"
|
|
|
|
|
2020-08-25 18:05:04 +00:00
|
|
|
#include "../system/include/davis_vantage/davis.h"
|
|
|
|
#include "../system/include/davis_vantage/davis_parsers.h"
|
|
|
|
|
2020-06-21 21:11:16 +00:00
|
|
|
#include "drivers/ms5611.h"
|
2020-06-23 22:17:59 +00:00
|
|
|
#include <drivers/bme280.h>
|
2020-06-21 21:11:16 +00:00
|
|
|
|
2020-03-21 16:46:16 +00:00
|
|
|
#include "umb_master/umb_master.h"
|
|
|
|
#include "umb_master/umb_channel_pool.h"
|
|
|
|
#include "umb_master/umb_0x26_status.h"
|
|
|
|
|
2018-05-11 19:54:27 +00:00
|
|
|
#include "drivers/dallas.h"
|
|
|
|
|
2017-08-20 12:41:17 +00:00
|
|
|
#include "KissCommunication.h"
|
|
|
|
|
2020-02-23 17:22:37 +00:00
|
|
|
#define SOH 0x01
|
|
|
|
|
2020-11-04 16:22:37 +00:00
|
|
|
|
2020-03-18 20:56:02 +00:00
|
|
|
//#define SERIAL_TX_TEST_MODE
|
2017-08-20 12:41:17 +00:00
|
|
|
|
|
|
|
// Niebieska dioda -> DCD
|
|
|
|
// Zielona dioda -> anemometr albo TX
|
|
|
|
|
2021-08-22 18:30:22 +00:00
|
|
|
// backup registers (ParaTNC)
|
2021-09-01 21:12:24 +00:00
|
|
|
// 0 ->
|
2021-08-22 18:30:22 +00:00
|
|
|
// 2 -> boot and hard fault count
|
|
|
|
// 3 -> controller configuration status
|
2021-09-01 21:12:24 +00:00
|
|
|
// 4 ->
|
|
|
|
// 5 ->
|
|
|
|
// 6 ->
|
2021-08-22 18:30:22 +00:00
|
|
|
|
|
|
|
// backup registers (ParaMETEO)
|
2021-09-01 21:12:24 +00:00
|
|
|
// 0 -> powersave status
|
2022-04-20 20:30:29 +00:00
|
|
|
// 1 -> last sleep rtc time
|
|
|
|
// 2 -> last wakeup rtc time
|
2021-09-01 21:12:24 +00:00
|
|
|
// 3 -> controller configuration status
|
2022-04-20 20:30:29 +00:00
|
|
|
// 4 -> wakeup events MSB, sleep events LSB
|
|
|
|
// 5 -> monitor
|
2021-08-22 18:30:22 +00:00
|
|
|
|
2019-04-16 21:33:41 +00:00
|
|
|
|
2021-05-09 20:30:32 +00:00
|
|
|
#define CONFIG_FIRST_RESTORED (1)
|
|
|
|
#define CONFIG_FIRST_FAIL_RESTORING (1 << 1)
|
|
|
|
#define CONFIG_FIRST_CRC_OK (1 << 2)
|
|
|
|
|
2021-05-12 20:52:06 +00:00
|
|
|
#define CONFIG_SECOND_RESTORED (1 << 3)
|
|
|
|
#define CONFIG_SECOND_FAIL_RESTORING (1 << 4)
|
|
|
|
#define CONFIG_SECOND_CRC_OK (1 << 5)
|
|
|
|
|
2022-05-08 11:48:10 +00:00
|
|
|
/**
|
|
|
|
* A foreword about '#define' mess. This software is indented to run on at least two
|
2022-05-09 20:46:50 +00:00
|
|
|
* different hardware platforms. First which is ParaTNC basing on STM32F100 and second
|
2022-05-08 11:48:10 +00:00
|
|
|
* ParaMETEO using STM32L476. In future more platforms may appear. Like ParaTNC2 which
|
|
|
|
* will be a ParaMETEO without battery charging and in form factor similar to ParaTNC.
|
|
|
|
*
|
|
|
|
* To obtain such compatibility a lot of #defines and different makefiles has to be used.
|
|
|
|
* Some parts of the code are 'included' per target CPU basis, as are independent from
|
|
|
|
* target platform either directly (like handling serial port or GPIO configuration), or
|
|
|
|
* as a result of an assumption that all target plaforms with STML476 will have GSM modem.
|
|
|
|
*
|
|
|
|
* Some platforms had or may have in the future few hadware revisions. ParaTNC had
|
|
|
|
* revisions A, B and C. Currently A and B are abandoned an assumption is that all ParaTNC
|
|
|
|
* builds applies to C. A choose of hardware revision is done in file 'station_config_target_hw.h'
|
|
|
|
* which is currently empty
|
|
|
|
*/
|
|
|
|
|
2017-08-20 12:41:17 +00:00
|
|
|
// ----- main() ---------------------------------------------------------------
|
|
|
|
|
|
|
|
// Sample pragmas to cope with warnings. Please note the related line at
|
|
|
|
// the end of this function, used to pop the compiler diagnostics status.
|
|
|
|
#pragma GCC diagnostic push
|
|
|
|
#pragma GCC diagnostic ignored "-Wunused-parameter"
|
|
|
|
#pragma GCC diagnostic ignored "-Wmissing-declarations"
|
|
|
|
#pragma GCC diagnostic ignored "-Wreturn-type"
|
|
|
|
#pragma GCC diagnostic ignored "-Wempty-body"
|
|
|
|
|
2021-04-26 19:04:04 +00:00
|
|
|
// used configuration structures
|
|
|
|
const config_data_mode_t * main_config_data_mode = 0;
|
|
|
|
const config_data_basic_t * main_config_data_basic = 0;
|
|
|
|
const config_data_wx_sources_t * main_config_data_wx_sources = 0;
|
|
|
|
const config_data_umb_t * main_config_data_umb = 0;
|
|
|
|
const config_data_rtu_t * main_config_data_rtu = 0;
|
2022-02-20 13:24:48 +00:00
|
|
|
#ifdef STM32L471xx
|
2022-01-30 15:07:41 +00:00
|
|
|
const config_data_gsm_t * main_config_data_gsm = 0;
|
|
|
|
#endif
|
2021-04-26 19:04:04 +00:00
|
|
|
|
2019-01-23 21:18:05 +00:00
|
|
|
// global variable incremented by the SysTick handler to measure time in miliseconds
|
2019-01-13 20:55:09 +00:00
|
|
|
uint32_t master_time = 0;
|
|
|
|
|
2020-10-29 18:48:06 +00:00
|
|
|
// this global variable stores numbers of ticks of idling CPU
|
|
|
|
uint32_t main_idle_cpu_ticks = 0;
|
|
|
|
|
|
|
|
// current cpu idle ticks
|
|
|
|
uint32_t main_current_cpu_idle_ticks = 0;
|
|
|
|
|
|
|
|
// approx cpu load in percents
|
|
|
|
int8_t main_cpu_load = 0;
|
|
|
|
|
2019-01-26 17:02:19 +00:00
|
|
|
// global variable used as a timer to trigger meteo sensors mesurements
|
2019-01-27 13:23:20 +00:00
|
|
|
int32_t main_wx_sensors_pool_timer = 65500;
|
2019-01-26 22:18:25 +00:00
|
|
|
|
|
|
|
// global variable used as a timer to trigger packet sending
|
2021-09-23 08:07:10 +00:00
|
|
|
int32_t main_one_minute_pool_timer = 45000;
|
2019-01-26 17:02:19 +00:00
|
|
|
|
2020-02-01 22:20:17 +00:00
|
|
|
// one second pool interval
|
|
|
|
int32_t main_one_second_pool_timer = 1000;
|
|
|
|
|
2019-12-16 21:40:42 +00:00
|
|
|
// two second pool interval
|
|
|
|
int32_t main_two_second_pool_timer = 2000;
|
|
|
|
|
2020-01-04 13:15:33 +00:00
|
|
|
// ten second pool interval
|
|
|
|
int32_t main_ten_second_pool_timer = 10000;
|
|
|
|
|
2020-04-12 17:05:41 +00:00
|
|
|
// serial context for UART used to KISS
|
|
|
|
srl_context_t main_kiss_srl_ctx;
|
|
|
|
|
|
|
|
// serial context for UART used for comm with wx sensors
|
|
|
|
srl_context_t main_wx_srl_ctx;
|
|
|
|
|
2022-02-20 13:24:48 +00:00
|
|
|
#if defined(STM32L471xx)
|
2022-01-24 20:51:45 +00:00
|
|
|
// serial context for communication with GSM module
|
|
|
|
srl_context_t main_gsm_srl_ctx;
|
|
|
|
#endif
|
|
|
|
|
2020-04-12 17:05:41 +00:00
|
|
|
// a pointer to KISS context
|
|
|
|
srl_context_t* main_kiss_srl_ctx_ptr;
|
|
|
|
|
|
|
|
// a pointer to wx comms context
|
|
|
|
srl_context_t* main_wx_srl_ctx_ptr;
|
|
|
|
|
2022-01-24 20:51:45 +00:00
|
|
|
// a pointer to gsm context
|
|
|
|
srl_context_t* main_gsm_srl_ctx_ptr;
|
|
|
|
|
2020-04-13 12:01:07 +00:00
|
|
|
// target USART1 (kiss) baudrate
|
|
|
|
uint32_t main_target_kiss_baudrate;
|
|
|
|
|
|
|
|
// target USART2 (wx) baudrate
|
|
|
|
uint32_t main_target_wx_baudrate;
|
|
|
|
|
2020-09-07 21:25:58 +00:00
|
|
|
// controls if the KISS modem is enabled
|
|
|
|
uint8_t main_kiss_enabled = 1;
|
|
|
|
|
|
|
|
// controls if DAVIS serialprotocol client is enabled by the configuration
|
|
|
|
uint8_t main_davis_serial_enabled = 0;
|
|
|
|
|
2020-09-20 12:13:24 +00:00
|
|
|
uint8_t main_modbus_rtu_master_enabled = 0;
|
|
|
|
|
2019-01-13 20:55:09 +00:00
|
|
|
// global variables represending the AX25/APRS stack
|
2019-01-26 22:18:25 +00:00
|
|
|
AX25Ctx main_ax25;
|
|
|
|
Afsk main_afsk;
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2019-01-13 14:57:59 +00:00
|
|
|
|
2019-01-27 11:34:43 +00:00
|
|
|
AX25Call main_own_path[3];
|
|
|
|
uint8_t main_own_path_ln = 0;
|
|
|
|
uint8_t main_own_aprs_msg_len;
|
2020-11-04 16:22:37 +00:00
|
|
|
char main_own_aprs_msg[OWN_APRS_MSG_LN];
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2021-05-12 20:52:06 +00:00
|
|
|
char main_string_latitude[9];
|
|
|
|
char main_string_longitude[9];
|
|
|
|
|
|
|
|
char main_symbol_f = '/';
|
|
|
|
char main_symbol_s = '#';
|
|
|
|
|
2019-01-13 20:55:09 +00:00
|
|
|
// global variable used to store return value from various functions
|
|
|
|
volatile uint8_t retval = 100;
|
|
|
|
|
2019-04-03 09:41:37 +00:00
|
|
|
uint16_t buffer_len = 0;
|
|
|
|
|
2020-02-23 17:22:37 +00:00
|
|
|
// return value from UMB related functions
|
|
|
|
umb_retval_t main_umb_retval = UMB_UNINITIALIZED;
|
|
|
|
|
2021-05-09 20:30:32 +00:00
|
|
|
// result of CRC calculation
|
|
|
|
uint32_t main_crc_result = 0;
|
2020-09-20 12:13:24 +00:00
|
|
|
|
2022-02-20 13:24:48 +00:00
|
|
|
#if defined(STM32L471xx)
|
2021-06-13 06:36:32 +00:00
|
|
|
LL_GPIO_InitTypeDef GPIO_InitTypeDef;
|
2022-01-24 20:51:45 +00:00
|
|
|
|
|
|
|
gsm_sim800_state_t main_gsm_state;
|
2022-03-26 18:43:41 +00:00
|
|
|
|
2022-04-29 14:29:37 +00:00
|
|
|
uint32_t rte_main_rx_total = 0;
|
|
|
|
uint32_t rte_main_tx_total = 0;
|
|
|
|
|
2021-06-13 06:36:32 +00:00
|
|
|
#endif
|
2018-04-17 22:05:02 +00:00
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
#if defined(PARAMETEO)
|
|
|
|
uint8_t main_woken_up = 0;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
char after_tx_lock;
|
|
|
|
|
|
|
|
unsigned short rx10m = 0, tx10m = 0, digi10m = 0, digidrop10m = 0, kiss10m = 0;
|
|
|
|
|
2017-08-20 12:41:17 +00:00
|
|
|
static void message_callback(struct AX25Msg *msg) {
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2022-04-16 19:55:46 +00:00
|
|
|
const char * post_content = "{\
|
|
|
|
\"main_config_data_basic_callsign\": \"SP8EBC\",\
|
|
|
|
\"main_config_data_basic_ssid\": 8,\
|
|
|
|
\"master_time\": 12345,\
|
|
|
|
\"main_cpu_load\": 50,\
|
|
|
|
\"rx10m\": 30,\
|
|
|
|
\"tx10m\": 20,\
|
|
|
|
\"digi10m\": 50,\
|
|
|
|
\"digidrop10m\": 10,\
|
|
|
|
\"kiss10m\": 5,\
|
|
|
|
\"rte_main_rx_total\": 11,\
|
|
|
|
\"rte_main_tx_total\": 12,\
|
|
|
|
\"rte_main_average_battery_voltage\": 123,\
|
|
|
|
\"rte_main_wakeup_count\": 0,\
|
|
|
|
\"rte_main_going_sleep_count\": 2,\
|
2022-04-17 16:08:55 +00:00
|
|
|
\"rte_main_last_sleep_master_time\": 9}";
|
2022-04-16 19:55:46 +00:00
|
|
|
|
2022-04-10 19:47:42 +00:00
|
|
|
static void dupa(uint16_t http_code, char * content, uint16_t content_lenght) {
|
|
|
|
|
|
|
|
if (http_code == 200) {
|
|
|
|
if (content_lenght > 0) {
|
|
|
|
kiss10m++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-04-27 22:31:43 +00:00
|
|
|
int main(int argc, char* argv[]){
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2019-01-13 14:57:59 +00:00
|
|
|
int32_t ln = 0;
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2019-01-27 13:23:20 +00:00
|
|
|
uint8_t button_inhibit = 0;
|
|
|
|
|
2021-06-13 06:36:32 +00:00
|
|
|
memset(main_own_aprs_msg, 0x00, OWN_APRS_MSG_LN);
|
|
|
|
|
2022-04-19 17:56:53 +00:00
|
|
|
#if defined(STM32F10X_MD_VL)
|
2017-08-20 12:41:17 +00:00
|
|
|
RCC->APB1ENR |= (RCC_APB1ENR_TIM2EN | RCC_APB1ENR_TIM3EN | RCC_APB1ENR_TIM7EN | RCC_APB1ENR_TIM4EN);
|
|
|
|
RCC->APB2ENR |= (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_AFIOEN | RCC_APB2ENR_TIM1EN);
|
2021-04-29 21:27:48 +00:00
|
|
|
RCC->AHBENR |= RCC_AHBENR_CRCEN;
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2019-01-27 11:34:43 +00:00
|
|
|
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_4);
|
|
|
|
|
2019-01-13 20:55:09 +00:00
|
|
|
// choosing the signal source for the SysTick timer.
|
|
|
|
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
|
|
|
|
|
|
|
|
// Configuring the SysTick timer to generate interrupt 100x per second (one interrupt = 10ms)
|
2019-01-27 11:34:43 +00:00
|
|
|
SysTick_Config(SystemCoreClock / SYSTICK_TICKS_PER_SECONDS);
|
2019-01-13 20:55:09 +00:00
|
|
|
|
2019-01-27 12:14:36 +00:00
|
|
|
// setting an Systick interrupt priority
|
|
|
|
NVIC_SetPriority(SysTick_IRQn, 5);
|
|
|
|
|
2019-04-16 21:33:41 +00:00
|
|
|
// enable access to BKP registers
|
|
|
|
RCC->APB1ENR |= (RCC_APB1ENR_PWREN | RCC_APB1ENR_BKPEN);
|
|
|
|
PWR->CR |= PWR_CR_DBP;
|
|
|
|
|
|
|
|
// read current number of boot cycles
|
|
|
|
rte_main_boot_cycles = (uint8_t)(BKP->DR2 & 0xFF);
|
|
|
|
|
|
|
|
// read current number of hard faults
|
2019-05-05 12:25:48 +00:00
|
|
|
rte_main_hard_faults = (uint8_t)((BKP->DR2 & 0xFF00) >> 8);
|
2019-04-16 21:33:41 +00:00
|
|
|
|
|
|
|
// increase boot cycles count
|
|
|
|
rte_main_boot_cycles++;
|
|
|
|
|
|
|
|
// erasing old value from backup registers
|
|
|
|
BKP->DR2 &= (0xFFFF ^ 0xFF);
|
|
|
|
|
|
|
|
// storing increased value
|
|
|
|
BKP->DR2 |= rte_main_boot_cycles;
|
|
|
|
|
|
|
|
BKP->DR3 = 0;
|
|
|
|
BKP->DR4 = 0;
|
|
|
|
BKP->DR5 = 0;
|
|
|
|
BKP->DR6 = 0;
|
2021-06-13 06:36:32 +00:00
|
|
|
#endif
|
2019-04-16 21:33:41 +00:00
|
|
|
|
2022-02-20 13:24:48 +00:00
|
|
|
#if defined(STM32L471xx)
|
2021-08-21 20:44:01 +00:00
|
|
|
system_clock_update_l4();
|
2021-07-03 16:45:32 +00:00
|
|
|
|
2021-08-21 20:44:01 +00:00
|
|
|
if (system_clock_configure_l4() != 0) {
|
2021-07-03 07:18:19 +00:00
|
|
|
HAL_NVIC_SystemReset();
|
2021-08-21 20:44:01 +00:00
|
|
|
|
2021-07-03 07:18:19 +00:00
|
|
|
}
|
|
|
|
|
2021-08-21 20:44:01 +00:00
|
|
|
// enable access to PWR control registers
|
|
|
|
RCC->APB1ENR1 |= RCC_APB1ENR1_PWREN;
|
|
|
|
|
2021-08-22 10:13:12 +00:00
|
|
|
system_clock_update_l4();
|
|
|
|
|
2021-08-21 20:44:01 +00:00
|
|
|
system_clock_configure_rtc_l4();
|
|
|
|
|
2022-01-24 20:51:45 +00:00
|
|
|
RCC->APB1ENR1 |= (RCC_APB1ENR1_TIM2EN | RCC_APB1ENR1_TIM3EN | RCC_APB1ENR1_TIM4EN | RCC_APB1ENR1_TIM5EN | RCC_APB1ENR1_TIM7EN | RCC_APB1ENR1_USART2EN | RCC_APB1ENR1_USART3EN | RCC_APB1ENR1_DAC1EN | RCC_APB1ENR1_I2C1EN | RCC_APB1ENR1_USART3EN);
|
2022-04-19 17:56:53 +00:00
|
|
|
RCC->APB2ENR |= (RCC_APB2ENR_TIM1EN | RCC_APB2ENR_USART1EN | RCC_APB2ENR_TIM8EN); // RCC_APB1ENR1_USART3EN
|
2021-06-13 06:36:32 +00:00
|
|
|
RCC->AHB1ENR |= (RCC_AHB1ENR_CRCEN | RCC_AHB1ENR_DMA1EN);
|
|
|
|
RCC->AHB2ENR |= (RCC_AHB2ENR_ADCEN | RCC_AHB2ENR_GPIOAEN | RCC_AHB2ENR_GPIOBEN | RCC_AHB2ENR_GPIOCEN | RCC_AHB2ENR_GPIODEN);
|
|
|
|
RCC->BDCR |= RCC_BDCR_RTCEN;
|
2021-07-03 07:18:19 +00:00
|
|
|
|
|
|
|
/* Set Interrupt Group Priority */
|
|
|
|
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
|
|
|
|
|
|
|
// set systick frequency
|
|
|
|
HAL_SYSTICK_Config(SystemCoreClock / (1000U / (uint32_t)10));
|
|
|
|
|
|
|
|
// set systick interrupt priority
|
|
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, 5, 0U);
|
2021-06-13 06:36:32 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
rte_main_reboot_req = 0;
|
2019-04-16 21:33:41 +00:00
|
|
|
|
2020-10-30 12:02:07 +00:00
|
|
|
// initializing variables & arrays in rte_wx
|
|
|
|
rte_wx_init();
|
|
|
|
rte_rtu_init();
|
|
|
|
|
2021-04-29 21:27:48 +00:00
|
|
|
// calculate CRC over configuration blocks
|
2021-05-09 20:30:32 +00:00
|
|
|
main_crc_result = configuration_handler_check_crc();
|
|
|
|
|
|
|
|
// if first section has wrong CRC and it hasn't been restored before
|
2021-06-13 18:25:45 +00:00
|
|
|
if ((main_crc_result & 0x01) == 0 && (configuration_get_register() & CONFIG_FIRST_FAIL_RESTORING) == 0) {
|
2021-05-09 20:30:32 +00:00
|
|
|
// restore default configuration
|
|
|
|
if (configuration_handler_restore_default_first() == 0) {
|
|
|
|
|
|
|
|
// if configuration has been restored successfully
|
2021-06-13 18:25:45 +00:00
|
|
|
configuration_set_bits_register(CONFIG_FIRST_RESTORED);
|
2021-05-12 20:52:06 +00:00
|
|
|
|
|
|
|
// set also CRC flag because if restoring is successfull the region has good CRC
|
2021-06-13 18:25:45 +00:00
|
|
|
configuration_set_bits_register(CONFIG_FIRST_CRC_OK);
|
2021-05-12 20:52:06 +00:00
|
|
|
|
2021-05-09 20:30:32 +00:00
|
|
|
}
|
|
|
|
else {
|
2021-05-12 20:52:06 +00:00
|
|
|
// if not store the flag in the backup register to block
|
|
|
|
// reinitializing once again in the consecutive restart
|
2021-06-13 18:25:45 +00:00
|
|
|
configuration_set_bits_register(CONFIG_FIRST_FAIL_RESTORING);
|
2022-01-13 09:34:31 +00:00
|
|
|
|
|
|
|
configuration_clear_bits_register(CONFIG_FIRST_CRC_OK);
|
2021-05-09 20:30:32 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
else {
|
2021-05-12 20:52:06 +00:00
|
|
|
// if the combined confition is not met check failed restoring flag
|
2021-06-13 18:25:45 +00:00
|
|
|
if ((configuration_get_register() & CONFIG_FIRST_FAIL_RESTORING) == 0) {
|
2021-05-12 20:52:06 +00:00
|
|
|
// a CRC checksum is ok, so first configuration section can be used further
|
2021-06-13 18:25:45 +00:00
|
|
|
configuration_set_bits_register(CONFIG_FIRST_CRC_OK);
|
2021-05-12 20:52:06 +00:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// if second section has wrong CRC and it hasn't been restored before
|
2021-06-13 18:25:45 +00:00
|
|
|
if ((main_crc_result & 0x02) == 0 && (configuration_get_register() & CONFIG_SECOND_FAIL_RESTORING) == 0) {
|
2021-05-12 20:52:06 +00:00
|
|
|
// restore default configuration
|
|
|
|
if (configuration_handler_restore_default_second() == 0) {
|
|
|
|
|
|
|
|
// if configuration has been restored successfully
|
2021-06-13 18:25:45 +00:00
|
|
|
configuration_set_bits_register(CONFIG_SECOND_RESTORED);
|
2021-05-12 20:52:06 +00:00
|
|
|
|
|
|
|
// set also CRC flag as if restoring is successfull the region has good CRC
|
2021-06-13 18:25:45 +00:00
|
|
|
configuration_set_bits_register(CONFIG_SECOND_CRC_OK);
|
2021-05-12 20:52:06 +00:00
|
|
|
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
// if not store the flag in the backup register
|
2021-06-13 18:25:45 +00:00
|
|
|
configuration_set_bits_register(CONFIG_SECOND_FAIL_RESTORING);
|
2021-05-12 20:52:06 +00:00
|
|
|
|
2021-06-13 18:25:45 +00:00
|
|
|
configuration_clear_bits_register(CONFIG_SECOND_CRC_OK);
|
2021-05-12 20:52:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
// check failed restoring flag
|
2021-06-13 18:25:45 +00:00
|
|
|
if ((configuration_get_register() & CONFIG_SECOND_FAIL_RESTORING) == 0) {
|
2021-05-12 20:52:06 +00:00
|
|
|
// second configuration section has good CRC and can be used further
|
2021-06-13 18:25:45 +00:00
|
|
|
configuration_set_bits_register(CONFIG_SECOND_CRC_OK);
|
2021-05-12 20:52:06 +00:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// at this point both sections have either verified CRC or restored values to default
|
2021-06-13 18:25:45 +00:00
|
|
|
if ((configuration_get_register() & CONFIG_FIRST_CRC_OK) != 0 && (configuration_get_register() & CONFIG_SECOND_CRC_OK) != 0) {
|
2021-05-12 20:52:06 +00:00
|
|
|
// if both sections are OK check programming counters
|
|
|
|
if (config_data_pgm_cntr_first > config_data_pgm_cntr_second) {
|
|
|
|
// if first section has bigger programing counter use it
|
|
|
|
configuration_handler_load_configuration(REGION_FIRST);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
configuration_handler_load_configuration(REGION_SECOND);
|
|
|
|
|
|
|
|
}
|
|
|
|
}
|
2021-06-13 18:25:45 +00:00
|
|
|
else if ((configuration_get_register() & CONFIG_FIRST_CRC_OK) != 0 && (configuration_get_register() & CONFIG_SECOND_CRC_OK) == 0) {
|
2021-05-12 20:52:06 +00:00
|
|
|
// if only first region is OK use it
|
|
|
|
configuration_handler_load_configuration(REGION_FIRST);
|
|
|
|
}
|
2021-06-13 18:25:45 +00:00
|
|
|
else if ((configuration_get_register() & CONFIG_FIRST_CRC_OK) == 0 && (configuration_get_register() & CONFIG_SECOND_CRC_OK) != 0) {
|
2021-05-12 20:52:06 +00:00
|
|
|
// if only first region is OK use it
|
|
|
|
configuration_handler_load_configuration(REGION_FIRST);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
configuration_handler_load_configuration(REGION_DEFAULT);
|
|
|
|
}
|
|
|
|
|
2021-09-10 20:38:13 +00:00
|
|
|
// set packets intervals
|
2021-09-12 15:16:16 +00:00
|
|
|
packet_tx_configure(main_config_data_basic->wx_transmit_period, main_config_data_basic->beacon_transmit_period, main_config_data_mode->powersave);
|
2021-09-10 20:38:13 +00:00
|
|
|
|
2022-04-19 17:56:53 +00:00
|
|
|
#if defined(STM32F10X_MD_VL)
|
2021-05-12 20:52:06 +00:00
|
|
|
// disabling access to BKP registers
|
|
|
|
RCC->APB1ENR &= (0xFFFFFFFF ^ (RCC_APB1ENR_PWREN | RCC_APB1ENR_BKPEN));
|
|
|
|
PWR->CR &= (0xFFFFFFFF ^ PWR_CR_DBP);
|
2021-06-13 06:36:32 +00:00
|
|
|
#endif
|
2021-05-12 20:52:06 +00:00
|
|
|
|
|
|
|
// converting latitude into string
|
|
|
|
memset(main_string_latitude, 0x00, sizeof(main_string_latitude));
|
|
|
|
float_to_string(main_config_data_basic->latitude, main_string_latitude, sizeof(main_string_latitude), 2, 2);
|
|
|
|
|
|
|
|
// converting longitude into string
|
|
|
|
memset(main_string_longitude, 0x00, sizeof(main_string_longitude));
|
|
|
|
float_to_string(main_config_data_basic->longitude, main_string_longitude, sizeof(main_string_longitude), 2, 5);
|
|
|
|
|
|
|
|
switch(main_config_data_basic->symbol) {
|
|
|
|
case 0: // _SYMBOL_DIGI
|
|
|
|
main_symbol_f = '/';
|
|
|
|
main_symbol_s = '#';
|
|
|
|
break;
|
|
|
|
case 1: // _SYMBOL_WIDE1_DIGI
|
|
|
|
main_symbol_f = '1';
|
|
|
|
main_symbol_s = '#';
|
|
|
|
break;
|
|
|
|
case 2: // _SYMBOL_HOUSE
|
|
|
|
main_symbol_f = '/';
|
|
|
|
main_symbol_s = '-';
|
|
|
|
break;
|
|
|
|
case 3: // _SYMBOL_RXIGATE
|
|
|
|
main_symbol_f = 'I';
|
|
|
|
main_symbol_s = '&';
|
|
|
|
break;
|
2021-09-15 21:07:11 +00:00
|
|
|
case 5: // _SYMBOL_SAILBOAT
|
|
|
|
main_symbol_f = '/';
|
|
|
|
main_symbol_s = 'Y';
|
|
|
|
break;
|
2021-05-12 20:52:06 +00:00
|
|
|
default: // _SYMBOL_IGATE
|
|
|
|
main_symbol_f = 'R';
|
|
|
|
main_symbol_s = '&';
|
|
|
|
break;
|
|
|
|
|
2021-05-09 20:30:32 +00:00
|
|
|
}
|
2021-04-29 21:27:48 +00:00
|
|
|
|
2019-01-26 17:02:19 +00:00
|
|
|
#if defined _RANDOM_DELAY
|
|
|
|
// configuring a default delay value
|
|
|
|
delay_set(_DELAY_BASE, 1);
|
|
|
|
#elif !defined _RANDOM_DELAY
|
|
|
|
delay_set(_DELAY_BASE, 0);
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
2022-04-09 14:48:11 +00:00
|
|
|
#if defined(PARAMETEO)
|
2021-08-22 18:30:22 +00:00
|
|
|
// initialize all powersaving functions
|
2021-09-11 19:04:08 +00:00
|
|
|
pwr_save_init(main_config_data_mode->powersave);
|
2022-03-26 18:43:41 +00:00
|
|
|
|
|
|
|
// initialize B+ measurement
|
2022-04-20 20:30:29 +00:00
|
|
|
io_vbat_meas_init(VBAT_MEAS_A_COEFF, VBAT_MEAS_B_COEFF);
|
2021-08-22 18:30:22 +00:00
|
|
|
#endif
|
|
|
|
|
2021-04-04 17:52:02 +00:00
|
|
|
// initalizing separated Open Collector output
|
|
|
|
io_oc_init();
|
|
|
|
|
2022-03-26 18:43:41 +00:00
|
|
|
// initializing GPIO used for swithing on and off voltages on pcb
|
|
|
|
io_pwr_init();
|
|
|
|
|
2020-06-11 18:36:36 +00:00
|
|
|
// initialize sensor power control and switch off supply voltage
|
2021-09-01 21:12:24 +00:00
|
|
|
wx_pwr_switch_init();
|
2020-06-11 18:36:36 +00:00
|
|
|
|
|
|
|
// call periodic handle to wait for 1 second and then switch on voltage
|
2021-09-01 21:12:24 +00:00
|
|
|
wx_pwr_switch_periodic_handle();
|
2020-06-11 18:36:36 +00:00
|
|
|
|
2020-10-29 18:48:06 +00:00
|
|
|
// waiting for 1 second to count number of ticks when the CPU is idle
|
|
|
|
main_idle_cpu_ticks = delay_fixed_with_count(1000);
|
|
|
|
|
2022-05-14 19:49:48 +00:00
|
|
|
// initializing UART gpio pins
|
|
|
|
io_uart_init();
|
2021-06-13 06:36:32 +00:00
|
|
|
|
2022-04-19 17:56:53 +00:00
|
|
|
#if defined(STM32F10X_MD_VL)
|
2020-04-12 17:05:41 +00:00
|
|
|
// enabling the clock for both USARTs
|
|
|
|
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
|
|
|
|
RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
|
2021-06-13 06:36:32 +00:00
|
|
|
#endif
|
2020-04-12 17:05:41 +00:00
|
|
|
|
|
|
|
main_kiss_srl_ctx_ptr = &main_kiss_srl_ctx;
|
|
|
|
main_wx_srl_ctx_ptr = &main_wx_srl_ctx;
|
2022-02-20 13:24:48 +00:00
|
|
|
#if defined(STM32L471xx)
|
2022-01-24 20:51:45 +00:00
|
|
|
main_gsm_srl_ctx_ptr = &main_gsm_srl_ctx;
|
|
|
|
#endif
|
2020-04-13 12:01:07 +00:00
|
|
|
|
|
|
|
main_target_kiss_baudrate = 9600u;
|
|
|
|
main_target_wx_baudrate = _SERIAL_BAUDRATE;
|
2020-04-12 17:05:41 +00:00
|
|
|
|
2022-01-24 20:51:45 +00:00
|
|
|
|
2022-04-09 14:48:11 +00:00
|
|
|
#if defined(PARAMETEO)
|
2021-09-10 20:38:13 +00:00
|
|
|
// swtich power to M4. turn on sensors but keep GSM modem turned off
|
2022-05-11 16:26:13 +00:00
|
|
|
pwr_save_switch_mode_to_c1();
|
2022-04-09 14:48:11 +00:00
|
|
|
|
2021-09-10 20:38:13 +00:00
|
|
|
#endif
|
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
#ifndef PARAMETEO
|
2021-03-22 21:28:26 +00:00
|
|
|
// if Victron VE-direct protocol is enabled set the baudrate to the 19200u
|
2021-04-26 19:04:04 +00:00
|
|
|
if (main_config_data_mode->victron == 1) {
|
2021-03-22 21:28:26 +00:00
|
|
|
main_target_kiss_baudrate = 19200u;
|
|
|
|
|
|
|
|
// and disable the kiss TNC option as it shares the same port
|
|
|
|
main_kiss_enabled = 0;
|
|
|
|
}
|
2022-05-08 06:58:07 +00:00
|
|
|
#endif
|
2021-03-22 21:28:26 +00:00
|
|
|
|
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
if (main_config_data_mode->wx_davis == 1) {
|
|
|
|
// reinitialize the KISS serial port temporary to davis baudrate
|
|
|
|
main_target_kiss_baudrate = DAVIS_DEFAULT_BAUDRATE;
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// reset RX state to allow reinitialization with changed baudrate
|
|
|
|
main_kiss_srl_ctx_ptr->srl_rx_state = SRL_RX_NOT_CONFIG;
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// reinitializing serial hardware to wake up Davis wx station
|
|
|
|
srl_init(main_kiss_srl_ctx_ptr, USART1, srl_usart1_rx_buffer, RX_BUFFER_1_LN, srl_usart1_tx_buffer, TX_BUFFER_1_LN, main_target_kiss_baudrate, 1);
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
srl_switch_timeout(main_kiss_srl_ctx_ptr, SRL_TIMEOUT_ENABLE, 3000);
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
davis_init(main_kiss_srl_ctx_ptr);
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// try to wake up the davis base
|
|
|
|
rte_wx_davis_station_avaliable = (davis_wake_up(DAVIS_BLOCKING_IO) == 0 ? 1 : 0);
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// if davis weather stations is connected to SERIAL port
|
|
|
|
if (rte_wx_davis_station_avaliable == 1) {
|
|
|
|
// turn LCD backlight on..
|
|
|
|
davis_control_backlight(1);
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// wait for a while
|
|
|
|
delay_fixed(1000);
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// and then off to let the user know that communication is working
|
|
|
|
davis_control_backlight(0);
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// disable the KISS modem as the UART will be used for DAVIS wx station
|
|
|
|
main_kiss_enabled = 0;
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// enable the davis serial protocol client to allow pooling callbacks to be called in main loop.
|
|
|
|
// This only controls the callback it doesn't mean that the station itself is responding to
|
|
|
|
// communication. It stays set to one event if Davis station
|
|
|
|
main_davis_serial_enabled = 1;
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// trigger the rxcheck to get all counter values
|
|
|
|
davis_trigger_rxcheck_packet();
|
2020-09-11 21:06:55 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
// if not revert back to KISS configuration
|
|
|
|
main_target_kiss_baudrate = 9600u;
|
|
|
|
main_kiss_srl_ctx_ptr->srl_rx_state = SRL_RX_NOT_CONFIG;
|
2020-09-20 12:13:24 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// initializing UART drvier
|
|
|
|
srl_init(main_kiss_srl_ctx_ptr, USART1, srl_usart1_rx_buffer, RX_BUFFER_1_LN, srl_usart1_tx_buffer, TX_BUFFER_1_LN, main_target_kiss_baudrate, 1);
|
|
|
|
srl_init(main_wx_srl_ctx_ptr, USART2, srl_usart2_rx_buffer, RX_BUFFER_2_LN, srl_usart2_tx_buffer, TX_BUFFER_2_LN, main_target_wx_baudrate, 1);
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
}
|
2020-09-07 21:25:58 +00:00
|
|
|
}
|
2021-05-26 19:28:29 +00:00
|
|
|
else if (main_config_data_mode->wx_modbus == 1) {
|
2020-09-07 21:25:58 +00:00
|
|
|
|
2021-04-26 19:04:04 +00:00
|
|
|
rtu_serial_init(&rte_rtu_pool_queue, 1, main_wx_srl_ctx_ptr, main_config_data_rtu);
|
2020-09-20 12:13:24 +00:00
|
|
|
|
2021-04-26 19:04:04 +00:00
|
|
|
main_target_wx_baudrate = main_config_data_rtu->slave_speed;
|
2020-09-20 12:13:24 +00:00
|
|
|
|
2021-03-23 21:11:51 +00:00
|
|
|
// initialize serial ports according to RS485 network configuration for Modbus-RTU
|
|
|
|
srl_init(main_kiss_srl_ctx_ptr, USART1, srl_usart1_rx_buffer, RX_BUFFER_1_LN, srl_usart1_tx_buffer, TX_BUFFER_1_LN, main_target_kiss_baudrate, 1);
|
2021-04-26 19:04:04 +00:00
|
|
|
srl_init(main_wx_srl_ctx_ptr, USART2, srl_usart2_rx_buffer, RX_BUFFER_2_LN, srl_usart2_tx_buffer, TX_BUFFER_2_LN, main_target_wx_baudrate, main_config_data_rtu->slave_stop_bits);
|
2021-03-23 21:11:51 +00:00
|
|
|
srl_switch_tx_delay(main_wx_srl_ctx_ptr, 1);
|
2020-09-25 17:43:53 +00:00
|
|
|
|
2021-03-23 21:11:51 +00:00
|
|
|
// enabling rtu master code
|
|
|
|
main_modbus_rtu_master_enabled = 1;
|
2020-09-20 12:13:24 +00:00
|
|
|
|
2021-03-23 21:11:51 +00:00
|
|
|
rtu_serial_start();
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
// initializing UART drvier
|
|
|
|
srl_init(main_kiss_srl_ctx_ptr, USART1, srl_usart1_rx_buffer, RX_BUFFER_1_LN, srl_usart1_tx_buffer, TX_BUFFER_1_LN, main_target_kiss_baudrate, 1);
|
|
|
|
srl_init(main_wx_srl_ctx_ptr, USART2, srl_usart2_rx_buffer, RX_BUFFER_2_LN, srl_usart2_tx_buffer, TX_BUFFER_2_LN, main_target_wx_baudrate, 1);
|
|
|
|
}
|
2020-09-20 12:13:24 +00:00
|
|
|
|
2022-04-19 17:56:53 +00:00
|
|
|
#if defined(STM32F10X_MD_VL)
|
2020-09-20 12:13:24 +00:00
|
|
|
main_wx_srl_ctx_ptr->te_pin = GPIO_Pin_8;
|
|
|
|
main_wx_srl_ctx_ptr->te_port = GPIOA;
|
2020-09-07 21:25:58 +00:00
|
|
|
#endif
|
2022-04-20 20:30:29 +00:00
|
|
|
#if defined(STM32L471xx)
|
2021-05-30 14:27:41 +00:00
|
|
|
main_wx_srl_ctx_ptr->te_pin = LL_GPIO_PIN_8;
|
|
|
|
main_wx_srl_ctx_ptr->te_port = GPIOA;
|
2022-01-24 20:51:45 +00:00
|
|
|
|
2022-04-17 16:08:55 +00:00
|
|
|
srl_init(main_gsm_srl_ctx_ptr, USART3, srl_usart3_rx_buffer, RX_BUFFER_3_LN, srl_usart3_tx_buffer, TX_BUFFER_3_LN, 115200, 1);
|
2021-05-30 14:27:41 +00:00
|
|
|
#endif
|
2020-08-25 18:05:04 +00:00
|
|
|
|
2021-01-12 14:19:31 +00:00
|
|
|
// initialize APRS path with zeros
|
|
|
|
memset (main_own_path, 0x00, sizeof(main_own_path));
|
|
|
|
|
2019-01-26 17:02:19 +00:00
|
|
|
// configuring an APRS path used to transmit own packets (telemetry, wx, beacons)
|
2021-04-26 19:04:04 +00:00
|
|
|
main_own_path_ln = ConfigPath(main_own_path, main_config_data_basic);
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2020-06-14 13:33:27 +00:00
|
|
|
#ifdef INTERNAL_WATCHDOG
|
2022-04-19 17:56:53 +00:00
|
|
|
#if defined(STM32F10X_MD_VL)
|
2020-06-14 13:33:27 +00:00
|
|
|
// enable write access to watchdog registers
|
|
|
|
IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
|
|
|
|
|
|
|
|
// Set watchdog prescaler
|
2020-06-21 13:13:38 +00:00
|
|
|
IWDG_SetPrescaler(IWDG_Prescaler_128);
|
2020-06-14 13:33:27 +00:00
|
|
|
|
2020-06-21 13:13:38 +00:00
|
|
|
// Set the counter value to program watchdog for about 13 seconds
|
2020-06-14 13:33:27 +00:00
|
|
|
IWDG_SetReload(0xFFF);
|
|
|
|
|
|
|
|
// enable the watchdog
|
|
|
|
IWDG_Enable();
|
|
|
|
|
|
|
|
// do not disable the watchdog when the core is halted on a breakpoint
|
2021-05-18 19:48:09 +00:00
|
|
|
DBGMCU_Config(DBGMCU_IWDG_STOP, ENABLE);
|
2020-06-14 13:33:27 +00:00
|
|
|
|
|
|
|
// reload watchdog counter
|
|
|
|
IWDG_ReloadCounter();
|
|
|
|
#endif
|
2021-06-13 06:36:32 +00:00
|
|
|
#endif
|
2020-06-14 13:33:27 +00:00
|
|
|
|
2017-08-20 12:41:17 +00:00
|
|
|
#ifdef _METEO
|
2020-01-04 13:15:33 +00:00
|
|
|
// initialize i2c controller
|
2017-08-20 12:41:17 +00:00
|
|
|
i2cConfigure();
|
|
|
|
#endif
|
2020-01-04 13:15:33 +00:00
|
|
|
|
|
|
|
// initialize GPIO pins leds are connecting to
|
|
|
|
led_init();
|
|
|
|
|
|
|
|
// initialize AX25 & APRS stuff
|
2019-01-26 22:18:25 +00:00
|
|
|
AFSK_Init(&main_afsk);
|
|
|
|
ax25_init(&main_ax25, &main_afsk, 0, 0x00);
|
2017-08-20 12:41:17 +00:00
|
|
|
DA_Init();
|
|
|
|
|
2021-06-13 18:25:45 +00:00
|
|
|
// configure external watchdog
|
|
|
|
io_ext_watchdog_config();
|
2020-04-04 21:09:00 +00:00
|
|
|
|
2020-10-11 20:14:41 +00:00
|
|
|
// initializing the digipeater configuration
|
2021-04-26 19:04:04 +00:00
|
|
|
digi_init(main_config_data_mode);
|
2020-10-11 20:14:41 +00:00
|
|
|
|
2021-05-18 21:00:48 +00:00
|
|
|
if ((main_config_data_mode->wx & WX_ENABLED) == 1) {
|
2022-04-19 17:56:53 +00:00
|
|
|
#if defined(STM32F10X_MD_VL)
|
2019-10-27 19:50:01 +00:00
|
|
|
dallas_init(GPIOC, GPIO_Pin_11, GPIO_PinSource11, &rte_wx_dallas_average);
|
2021-06-13 06:36:32 +00:00
|
|
|
#endif
|
|
|
|
|
2022-04-19 17:56:53 +00:00
|
|
|
#if defined(STM32L471xx)
|
2021-09-01 21:12:24 +00:00
|
|
|
// initialize dallas one-wire driver for termometer
|
2021-06-13 06:36:32 +00:00
|
|
|
dallas_init(GPIOC, LL_GPIO_PIN_11, 0x0, &rte_wx_dallas_average);
|
|
|
|
#endif
|
2020-02-23 17:22:37 +00:00
|
|
|
|
2021-05-18 21:00:48 +00:00
|
|
|
if (main_config_data_mode->wx_umb == 1) {
|
|
|
|
// client initialization
|
|
|
|
umb_master_init(&rte_wx_umb_context, main_wx_srl_ctx_ptr, main_config_data_umb);
|
|
|
|
}
|
2020-02-23 17:22:37 +00:00
|
|
|
|
2021-05-18 21:00:48 +00:00
|
|
|
if ((main_config_data_mode->wx & WX_INTERNAL_SPARKFUN_WIND) == 0) {
|
2021-09-24 13:03:19 +00:00
|
|
|
analog_anemometer_init(main_config_data_mode->wx_anemometer_pulses_constant, 38, 100, 1);
|
2021-05-18 21:00:48 +00:00
|
|
|
}
|
|
|
|
else {
|
2021-09-24 13:03:19 +00:00
|
|
|
analog_anemometer_init(main_config_data_mode->wx_anemometer_pulses_constant, 38, 100, 1);
|
2021-05-18 21:00:48 +00:00
|
|
|
}
|
|
|
|
}
|
2019-12-26 19:55:47 +00:00
|
|
|
|
2019-01-27 12:14:36 +00:00
|
|
|
// configuring interrupt priorities
|
|
|
|
it_handlers_set_priorities();
|
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
// read calibration data from I2C pressure / humidity sensor
|
2021-05-26 19:28:29 +00:00
|
|
|
if (main_config_data_mode->wx_ms5611_or_bme == 0) {
|
2022-05-08 06:58:07 +00:00
|
|
|
ms5611_reset(&rte_wx_ms5611_qf);
|
|
|
|
ms5611_read_calibration(SensorCalData, &rte_wx_ms5611_qf);
|
|
|
|
ms5611_trigger_measure(0, 0);
|
2021-05-26 19:28:29 +00:00
|
|
|
}
|
|
|
|
else if (main_config_data_mode->wx_ms5611_or_bme == 1) {
|
2022-05-08 06:58:07 +00:00
|
|
|
bme280_reset(&rte_wx_bme280_qf);
|
|
|
|
bme280_setup();
|
|
|
|
bme280_read_calibration(bme280_calibration_data);
|
2021-05-26 19:28:29 +00:00
|
|
|
}
|
2020-06-21 21:11:16 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
if (main_kiss_enabled == 1) {
|
|
|
|
// preparing initial beacon which will be sent to host PC using KISS protocol via UART
|
2021-05-12 20:52:06 +00:00
|
|
|
main_own_aprs_msg_len = sprintf(main_own_aprs_msg, "=%s%c%c%s%c%c %s", main_string_latitude, main_config_data_basic->n_or_s, main_symbol_f, main_string_longitude, main_config_data_basic->e_or_w, main_symbol_s, main_config_data_basic->comment);
|
2019-01-12 13:44:16 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// terminating the aprs message
|
|
|
|
main_own_aprs_msg[main_own_aprs_msg_len] = 0;
|
2019-01-12 13:44:16 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// 'sending' the message which will only encapsulate it inside AX25 protocol (ax25_starttx is not called here)
|
|
|
|
//ax25_sendVia(&main_ax25, main_own_path, (sizeof(main_own_path) / sizeof(*(main_own_path))), main_own_aprs_msg, main_own_aprs_msg_len);
|
2021-05-24 17:04:19 +00:00
|
|
|
ln = ax25_sendVia_toBuffer(main_own_path, (sizeof(main_own_path) / sizeof(*(main_own_path))), main_own_aprs_msg, main_own_aprs_msg_len, main_kiss_srl_ctx.srl_tx_buf_pointer, TX_BUFFER_1_LN);
|
2019-01-12 13:44:16 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// SendKISSToHost function cleares the output buffer hence routine need to wait till the UART will be ready for next transmission.
|
|
|
|
// Here this could be omitted because UART isn't used before but general idea
|
|
|
|
while(main_kiss_srl_ctx.srl_tx_state != SRL_TX_IDLE && main_kiss_srl_ctx.srl_tx_state != SRL_TX_ERROR);
|
2019-01-12 13:44:16 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// converting AX25 with beacon to KISS format
|
|
|
|
//ln = SendKISSToHost(main_afsk.tx_buf + 1, main_afsk.tx_fifo.tail - main_afsk.tx_fifo.head - 4, srl_tx_buffer, TX_BUFFER_LN);
|
2019-01-12 13:44:16 +00:00
|
|
|
|
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// checking if KISS-framing was done correctly
|
|
|
|
if (ln != KISS_TOO_LONG_FRM) {
|
|
|
|
#ifdef SERIAL_TX_TEST_MODE
|
|
|
|
// infinite loop for testing UART transmission
|
|
|
|
for (;;) {
|
|
|
|
|
|
|
|
retval = srl_receive_data(main_kiss_srl_ctx_ptr, 100, FEND, FEND, 0, 0, 0);
|
|
|
|
#endif
|
|
|
|
retval = srl_start_tx(main_kiss_srl_ctx_ptr, ln);
|
2019-01-12 13:44:16 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
#ifdef SERIAL_TX_TEST_MODE
|
2021-07-07 20:45:50 +00:00
|
|
|
while(main_kiss_srl_ctx_ptr->srl_tx_state != SRL_TX_IDLE);
|
2019-01-13 14:57:59 +00:00
|
|
|
|
2021-07-07 20:45:50 +00:00
|
|
|
#if defined(PARAMETEO)
|
|
|
|
LL_GPIO_TogglePin(GPIOC, LL_GPIO_PIN_9);
|
|
|
|
#else
|
|
|
|
GPIOC->ODR = (GPIOC->ODR ^ GPIO_Pin_9);
|
|
|
|
#endif
|
2019-03-13 18:54:01 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
if (main_kiss_srl_ctx_ptr->srl_rx_state == SRL_RX_DONE) {
|
2021-07-07 20:45:50 +00:00
|
|
|
#if defined(PARAMETEO)
|
|
|
|
LL_GPIO_TogglePin(GPIOC, LL_GPIO_PIN_9);
|
|
|
|
#else
|
|
|
|
GPIOC->ODR = (GPIOC->ODR ^ GPIO_Pin_9);
|
|
|
|
#endif
|
2021-03-22 21:28:26 +00:00
|
|
|
retval = 200;
|
|
|
|
}
|
2019-01-13 14:57:59 +00:00
|
|
|
}
|
2021-03-22 21:28:26 +00:00
|
|
|
#endif
|
2019-01-12 13:44:16 +00:00
|
|
|
}
|
2021-03-22 21:28:26 +00:00
|
|
|
|
|
|
|
}
|
2019-01-12 13:44:16 +00:00
|
|
|
|
|
|
|
// reinitializing AFSK and AX25 driver
|
2019-01-26 22:18:25 +00:00
|
|
|
AFSK_Init(&main_afsk);
|
2017-08-20 12:41:17 +00:00
|
|
|
|
|
|
|
ADCStartConfig();
|
|
|
|
DACStartConfig();
|
2019-01-26 22:18:25 +00:00
|
|
|
AFSK_Init(&main_afsk);
|
|
|
|
ax25_init(&main_ax25, &main_afsk, 0, message_callback);
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
if ((main_config_data_mode->wx & WX_ENABLED) == 1) {
|
|
|
|
// getting all meteo measuremenets to be sure that WX frames want be sent with zeros
|
|
|
|
wx_get_all_measurements(main_config_data_wx_sources, main_config_data_mode, main_config_data_umb, main_config_data_rtu);
|
|
|
|
}
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
#ifndef PARAMETEO
|
2021-03-22 21:28:26 +00:00
|
|
|
// start serial port i/o transaction depending on station configuration
|
2021-04-26 19:04:04 +00:00
|
|
|
if (main_config_data_mode->victron == 1) {
|
2021-03-22 21:28:26 +00:00
|
|
|
// initializing protocol parser
|
|
|
|
ve_direct_parser_init(&rte_pv_struct, &rte_pv_average);
|
2020-02-23 17:22:37 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// enabling timeout handling for serial port. This is required because VE protocol frame may vary in lenght
|
|
|
|
// and serial port driver could finish reception only either on stop character or when declared number of bytes
|
|
|
|
// has been received.
|
2021-03-23 07:01:33 +00:00
|
|
|
srl_switch_timeout(main_kiss_srl_ctx_ptr, 1, 50);
|
2020-02-23 17:22:37 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// switching UART to receive mode to be ready for data from charging controller
|
2021-03-23 07:01:33 +00:00
|
|
|
srl_receive_data(main_kiss_srl_ctx_ptr, VE_DIRECT_MAX_FRAME_LN, 0, 0, 0, 0, 0);
|
2021-03-22 21:28:26 +00:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
// switching UART to receive mode to be ready for KISS frames from host
|
|
|
|
srl_receive_data(main_kiss_srl_ctx_ptr, 100, FEND, FEND, 0, 0, 0);
|
|
|
|
}
|
2022-05-08 06:58:07 +00:00
|
|
|
#else
|
|
|
|
// switching UART to receive mode to be ready for KISS frames from host
|
|
|
|
srl_receive_data(main_kiss_srl_ctx_ptr, 100, FEND, FEND, 0, 0, 0);
|
|
|
|
#endif
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2020-06-11 18:36:36 +00:00
|
|
|
io_oc_output_low();
|
2021-06-13 06:36:32 +00:00
|
|
|
|
2021-06-13 18:25:45 +00:00
|
|
|
led_control_led1_upper(false);
|
|
|
|
led_control_led2_bottom(false);
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2022-04-09 14:48:11 +00:00
|
|
|
#if defined(PARAMETEO)
|
2022-03-27 05:45:24 +00:00
|
|
|
rte_main_battery_voltage = io_vbat_meas_get();
|
2022-04-22 18:43:28 +00:00
|
|
|
rte_main_average_battery_voltage = rte_main_battery_voltage;
|
2022-03-26 18:43:41 +00:00
|
|
|
|
2022-05-11 16:26:13 +00:00
|
|
|
if (main_config_data_mode->gsm == 1) {
|
|
|
|
pwr_save_switch_mode_to_c0();
|
|
|
|
}
|
2021-09-22 21:48:19 +00:00
|
|
|
|
|
|
|
// sleep a little bit and wait for everything to power up completely
|
|
|
|
delay_fixed(1000);
|
|
|
|
|
|
|
|
led_control_led1_upper(true);
|
|
|
|
led_control_led2_bottom(false);
|
|
|
|
|
2022-05-06 12:53:21 +00:00
|
|
|
io___cntrl_gprs_pwrkey_press();
|
|
|
|
|
2021-09-22 21:48:19 +00:00
|
|
|
delay_fixed(1000);
|
|
|
|
|
|
|
|
led_control_led1_upper(false);
|
|
|
|
led_control_led2_bottom(true);
|
|
|
|
|
|
|
|
delay_fixed(1000);
|
|
|
|
|
|
|
|
led_control_led1_upper(true);
|
|
|
|
led_control_led2_bottom(true);
|
|
|
|
|
|
|
|
delay_fixed(1000);
|
|
|
|
|
|
|
|
led_control_led1_upper(false);
|
|
|
|
led_control_led2_bottom(false);
|
|
|
|
|
2022-05-06 12:53:21 +00:00
|
|
|
io___cntrl_gprs_pwrkey_release();
|
|
|
|
|
2021-09-22 21:48:19 +00:00
|
|
|
#endif
|
|
|
|
|
2019-01-26 22:18:25 +00:00
|
|
|
// configuting system timers
|
2018-04-20 21:23:50 +00:00
|
|
|
TimerConfig();
|
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// initialize UMB transaction
|
2021-04-26 19:04:04 +00:00
|
|
|
if (main_config_data_mode->wx_umb == 1) {
|
|
|
|
umb_0x26_status_request(&rte_wx_umb, &rte_wx_umb_context, main_config_data_umb);
|
2021-03-22 21:28:26 +00:00
|
|
|
}
|
2020-03-17 21:52:10 +00:00
|
|
|
|
2020-06-14 13:33:27 +00:00
|
|
|
#ifdef INTERNAL_WATCHDOG
|
|
|
|
// reload watchdog counter
|
|
|
|
IWDG_ReloadCounter();
|
|
|
|
#endif
|
|
|
|
|
2021-06-13 18:25:45 +00:00
|
|
|
io_ext_watchdog_service();
|
2020-07-28 06:31:12 +00:00
|
|
|
|
2022-02-20 13:24:48 +00:00
|
|
|
#ifdef STM32L471xx
|
2022-01-24 20:51:45 +00:00
|
|
|
if (main_config_data_mode->gsm == 1) {
|
2022-01-25 20:00:55 +00:00
|
|
|
gsm_sim800_init(&main_gsm_state, 1);
|
2022-02-23 22:05:39 +00:00
|
|
|
|
2022-04-29 14:29:37 +00:00
|
|
|
http_client_init(&main_gsm_state, main_gsm_srl_ctx_ptr, 0);
|
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
api_init((const char *)main_config_data_gsm->api_base_url, (const char *)main_config_data_gsm->api_station_name);
|
2022-04-30 11:58:23 +00:00
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
aprsis_init(&main_gsm_srl_ctx, &main_gsm_state, (const char *)main_config_data_basic->callsign, main_config_data_basic->ssid, (const char *)main_config_data_gsm->aprsis_passcode, (const char *)main_config_data_gsm->aprsis_server_address, main_config_data_gsm->aprsis_server_port);
|
2022-01-24 20:51:45 +00:00
|
|
|
}
|
2022-04-19 17:56:53 +00:00
|
|
|
|
|
|
|
pwm_input_io_init();
|
|
|
|
|
|
|
|
pwm_input_init(1);
|
2022-02-20 13:24:48 +00:00
|
|
|
#endif
|
2022-01-24 20:51:45 +00:00
|
|
|
|
2021-09-22 21:48:19 +00:00
|
|
|
if (main_config_data_basic-> beacon_at_bootup == 1) {
|
2022-04-09 14:48:11 +00:00
|
|
|
#if defined(PARAMETEO)
|
|
|
|
beacon_send_own(rte_main_battery_voltage);
|
2022-04-22 18:43:28 +00:00
|
|
|
delay_fixed(1500);
|
2022-04-09 14:48:11 +00:00
|
|
|
#else
|
|
|
|
beacon_send_own(0);
|
|
|
|
|
|
|
|
#endif
|
2022-04-20 20:30:29 +00:00
|
|
|
|
2022-04-22 18:43:28 +00:00
|
|
|
#if defined(PARAMETEO)
|
2022-04-20 20:30:29 +00:00
|
|
|
telemetry_send_status_powersave_registers(REGISTER_LAST_SLEEP, REGISTER_LAST_WKUP, REGISTER_COUNTERS, REGISTER_MONITOR, REGISTER_LAST_SLTIM);
|
2022-04-22 18:43:28 +00:00
|
|
|
#endif
|
2021-09-22 21:48:19 +00:00
|
|
|
}
|
2021-09-13 09:41:44 +00:00
|
|
|
|
2017-08-20 12:41:17 +00:00
|
|
|
// Infinite loop
|
|
|
|
while (1)
|
|
|
|
{
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(-1);
|
|
|
|
|
2020-10-29 18:48:06 +00:00
|
|
|
// incrementing current cpu ticks
|
|
|
|
main_current_cpu_idle_ticks++;
|
|
|
|
|
2021-04-26 19:04:04 +00:00
|
|
|
if (rte_main_reboot_req == 1) {
|
2019-05-05 07:48:51 +00:00
|
|
|
NVIC_SystemReset();
|
2021-04-26 19:04:04 +00:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
;
|
|
|
|
}
|
2019-05-05 07:48:51 +00:00
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(0);
|
2022-04-30 12:05:14 +00:00
|
|
|
|
2022-04-19 17:56:53 +00:00
|
|
|
#if defined(STM32F10X_MD_VL)
|
2021-05-26 19:28:29 +00:00
|
|
|
// read the state of a button input
|
2017-08-20 12:41:17 +00:00
|
|
|
if (GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_0)) {
|
2019-01-27 13:23:20 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// if modem is not busy on transmitting something and the button is not
|
|
|
|
// inhibited
|
2019-01-27 13:23:20 +00:00
|
|
|
if (main_afsk.sending == false && button_inhibit == 0) {
|
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
// wait for radio channel to be released
|
2019-01-27 13:23:20 +00:00
|
|
|
while(main_ax25.dcd == true);
|
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
if ((main_config_data_mode->wx & WX_ENABLED) == 0) {
|
2020-01-04 13:15:33 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
beacon_send_own();
|
|
|
|
}
|
|
|
|
else {
|
2020-01-04 13:15:33 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
srl_wait_for_tx_completion(main_kiss_srl_ctx_ptr);
|
2020-05-09 07:15:12 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
SendWXFrameToBuffer(rte_wx_average_windspeed, rte_wx_max_windspeed, rte_wx_average_winddirection, rte_wx_temperature_average_external_valid, rte_wx_pressure_valid, rte_wx_humidity, main_kiss_srl_ctx.srl_tx_buf_pointer, TX_BUFFER_1_LN, &ln);
|
2020-05-09 07:15:12 +00:00
|
|
|
|
2021-05-26 19:28:29 +00:00
|
|
|
if (main_kiss_enabled == 1) {
|
|
|
|
srl_start_tx(main_kiss_srl_ctx_ptr, ln);
|
|
|
|
}
|
2021-03-22 21:28:26 +00:00
|
|
|
}
|
2019-01-27 13:23:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
button_inhibit = 1;
|
2017-08-20 12:41:17 +00:00
|
|
|
}
|
|
|
|
else {
|
2019-01-27 13:23:20 +00:00
|
|
|
button_inhibit = 0;
|
2017-08-20 12:41:17 +00:00
|
|
|
}
|
2021-09-22 21:48:19 +00:00
|
|
|
#endif
|
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
#if defined(PARAMETEO)
|
|
|
|
if (main_woken_up == 1) {
|
|
|
|
|
2022-04-22 18:43:28 +00:00
|
|
|
rte_main_battery_voltage = io_vbat_meas_get();
|
|
|
|
rte_main_average_battery_voltage = io_vbat_meas_average(rte_main_battery_voltage);
|
|
|
|
|
|
|
|
// meas average will return 0 if internal buffer isn't filled completely
|
|
|
|
if (rte_main_average_battery_voltage == 0) {
|
|
|
|
rte_main_average_battery_voltage = rte_main_battery_voltage;
|
|
|
|
}
|
2022-04-20 20:30:29 +00:00
|
|
|
|
|
|
|
// reinitialize APRS radio modem to clear all possible intermittent state caused by
|
|
|
|
// switching power state in the middle of reception APRS packet
|
|
|
|
ax25_new_msg_rx_flag = 0;
|
|
|
|
main_ax25.dcd = false;
|
|
|
|
|
|
|
|
main_woken_up = 0;
|
|
|
|
|
|
|
|
main_set_monitor(1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
main_set_monitor(11);
|
2017-08-20 12:41:17 +00:00
|
|
|
|
2019-01-26 22:18:25 +00:00
|
|
|
// if new packet has been received from radio channel
|
2019-03-18 20:12:05 +00:00
|
|
|
if(ax25_new_msg_rx_flag == 1) {
|
2019-01-26 22:18:25 +00:00
|
|
|
|
2022-04-07 18:56:35 +00:00
|
|
|
// if serial port is currently not busy on transmission
|
|
|
|
if (main_kiss_srl_ctx_ptr->srl_tx_state != SRL_TXING) {
|
|
|
|
memset(main_kiss_srl_ctx.srl_tx_buf_pointer, 0x00, main_kiss_srl_ctx.srl_tx_buf_ln);
|
|
|
|
|
|
|
|
if (main_kiss_enabled == 1) {
|
|
|
|
// convert message to kiss format and send it to host
|
|
|
|
srl_start_tx(main_kiss_srl_ctx_ptr, SendKISSToHost(ax25_rxed_frame.raw_data, (ax25_rxed_frame.raw_msg_len - 2), main_kiss_srl_ctx.srl_tx_buf_pointer, main_kiss_srl_ctx.srl_tx_buf_ln));
|
|
|
|
}
|
2020-09-07 21:25:58 +00:00
|
|
|
}
|
2018-04-20 21:23:50 +00:00
|
|
|
|
2019-01-26 22:18:25 +00:00
|
|
|
main_ax25.dcd = false;
|
2020-10-11 20:14:41 +00:00
|
|
|
|
2021-11-29 09:52:16 +00:00
|
|
|
digi_check_with_viscous(&ax25_rxed_frame);
|
2020-08-06 21:31:20 +00:00
|
|
|
|
2020-08-05 21:27:25 +00:00
|
|
|
// check if this packet needs to be repeated (digipeated) and do it if it is necessary
|
2021-04-26 19:04:04 +00:00
|
|
|
digi_process(&ax25_rxed_frame, main_config_data_basic, main_config_data_mode);
|
2021-11-29 09:52:16 +00:00
|
|
|
|
2019-03-18 20:12:05 +00:00
|
|
|
ax25_new_msg_rx_flag = 0;
|
2017-08-20 12:41:17 +00:00
|
|
|
rx10m++;
|
2022-05-02 21:07:08 +00:00
|
|
|
rte_main_rx_total++;
|
2017-08-20 12:41:17 +00:00
|
|
|
}
|
|
|
|
|
2022-02-20 13:24:48 +00:00
|
|
|
#ifdef STM32L471xx
|
2022-01-24 20:51:45 +00:00
|
|
|
// if GSM communication is enabled
|
|
|
|
if (main_config_data_mode->gsm == 1) {
|
|
|
|
|
|
|
|
// if data has been received
|
2022-01-25 20:00:55 +00:00
|
|
|
if (main_gsm_srl_ctx_ptr->srl_rx_state == SRL_RX_DONE || main_gsm_srl_ctx_ptr->srl_rx_state == SRL_RX_ERROR) {
|
2022-01-24 20:51:45 +00:00
|
|
|
|
|
|
|
// receive callback for communicatio with the modem
|
2022-01-25 22:37:37 +00:00
|
|
|
gsm_sim800_rx_done_event_handler(main_gsm_srl_ctx_ptr, &main_gsm_state);
|
|
|
|
|
2022-02-26 13:24:18 +00:00
|
|
|
//srl_reset(main_gsm_srl_ctx_ptr);
|
2022-01-24 20:51:45 +00:00
|
|
|
}
|
2022-01-26 23:22:05 +00:00
|
|
|
|
|
|
|
if (main_gsm_srl_ctx_ptr->srl_tx_state == SRL_TX_IDLE) {
|
|
|
|
gsm_sim800_tx_done_event_handler(main_gsm_srl_ctx_ptr, &main_gsm_state);
|
|
|
|
}
|
|
|
|
|
2022-01-27 23:08:01 +00:00
|
|
|
// gsm_sim800_engineering_enable(main_gsm_srl_ctx_ptr, &main_gsm_state);
|
|
|
|
// gsm_sim800_engineering_request_data(main_gsm_srl_ctx_ptr, &main_gsm_state);
|
2022-02-17 19:48:30 +00:00
|
|
|
//gsm_sim800_engineering_disable(main_gsm_srl_ctx_ptr, &main_gsm_state);
|
2022-01-24 20:51:45 +00:00
|
|
|
}
|
2022-02-20 13:24:48 +00:00
|
|
|
#endif
|
2022-01-24 20:51:45 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// if Victron VE.direct client is enabled
|
2021-04-26 19:04:04 +00:00
|
|
|
if (main_config_data_mode->victron == 1) {
|
2022-05-08 06:58:07 +00:00
|
|
|
#ifndef PARAMETEO
|
2021-03-22 21:28:26 +00:00
|
|
|
// if new KISS message has been received from the host
|
|
|
|
if (main_kiss_srl_ctx_ptr->srl_rx_state == SRL_RX_DONE || main_kiss_srl_ctx_ptr->srl_rx_state == SRL_RX_ERROR) {
|
2019-02-10 16:16:37 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// cutting received string to Checksum, everything after will be skipped
|
|
|
|
ve_direct_cut_to_checksum(srl_get_rx_buffer(main_kiss_srl_ctx_ptr), TX_BUFFER_1_LN, &buffer_len);
|
2019-04-03 09:41:37 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// checking if this frame is ok
|
|
|
|
ve_direct_validate_checksum(srl_get_rx_buffer(main_kiss_srl_ctx_ptr), buffer_len, &retval);
|
2019-04-03 09:41:37 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
if (retval == 1) {
|
|
|
|
// parsing data from input serial buffer to
|
|
|
|
retval = ve_direct_parse_to_raw_struct(srl_get_rx_buffer(main_kiss_srl_ctx_ptr), buffer_len, &rte_pv_struct);
|
2019-04-03 09:41:37 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
if (retval == 0) {
|
|
|
|
ve_direct_add_to_average(&rte_pv_struct, &rte_pv_average);
|
2019-04-03 09:41:37 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
ve_direct_get_averages(&rte_pv_average, &rte_pv_battery_current, &rte_pv_battery_voltage, &rte_pv_cell_voltage, &rte_pv_load_current);
|
2019-04-04 17:57:21 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
ve_direct_set_sys_voltage(&rte_pv_struct, &rte_pv_sys_voltage);
|
|
|
|
|
|
|
|
ve_direct_store_errors(&rte_pv_struct, &rte_pv_last_error);
|
|
|
|
|
|
|
|
rte_pv_messages_count++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
rte_pv_corrupted_messages_count++;
|
2019-04-03 09:41:37 +00:00
|
|
|
}
|
|
|
|
|
2021-03-23 07:01:33 +00:00
|
|
|
//memset(srl_get_rx_buffer(main_kiss_srl_ctx_ptr), 0x00, TX_BUFFER_1_LN);
|
|
|
|
|
|
|
|
srl_receive_data(main_kiss_srl_ctx_ptr, VE_DIRECT_MAX_FRAME_LN, 0, 0, 0, 0, 0);
|
2021-03-22 21:28:26 +00:00
|
|
|
}
|
2022-05-08 06:58:07 +00:00
|
|
|
#endif
|
2020-02-23 17:22:37 +00:00
|
|
|
}
|
2021-04-26 19:04:04 +00:00
|
|
|
else if (main_config_data_mode->wx_umb == 1) {
|
2021-03-22 21:28:26 +00:00
|
|
|
// if some UMB data have been received
|
|
|
|
if (main_wx_srl_ctx_ptr->srl_rx_state == SRL_RX_DONE) {
|
2021-04-26 19:04:04 +00:00
|
|
|
umb_pooling_handler(&rte_wx_umb_context, REASON_RECEIVE_IDLE, master_time, main_config_data_umb);
|
2021-03-22 21:28:26 +00:00
|
|
|
}
|
2020-02-23 17:22:37 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// if there were an error during receiving frame from host, restart rxing once again
|
|
|
|
if (main_wx_srl_ctx_ptr->srl_rx_state == SRL_RX_ERROR) {
|
2021-04-26 19:04:04 +00:00
|
|
|
umb_pooling_handler(&rte_wx_umb_context, REASON_RECEIVE_ERROR, master_time, main_config_data_umb);
|
2021-03-22 21:28:26 +00:00
|
|
|
}
|
2020-03-07 18:13:24 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
if (main_wx_srl_ctx_ptr->srl_tx_state == SRL_TX_IDLE) {
|
2021-04-26 19:04:04 +00:00
|
|
|
umb_pooling_handler(&rte_wx_umb_context, REASON_TRANSMIT_IDLE, master_time, main_config_data_umb);
|
2021-03-22 21:28:26 +00:00
|
|
|
}
|
2017-08-20 12:41:17 +00:00
|
|
|
}
|
2021-03-22 21:28:26 +00:00
|
|
|
else {
|
|
|
|
// if new KISS message has been received from the host
|
|
|
|
if (main_kiss_srl_ctx_ptr->srl_rx_state == SRL_RX_DONE && main_kiss_enabled == 1) {
|
2021-07-07 20:45:50 +00:00
|
|
|
// parse i ncoming data and then transmit on radio freq
|
2022-01-11 15:35:44 +00:00
|
|
|
ln = kiss_parse_received(srl_get_rx_buffer(main_kiss_srl_ctx_ptr), srl_get_num_bytes_rxed(main_kiss_srl_ctx_ptr), &main_ax25, &main_afsk);
|
|
|
|
if (ln == 0)
|
2021-03-22 21:28:26 +00:00
|
|
|
kiss10m++; // increase kiss messages counter
|
|
|
|
|
|
|
|
// restart KISS receiving to be ready for next frame
|
|
|
|
srl_receive_data(main_kiss_srl_ctx_ptr, 120, FEND, FEND, 0, 0, 0);
|
|
|
|
}
|
2019-01-26 22:18:25 +00:00
|
|
|
|
2021-03-22 21:28:26 +00:00
|
|
|
// if there were an error during receiving frame from host, restart rxing once again
|
|
|
|
if (main_kiss_srl_ctx_ptr->srl_rx_state == SRL_RX_ERROR && main_kiss_enabled == 1) {
|
|
|
|
srl_receive_data(main_kiss_srl_ctx_ptr, 120, FEND, FEND, 0, 0, 0);
|
|
|
|
}
|
2019-02-10 16:16:37 +00:00
|
|
|
}
|
|
|
|
|
2020-09-07 21:25:58 +00:00
|
|
|
// if Davis wx station is enabled and it is alive
|
|
|
|
if (main_davis_serial_enabled == 1) {
|
|
|
|
|
|
|
|
// pool the Davis wx station driver for LOOP packet
|
|
|
|
davis_loop_packet_pooler(&rte_wx_davis_loop_packet_avaliable);
|
2020-09-11 21:06:55 +00:00
|
|
|
|
|
|
|
davis_rxcheck_packet_pooler();
|
2020-09-07 21:25:58 +00:00
|
|
|
}
|
|
|
|
|
2020-09-20 12:13:24 +00:00
|
|
|
// if modbus rtu master is enabled
|
|
|
|
if (main_modbus_rtu_master_enabled == 1) {
|
2020-11-03 06:07:09 +00:00
|
|
|
rtu_serial_pool();
|
2020-09-20 12:13:24 +00:00
|
|
|
}
|
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(2);
|
|
|
|
|
2019-01-26 22:18:25 +00:00
|
|
|
// get all meteo measuremenets each 65 seconds. some values may not be
|
|
|
|
// downloaded from sensors if _METEO and/or _DALLAS_AS_TELEM aren't defined
|
|
|
|
if (main_wx_sensors_pool_timer < 10) {
|
2019-01-12 13:44:16 +00:00
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
// get current battery voltage. for non parameteo this will return 0
|
2022-03-27 05:45:24 +00:00
|
|
|
rte_main_battery_voltage = io_vbat_meas_get();
|
2022-05-08 06:58:07 +00:00
|
|
|
|
|
|
|
// get average battery voltage
|
2022-04-20 20:30:29 +00:00
|
|
|
rte_main_average_battery_voltage = io_vbat_meas_average(rte_main_battery_voltage);
|
|
|
|
|
|
|
|
// meas average will return 0 if internal buffer isn't filled completely
|
|
|
|
if (rte_main_average_battery_voltage == 0) {
|
|
|
|
rte_main_average_battery_voltage = rte_main_battery_voltage;
|
|
|
|
}
|
2022-03-27 05:45:24 +00:00
|
|
|
|
2021-05-18 21:00:48 +00:00
|
|
|
if ((main_config_data_mode->wx & WX_ENABLED) == 1) {
|
2021-04-05 19:48:23 +00:00
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
// notice: UMB-master and Modbus-RTU uses the same UART
|
|
|
|
// so they cannot be enabled both at once
|
2021-04-05 19:48:23 +00:00
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
// check if modbus rtu master is enabled and configured properly
|
|
|
|
if (main_modbus_rtu_master_enabled == 1) {
|
|
|
|
// start quering all Modbus RTU devices & registers one after another
|
|
|
|
rtu_serial_start();
|
|
|
|
}
|
|
|
|
else if (main_config_data_mode->wx_umb == 1) {
|
|
|
|
// request status from the slave if UMB master is enabled
|
|
|
|
umb_0x26_status_request(&rte_wx_umb, &rte_wx_umb_context, main_config_data_umb);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
;
|
|
|
|
}
|
2020-04-10 20:54:30 +00:00
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
// davis serial weather station is connected using UART / RS232 used normally
|
|
|
|
// for KISS communcation between modem and host PC
|
|
|
|
if (main_davis_serial_enabled == 1) {
|
|
|
|
davis_trigger_rxcheck_packet();
|
|
|
|
}
|
|
|
|
|
|
|
|
// get all measurements from 'internal' sensors (except wind which is handled separately)
|
|
|
|
wx_get_all_measurements(main_config_data_wx_sources, main_config_data_mode, main_config_data_umb, main_config_data_rtu);
|
2020-09-15 20:31:01 +00:00
|
|
|
}
|
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
// check if there is a request to send ModbusRTU error status message
|
2021-05-18 21:00:48 +00:00
|
|
|
if (rte_main_trigger_modbus_status == 1 && main_modbus_rtu_master_enabled == 1) {
|
2020-11-04 16:22:37 +00:00
|
|
|
rtu_serial_get_status_string(&rte_rtu_pool_queue, main_wx_srl_ctx_ptr, main_own_aprs_msg, OWN_APRS_MSG_LN, &main_own_aprs_msg_len);
|
2020-11-22 16:52:54 +00:00
|
|
|
|
2020-10-24 21:21:52 +00:00
|
|
|
ax25_sendVia(&main_ax25, main_own_path, main_own_path_ln, main_own_aprs_msg, main_own_aprs_msg_len);
|
|
|
|
|
|
|
|
afsk_txStart(&main_afsk);
|
2021-05-18 21:00:48 +00:00
|
|
|
|
|
|
|
rte_main_trigger_modbus_status = 0;
|
2020-10-24 21:21:52 +00:00
|
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(3);
|
|
|
|
|
2019-01-26 22:18:25 +00:00
|
|
|
main_wx_sensors_pool_timer = 65500;
|
2018-04-18 23:00:44 +00:00
|
|
|
}
|
2019-01-26 17:02:19 +00:00
|
|
|
|
2022-04-30 11:58:23 +00:00
|
|
|
/**
|
|
|
|
* ONE MINUTE POOLING
|
|
|
|
*/
|
2020-10-24 21:21:52 +00:00
|
|
|
if (main_one_minute_pool_timer < 10) {
|
2019-01-27 13:23:20 +00:00
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(4);
|
|
|
|
|
2020-10-11 20:14:41 +00:00
|
|
|
#ifndef _MUTE_OWN
|
2021-04-26 19:04:04 +00:00
|
|
|
packet_tx_handler(main_config_data_basic, main_config_data_mode);
|
2020-10-11 20:14:41 +00:00
|
|
|
#endif
|
2019-01-27 13:23:20 +00:00
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(5);
|
|
|
|
|
2022-02-20 13:24:48 +00:00
|
|
|
#ifdef STM32L471xx
|
2022-01-27 23:08:01 +00:00
|
|
|
if (main_config_data_mode->gsm == 1) {
|
2022-03-06 14:24:10 +00:00
|
|
|
|
2022-05-06 12:53:21 +00:00
|
|
|
gsm_sim800_poolers_one_minute(main_gsm_srl_ctx_ptr, &main_gsm_state);
|
2022-04-20 20:30:29 +00:00
|
|
|
|
2022-05-09 20:46:50 +00:00
|
|
|
aprsis_connect_and_login_default(1);
|
2022-04-20 20:30:29 +00:00
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
// if (gsm_sim800_gprs_ready == 1) {
|
|
|
|
//
|
|
|
|
// //api_send_json_status();
|
|
|
|
// api_send_json_measuremenets();
|
|
|
|
// // retval = http_client_async_get("http://pogoda.cc:8080/meteo_backend/status", strlen("http://pogoda.cc:8080/meteo_backend/status"), 0xFFF0, 0x1, 0);
|
|
|
|
// }
|
2022-04-20 20:30:29 +00:00
|
|
|
|
2022-01-27 23:08:01 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2020-10-24 21:21:52 +00:00
|
|
|
main_one_minute_pool_timer = 60000;
|
2019-01-27 13:23:20 +00:00
|
|
|
}
|
|
|
|
|
2022-04-30 11:58:23 +00:00
|
|
|
/**
|
|
|
|
* ONE SECOND POOLING
|
|
|
|
*/
|
2020-02-01 22:20:17 +00:00
|
|
|
if (main_one_second_pool_timer < 10) {
|
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(6);
|
2020-08-06 21:31:20 +00:00
|
|
|
|
2021-12-14 09:39:11 +00:00
|
|
|
digi_pool_viscous();
|
|
|
|
|
2022-02-20 13:24:48 +00:00
|
|
|
#ifdef STM32L471xx
|
2022-03-06 14:24:10 +00:00
|
|
|
if (main_config_data_mode->gsm == 1) {
|
|
|
|
|
2022-04-10 19:47:42 +00:00
|
|
|
if (gsm_sim800_gprs_ready == 1) {
|
2022-04-16 19:55:46 +00:00
|
|
|
/***
|
|
|
|
*
|
|
|
|
* TEST TEST TEST TODO
|
|
|
|
*/
|
2022-04-22 18:43:28 +00:00
|
|
|
//retval = http_client_async_get("http://pogoda.cc:8080/meteo_backend/status", strlen("http://pogoda.cc:8080/meteo_backend/status"), 0xFFF0, 0x1, dupa);
|
2022-04-17 16:08:55 +00:00
|
|
|
//retval = http_client_async_post("http://pogoda.cc:8080/meteo_backend/parameteo/skrzyczne/status", strlen("http://pogoda.cc:8080/meteo_backend/parameteo/skrzyczne/status"), post_content, strlen(post_content), 0, dupa);
|
2022-04-10 19:47:42 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2022-03-06 14:24:10 +00:00
|
|
|
gsm_sim800_initialization_pool(main_gsm_srl_ctx_ptr, &main_gsm_state);
|
|
|
|
|
|
|
|
gsm_sim800_poolers_one_second(main_gsm_srl_ctx_ptr, &main_gsm_state, main_config_data_gsm);
|
2022-01-27 23:08:01 +00:00
|
|
|
|
2022-03-06 14:24:10 +00:00
|
|
|
aprsis_check_alive();
|
|
|
|
}
|
2022-01-24 20:51:45 +00:00
|
|
|
#endif
|
|
|
|
|
2021-05-18 21:00:48 +00:00
|
|
|
if ((main_config_data_mode->wx & WX_ENABLED) == 1) {
|
|
|
|
analog_anemometer_direction_handler();
|
|
|
|
}
|
2020-02-01 22:20:17 +00:00
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(7);
|
|
|
|
|
2020-02-01 22:20:17 +00:00
|
|
|
main_one_second_pool_timer = 1000;
|
|
|
|
}
|
|
|
|
else if (main_one_second_pool_timer < -10) {
|
|
|
|
|
2021-05-18 21:00:48 +00:00
|
|
|
if ((main_config_data_mode->wx & WX_ENABLED) == 1) {
|
|
|
|
analog_anemometer_direction_reset();
|
|
|
|
}
|
2020-02-01 22:20:17 +00:00
|
|
|
|
|
|
|
main_one_second_pool_timer = 1000;
|
|
|
|
}
|
|
|
|
|
2022-04-30 11:58:23 +00:00
|
|
|
/**
|
|
|
|
* TWO SECOND POOLING
|
|
|
|
*/
|
2019-12-16 21:40:42 +00:00
|
|
|
if (main_two_second_pool_timer < 10) {
|
|
|
|
|
2021-05-18 19:48:09 +00:00
|
|
|
wx_check_force_i2c_reset();
|
|
|
|
|
2021-09-01 21:12:24 +00:00
|
|
|
wx_pwr_switch_periodic_handle();
|
2019-12-16 21:40:42 +00:00
|
|
|
|
2020-06-14 13:33:27 +00:00
|
|
|
#ifdef INTERNAL_WATCHDOG
|
|
|
|
IWDG_ReloadCounter();
|
|
|
|
#endif
|
|
|
|
|
2019-12-16 21:40:42 +00:00
|
|
|
main_two_second_pool_timer = 2000;
|
|
|
|
}
|
|
|
|
|
2022-04-30 11:58:23 +00:00
|
|
|
/**
|
|
|
|
* TEN SECOND POOLING
|
|
|
|
*/
|
2020-01-04 13:15:33 +00:00
|
|
|
if (main_ten_second_pool_timer < 10) {
|
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(8);
|
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
// check if consecutive weather frame has been triggered from 'packet_tx_handler'
|
2021-09-23 08:07:10 +00:00
|
|
|
if (rte_main_trigger_wx_packet == 1) {
|
|
|
|
|
|
|
|
packet_tx_send_wx_frame();
|
|
|
|
|
|
|
|
rte_main_trigger_wx_packet = 0;
|
|
|
|
}
|
|
|
|
|
2022-04-09 14:48:11 +00:00
|
|
|
#ifdef PARAMETEO
|
2021-09-13 09:41:44 +00:00
|
|
|
// inhibit any power save switching when modem transmits data
|
2022-04-20 20:30:29 +00:00
|
|
|
if (!main_afsk.sending && main_woken_up == 0) {
|
2022-04-22 18:43:28 +00:00
|
|
|
pwr_save_pooling_handler(main_config_data_mode, main_config_data_basic, packet_tx_get_minutes_to_next_wx(), rte_main_average_battery_voltage);
|
2021-09-13 09:41:44 +00:00
|
|
|
}
|
2022-04-19 17:56:53 +00:00
|
|
|
|
|
|
|
pwm_input_pool();
|
2022-06-09 13:00:26 +00:00
|
|
|
|
|
|
|
if (pwm_first_channel != 0) {
|
|
|
|
rte_wx_pm2_5 = pwm_first_channel;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (pwm_second_channel != 0) {
|
|
|
|
rte_wx_pm10 = pwm_second_channel;
|
|
|
|
}
|
2022-04-09 14:48:11 +00:00
|
|
|
#endif
|
2022-03-06 14:24:10 +00:00
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(9);
|
|
|
|
|
2022-04-09 14:48:11 +00:00
|
|
|
#ifdef STM32L471xx
|
2022-03-06 14:24:10 +00:00
|
|
|
if (main_config_data_mode->gsm == 1) {
|
2022-04-20 20:30:29 +00:00
|
|
|
|
2022-05-08 06:58:07 +00:00
|
|
|
packet_tx_tcp_handler();
|
2022-03-06 14:24:10 +00:00
|
|
|
}
|
2021-09-10 20:38:13 +00:00
|
|
|
#endif
|
|
|
|
|
2021-04-26 19:04:04 +00:00
|
|
|
if (main_config_data_mode->wx_umb == 1) {
|
|
|
|
umb_channel_pool(&rte_wx_umb, &rte_wx_umb_context, main_config_data_umb);
|
2021-03-22 21:28:26 +00:00
|
|
|
}
|
2020-04-10 20:54:30 +00:00
|
|
|
|
2021-04-26 19:04:04 +00:00
|
|
|
if (main_config_data_mode->wx_umb == 1) {
|
2021-03-22 21:28:26 +00:00
|
|
|
rte_wx_umb_qf = umb_get_current_qf(&rte_wx_umb_context, master_time);
|
|
|
|
}
|
2020-03-21 16:46:16 +00:00
|
|
|
|
2021-05-16 12:44:07 +00:00
|
|
|
wx_pool_anemometer(main_config_data_wx_sources, main_config_data_mode, main_config_data_umb, main_config_data_rtu);
|
2020-01-04 13:15:33 +00:00
|
|
|
|
2020-09-07 21:25:58 +00:00
|
|
|
if (main_davis_serial_enabled == 1) {
|
|
|
|
|
|
|
|
// if previous LOOP packet is ready for processing
|
|
|
|
if (rte_wx_davis_loop_packet_avaliable == 1) {
|
|
|
|
davis_parsers_loop(main_kiss_srl_ctx_ptr->srl_rx_buf_pointer, main_kiss_srl_ctx_ptr->srl_rx_buf_ln, &rte_wx_davis_loop_content);
|
|
|
|
}
|
|
|
|
|
|
|
|
// trigger consecutive LOOP packet
|
2020-09-15 20:31:01 +00:00
|
|
|
davis_trigger_loop_packet();
|
2020-09-07 21:25:58 +00:00
|
|
|
}
|
|
|
|
|
2020-01-04 13:15:33 +00:00
|
|
|
main_ten_second_pool_timer = 10000;
|
|
|
|
}
|
|
|
|
|
2022-04-20 20:30:29 +00:00
|
|
|
main_set_monitor(10);
|
|
|
|
|
2021-04-05 19:48:23 +00:00
|
|
|
|
2017-08-20 12:41:17 +00:00
|
|
|
}
|
|
|
|
// Infinite loop, never return.
|
|
|
|
}
|
|
|
|
|
2019-01-23 21:18:05 +00:00
|
|
|
uint16_t main_get_adc_sample(void) {
|
|
|
|
return (uint16_t) ADC1->DR;
|
|
|
|
}
|
|
|
|
|
2020-10-29 18:48:06 +00:00
|
|
|
void main_service_cpu_load_ticks(void) {
|
|
|
|
|
|
|
|
uint32_t cpu_ticks_load = 0;
|
|
|
|
|
|
|
|
// the biggest this result will be the biggest load the CPU is handling
|
|
|
|
cpu_ticks_load = main_idle_cpu_ticks - main_current_cpu_idle_ticks;
|
|
|
|
|
|
|
|
// calculate the cpu load
|
|
|
|
main_cpu_load = (int8_t) ((cpu_ticks_load * 100) / main_idle_cpu_ticks);
|
|
|
|
|
|
|
|
// reset the tick counter back to zero;
|
|
|
|
main_current_cpu_idle_ticks = 0;
|
|
|
|
}
|
2019-01-27 13:23:20 +00:00
|
|
|
|
2019-12-16 21:40:42 +00:00
|
|
|
|
2017-08-20 12:41:17 +00:00
|
|
|
#pragma GCC diagnostic pop
|
|
|
|
|
|
|
|
// ----------------------------------------------------------------------------
|