kopia lustrzana https://github.com/Misaka0x2730/RailLink
Added short-circuit protection on tVRF net
Dmitry Rezvanov
rodzic
01bfe8e507
commit
951abbb4fe
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@ -1,12 +1,12 @@
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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4+dfsg1-1*
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G04 #@! TF.CreationDate,2020-04-26T21:13:55+04:00*
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G04 #@! TF.CreationDate,2020-04-26T22:09:24+04:00*
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G04 #@! TF.ProjectId,RailLink,5261696c-4c69-46e6-9b2e-6b696361645f,rev?*
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G04 #@! TF.SameCoordinates,Original*
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G04 #@! TF.FilePolarity,Positive*
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 5.1.4+dfsg1-1) date 2020-04-26 21:13:55*
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G04 Created by KiCad (PCBNEW 5.1.4+dfsg1-1) date 2020-04-26 22:09:24*
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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4+dfsg1-1*
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G04 #@! TF.CreationDate,2020-04-26T22:09:24+04:00*
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G04 #@! TF.ProjectId,RailLink,5261696c-4c69-46e6-9b2e-6b696361645f,rev?*
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 5.1.4+dfsg1-1) date 2020-04-26 21:13:55*
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G04 Created by KiCad (PCBNEW 5.1.4+dfsg1-1) date 2020-04-26 22:09:24*
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@ -1,11 +1,11 @@
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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4+dfsg1-1*
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G04 #@! TF.CreationDate,2020-04-26T22:09:24+04:00*
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G04 #@! TF.ProjectId,RailLink,5261696c-4c69-46e6-9b2e-6b696361645f,rev?*
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G04 #@! TF.SameCoordinates,Original*
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G04 #@! TF.FileFunction,Profile,NP*
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%FSLAX46Y46*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 5.1.4+dfsg1-1) date 2020-04-26 21:13:55*
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G04 Created by KiCad (PCBNEW 5.1.4+dfsg1-1) date 2020-04-26 22:09:24*
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Plik diff jest za duży
Load Diff
Plik diff jest za duży
Load Diff
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@ -1,12 +1,12 @@
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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4+dfsg1-1*
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G04 Created by KiCad (PCBNEW 5.1.4+dfsg1-1) date 2020-04-26 21:13:55*
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||||
D13*
|
||||
X103000000Y-128000000D02*
|
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G75*
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||||
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|
|
|||
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|
@ -1,12 +1,12 @@
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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4+dfsg1-1*
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G04 #@! TF.CreationDate,2020-04-26T21:13:55+04:00*
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G04 Created by KiCad (PCBNEW 5.1.4+dfsg1-1) date 2020-04-26 22:09:24*
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G04 APERTURE LIST*
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@ -1,12 +1,12 @@
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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4+dfsg1-1*
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G04 #@! TF.CreationDate,2020-04-26T21:13:55+04:00*
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G04 Created by KiCad (PCBNEW 5.1.4+dfsg1-1) date 2020-04-26 22:09:24*
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G04 APERTURE LIST*
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@ -365,8 +365,6 @@ X122900000Y-124900000D02*
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X135200000Y-103300000D01*
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X125400000Y-125200000D02*
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D25*
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X145200000Y-107700000D01*
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|||
|
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@ -1,7 +1,7 @@
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M48
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; DRILL file {KiCad 5.1.4+dfsg1-1} date Вс 26 апр 2020 21:13:59
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; DRILL file {KiCad 5.1.4+dfsg1-1} date Вс 26 апр 2020 22:10:56
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FMAT,2
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INCH
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@ -211,30 +211,6 @@ X5.2283Y-4.4094
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T3
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X3.999Y-4.9774
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@ -243,7 +219,33 @@ X4.0512Y-4.999
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|
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|
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|
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T5
|
||||
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@ -251,8 +253,6 @@ X4.4291Y-4.2362
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||||
X4.7291Y-4.2362
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|
||||
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|
||||
T6
|
||||
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||||
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|
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|
|
@ -265,10 +265,10 @@ X6.0685Y-4.4882
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|
||||
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|
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X4.0512Y-4.9252
|
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X6.0079Y-4.9252
|
||||
X4.0512Y-4.0512
|
||||
X6.0079Y-4.0512
|
||||
T8
|
||||
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|
||||
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|
||||
|
|
|
|||
|
|
@ -3,10 +3,10 @@
|
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(general
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|
||||
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|
||||
(tracks 1289)
|
||||
(zones 0)
|
||||
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|
||||
(nets 118)
|
||||
(modules 84)
|
||||
(nets 119)
|
||||
)
|
||||
|
||||
(page A4)
|
||||
|
|
@ -36,7 +36,7 @@
|
|||
)
|
||||
|
||||
(setup
|
||||
(last_trace_width 0.3)
|
||||
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|
||||
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||||
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|
||||
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|
@ -220,6 +220,7 @@
|
|||
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|
||||
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|
||||
(net 117 /pDD_N)
|
||||
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|
||||
|
||||
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|
||||
(clearance 0.16)
|
||||
|
|
@ -283,6 +284,7 @@
|
|||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
|
|
@ -358,6 +360,40 @@
|
|||
(add_net "Net-(R7-Pad2)")
|
||||
)
|
||||
|
||||
(module Resistor_SMD:R_0402_1005Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5EA5E14F)
|
||||
(at 126.6 123.6 270)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
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|
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||||
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|
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(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
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|
||||
)
|
||||
|
||||
(module Diode_SMD:D_SOD-123 (layer F.Cu) (tedit 58645DC7) (tstamp 5EA867E0)
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||||
(at 148.5 102.6 90)
|
||||
(descr SOD-123)
|
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|
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@ -481,7 +517,7 @@
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@ -3782,7 +3818,7 @@
|
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)
|
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|
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|
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|
||||
(connect_pads yes (clearance 0.4))
|
||||
(min_thickness 0.3)
|
||||
|
|
@ -7478,7 +7516,7 @@
|
|||
)
|
||||
)
|
||||
)
|
||||
(zone (net 1) (net_name "Net-(C1-Pad2)") (layer F.Cu) (tstamp 5EA7E961) (hatch edge 0.508)
|
||||
(zone (net 1) (net_name "Net-(C1-Pad2)") (layer F.Cu) (tstamp 5EA60B0B) (hatch edge 0.508)
|
||||
(priority 1)
|
||||
(connect_pads yes (clearance 0.4))
|
||||
(min_thickness 0.3)
|
||||
|
|
@ -7505,7 +7543,7 @@
|
|||
)
|
||||
)
|
||||
)
|
||||
(zone (net 3) (net_name +5VP) (layer In2.Cu) (tstamp 5EA7E95E) (hatch edge 0.508)
|
||||
(zone (net 3) (net_name +5VP) (layer In2.Cu) (tstamp 5EA60B08) (hatch edge 0.508)
|
||||
(priority 2)
|
||||
(connect_pads yes (clearance 0.2))
|
||||
(min_thickness 0.3)
|
||||
|
|
@ -7596,7 +7634,7 @@
|
|||
)
|
||||
)
|
||||
)
|
||||
(zone (net 1) (net_name "Net-(C1-Pad2)") (layer In2.Cu) (tstamp 5EA7E95B) (hatch edge 0.508)
|
||||
(zone (net 1) (net_name "Net-(C1-Pad2)") (layer In2.Cu) (tstamp 5EA60B05) (hatch edge 0.508)
|
||||
(priority 1)
|
||||
(connect_pads yes (clearance 0.4))
|
||||
(min_thickness 0.3)
|
||||
|
|
@ -7624,7 +7662,7 @@
|
|||
)
|
||||
)
|
||||
)
|
||||
(zone (net 5) (net_name GND) (layer B.Cu) (tstamp 5EA7E958) (hatch edge 0.508)
|
||||
(zone (net 5) (net_name GND) (layer B.Cu) (tstamp 5EA60B02) (hatch edge 0.508)
|
||||
(connect_pads (clearance 0.3))
|
||||
(min_thickness 0.2)
|
||||
(fill yes (arc_segments 32) (thermal_gap 0.4) (thermal_bridge_width 0.4))
|
||||
|
|
@ -8122,7 +8160,7 @@
|
|||
)
|
||||
)
|
||||
)
|
||||
(zone (net 2) (net_name GNDPWR) (layer B.Cu) (tstamp 5EA7E955) (hatch edge 0.508)
|
||||
(zone (net 2) (net_name GNDPWR) (layer B.Cu) (tstamp 5EA60AFF) (hatch edge 0.508)
|
||||
(connect_pads (clearance 0.2))
|
||||
(min_thickness 0.3)
|
||||
(fill yes (arc_segments 32) (thermal_gap 0.2) (thermal_bridge_width 0.4))
|
||||
|
|
|
|||
BIN
RailLink.pdf
BIN
RailLink.pdf
Plik binarny nie jest wyświetlany.
|
|
@ -1,4 +1,4 @@
|
|||
update=Вс 26 апр 2020 20:41:44
|
||||
update=Вс 26 апр 2020 22:11:42
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
|
|
|
|||
43
RailLink.sch
43
RailLink.sch
|
|
@ -3161,29 +3161,42 @@ NoConn ~ 6250 9300
|
|||
$Comp
|
||||
L Connector:Conn_01x02_Male J4
|
||||
U 1 1 5F336B68
|
||||
P 15000 3800
|
||||
F 0 "J4" H 15150 3950 50 0000 R CNN
|
||||
F 1 "VEE_3V3" H 15300 3600 50 0000 R CNN
|
||||
F 2 "Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical" H 15000 3800 50 0001 C CNN
|
||||
F 3 "~" H 15000 3800 50 0001 C CNN
|
||||
1 15000 3800
|
||||
P 15000 3550
|
||||
F 0 "J4" H 15150 3700 50 0000 R CNN
|
||||
F 1 "VEE_3V3" H 15300 3350 50 0000 R CNN
|
||||
F 2 "Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical" H 15000 3550 50 0001 C CNN
|
||||
F 3 "~" H 15000 3550 50 0001 C CNN
|
||||
1 15000 3550
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
14700 3800 14800 3800
|
||||
14700 3550 14800 3550
|
||||
$Comp
|
||||
L power:+3V3 #PWR0102
|
||||
U 1 1 5F3D4BA3
|
||||
P 14700 3800
|
||||
F 0 "#PWR0102" H 14700 3650 50 0001 C CNN
|
||||
F 1 "+3V3" V 14700 3950 50 0000 L CNN
|
||||
F 2 "" H 14700 3800 50 0001 C CNN
|
||||
F 3 "" H 14700 3800 50 0001 C CNN
|
||||
1 14700 3800
|
||||
P 14700 3550
|
||||
F 0 "#PWR0102" H 14700 3400 50 0001 C CNN
|
||||
F 1 "+3V3" V 14700 3700 50 0000 L CNN
|
||||
F 2 "" H 14700 3550 50 0001 C CNN
|
||||
F 3 "" H 14700 3550 50 0001 C CNN
|
||||
1 14700 3550
|
||||
0 -1 -1 0
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
14600 3900 14600 4200
|
||||
14600 3650 14800 3650
|
||||
$Comp
|
||||
L Device:R R10
|
||||
U 1 1 5EAD6D59
|
||||
P 14600 3900
|
||||
F 0 "R10" H 14450 3900 50 0000 C CNN
|
||||
F 1 "5.1k" V 14700 3900 50 0000 C CNN
|
||||
F 2 "Resistor_SMD:R_0402_1005Metric" V 14530 3900 50 0001 C CNN
|
||||
F 3 "~" H 14600 3900 50 0001 C CNN
|
||||
1 14600 3900
|
||||
-1 0 0 1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
14600 3900 14800 3900
|
||||
14600 4050 14600 4200
|
||||
Wire Wire Line
|
||||
14600 3750 14600 3650
|
||||
$EndSCHEMATC
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue