feature/ethernet
pa3gsb 2018-02-18 14:13:47 +01:00
rodzic 4f9a938ea0
commit e0773a936d
17 zmienionych plików z 11288 dodań i 11276 usunięć

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Assembler report for radioberry-10CL016
Tue Feb 13 22:03:17 2018
Sun Feb 18 12:12:21 2018
Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition
@ -39,7 +39,7 @@ agreement for further details.
+---------------------------------------------------------------+
; Assembler Summary ;
+-----------------------+---------------------------------------+
; Assembler Status ; Successful - Tue Feb 13 22:03:17 2018 ;
; Assembler Status ; Successful - Sun Feb 18 12:12:21 2018 ;
; Revision Name ; radioberry-10CL016 ;
; Top-level Entity Name ; radioberry ;
; Family ; Cyclone 10 LP ;
@ -69,8 +69,8 @@ agreement for further details.
+----------------+---------------------------------------------------------------------------------+
; Option ; Setting ;
+----------------+---------------------------------------------------------------------------------+
; JTAG usercode ; 0x009547FE ;
; Checksum ; 0x009547FE ;
; JTAG usercode ; 0x0094DF2D ;
; Checksum ; 0x0094DF2D ;
+----------------+---------------------------------------------------------------------------------+
@ -90,15 +90,15 @@ agreement for further details.
Info: *******************************************************************
Info: Running Quartus Prime Assembler
Info: Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition
Info: Processing started: Tue Feb 13 22:03:14 2018
Info: Processing started: Sun Feb 18 12:12:18 2018
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off radioberry -c radioberry-10CL016
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (115031): Writing out detailed assembly data for power analysis
Info (115030): Assembler is generating device programming files
Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
Info: Peak virtual memory: 651 megabytes
Info: Processing ended: Tue Feb 13 22:03:18 2018
Info: Elapsed time: 00:00:04
Info: Total CPU time (on all processors): 00:00:04
Info: Peak virtual memory: 647 megabytes
Info: Processing ended: Sun Feb 18 12:12:21 2018
Info: Elapsed time: 00:00:03
Info: Total CPU time (on all processors): 00:00:02

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Tue Feb 13 22:03:40 2018
Sun Feb 18 12:12:35 2018

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Fitter Status : Successful - Tue Feb 13 22:03:06 2018
Fitter Status : Successful - Sun Feb 18 12:12:13 2018
Quartus Prime Version : 17.0.2 Build 602 07/19/2017 SJ Lite Edition
Revision Name : radioberry-10CL016
Top-level Entity Name : radioberry
Family : Cyclone 10 LP
Device : 10CL016YE144C8G
Timing Models : Final
Total logic elements : 13,489 / 15,408 ( 88 % )
Total logic elements : 13,539 / 15,408 ( 88 % )
Total combinational functions : 10,507 / 15,408 ( 68 % )
Dedicated logic registers : 10,799 / 15,408 ( 70 % )
Total registers : 10799

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@ -1,5 +1,5 @@
Flow report for radioberry-10CL016
Tue Feb 13 22:03:38 2018
Sun Feb 18 12:12:34 2018
Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition
@ -41,14 +41,14 @@ agreement for further details.
+----------------------------------------------------------------------------------+
; Flow Summary ;
+------------------------------------+---------------------------------------------+
; Flow Status ; Successful - Tue Feb 13 22:03:17 2018 ;
; Flow Status ; Successful - Sun Feb 18 12:12:21 2018 ;
; Quartus Prime Version ; 17.0.2 Build 602 07/19/2017 SJ Lite Edition ;
; Revision Name ; radioberry-10CL016 ;
; Top-level Entity Name ; radioberry ;
; Family ; Cyclone 10 LP ;
; Device ; 10CL016YE144C8G ;
; Timing Models ; Final ;
; Total logic elements ; 13,489 / 15,408 ( 88 % ) ;
; Total logic elements ; 13,539 / 15,408 ( 88 % ) ;
; Total combinational functions ; 10,507 / 15,408 ( 68 % ) ;
; Dedicated logic registers ; 10,799 / 15,408 ( 70 % ) ;
; Total registers ; 10799 ;
@ -65,7 +65,7 @@ agreement for further details.
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 02/13/2018 21:58:45 ;
; Start date & time ; 02/18/2018 12:08:01 ;
; Main task ; Compilation ;
; Revision Name ; radioberry-10CL016 ;
+-------------------+---------------------+
@ -79,7 +79,7 @@ agreement for further details.
; ALLOW_REGISTER_DUPLICATION ; Off ; On ; -- ; -- ;
; ALLOW_REGISTER_MERGING ; Off ; On ; -- ; -- ;
; ALLOW_REGISTER_RETIMING ; Off ; On ; -- ; -- ;
; COMPILER_SIGNATURE_ID ; 220295161909995.151855552507256 ; -- ; -- ; -- ;
; COMPILER_SIGNATURE_ID ; 220295161909995.151895208104396 ; -- ; -- ; -- ;
; FITTER_EFFORT ; Standard Fit ; Auto Fit ; -- ; -- ;
; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
@ -114,11 +114,11 @@ agreement for further details.
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis ; 00:00:57 ; 1.0 ; 919 MB ; 00:01:17 ;
; Fitter ; 00:03:20 ; 1.1 ; 1419 MB ; 00:05:10 ;
; Assembler ; 00:00:03 ; 1.0 ; 651 MB ; 00:00:04 ;
; TimeQuest Timing Analyzer ; 00:00:19 ; 1.3 ; 847 MB ; 00:00:22 ;
; Total ; 00:04:39 ; -- ; -- ; 00:06:53 ;
; Analysis & Synthesis ; 00:00:50 ; 1.0 ; 917 MB ; 00:01:10 ;
; Fitter ; 00:03:18 ; 1.1 ; 1421 MB ; 00:05:12 ;
; Assembler ; 00:00:03 ; 1.0 ; 647 MB ; 00:00:02 ;
; TimeQuest Timing Analyzer ; 00:00:12 ; 1.3 ; 843 MB ; 00:00:14 ;
; Total ; 00:04:23 ; -- ; -- ; 00:06:38 ;
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+

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@ -1,5 +1,5 @@
Analysis & Synthesis report for radioberry-10CL016
Tue Feb 13 21:59:44 2018
Sun Feb 18 12:08:54 2018
Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition
@ -321,7 +321,7 @@ agreement for further details.
+----------------------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+------------------------------------+---------------------------------------------+
; Analysis & Synthesis Status ; Successful - Tue Feb 13 21:59:44 2018 ;
; Analysis & Synthesis Status ; Successful - Sun Feb 18 12:08:53 2018 ;
; Quartus Prime Version ; 17.0.2 Build 602 07/19/2017 SJ Lite Edition ;
; Revision Name ; radioberry-10CL016 ;
; Top-level Entity Name ; radioberry ;
@ -438,7 +438,7 @@ agreement for further details.
; ; ;
; Usage by Processor ; % Time Used ;
; Processor 1 ; 100.0% ;
; Processor 2 ; 2.7% ;
; Processor 2 ; 3.2% ;
+----------------------------+-------------+
@ -481,22 +481,14 @@ agreement for further details.
; altram.inc ; yes ; Megafunction ; c:/intelfpga_lite/17.0/quartus/libraries/megafunctions/altram.inc ; ;
; altdpram.inc ; yes ; Megafunction ; c:/intelfpga_lite/17.0/quartus/libraries/megafunctions/altdpram.inc ; ;
; db/altsyncram_ca91.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_ca91.tdf ; ;
; Polyphase_FIR/coefL8A.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/Polyphase_FIR/coefL8A.mif ; ;
; db/altsyncram_pin1.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_pin1.tdf ; ;
; db/altsyncram_da91.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_da91.tdf ; ;
; Polyphase_FIR/coefL8B.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/Polyphase_FIR/coefL8B.mif ; ;
; db/altsyncram_ea91.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_ea91.tdf ; ;
; Polyphase_FIR/coefL8C.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/Polyphase_FIR/coefL8C.mif ; ;
; db/altsyncram_fa91.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_fa91.tdf ; ;
; Polyphase_FIR/coefL8D.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/Polyphase_FIR/coefL8D.mif ; ;
; db/altsyncram_ga91.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_ga91.tdf ; ;
; Polyphase_FIR/coefL8E.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/Polyphase_FIR/coefL8E.mif ; ;
; db/altsyncram_ha91.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_ha91.tdf ; ;
; Polyphase_FIR/coefL8F.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/Polyphase_FIR/coefL8F.mif ; ;
; db/altsyncram_ia91.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_ia91.tdf ; ;
; Polyphase_FIR/coefL8G.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/Polyphase_FIR/coefL8G.mif ; ;
; db/altsyncram_ja91.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_ja91.tdf ; ;
; Polyphase_FIR/coefL8H.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/Polyphase_FIR/coefL8H.mif ; ;
; dcfifo.tdf ; yes ; Megafunction ; c:/intelfpga_lite/17.0/quartus/libraries/megafunctions/dcfifo.tdf ; ;
; lpm_counter.inc ; yes ; Megafunction ; c:/intelfpga_lite/17.0/quartus/libraries/megafunctions/lpm_counter.inc ; ;
; lpm_add_sub.inc ; yes ; Megafunction ; c:/intelfpga_lite/17.0/quartus/libraries/megafunctions/lpm_add_sub.inc ; ;
@ -524,7 +516,7 @@ agreement for further details.
; db/dffpipe_re9.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/dffpipe_re9.tdf ; ;
; db/cmpr_i76.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/cmpr_i76.tdf ; ;
; db/altsyncram_23b1.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_23b1.tdf ; ;
; ./Polyphase_FIR/coefI8_1024.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/Polyphase_FIR/coefI8_1024.mif ; ;
; polyphase_fir/coefi8_1024.mif ; yes ; Auto-Found Memory Initialization File ; C:/dev/git/Radioberry-2.x/firmware/polyphase_fir/coefi8_1024.mif ; ;
; db/altsyncram_jin1.tdf ; yes ; Auto-Generated Megafunction ; C:/dev/git/Radioberry-2.x/firmware/db/altsyncram_jin1.tdf ; ;
; lpm_mult.tdf ; yes ; Megafunction ; c:/intelfpga_lite/17.0/quartus/libraries/megafunctions/lpm_mult.tdf ; ;
; multcore.inc ; yes ; Megafunction ; c:/intelfpga_lite/17.0/quartus/libraries/megafunctions/multcore.inc ; ;
@ -7927,7 +7919,7 @@ Note: In order to hide this table in the UI and the text report file, please set
+----------------+--------------+
; Partition Name ; Elapsed Time ;
+----------------+--------------+
; Top ; 00:00:32 ;
; Top ; 00:00:31 ;
+----------------+--------------+
@ -7937,7 +7929,7 @@ Note: In order to hide this table in the UI and the text report file, please set
Info: *******************************************************************
Info: Running Quartus Prime Analysis & Synthesis
Info: Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition
Info: Processing started: Tue Feb 13 21:58:44 2018
Info: Processing started: Sun Feb 18 12:08:00 2018
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off radioberry -c radioberry-10CL016
Info (16303): High Performance Effort optimization mode selected -- timing performance will be prioritized at the potential cost of increased compilation time
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
@ -8494,13 +8486,7 @@ Info (332164): Evaluating HDL-embedded SDC commands
Info (332166): set_false_path -from *delayed_wrptr_g* -to *rs_dgwp|dffpipe_re9:dffpipe10|dffe11a*
Info (332104): Reading SDC File: 'rtl/radioberry.sdc'
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Warning (332174): Ignored filter at radioberry.sdc(78): rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_9ek1:auto_generated|wrptr_g[*] could not be matched with a clock or keeper or register or port or pin or cell or partition File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.sdc Line: 78
Warning (332049): Ignored set_max_delay at radioberry.sdc(78): Argument <from> is not an object ID File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.sdc Line: 78
Info (332050): set_max_delay -from rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_9ek1:auto_generated|wrptr_g[*] -to rx2_FIFOEmpty 17 File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.sdc Line: 78
Warning (332174): Ignored filter at radioberry.sdc(79): rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_9ek1:auto_generated|ws_dgrp_reg[*] could not be matched with a clock or keeper or register or port or pin or cell or partition File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.sdc Line: 79
Warning (332049): Ignored set_max_delay at radioberry.sdc(79): Argument <from> is not an object ID File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.sdc Line: 79
Info (332050): set_max_delay -from rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_9ek1:auto_generated|ws_dgrp_reg[*] -to rx2_FIFOEmpty 17 File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.sdc Line: 79
Warning (332174): Ignored filter at radioberry.sdc(90): ad9866_pga[*] could not be matched with a clock or keeper File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.sdc Line: 90
Warning (332174): Ignored filter at radioberry.sdc(98): ad9866_pga[*] could not be matched with a clock or keeper File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.sdc Line: 98
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Warning (332061): Virtual clock virt_ad9866_txclk is never referenced in any input or output delay assignment.
Info (332129): Detected timing requirements -- optimizing circuit to achieve only the specified requirements
@ -8522,7 +8508,7 @@ Info (332111): Found 13 clocks
Info (332111): 13.020 virt_ad9866_txclk
Info (128002): Starting physical synthesis algorithm combinational resynthesis using boolean division
Info (128003): Physical synthesis algorithm combinational resynthesis using boolean division complete: estimated slack improvement of 0 ps
Info (128001): Physical synthesis optimizations for speed complete: elapsed time is 00:00:05
Info (128001): Physical synthesis optimizations for speed complete: elapsed time is 00:00:03
Info (144001): Generated suppressed messages file C:/dev/git/Radioberry-2.x/firmware/output_files/radioberry-10CL016.map.smsg
Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
Info (16011): Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL
@ -8533,11 +8519,11 @@ Info (21057): Implemented 15947 device resources after synthesis - the final res
Info (21061): Implemented 14766 logic cells
Info (21064): Implemented 1046 RAM segments
Info (21062): Implemented 92 DSP elements
Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 52 warnings
Info: Peak virtual memory: 919 megabytes
Info: Processing ended: Tue Feb 13 21:59:44 2018
Info: Elapsed time: 00:01:00
Info: Total CPU time (on all processors): 00:01:20
Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 48 warnings
Info: Peak virtual memory: 917 megabytes
Info: Processing ended: Sun Feb 18 12:08:54 2018
Info: Elapsed time: 00:00:54
Info: Total CPU time (on all processors): 00:01:14
+------------------------------------------+

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Analysis & Synthesis Status : Successful - Tue Feb 13 21:59:44 2018
Analysis & Synthesis Status : Successful - Sun Feb 18 12:08:53 2018
Quartus Prime Version : 17.0.2 Build 602 07/19/2017 SJ Lite Edition
Revision Name : radioberry-10CL016
Top-level Entity Name : radioberry

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@ -2,52 +2,48 @@
TimeQuest Timing Analyzer Summary
------------------------------------------------------------
Type : Slow 1200mV 85C Model Setup 'ad9866_clk'
Slack : -1.724
TNS : -1.724
Type : Slow 1200mV 85C Model Setup 'spi_sck'
Slack : -0.366
TNS : -1.497
Slack : 0.127
TNS : 0.000
Type : Slow 1200mV 85C Model Setup 'spi_ce0'
Slack : -0.264
TNS : -0.264
Slack : 0.172
TNS : 0.000
Type : Slow 1200mV 85C Model Setup 'virt_ad9866_rxclk'
Slack : 0.542
Type : Slow 1200mV 85C Model Setup 'ad9866_clk'
Slack : 0.368
TNS : 0.000
Type : Slow 1200mV 85C Model Setup 'spi_slave:spi_slave_rx2_inst|done'
Slack : 0.642
Slack : 0.684
TNS : 0.000
Type : Slow 1200mV 85C Model Setup 'spi_slave:spi_slave_rx_inst|done'
Slack : 0.962
Slack : 1.143
TNS : 0.000
Type : Slow 1200mV 85C Model Setup 'ad9866:ad9866_inst|dut1_pc[0]'
Slack : 1.799
Slack : 1.450
TNS : 0.000
Type : Slow 1200mV 85C Model Setup 'virt_ad9866_rxclk'
Slack : 1.724
TNS : 0.000
Type : Slow 1200mV 85C Model Setup 'clk_10mhz'
Slack : 92.759
Slack : 92.624
TNS : 0.000
Type : Slow 1200mV 85C Model Setup 'spi_ce1'
Slack : 2496.319
Slack : 2495.886
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'spi_sck'
Slack : 0.331
Slack : 0.349
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'spi_ce1'
Slack : 0.398
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'ad9866_clk'
Slack : 0.447
Slack : 0.387
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'clk_10mhz'
@ -55,23 +51,27 @@ Slack : 0.454
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'spi_ce0'
Slack : 0.477
Slack : 0.458
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'ad9866_clk'
Slack : 0.478
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'spi_slave:spi_slave_rx_inst|done'
Slack : 0.916
Slack : 0.977
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'ad9866:ad9866_inst|dut1_pc[0]'
Slack : 1.143
Slack : 1.368
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'spi_slave:spi_slave_rx2_inst|done'
Slack : 1.187
Slack : 1.593
TNS : 0.000
Type : Slow 1200mV 85C Model Hold 'virt_ad9866_rxclk'
Slack : 15.622
Slack : 14.292
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'ad9866_rxclk'
@ -83,79 +83,79 @@ Slack : -2.666
TNS : -2.666
Type : Slow 1200mV 85C Model Minimum Pulse Width 'ad9866:ad9866_inst|dut1_pc[0]'
Slack : 4.655
Slack : 4.564
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'ad9866_clk'
Slack : 5.728
Slack : 5.730
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_sck'
Slack : 31.495
Slack : 31.557
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'clk_10mhz'
Slack : 49.587
Slack : 49.569
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_ce0'
Slack : 1248.975
Slack : 1249.041
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_ce1'
Slack : 1249.081
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_slave:spi_slave_rx2_inst|done'
Slack : 1249.347
Slack : 1249.098
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_slave:spi_slave_rx_inst|done'
Slack : 1249.378
Slack : 1249.375
TNS : 0.000
Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_slave:spi_slave_rx2_inst|done'
Slack : 1249.384
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'spi_ce0'
Slack : 0.105
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'spi_sck'
Slack : 0.413
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'spi_slave:spi_slave_rx2_inst|done'
Slack : 0.760
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'ad9866_clk'
Slack : -0.390
TNS : -0.390
Type : Slow 1200mV 0C Model Setup 'spi_ce0'
Slack : -0.308
TNS : -0.308
Type : Slow 1200mV 0C Model Setup 'spi_sck'
Slack : -0.225
TNS : -0.456
Type : Slow 1200mV 0C Model Setup 'spi_slave:spi_slave_rx2_inst|done'
Slack : 0.673
Slack : 0.928
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'spi_slave:spi_slave_rx_inst|done'
Slack : 0.999
Slack : 1.188
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'ad9866:ad9866_inst|dut1_pc[0]'
Slack : 1.930
Slack : 1.823
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'virt_ad9866_rxclk'
Slack : 2.030
Slack : 3.097
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'clk_10mhz'
Slack : 93.251
Slack : 93.045
TNS : 0.000
Type : Slow 1200mV 0C Model Setup 'spi_ce1'
Slack : 2496.619
Slack : 2496.090
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'spi_sck'
Slack : 0.286
Slack : 0.314
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'spi_ce1'
Slack : 0.363
Slack : 0.358
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'clk_10mhz'
@ -163,7 +163,7 @@ Slack : 0.403
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'ad9866_clk'
Slack : 0.422
Slack : 0.421
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'spi_ce0'
@ -171,19 +171,19 @@ Slack : 0.424
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'spi_slave:spi_slave_rx_inst|done'
Slack : 0.922
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'spi_slave:spi_slave_rx2_inst|done'
Slack : 1.173
Slack : 0.978
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'ad9866:ad9866_inst|dut1_pc[0]'
Slack : 1.215
Slack : 1.433
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'spi_slave:spi_slave_rx2_inst|done'
Slack : 1.610
TNS : 0.000
Type : Slow 1200mV 0C Model Hold 'virt_ad9866_rxclk'
Slack : 14.723
Slack : 13.522
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'ad9866_rxclk'
@ -195,107 +195,107 @@ Slack : -2.666
TNS : -2.666
Type : Slow 1200mV 0C Model Minimum Pulse Width 'ad9866:ad9866_inst|dut1_pc[0]'
Slack : 4.618
Slack : 4.497
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'ad9866_clk'
Slack : 5.796
Slack : 5.704
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_sck'
Slack : 31.346
Slack : 31.419
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'clk_10mhz'
Slack : 49.464
Slack : 49.454
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_ce0'
Slack : 1249.078
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_ce1'
Slack : 1249.220
Slack : 1249.153
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_slave:spi_slave_rx_inst|done'
Slack : 1249.301
Slack : 1249.227
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_ce1'
Slack : 1249.233
TNS : 0.000
Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_slave:spi_slave_rx2_inst|done'
Slack : 1249.417
Slack : 1249.450
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'spi_sck'
Slack : 0.487
Slack : 0.463
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'ad9866_clk'
Slack : 1.317
Slack : 1.355
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'spi_ce0'
Slack : 1.628
Slack : 1.770
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'spi_slave:spi_slave_rx2_inst|done'
Slack : 2.624
Slack : 2.499
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'spi_slave:spi_slave_rx_inst|done'
Slack : 2.704
Slack : 2.751
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'ad9866:ad9866_inst|dut1_pc[0]'
Slack : 3.516
Slack : 3.224
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'virt_ad9866_rxclk'
Slack : 5.610
Slack : 6.247
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'clk_10mhz'
Slack : 96.843
Slack : 96.856
TNS : 0.000
Type : Fast 1200mV 0C Model Setup 'spi_ce1'
Slack : 2498.414
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'ad9866_clk'
Slack : 0.107
Slack : 2498.085
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'spi_ce1'
Slack : 0.124
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'clk_10mhz'
Slack : 0.149
Slack : 0.112
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'spi_sck'
Slack : 0.154
Slack : 0.135
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'spi_ce0'
Slack : 0.185
Slack : 0.136
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'clk_10mhz'
Slack : 0.187
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'ad9866_clk'
Slack : 0.198
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'spi_slave:spi_slave_rx_inst|done'
Slack : 0.245
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'spi_slave:spi_slave_rx2_inst|done'
Slack : 0.308
Slack : 0.267
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'ad9866:ad9866_inst|dut1_pc[0]'
Slack : 0.336
Slack : 0.423
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'spi_slave:spi_slave_rx2_inst|done'
Slack : 0.518
TNS : 0.000
Type : Fast 1200mV 0C Model Hold 'virt_ad9866_rxclk'
Slack : 11.727
Slack : 11.063
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'ad9866_rxclk'
@ -307,35 +307,35 @@ Slack : 2.563
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'ad9866:ad9866_inst|dut1_pc[0]'
Slack : 4.870
Slack : 4.867
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'ad9866_clk'
Slack : 5.449
Slack : 5.454
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_sck'
Slack : 31.012
Slack : 31.018
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'clk_10mhz'
Slack : 49.186
Slack : 49.225
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_ce0'
Slack : 1248.755
Slack : 1248.907
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_ce1'
Slack : 1248.978
Slack : 1249.032
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_slave:spi_slave_rx_inst|done'
Slack : 1249.584
Slack : 1249.570
TNS : 0.000
Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_slave:spi_slave_rx2_inst|done'
Slack : 1249.662
Slack : 1249.677
TNS : 0.000
------------------------------------------------------------

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@ -19,14 +19,14 @@
#
# Quartus Prime
# Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition
# Date created = 22:04:46 February 13, 2018
# Date created = 08:44:02 February 15, 2018
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "17.0"
DATE = "22:04:46 February 13, 2018"
DATE = "08:44:02 February 15, 2018"
# Revisions
PROJECT_REVISION = "radioberry"
PROJECT_REVISION = "radioberry-10CL016"
PROJECT_REVISION = "radioberry"

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@ -45,7 +45,7 @@ set_input_delay -add_delay -min -clock virt_ad9866_clk 0.500 [get_ports {ad9866_
#*************************************************************************************************************
# set output delay
#*************************************************************************************************************
set_output_delay 1.000 -clock ad9866_clk {spi_miso rx1_FIFOEmpty rx2_FIFOEmpty txFIFOFull ad9866_rxclk ad9866_txclk ad9866_sclk ad9866_sdio}
set_output_delay 0.500 -clock ad9866_clk {spi_miso rx1_FIFOEmpty rx2_FIFOEmpty txFIFOFull ad9866_rxclk ad9866_txclk ad9866_sclk ad9866_sdio}
set_output_delay -add_delay -max -clock virt_ad9866_rxclk 5.000 {ad9866_adio[*]}
set_output_delay -add_delay -min -clock virt_ad9866_rxclk 0.500 {ad9866_adio[*]}
@ -70,14 +70,21 @@ set_min_delay -from spi_ce[0] -to spi_slave:spi_slave_rx_inst|rreg[*] -3
set_max_delay -from spi_ce[1] -to spi_slave:spi_slave_rx2_inst|treg[*] 3
set_min_delay -from spi_ce[1] -to spi_slave:spi_slave_rx2_inst|rreg[*] -3
set_max_delay -from rxFIFO:rxFIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[*] -to spi_slave:spi_slave_rx_inst|treg[*] 4
set_max_delay -from rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[*] -to spi_slave:spi_slave_rx2_inst|treg[*] 4
set_max_delay -from spi_slave:spi_slave_rx_inst|rdata[*] -to txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 4
set_max_delay -from spi_slave:spi_slave_rx_inst|rdata[*] -to txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 4
set_max_delay -from spi_slave:spi_slave_rx_inst|rdata[*] -to txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 4
set_max_delay -from spi_slave:spi_slave_rx_inst|rdata[*] -to txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 4
set_max_delay -from spi_slave:spi_slave_rx_inst|rdata[*] -to txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 4
set_max_delay -from rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[*] -to rx2_FIFOEmpty 15
set_max_delay -from rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[*] -to rx2_FIFOEmpty 15
set_max_delay -from rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[*] -to rx2_FIFOEmpty 16
set_max_delay -from rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[*] -to rx2_FIFOEmpty 16
set_max_delay -from spi_mosi -to spi_slave:spi_slave_rx_inst|rdata[0] 8
set_max_delay -from spi_mosi -to spi_slave:spi_slave_rx2_inst|rdata[0] 8
set_max_delay -from spi_mosi -to spi_slave:spi_slave_rx_inst|rreg[0] 8