diff --git a/firmware/output_files/radioberry-10CL016.asm.rpt b/firmware/output_files/radioberry-10CL016.asm.rpt index 31225c9..c0d4f97 100644 --- a/firmware/output_files/radioberry-10CL016.asm.rpt +++ b/firmware/output_files/radioberry-10CL016.asm.rpt @@ -1,5 +1,5 @@ Assembler report for radioberry-10CL016 -Sat Feb 24 19:55:07 2018 +Fri Mar 09 21:37:58 2018 Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition @@ -39,7 +39,7 @@ agreement for further details. +---------------------------------------------------------------+ ; Assembler Summary ; +-----------------------+---------------------------------------+ -; Assembler Status ; Successful - Sat Feb 24 19:55:07 2018 ; +; Assembler Status ; Successful - Fri Mar 09 21:37:58 2018 ; ; Revision Name ; radioberry-10CL016 ; ; Top-level Entity Name ; radioberry ; ; Family ; Cyclone 10 LP ; @@ -69,8 +69,8 @@ agreement for further details. +----------------+---------------------------------------------------------------------------------+ ; Option ; Setting ; +----------------+---------------------------------------------------------------------------------+ -; JTAG usercode ; 0x009E0954 ; -; Checksum ; 0x009E0954 ; +; JTAG usercode ; 0x009F0FED ; +; Checksum ; 0x009F0FED ; +----------------+---------------------------------------------------------------------------------+ @@ -90,14 +90,14 @@ agreement for further details. Info: ******************************************************************* Info: Running Quartus Prime Assembler Info: Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition - Info: Processing started: Sat Feb 24 19:55:04 2018 + Info: Processing started: Fri Mar 09 21:37:56 2018 Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off radioberry -c radioberry-10CL016 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance. Info (115031): Writing out detailed assembly data for power analysis Info (115030): Assembler is generating device programming files Info: Quartus Prime Assembler was successful. 0 errors, 1 warning - Info: Peak virtual memory: 655 megabytes - Info: Processing ended: Sat Feb 24 19:55:07 2018 + Info: Peak virtual memory: 658 megabytes + Info: Processing ended: Fri Mar 09 21:37:59 2018 Info: Elapsed time: 00:00:03 Info: Total CPU time (on all processors): 00:00:03 diff --git a/firmware/output_files/radioberry-10CL016.done b/firmware/output_files/radioberry-10CL016.done index af1834f..840b56c 100644 --- a/firmware/output_files/radioberry-10CL016.done +++ b/firmware/output_files/radioberry-10CL016.done @@ -1 +1 @@ -Sat Feb 24 19:55:22 2018 +Fri Mar 09 21:38:14 2018 diff --git a/firmware/output_files/radioberry-10CL016.fit.rpt b/firmware/output_files/radioberry-10CL016.fit.rpt index 7615cbc..891d576 100644 --- a/firmware/output_files/radioberry-10CL016.fit.rpt +++ b/firmware/output_files/radioberry-10CL016.fit.rpt @@ -1,5 +1,5 @@ Fitter report for radioberry-10CL016 -Sat Feb 24 19:55:00 2018 +Fri Mar 09 21:37:51 2018 Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition @@ -95,17 +95,17 @@ agreement for further details. +----------------------------------------------------------------------------------+ ; Fitter Summary ; +------------------------------------+---------------------------------------------+ -; Fitter Status ; Successful - Sat Feb 24 19:54:59 2018 ; +; Fitter Status ; Successful - Fri Mar 09 21:37:51 2018 ; ; Quartus Prime Version ; 17.0.2 Build 602 07/19/2017 SJ Lite Edition ; ; Revision Name ; radioberry-10CL016 ; ; Top-level Entity Name ; radioberry ; ; Family ; Cyclone 10 LP ; ; Device ; 10CL016YE144C8G ; ; Timing Models ; Final ; -; Total logic elements ; 14,210 / 15,408 ( 92 % ) ; -; Total combinational functions ; 11,268 / 15,408 ( 73 % ) ; -; Dedicated logic registers ; 10,886 / 15,408 ( 71 % ) ; -; Total registers ; 10886 ; +; Total logic elements ; 14,248 / 15,408 ( 92 % ) ; +; Total combinational functions ; 11,301 / 15,408 ( 73 % ) ; +; Dedicated logic registers ; 10,913 / 15,408 ( 71 % ) ; +; Total registers ; 10913 ; ; Total pins ; 48 / 79 ( 61 % ) ; ; Total virtual pins ; 0 ; ; Total memory bits ; 374,912 / 516,096 ( 73 % ) ; @@ -181,12 +181,12 @@ agreement for further details. ; Number detected on machine ; 4 ; ; Maximum allowed ; 2 ; ; ; ; -; Average used ; 1.14 ; +; Average used ; 1.13 ; ; Maximum used ; 2 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; -; Processor 2 ; 13.8% ; +; Processor 2 ; 12.9% ; +----------------------------+-------------+ @@ -2072,8 +2072,8 @@ agreement for further details. ; Type ; Total [A + B] ; From Design Partitions [A] ; From Rapid Recompile [B] ; +---------------------+----------------------+----------------------------+--------------------------+ ; Placement (by node) ; ; ; ; -; -- Requested ; 0.00 % ( 0 / 24417 ) ; 0.00 % ( 0 / 24417 ) ; 0.00 % ( 0 / 24417 ) ; -; -- Achieved ; 0.00 % ( 0 / 24417 ) ; 0.00 % ( 0 / 24417 ) ; 0.00 % ( 0 / 24417 ) ; +; -- Requested ; 0.00 % ( 0 / 24477 ) ; 0.00 % ( 0 / 24477 ) ; 0.00 % ( 0 / 24477 ) ; +; -- Achieved ; 0.00 % ( 0 / 24477 ) ; 0.00 % ( 0 / 24477 ) ; 0.00 % ( 0 / 24477 ) ; ; ; ; ; ; ; Routing (by net) ; ; ; ; ; -- Requested ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; @@ -2096,7 +2096,7 @@ agreement for further details. +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+ ; Partition Name ; Preservation Achieved ; Preservation Level Used ; Netlist Type Used ; Preservation Method ; Notes ; +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+ -; Top ; 0.00 % ( 0 / 24412 ) ; N/A ; Source File ; N/A ; ; +; Top ; 0.00 % ( 0 / 24472 ) ; N/A ; Source File ; N/A ; ; ; hard_block:auto_generated_inst ; 0.00 % ( 0 / 5 ) ; N/A ; Source File ; N/A ; ; +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+ @@ -2112,26 +2112,26 @@ The pin-out file can be found in C:/dev/git/Radioberry-2.x/firmware/output_files +---------------------------------------------+----------------------------+ ; Resource ; Usage ; +---------------------------------------------+----------------------------+ -; Total logic elements ; 14,210 / 15,408 ( 92 % ) ; -; -- Combinational with no register ; 3324 ; -; -- Register only ; 2942 ; -; -- Combinational with a register ; 7944 ; +; Total logic elements ; 14,248 / 15,408 ( 92 % ) ; +; -- Combinational with no register ; 3335 ; +; -- Register only ; 2947 ; +; -- Combinational with a register ; 7966 ; ; ; ; ; Logic element usage by number of LUT inputs ; ; -; -- 4 input functions ; 1188 ; -; -- 3 input functions ; 7017 ; -; -- <=2 input functions ; 3063 ; -; -- Register only ; 2942 ; +; -- 4 input functions ; 1189 ; +; -- 3 input functions ; 7026 ; +; -- <=2 input functions ; 3086 ; +; -- Register only ; 2947 ; ; ; ; ; Logic elements by mode ; ; -; -- normal mode ; 3100 ; -; -- arithmetic mode ; 8168 ; +; -- normal mode ; 3108 ; +; -- arithmetic mode ; 8193 ; ; ; ; -; Total registers* ; 10,886 / 15,728 ( 69 % ) ; -; -- Dedicated logic registers ; 10,886 / 15,408 ( 71 % ) ; +; Total registers* ; 10,913 / 15,728 ( 69 % ) ; +; -- Dedicated logic registers ; 10,913 / 15,408 ( 71 % ) ; ; -- I/O registers ; 0 / 320 ( 0 % ) ; ; ; ; -; Total LABs: partially or completely used ; 955 / 963 ( 99 % ) ; +; Total LABs: partially or completely used ; 957 / 963 ( 99 % ) ; ; Virtual pins ; 0 ; ; I/O pins ; 48 / 79 ( 61 % ) ; ; -- Clock pins ; 1 / 8 ( 13 % ) ; @@ -2149,12 +2149,12 @@ The pin-out file can be found in C:/dev/git/Radioberry-2.x/firmware/output_files ; ASMI blocks ; 0 / 1 ( 0 % ) ; ; Oscillator blocks ; 0 / 1 ( 0 % ) ; ; Impedance control blocks ; 0 / 4 ( 0 % ) ; -; Average interconnect usage (total/H/V) ; 33.2% / 34.9% / 31.0% ; -; Peak interconnect usage (total/H/V) ; 48.1% / 49.7% / 45.8% ; -; Maximum fan-out ; 10373 ; -; Highest non-global fan-out ; 10373 ; -; Total fan-out ; 68364 ; -; Average fan-out ; 2.86 ; +; Average interconnect usage (total/H/V) ; 34.7% / 37.2% / 31.4% ; +; Peak interconnect usage (total/H/V) ; 44.9% / 47.9% / 46.5% ; +; Maximum fan-out ; 10400 ; +; Highest non-global fan-out ; 10400 ; +; Total fan-out ; 68533 ; +; Average fan-out ; 2.85 ; +---------------------------------------------+----------------------------+ * Register count does not include registers inside RAM blocks or DSP blocks. @@ -2167,26 +2167,26 @@ The pin-out file can be found in C:/dev/git/Radioberry-2.x/firmware/output_files +---------------------------------------------+------------------------+--------------------------------+ ; Difficulty Clustering Region ; Low ; Low ; ; ; ; ; -; Total logic elements ; 14210 / 15408 ( 92 % ) ; 0 / 15408 ( 0 % ) ; -; -- Combinational with no register ; 3324 ; 0 ; -; -- Register only ; 2942 ; 0 ; -; -- Combinational with a register ; 7944 ; 0 ; +; Total logic elements ; 14248 / 15408 ( 92 % ) ; 0 / 15408 ( 0 % ) ; +; -- Combinational with no register ; 3335 ; 0 ; +; -- Register only ; 2947 ; 0 ; +; -- Combinational with a register ; 7966 ; 0 ; ; ; ; ; ; Logic element usage by number of LUT inputs ; ; ; -; -- 4 input functions ; 1188 ; 0 ; -; -- 3 input functions ; 7017 ; 0 ; -; -- <=2 input functions ; 3063 ; 0 ; -; -- Register only ; 2942 ; 0 ; +; -- 4 input functions ; 1189 ; 0 ; +; -- 3 input functions ; 7026 ; 0 ; +; -- <=2 input functions ; 3086 ; 0 ; +; -- Register only ; 2947 ; 0 ; ; ; ; ; ; Logic elements by mode ; ; ; -; -- normal mode ; 3100 ; 0 ; -; -- arithmetic mode ; 8168 ; 0 ; +; -- normal mode ; 3108 ; 0 ; +; -- arithmetic mode ; 8193 ; 0 ; ; ; ; ; -; Total registers ; 10886 ; 0 ; -; -- Dedicated logic registers ; 10886 / 15408 ( 71 % ) ; 0 / 15408 ( 0 % ) ; +; Total registers ; 10913 ; 0 ; +; -- Dedicated logic registers ; 10913 / 15408 ( 71 % ) ; 0 / 15408 ( 0 % ) ; ; -- I/O registers ; 0 ; 0 ; ; ; ; ; -; Total LABs: partially or completely used ; 955 / 963 ( 99 % ) ; 0 / 963 ( 0 % ) ; +; Total LABs: partially or completely used ; 957 / 963 ( 99 % ) ; 0 / 963 ( 0 % ) ; ; ; ; ; ; Virtual pins ; 0 ; 0 ; ; I/O pins ; 48 ; 0 ; @@ -2204,8 +2204,8 @@ The pin-out file can be found in C:/dev/git/Radioberry-2.x/firmware/output_files ; -- Registered Output Connections ; 0 ; 0 ; ; ; ; ; ; Internal Connections ; ; ; -; -- Total Connections ; 71283 ; 92 ; -; -- Registered Connections ; 27225 ; 0 ; +; -- Total Connections ; 71452 ; 92 ; +; -- Registered Connections ; 27274 ; 0 ; ; ; ; ; ; External Connections ; ; ; ; -- Top ; 24 ; 88 ; @@ -2239,10 +2239,10 @@ The pin-out file can be found in C:/dev/git/Radioberry-2.x/firmware/output_files +------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+---------------------------+----------------------+-----------+ ; KEY_DASH ; 121 ; 7 ; 26 ; 29 ; 14 ; 7 ; 0 ; no ; no ; no ; yes ; no ; On ; 3.3-V LVCMOS ; -- ; User ; no ; ; KEY_DOT ; 120 ; 7 ; 28 ; 29 ; 14 ; 7 ; 0 ; no ; no ; no ; yes ; no ; On ; 3.3-V LVCMOS ; -- ; User ; no ; -; ad9866_clk ; 69 ; 4 ; 37 ; 0 ; 28 ; 10373 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVCMOS ; -- ; User ; no ; +; ad9866_clk ; 69 ; 4 ; 37 ; 0 ; 28 ; 10400 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVCMOS ; -- ; User ; no ; ; ad9866_sdo ; 67 ; 4 ; 35 ; 0 ; 14 ; 1 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVCMOS ; -- ; User ; no ; ; clk_10mhz ; 55 ; 4 ; 21 ; 0 ; 0 ; 98 ; 0 ; yes ; no ; no ; yes ; no ; Off ; 3.3-V LVCMOS ; -- ; User ; no ; -; ptt_in ; 42 ; 3 ; 5 ; 0 ; 7 ; 176 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVCMOS ; -- ; User ; no ; +; ptt_in ; 42 ; 3 ; 5 ; 0 ; 7 ; 177 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVCMOS ; -- ; User ; no ; ; spi_ce[0] ; 51 ; 3 ; 19 ; 0 ; 0 ; 175 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVCMOS ; -- ; User ; no ; ; spi_ce[1] ; 50 ; 3 ; 19 ; 0 ; 7 ; 133 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVCMOS ; -- ; User ; no ; ; spi_mosi ; 60 ; 4 ; 26 ; 0 ; 7 ; 4 ; 0 ; no ; no ; no ; yes ; no ; Off ; 3.3-V LVCMOS ; -- ; User ; no ; @@ -2606,51 +2606,51 @@ Note: Pin directions (input, output or bidir) are based on device operating in u +-------------------------------------------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-----------------------------------------------------------------------------------------------------------------------------------------------+---------------------+--------------+ ; Compilation Hierarchy Node ; Logic Cells ; Dedicated Logic Registers ; I/O Registers ; Memory Bits ; M9Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Full Hierarchy Name ; Entity Name ; Library Name ; +-------------------------------------------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-----------------------------------------------------------------------------------------------------------------------------------------------+---------------------+--------------+ -; |radioberry ; 14210 (191) ; 10886 (117) ; 0 (0) ; 374912 ; 51 ; 94 ; 0 ; 47 ; 48 ; 0 ; 3324 (91) ; 2942 (23) ; 7944 (47) ; |radioberry ; radioberry ; work ; +; |radioberry ; 14248 (197) ; 10913 (117) ; 0 (0) ; 374912 ; 51 ; 94 ; 0 ; 47 ; 48 ; 0 ; 3335 (96) ; 2947 (32) ; 7966 (42) ; |radioberry ; radioberry ; work ; ; |PLL_IAMBIC:PLL_IAMBIC_inst| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|PLL_IAMBIC:PLL_IAMBIC_inst ; PLL_IAMBIC ; work ; ; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component ; altpll ; work ; ; |PLL_IAMBIC_altpll:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component|PLL_IAMBIC_altpll:auto_generated ; PLL_IAMBIC_altpll ; work ; -; |ad9866:ad9866_inst| ; 93 (93) ; 29 (29) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 59 (59) ; 1 (1) ; 33 (33) ; |radioberry|ad9866:ad9866_inst ; ad9866 ; work ; -; |filter:filter_inst| ; 60 (60) ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 34 (34) ; 1 (1) ; 25 (25) ; |radioberry|filter:filter_inst ; filter ; work ; -; |iambic:iambic_inst| ; 654 (95) ; 30 (30) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 582 (63) ; 0 (0) ; 72 (32) ; |radioberry|iambic:iambic_inst ; iambic ; work ; -; |lpm_divide:Div0| ; 191 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 179 (0) ; 0 (0) ; 12 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div0 ; lpm_divide ; work ; -; |lpm_divide_tim:auto_generated| ; 191 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 179 (0) ; 0 (0) ; 12 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div0|lpm_divide_tim:auto_generated ; lpm_divide_tim ; work ; -; |sign_div_unsign_slh:divider| ; 191 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 179 (0) ; 0 (0) ; 12 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div0|lpm_divide_tim:auto_generated|sign_div_unsign_slh:divider ; sign_div_unsign_slh ; work ; -; |alt_u_div_57f:divider| ; 191 (191) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 179 (179) ; 0 (0) ; 12 (12) ; |radioberry|iambic:iambic_inst|lpm_divide:Div0|lpm_divide_tim:auto_generated|sign_div_unsign_slh:divider|alt_u_div_57f:divider ; alt_u_div_57f ; work ; -; |lpm_divide:Div1| ; 368 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 340 (0) ; 0 (0) ; 28 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div1 ; lpm_divide ; work ; -; |lpm_divide_uim:auto_generated| ; 368 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 340 (0) ; 0 (0) ; 28 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div1|lpm_divide_uim:auto_generated ; lpm_divide_uim ; work ; -; |sign_div_unsign_tlh:divider| ; 368 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 340 (0) ; 0 (0) ; 28 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div1|lpm_divide_uim:auto_generated|sign_div_unsign_tlh:divider ; sign_div_unsign_tlh ; work ; -; |alt_u_div_77f:divider| ; 368 (368) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 340 (340) ; 0 (0) ; 28 (28) ; |radioberry|iambic:iambic_inst|lpm_divide:Div1|lpm_divide_uim:auto_generated|sign_div_unsign_tlh:divider|alt_u_div_77f:divider ; alt_u_div_77f ; work ; +; |ad9866:ad9866_inst| ; 92 (92) ; 29 (29) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 54 (54) ; 0 (0) ; 38 (38) ; |radioberry|ad9866:ad9866_inst ; ad9866 ; work ; +; |filter:filter_inst| ; 59 (59) ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 37 (37) ; 1 (1) ; 21 (21) ; |radioberry|filter:filter_inst ; filter ; work ; +; |iambic:iambic_inst| ; 654 (95) ; 30 (30) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 605 (62) ; 0 (0) ; 49 (33) ; |radioberry|iambic:iambic_inst ; iambic ; work ; +; |lpm_divide:Div0| ; 191 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 186 (0) ; 0 (0) ; 5 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div0 ; lpm_divide ; work ; +; |lpm_divide_tim:auto_generated| ; 191 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 186 (0) ; 0 (0) ; 5 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div0|lpm_divide_tim:auto_generated ; lpm_divide_tim ; work ; +; |sign_div_unsign_slh:divider| ; 191 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 186 (0) ; 0 (0) ; 5 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div0|lpm_divide_tim:auto_generated|sign_div_unsign_slh:divider ; sign_div_unsign_slh ; work ; +; |alt_u_div_57f:divider| ; 191 (191) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 186 (186) ; 0 (0) ; 5 (5) ; |radioberry|iambic:iambic_inst|lpm_divide:Div0|lpm_divide_tim:auto_generated|sign_div_unsign_slh:divider|alt_u_div_57f:divider ; alt_u_div_57f ; work ; +; |lpm_divide:Div1| ; 368 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 357 (0) ; 0 (0) ; 11 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div1 ; lpm_divide ; work ; +; |lpm_divide_uim:auto_generated| ; 368 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 357 (0) ; 0 (0) ; 11 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div1|lpm_divide_uim:auto_generated ; lpm_divide_uim ; work ; +; |sign_div_unsign_tlh:divider| ; 368 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 357 (0) ; 0 (0) ; 11 (0) ; |radioberry|iambic:iambic_inst|lpm_divide:Div1|lpm_divide_uim:auto_generated|sign_div_unsign_tlh:divider ; sign_div_unsign_tlh ; work ; +; |alt_u_div_77f:divider| ; 368 (368) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 357 (357) ; 0 (0) ; 11 (11) ; |radioberry|iambic:iambic_inst|lpm_divide:Div1|lpm_divide_uim:auto_generated|sign_div_unsign_tlh:divider|alt_u_div_77f:divider ; alt_u_div_77f ; work ; ; |lpm_mult:Mult0| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|iambic:iambic_inst|lpm_mult:Mult0 ; lpm_mult ; work ; ; |mult_jbt:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|iambic:iambic_inst|lpm_mult:Mult0|mult_jbt:auto_generated ; mult_jbt ; work ; -; |lpm_mult:Mult0| ; 72 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 66 (0) ; 0 (0) ; 6 (0) ; |radioberry|lpm_mult:Mult0 ; lpm_mult ; work ; -; |mult_igt:auto_generated| ; 72 (72) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 66 (66) ; 0 (0) ; 6 (6) ; |radioberry|lpm_mult:Mult0|mult_igt:auto_generated ; mult_igt ; work ; -; |lpm_mult:Mult1| ; 72 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 63 (0) ; 0 (0) ; 9 (0) ; |radioberry|lpm_mult:Mult1 ; lpm_mult ; work ; -; |mult_igt:auto_generated| ; 72 (72) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 63 (63) ; 0 (0) ; 9 (9) ; |radioberry|lpm_mult:Mult1|mult_igt:auto_generated ; mult_igt ; work ; -; |lpm_mult:Mult2| ; 72 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 72 (0) ; 0 (0) ; 0 (0) ; |radioberry|lpm_mult:Mult2 ; lpm_mult ; work ; -; |mult_igt:auto_generated| ; 72 (72) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 72 (72) ; 0 (0) ; 0 (0) ; |radioberry|lpm_mult:Mult2|mult_igt:auto_generated ; mult_igt ; work ; +; |lpm_mult:Mult0| ; 72 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 69 (0) ; 0 (0) ; 3 (0) ; |radioberry|lpm_mult:Mult0 ; lpm_mult ; work ; +; |mult_igt:auto_generated| ; 72 (72) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 69 (69) ; 0 (0) ; 3 (3) ; |radioberry|lpm_mult:Mult0|mult_igt:auto_generated ; mult_igt ; work ; +; |lpm_mult:Mult1| ; 72 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 68 (0) ; 0 (0) ; 4 (0) ; |radioberry|lpm_mult:Mult1 ; lpm_mult ; work ; +; |mult_igt:auto_generated| ; 72 (72) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 68 (68) ; 0 (0) ; 4 (4) ; |radioberry|lpm_mult:Mult1|mult_igt:auto_generated ; mult_igt ; work ; +; |lpm_mult:Mult2| ; 72 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 67 (0) ; 0 (0) ; 5 (0) ; |radioberry|lpm_mult:Mult2 ; lpm_mult ; work ; +; |mult_igt:auto_generated| ; 72 (72) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 8 ; 0 ; 4 ; 0 ; 0 ; 67 (67) ; 0 (0) ; 5 (5) ; |radioberry|lpm_mult:Mult2|mult_igt:auto_generated ; mult_igt ; work ; ; |profile:profile_CW| ; 107 (107) ; 55 (55) ; 0 (0) ; 16000 ; 2 ; 0 ; 0 ; 0 ; 0 ; 0 ; 52 (52) ; 0 (0) ; 55 (55) ; |radioberry|profile:profile_CW ; profile ; work ; ; |profile_ROM:profile_ROM_inst| ; 0 (0) ; 0 (0) ; 0 (0) ; 16000 ; 2 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|profile:profile_CW|profile_ROM:profile_ROM_inst ; profile_ROM ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 16000 ; 2 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_6f91:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 16000 ; 2 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated ; altsyncram_6f91 ; work ; -; |receiver:receiver_rx2_inst| ; 4324 (0) ; 3528 (0) ; 0 (0) ; 110592 ; 16 ; 32 ; 0 ; 16 ; 0 ; 0 ; 750 (0) ; 961 (0) ; 2613 (0) ; |radioberry|receiver:receiver_rx2_inst ; receiver ; work ; -; |cic:cic_inst_I2| ; 257 (40) ; 234 (17) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 52 (1) ; 198 (32) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2 ; cic ; work ; -; |cic_comb:cic_stages[0].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 25 (25) ; 25 (25) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[1].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 18 (18) ; 32 (32) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; +; |receiver:receiver_rx2_inst| ; 4304 (0) ; 3528 (0) ; 0 (0) ; 110592 ; 16 ; 32 ; 0 ; 16 ; 0 ; 0 ; 729 (0) ; 949 (0) ; 2626 (0) ; |radioberry|receiver:receiver_rx2_inst ; receiver ; work ; +; |cic:cic_inst_I2| ; 248 (40) ; 234 (17) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 14 (14) ; 50 (1) ; 184 (25) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2 ; cic ; work ; +; |cic_comb:cic_stages[0].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 22 (22) ; 28 (28) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[1].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 19 (19) ; 31 (31) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[2].cic_comb_inst| ; 42 (42) ; 42 (42) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 8 (8) ; 34 (34) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; ; |cic_integrator:cic_stages[0].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; -; |cic:cic_inst_Q2| ; 241 (40) ; 234 (17) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 52 (1) ; 184 (34) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2 ; cic ; work ; -; |cic_comb:cic_stages[0].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 24 (24) ; 26 (26) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[1].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 15 (15) ; 35 (35) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[2].cic_comb_inst| ; 42 (42) ; 42 (42) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 12 (12) ; 30 (30) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; +; |cic:cic_inst_Q2| ; 244 (40) ; 234 (17) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 55 (1) ; 182 (32) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2 ; cic ; work ; +; |cic_comb:cic_stages[0].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 25 (25) ; 25 (25) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[1].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 17 (17) ; 33 (33) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[2].cic_comb_inst| ; 47 (47) ; 42 (42) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 12 (12) ; 35 (35) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; ; |cic_integrator:cic_stages[0].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; -; |cordic:cordic_inst| ; 1086 (1086) ; 681 (681) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 362 (362) ; 48 (48) ; 676 (676) ; |radioberry|receiver:receiver_rx2_inst|cordic:cordic_inst ; cordic ; work ; -; |firX8R8:fir2| ; 1337 (261) ; 1045 (61) ; 0 (0) ; 110592 ; 16 ; 32 ; 0 ; 16 ; 0 ; 0 ; 292 (200) ; 399 (0) ; 646 (72) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2 ; firX8R8 ; work ; -; |fir256:A| ; 135 (135) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 12 (12) ; 53 (53) ; 70 (70) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A ; fir256 ; work ; +; |cordic:cordic_inst| ; 1080 (1080) ; 681 (681) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 346 (346) ; 43 (43) ; 691 (691) ; |radioberry|receiver:receiver_rx2_inst|cordic:cordic_inst ; cordic ; work ; +; |firX8R8:fir2| ; 1325 (270) ; 1045 (61) ; 0 (0) ; 110592 ; 16 ; 32 ; 0 ; 16 ; 0 ; 0 ; 280 (209) ; 394 (0) ; 651 (65) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2 ; firX8R8 ; work ; +; |fir256:A| ; 130 (130) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 7 (7) ; 48 (48) ; 75 (75) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2661,7 +2661,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:B| ; 134 (134) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 11 (11) ; 52 (52) ; 71 (71) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B ; fir256 ; work ; +; |fir256:B| ; 130 (130) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 7 (7) ; 48 (48) ; 75 (75) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2672,7 +2672,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:C| ; 135 (135) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 12 (12) ; 41 (41) ; 82 (82) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C ; fir256 ; work ; +; |fir256:C| ; 131 (131) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 8 (8) ; 49 (49) ; 74 (74) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2683,7 +2683,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:D| ; 140 (140) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 17 (17) ; 58 (58) ; 65 (65) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D ; fir256 ; work ; +; |fir256:D| ; 131 (131) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 8 (8) ; 49 (49) ; 74 (74) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2694,7 +2694,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:E| ; 134 (134) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 11 (11) ; 48 (48) ; 75 (75) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E ; fir256 ; work ; +; |fir256:E| ; 136 (136) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 13 (13) ; 52 (52) ; 71 (71) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2705,7 +2705,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:F| ; 138 (138) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 15 (15) ; 55 (55) ; 68 (68) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F ; fir256 ; work ; +; |fir256:F| ; 131 (131) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 8 (8) ; 47 (47) ; 76 (76) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2716,7 +2716,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:G| ; 130 (130) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 7 (7) ; 46 (46) ; 77 (77) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G ; fir256 ; work ; +; |fir256:G| ; 131 (131) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 8 (8) ; 48 (48) ; 75 (75) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2727,7 +2727,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:H| ; 130 (130) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 7 (7) ; 46 (46) ; 77 (77) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H ; fir256 ; work ; +; |fir256:H| ; 135 (135) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 12 (12) ; 53 (53) ; 70 (70) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2738,46 +2738,46 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |varcic:varcic_inst_I1| ; 710 (76) ; 667 (33) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 43 (43) ; 205 (1) ; 462 (32) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1 ; varcic ; work ; -; |cic_comb:cic_stages[0].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 42 (42) ; 44 (44) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[1].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; +; |varcic:varcic_inst_I1| ; 708 (75) ; 667 (33) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 41 (41) ; 203 (0) ; 464 (34) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1 ; varcic ; work ; +; |cic_comb:cic_stages[0].cic_comb_inst| ; 87 (87) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 44 (44) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[1].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 42 (42) ; 44 (44) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[2].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[3].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[4].cic_comb_inst| ; 75 (75) ; 75 (75) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 32 (32) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[4].cic_comb_inst| ; 75 (75) ; 75 (75) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 31 (31) ; 44 (44) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst ; cic_comb ; work ; ; |cic_integrator:cic_stages[0].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[3].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst ; cic_integrator ; work ; -; |cic_integrator:cic_stages[4].cic_integrator_inst| ; 44 (44) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst ; cic_integrator ; work ; -; |varcic:varcic_inst_Q1| ; 709 (75) ; 667 (33) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 41 (41) ; 205 (1) ; 463 (33) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1 ; varcic ; work ; +; |cic_integrator:cic_stages[4].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst ; cic_integrator ; work ; +; |varcic:varcic_inst_Q1| ; 708 (74) ; 667 (33) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 41 (41) ; 204 (0) ; 463 (33) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1 ; varcic ; work ; ; |cic_comb:cic_stages[0].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 42 (42) ; 44 (44) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[1].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[2].cic_comb_inst| ; 87 (87) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 44 (44) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[3].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 42 (42) ; 44 (44) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[2].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[3].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[4].cic_comb_inst| ; 75 (75) ; 75 (75) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 32 (32) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst ; cic_comb ; work ; ; |cic_integrator:cic_stages[0].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[3].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[4].cic_integrator_inst| ; 44 (44) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 43 (43) ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst ; cic_integrator ; work ; -; |receiver:receiver_rx_inst| ; 4328 (0) ; 3528 (0) ; 0 (0) ; 110592 ; 16 ; 32 ; 0 ; 16 ; 0 ; 0 ; 780 (0) ; 916 (0) ; 2632 (0) ; |radioberry|receiver:receiver_rx_inst ; receiver ; work ; -; |cic:cic_inst_I2| ; 251 (40) ; 234 (17) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 16 (16) ; 57 (1) ; 178 (23) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2 ; cic ; work ; +; |receiver:receiver_rx_inst| ; 4300 (0) ; 3528 (0) ; 0 (0) ; 110592 ; 16 ; 32 ; 0 ; 16 ; 0 ; 0 ; 766 (0) ; 908 (0) ; 2626 (0) ; |radioberry|receiver:receiver_rx_inst ; receiver ; work ; +; |cic:cic_inst_I2| ; 247 (40) ; 234 (17) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 13 (13) ; 52 (1) ; 182 (26) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2 ; cic ; work ; ; |cic_comb:cic_stages[0].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 24 (24) ; 26 (26) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[1].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 21 (21) ; 29 (29) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[2].cic_comb_inst| ; 42 (42) ; 42 (42) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 10 (10) ; 32 (32) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[2].cic_comb_inst| ; 42 (42) ; 42 (42) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 6 (6) ; 36 (36) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; ; |cic_integrator:cic_stages[0].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; -; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 26 (26) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 25 (25) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; -; |cic:cic_inst_Q2| ; 249 (40) ; 234 (17) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 15 (15) ; 60 (1) ; 174 (24) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2 ; cic ; work ; -; |cic_comb:cic_stages[0].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 24 (24) ; 26 (26) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[1].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 23 (23) ; 27 (27) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[2].cic_comb_inst| ; 43 (43) ; 42 (42) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 12 (12) ; 31 (31) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; +; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; +; |cic:cic_inst_Q2| ; 255 (40) ; 234 (17) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 17 (17) ; 55 (1) ; 183 (22) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2 ; cic ; work ; +; |cic_comb:cic_stages[0].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 22 (22) ; 28 (28) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[1].cic_comb_inst| ; 50 (50) ; 50 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 17 (17) ; 33 (33) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[2].cic_comb_inst| ; 42 (42) ; 42 (42) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 15 (15) ; 27 (27) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; ; |cic_integrator:cic_stages[0].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; -; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; -; |cordic:cordic_inst| ; 1080 (1080) ; 681 (681) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 374 (374) ; 37 (37) ; 669 (669) ; |radioberry|receiver:receiver_rx_inst|cordic:cordic_inst ; cordic ; work ; -; |firX8R8:fir2| ; 1337 (268) ; 1045 (61) ; 0 (0) ; 110592 ; 16 ; 32 ; 0 ; 16 ; 0 ; 0 ; 292 (207) ; 355 (0) ; 690 (65) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2 ; firX8R8 ; work ; -; |fir256:A| ; 139 (139) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 16 (16) ; 57 (57) ; 66 (66) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A ; fir256 ; work ; +; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 26 (26) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 26 (26) ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; +; |cordic:cordic_inst| ; 1082 (1082) ; 681 (681) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 359 (359) ; 44 (44) ; 679 (679) ; |radioberry|receiver:receiver_rx_inst|cordic:cordic_inst ; cordic ; work ; +; |firX8R8:fir2| ; 1338 (273) ; 1045 (61) ; 0 (0) ; 110592 ; 16 ; 32 ; 0 ; 16 ; 0 ; 0 ; 293 (212) ; 378 (0) ; 667 (64) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2 ; firX8R8 ; work ; +; |fir256:A| ; 130 (130) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 7 (7) ; 48 (48) ; 75 (75) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2799,7 +2799,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:C| ; 130 (130) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 7 (7) ; 32 (32) ; 91 (91) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C ; fir256 ; work ; +; |fir256:C| ; 130 (130) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 7 (7) ; 46 (46) ; 77 (77) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2810,7 +2810,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:D| ; 132 (132) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 9 (9) ; 38 (38) ; 85 (85) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D ; fir256 ; work ; +; |fir256:D| ; 133 (133) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 10 (10) ; 51 (51) ; 72 (72) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2821,7 +2821,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:E| ; 133 (133) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 10 (10) ; 48 (48) ; 75 (75) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E ; fir256 ; work ; +; |fir256:E| ; 133 (133) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 10 (10) ; 51 (51) ; 72 (72) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2832,7 +2832,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:F| ; 130 (130) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 7 (7) ; 47 (47) ; 76 (76) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F ; fir256 ; work ; +; |fir256:F| ; 133 (133) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 10 (10) ; 35 (35) ; 88 (88) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2843,7 +2843,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:G| ; 139 (139) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 16 (16) ; 31 (31) ; 92 (92) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G ; fir256 ; work ; +; |fir256:G| ; 136 (136) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 13 (13) ; 47 (47) ; 76 (76) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2854,7 +2854,7 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |fir256:H| ; 131 (131) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 8 (8) ; 49 (49) ; 74 (74) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H ; fir256 ; work ; +; |fir256:H| ; 135 (135) ; 123 (123) ; 0 (0) ; 13824 ; 2 ; 4 ; 0 ; 2 ; 0 ; 0 ; 12 (12) ; 47 (47) ; 76 (76) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_pin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 9216 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated ; altsyncram_pin1 ; work ; @@ -2865,52 +2865,52 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |varcic:varcic_inst_I1| ; 710 (76) ; 667 (33) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 42 (42) ; 204 (0) ; 464 (34) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1 ; varcic ; work ; +; |varcic:varcic_inst_I1| ; 710 (76) ; 667 (33) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 43 (43) ; 194 (1) ; 473 (32) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1 ; varcic ; work ; ; |cic_comb:cic_stages[0].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 42 (42) ; 44 (44) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[1].cic_comb_inst| ; 87 (87) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 44 (44) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[2].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 42 (42) ; 44 (44) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[1].cic_comb_inst| ; 87 (87) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 37 (37) ; 50 (50) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[2].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 39 (39) ; 47 (47) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[3].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[4].cic_comb_inst| ; 75 (75) ; 75 (75) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 32 (32) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst ; cic_comb ; work ; ; |cic_integrator:cic_stages[0].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[3].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst ; cic_integrator ; work ; -; |cic_integrator:cic_stages[4].cic_integrator_inst| ; 44 (44) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst ; cic_integrator ; work ; -; |varcic:varcic_inst_Q1| ; 708 (74) ; 667 (33) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 41 (41) ; 203 (0) ; 464 (33) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1 ; varcic ; work ; -; |cic_comb:cic_stages[0].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 42 (42) ; 44 (44) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[1].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; +; |cic_integrator:cic_stages[4].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst ; cic_integrator ; work ; +; |varcic:varcic_inst_Q1| ; 709 (75) ; 667 (33) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 41 (41) ; 185 (1) ; 483 (33) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1 ; varcic ; work ; +; |cic_comb:cic_stages[0].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[1].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 36 (36) ; 50 (50) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[2].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[3].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 43 (43) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst ; cic_comb ; work ; -; |cic_comb:cic_stages[4].cic_comb_inst| ; 75 (75) ; 75 (75) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 31 (31) ; 44 (44) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[3].cic_comb_inst| ; 86 (86) ; 86 (86) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 39 (39) ; 47 (47) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst ; cic_comb ; work ; +; |cic_comb:cic_stages[4].cic_comb_inst| ; 75 (75) ; 75 (75) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 23 (23) ; 52 (52) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst ; cic_comb ; work ; ; |cic_integrator:cic_stages[0].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[3].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst ; cic_integrator ; work ; -; |cic_integrator:cic_stages[4].cic_integrator_inst| ; 44 (44) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst ; cic_integrator ; work ; +; |cic_integrator:cic_stages[4].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 43 (43) ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst ; cic_integrator ; work ; ; |reset_handler:reset_handler_inst| ; 33 (33) ; 25 (25) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (8) ; 1 (1) ; 24 (24) ; |radioberry|reset_handler:reset_handler_inst ; reset_handler ; work ; -; |rxFIFO:rx1_FIFO_inst| ; 149 (0) ; 138 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 11 (0) ; 75 (0) ; 63 (0) ; |radioberry|rxFIFO:rx1_FIFO_inst ; rxFIFO ; work ; -; |dcfifo:dcfifo_component| ; 149 (0) ; 138 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 11 (0) ; 75 (0) ; 63 (0) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component ; dcfifo ; work ; -; |dcfifo_3rj1:auto_generated| ; 149 (29) ; 138 (30) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 11 (0) ; 75 (16) ; 63 (8) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated ; dcfifo_3rj1 ; work ; +; |rxFIFO:rx1_FIFO_inst| ; 152 (0) ; 138 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 14 (0) ; 101 (0) ; 37 (0) ; |radioberry|rxFIFO:rx1_FIFO_inst ; rxFIFO ; work ; +; |dcfifo:dcfifo_component| ; 152 (0) ; 138 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 14 (0) ; 101 (0) ; 37 (0) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component ; dcfifo ; work ; +; |dcfifo_3rj1:auto_generated| ; 152 (32) ; 138 (30) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 14 (2) ; 101 (21) ; 37 (3) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated ; dcfifo_3rj1 ; work ; ; |a_graycounter_qkc:wrptr_g1p| ; 19 (19) ; 14 (14) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 14 (14) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p ; a_graycounter_qkc ; work ; -; |a_graycounter_u67:rdptr_g1p| ; 20 (20) ; 14 (14) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 1 (1) ; 14 (14) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p ; a_graycounter_u67 ; work ; -; |alt_synch_pipe_epl:ws_dgrp| ; 80 (0) ; 80 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 58 (0) ; 22 (0) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp ; alt_synch_pipe_epl ; work ; -; |dffpipe_ve9:dffpipe8| ; 80 (80) ; 80 (80) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 58 (58) ; 22 (22) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8 ; dffpipe_ve9 ; work ; +; |a_graycounter_u67:rdptr_g1p| ; 20 (20) ; 14 (14) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 1 (1) ; 13 (13) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p ; a_graycounter_u67 ; work ; +; |alt_synch_pipe_epl:ws_dgrp| ; 80 (0) ; 80 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 79 (0) ; 1 (0) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp ; alt_synch_pipe_epl ; work ; +; |dffpipe_ve9:dffpipe8| ; 80 (80) ; 80 (80) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 79 (79) ; 1 (1) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8 ; dffpipe_ve9 ; work ; ; |altsyncram_rv61:fifo_ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram ; altsyncram_rv61 ; work ; ; |cmpr_g76:wrempty_eq_comp| ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 6 (6) ; |radioberry|rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|cmpr_g76:wrempty_eq_comp ; cmpr_g76 ; work ; -; |rxFIFO:rx2_FIFO_inst| ; 147 (0) ; 138 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 9 (0) ; 97 (0) ; 41 (0) ; |radioberry|rxFIFO:rx2_FIFO_inst ; rxFIFO ; work ; -; |dcfifo:dcfifo_component| ; 147 (0) ; 138 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 9 (0) ; 97 (0) ; 41 (0) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component ; dcfifo ; work ; -; |dcfifo_3rj1:auto_generated| ; 147 (30) ; 138 (30) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 9 (1) ; 97 (16) ; 41 (3) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated ; dcfifo_3rj1 ; work ; -; |a_graycounter_qkc:wrptr_g1p| ; 20 (20) ; 14 (14) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 3 (3) ; 1 (1) ; 16 (16) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p ; a_graycounter_qkc ; work ; -; |a_graycounter_u67:rdptr_g1p| ; 20 (20) ; 14 (14) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 16 (16) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p ; a_graycounter_u67 ; work ; +; |rxFIFO:rx2_FIFO_inst| ; 153 (0) ; 138 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 15 (0) ; 104 (0) ; 34 (0) ; |radioberry|rxFIFO:rx2_FIFO_inst ; rxFIFO ; work ; +; |dcfifo:dcfifo_component| ; 153 (0) ; 138 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 15 (0) ; 104 (0) ; 34 (0) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component ; dcfifo ; work ; +; |dcfifo_3rj1:auto_generated| ; 153 (31) ; 138 (30) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 15 (1) ; 104 (23) ; 34 (3) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated ; dcfifo_3rj1 ; work ; +; |a_graycounter_qkc:wrptr_g1p| ; 19 (19) ; 14 (14) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 15 (15) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p ; a_graycounter_qkc ; work ; +; |a_graycounter_u67:rdptr_g1p| ; 20 (20) ; 14 (14) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 1 (1) ; 13 (13) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p ; a_graycounter_u67 ; work ; ; |alt_synch_pipe_epl:ws_dgrp| ; 80 (0) ; 80 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 80 (0) ; 0 (0) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp ; alt_synch_pipe_epl ; work ; ; |dffpipe_ve9:dffpipe8| ; 80 (80) ; 80 (80) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 80 (80) ; 0 (0) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8 ; dffpipe_ve9 ; work ; ; |altsyncram_rv61:fifo_ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 24576 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram ; altsyncram_rv61 ; work ; -; |cmpr_g76:wrempty_eq_comp| ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 6 (6) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|cmpr_g76:wrempty_eq_comp ; cmpr_g76 ; work ; -; |spi_slave:spi_slave_rx2_inst| ; 158 (158) ; 151 (151) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 57 (57) ; 94 (94) ; |radioberry|spi_slave:spi_slave_rx2_inst ; spi_slave ; work ; -; |spi_slave:spi_slave_rx_inst| ; 145 (145) ; 137 (137) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (8) ; 62 (62) ; 75 (75) ; |radioberry|spi_slave:spi_slave_rx_inst ; spi_slave ; work ; -; |transmitter:transmitter_inst| ; 3697 (78) ; 2911 (76) ; 0 (0) ; 23040 ; 3 ; 4 ; 0 ; 2 ; 0 ; 0 ; 718 (1) ; 702 (31) ; 2277 (46) ; |radioberry|transmitter:transmitter_inst ; transmitter ; work ; -; |CicInterpM5:in2| ; 1679 (1679) ; 1610 (1610) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 69 (69) ; 600 (600) ; 1010 (1010) ; |radioberry|transmitter:transmitter_inst|CicInterpM5:in2 ; CicInterpM5 ; work ; -; |FirInterp8_1024:fi| ; 183 (183) ; 173 (173) ; 0 (0) ; 23040 ; 3 ; 4 ; 0 ; 2 ; 0 ; 0 ; 10 (10) ; 52 (52) ; 121 (121) ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi ; FirInterp8_1024 ; work ; +; |cmpr_g76:wrempty_eq_comp| ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 3 (3) ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|cmpr_g76:wrempty_eq_comp ; cmpr_g76 ; work ; +; |spi_slave:spi_slave_rx2_inst| ; 158 (158) ; 151 (151) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 68 (68) ; 83 (83) ; |radioberry|spi_slave:spi_slave_rx2_inst ; spi_slave ; work ; +; |spi_slave:spi_slave_rx_inst| ; 145 (145) ; 137 (137) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 65 (65) ; 74 (74) ; |radioberry|spi_slave:spi_slave_rx_inst ; spi_slave ; work ; +; |transmitter:transmitter_inst| ; 3712 (106) ; 2938 (103) ; 0 (0) ; 23040 ; 3 ; 4 ; 0 ; 2 ; 0 ; 0 ; 727 (2) ; 672 (30) ; 2313 (74) ; |radioberry|transmitter:transmitter_inst ; transmitter ; work ; +; |CicInterpM5:in2| ; 1679 (1679) ; 1610 (1610) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 53 (53) ; 573 (573) ; 1053 (1053) ; |radioberry|transmitter:transmitter_inst|CicInterpM5:in2 ; CicInterpM5 ; work ; +; |FirInterp8_1024:fi| ; 183 (183) ; 173 (173) ; 0 (0) ; 23040 ; 3 ; 4 ; 0 ; 2 ; 0 ; 0 ; 9 (9) ; 51 (51) ; 123 (123) ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi ; FirInterp8_1024 ; work ; ; |firram36I_1024:ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 4608 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|firram36I_1024:ram ; firram36I_1024 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 4608 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|firram36I_1024:ram|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_jin1:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 4608 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|firram36I_1024:ram|altsyncram:altsyncram_component|altsyncram_jin1:auto_generated ; altsyncram_jin1 ; work ; @@ -2921,13 +2921,13 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult0|mult_56t:auto_generated ; mult_56t ; work ; ; |lpm_mult:Mult1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult1 ; lpm_mult ; work ; ; |mult_56t:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult1|mult_56t:auto_generated ; mult_56t ; work ; -; |cpl_cordic:cordic_inst| ; 1757 (1757) ; 1051 (1051) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 638 (638) ; 19 (19) ; 1100 (1100) ; |radioberry|transmitter:transmitter_inst|cpl_cordic:cordic_inst ; cpl_cordic ; work ; -; |pulsegen:pulse_inst| ; 1 (1) ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (1) ; |radioberry|transmitter:transmitter_inst|pulsegen:pulse_inst ; pulsegen ; work ; -; |txFIFO:txFIFO_inst| ; 106 (0) ; 92 (0) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 14 (0) ; 46 (0) ; 46 (0) ; |radioberry|txFIFO:txFIFO_inst ; txFIFO ; work ; -; |dcfifo:dcfifo_component| ; 106 (0) ; 92 (0) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 14 (0) ; 46 (0) ; 46 (0) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component ; dcfifo ; work ; -; |dcfifo_ngk1:auto_generated| ; 106 (36) ; 92 (36) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 14 (0) ; 46 (29) ; 46 (4) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated ; dcfifo_ngk1 ; work ; -; |a_graycounter_077:rdptr_g1p| ; 25 (25) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 0 (0) ; 18 (18) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p ; a_graycounter_077 ; work ; -; |a_graycounter_skc:wrptr_g1p| ; 22 (22) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 0 (0) ; 16 (16) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p ; a_graycounter_skc ; work ; +; |cpl_cordic:cordic_inst| ; 1746 (1746) ; 1051 (1051) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 663 (663) ; 18 (18) ; 1065 (1065) ; |radioberry|transmitter:transmitter_inst|cpl_cordic:cordic_inst ; cpl_cordic ; work ; +; |pulsegen:pulse_inst| ; 2 (2) ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 2 (2) ; |radioberry|transmitter:transmitter_inst|pulsegen:pulse_inst ; pulsegen ; work ; +; |txFIFO:txFIFO_inst| ; 109 (0) ; 92 (0) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 15 (0) ; 46 (0) ; 48 (0) ; |radioberry|txFIFO:txFIFO_inst ; txFIFO ; work ; +; |dcfifo:dcfifo_component| ; 109 (0) ; 92 (0) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 15 (0) ; 46 (0) ; 48 (0) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component ; dcfifo ; work ; +; |dcfifo_ngk1:auto_generated| ; 109 (37) ; 92 (36) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 15 (1) ; 46 (29) ; 48 (4) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated ; dcfifo_ngk1 ; work ; +; |a_graycounter_077:rdptr_g1p| ; 24 (24) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (8) ; 0 (0) ; 16 (16) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p ; a_graycounter_077 ; work ; +; |a_graycounter_skc:wrptr_g1p| ; 22 (22) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 17 (17) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p ; a_graycounter_skc ; work ; ; |alt_synch_pipe_apl:rs_dgwp| ; 24 (0) ; 24 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 17 (0) ; 7 (0) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp ; alt_synch_pipe_apl ; work ; ; |dffpipe_re9:dffpipe10| ; 24 (24) ; 24 (24) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 17 (17) ; 7 (7) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10 ; dffpipe_re9 ; work ; ; |altsyncram_v171:fifo_ram| ; 0 (0) ; 0 (0) ; 0 (0) ; 65536 ; 8 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; |radioberry|txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram ; altsyncram_v171 ; work ; @@ -2969,17 +2969,17 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; key_dash_rpi ; Output ; -- ; -- ; -- ; -- ; -- ; ; cw_ptt ; Output ; -- ; -- ; -- ; -- ; -- ; ; ad9866_adio[0] ; Bidir ; (4) 938 ps ; -- ; -- ; -- ; -- ; -; ad9866_adio[1] ; Bidir ; (3) 742 ps ; -- ; -- ; -- ; -- ; -; ad9866_adio[2] ; Bidir ; (6) 1314 ps ; (6) 1314 ps ; -- ; -- ; -- ; -; ad9866_adio[3] ; Bidir ; (4) 938 ps ; -- ; -- ; -- ; -- ; -; ad9866_adio[4] ; Bidir ; (6) 1314 ps ; -- ; -- ; -- ; -- ; -; ad9866_adio[5] ; Bidir ; -- ; (6) 1314 ps ; -- ; -- ; -- ; -; ad9866_adio[6] ; Bidir ; -- ; (5) 1119 ps ; -- ; -- ; -- ; -; ad9866_adio[7] ; Bidir ; (5) 1119 ps ; -- ; -- ; -- ; -- ; -; ad9866_adio[8] ; Bidir ; (5) 1119 ps ; -- ; -- ; -- ; -- ; +; ad9866_adio[1] ; Bidir ; (5) 1119 ps ; -- ; -- ; -- ; -- ; +; ad9866_adio[2] ; Bidir ; (6) 1314 ps ; -- ; -- ; -- ; -- ; +; ad9866_adio[3] ; Bidir ; (5) 1119 ps ; -- ; -- ; -- ; -- ; +; ad9866_adio[4] ; Bidir ; (6) 1314 ps ; (5) 1119 ps ; -- ; -- ; -- ; +; ad9866_adio[5] ; Bidir ; (4) 938 ps ; -- ; -- ; -- ; -- ; +; ad9866_adio[6] ; Bidir ; (4) 938 ps ; -- ; -- ; -- ; -- ; +; ad9866_adio[7] ; Bidir ; (4) 938 ps ; -- ; -- ; -- ; -- ; +; ad9866_adio[8] ; Bidir ; (4) 938 ps ; -- ; -- ; -- ; -- ; ; ad9866_adio[9] ; Bidir ; -- ; (6) 1314 ps ; -- ; -- ; -- ; -; ad9866_adio[10] ; Bidir ; (4) 938 ps ; -- ; -- ; -- ; -- ; -; ad9866_adio[11] ; Bidir ; -- ; (5) 1119 ps ; -- ; -- ; -- ; +; ad9866_adio[10] ; Bidir ; (3) 742 ps ; -- ; -- ; -- ; -- ; +; ad9866_adio[11] ; Bidir ; -- ; (3) 742 ps ; -- ; -- ; -- ; ; ptt_in ; Input ; (6) 1314 ps ; -- ; -- ; -- ; -- ; ; ad9866_clk ; Input ; (0) 0 ps ; (0) 0 ps ; -- ; -- ; -- ; ; KEY_DOT ; Input ; -- ; (6) 1314 ps ; -- ; -- ; -- ; @@ -2999,41 +2999,41 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; Source Pin / Fanout ; Pad To Core Index ; Setting ; +-------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+---------+ ; ad9866_adio[0] ; ; ; -; - adcpipe[1][0] ; 0 ; 4 ; ; - adcpipe[0][0] ; 0 ; 4 ; +; - adcpipe[1][0]~feeder ; 0 ; 4 ; ; ad9866_adio[1] ; ; ; -; - adcpipe[1][1] ; 0 ; 3 ; -; - adcpipe[0][1]~feeder ; 0 ; 3 ; +; - adcpipe[1][1] ; 0 ; 5 ; +; - adcpipe[0][1]~feeder ; 0 ; 5 ; ; ad9866_adio[2] ; ; ; -; - adcpipe[0][2]~feeder ; 1 ; 6 ; +; - adcpipe[0][2]~feeder ; 0 ; 6 ; ; - adcpipe[1][2]~feeder ; 0 ; 6 ; ; ad9866_adio[3] ; ; ; -; - adcpipe[1][3] ; 0 ; 4 ; -; - adcpipe[0][3] ; 0 ; 4 ; +; - adcpipe[0][3] ; 0 ; 5 ; +; - adcpipe[1][3]~feeder ; 0 ; 5 ; ; ad9866_adio[4] ; ; ; -; - adcpipe[1][4] ; 0 ; 6 ; -; - adcpipe[0][4] ; 0 ; 6 ; +; - adcpipe[1][4] ; 1 ; 5 ; +; - adcpipe[0][4]~feeder ; 0 ; 6 ; ; ad9866_adio[5] ; ; ; -; - adcpipe[1][5] ; 1 ; 6 ; -; - adcpipe[0][5] ; 1 ; 6 ; +; - adcpipe[1][5] ; 0 ; 4 ; +; - adcpipe[0][5] ; 0 ; 4 ; ; ad9866_adio[6] ; ; ; -; - adcpipe[0][6]~feeder ; 1 ; 5 ; -; - adcpipe[1][6]~feeder ; 1 ; 5 ; +; - adcpipe[1][6] ; 0 ; 4 ; +; - adcpipe[0][6]~feeder ; 0 ; 4 ; ; ad9866_adio[7] ; ; ; -; - adcpipe[1][7] ; 0 ; 5 ; -; - adcpipe[0][7] ; 0 ; 5 ; +; - adcpipe[0][7] ; 0 ; 4 ; +; - adcpipe[1][7]~feeder ; 0 ; 4 ; ; ad9866_adio[8] ; ; ; -; - adcpipe[1][8]~feeder ; 0 ; 5 ; -; - adcpipe[0][8]~feeder ; 0 ; 5 ; +; - adcpipe[1][8]~feeder ; 0 ; 4 ; +; - adcpipe[0][8]~feeder ; 0 ; 4 ; ; ad9866_adio[9] ; ; ; ; - adcpipe[1][9] ; 1 ; 6 ; ; - adcpipe[0][9] ; 1 ; 6 ; ; ad9866_adio[10] ; ; ; -; - adcpipe[0][10] ; 0 ; 4 ; -; - adcpipe[1][10]~feeder ; 0 ; 4 ; +; - adcpipe[1][10]~feeder ; 0 ; 3 ; +; - adcpipe[0][10]~feeder ; 0 ; 3 ; ; ad9866_adio[11] ; ; ; -; - adcpipe[1][11]~feeder ; 1 ; 5 ; -; - adcpipe[0][11]~feeder ; 1 ; 5 ; +; - adcpipe[0][11]~feeder ; 1 ; 3 ; +; - adcpipe[1][11]~feeder ; 1 ; 3 ; ; ptt_in ; ; ; ; - ad9866_adio[0]~output ; 0 ; 6 ; ; - ad9866_adio[1]~output ; 0 ; 6 ; @@ -3069,6 +3069,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24 ; 0 ; 6 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28 ; 0 ; 6 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28 ; 0 ; 6 ; +; - transmitter:transmitter_inst|LED~0 ; 0 ; 6 ; ; - rx_gain[0] ; 0 ; 6 ; ; - rx_gain[1] ; 0 ; 6 ; ; - rx_gain[2] ; 0 ; 6 ; @@ -3134,8 +3135,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; 0 ; 6 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; 0 ; 6 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; 0 ; 6 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; 0 ; 6 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; 0 ; 6 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; 0 ; 6 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; 0 ; 6 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[4] ; 0 ; 6 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; 0 ; 6 ; @@ -3176,10 +3177,10 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; 0 ; 6 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; 0 ; 6 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; 0 ; 6 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; 0 ; 6 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; 0 ; 6 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; 0 ; 6 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; 0 ; 6 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; 0 ; 6 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; 0 ; 6 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; 0 ; 6 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; 0 ; 6 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; 0 ; 6 ; @@ -3188,8 +3189,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; 0 ; 6 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; 0 ; 6 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; 0 ; 6 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; 0 ; 6 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; 0 ; 6 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; 0 ; 6 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; 0 ; 6 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; 0 ; 6 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; 0 ; 6 ; @@ -3215,65 +3216,65 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firromH:rom|altsyncram:altsyncram_component|altsyncram_ca91:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firromH:rom|altsyncram:altsyncram_component|altsyncram_da91:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firromH:rom|altsyncram:altsyncram_component|altsyncram_da91:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firromH:rom|altsyncram:altsyncram_component|altsyncram_ea91:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firromH:rom|altsyncram:altsyncram_component|altsyncram_fa91:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firromH:rom|altsyncram:altsyncram_component|altsyncram_fa91:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firromH:rom|altsyncram:altsyncram_component|altsyncram_ga91:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firromH:rom|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firromH:rom|altsyncram:altsyncram_component|altsyncram_ia91:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firromH:rom|altsyncram:altsyncram_component|altsyncram_ja91:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firromH:rom|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firromH:rom|altsyncram:altsyncram_component|altsyncram_ia91:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firromH:rom|altsyncram:altsyncram_component|altsyncram_ja91:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firromH:rom|altsyncram:altsyncram_component|altsyncram_ca91:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firromH:rom|altsyncram:altsyncram_component|altsyncram_da91:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firromH:rom|altsyncram:altsyncram_component|altsyncram_da91:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firromH:rom|altsyncram:altsyncram_component|altsyncram_ea91:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firromH:rom|altsyncram:altsyncram_component|altsyncram_ea91:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firromH:rom|altsyncram:altsyncram_component|altsyncram_fa91:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firromH:rom|altsyncram:altsyncram_component|altsyncram_ga91:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firromH:rom|altsyncram:altsyncram_component|altsyncram_ga91:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firromH:rom|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|ram_block1a0 ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firromH:rom|altsyncram:altsyncram_component|altsyncram_ia91:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firromH:rom|altsyncram:altsyncram_component|altsyncram_ja91:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firromH:rom|altsyncram:altsyncram_component|altsyncram_ia91:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firromH:rom|altsyncram:altsyncram_component|altsyncram_ja91:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0 ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0 ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12 ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30 ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0 ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12 ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30 ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0 ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12 ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30 ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12 ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8 ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20 ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24 ; 1 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28 ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28 ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|firromI_1024:rom|altsyncram:altsyncram_component|altsyncram_23b1:auto_generated|ram_block1a0 ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|firromI_1024:rom|altsyncram:altsyncram_component|altsyncram_23b1:auto_generated|ram_block1a9 ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|firram36I_1024:ram|altsyncram:altsyncram_component|altsyncram_jin1:auto_generated|ram_block1a0 ; 1 ; 0 ; @@ -3281,51 +3282,51 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[34] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[33] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[32] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[31] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[26] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[25] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[34] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[33] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[33] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[32] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[31] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[31] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[30] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[26] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[25] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[26] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[25] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[35] ; 0 ; 0 ; @@ -3335,54 +3336,54 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[31] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[30] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[28] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[28] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[26] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[25] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[32] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[31] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[27] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[25] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Rmult[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[34] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[34] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[33] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[31] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[31] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[30] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[28] ; 0 ; 0 ; @@ -3391,92 +3392,92 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[25] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Rmult[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[34] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[33] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[32] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[31] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[30] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[30] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[28] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[27] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[26] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[25] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[35] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[34] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[33] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[32] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[31] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[30] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[26] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[26] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[25] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[35] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[34] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[35] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[34] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[33] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[32] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[31] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[30] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[29] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[31] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[30] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[29] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[28] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[25] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Rmult[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Rmult[34] ; 0 ; 0 ; @@ -3503,69 +3504,69 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Rmult[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Rmult[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Rmult[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Rmult[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[35] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[34] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[33] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Rmult[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[33] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[31] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[27] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[20] ; 0 ; 0 ; @@ -3578,32 +3579,32 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Rmult[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Rmult[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[35] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[34] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[33] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[32] ; 1 ; 0 ; @@ -3612,10 +3613,10 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[29] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[27] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[20] ; 1 ; 0 ; @@ -3628,35 +3629,35 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Rmult[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[29] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[26] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[18] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Rmult[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[35] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[34] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[32] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[29] ; 0 ; 0 ; @@ -3664,145 +3665,145 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[26] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[33] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[32] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[31] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[29] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[29] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[28] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[26] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[25] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[34] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Imult[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[34] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[33] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[32] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[31] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[30] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[30] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[26] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[25] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Imult[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[35] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[35] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[34] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[33] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[32] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[31] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[30] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[28] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[26] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[26] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[25] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Imult[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[35] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[34] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[33] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[31] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[30] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[28] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[25] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[35] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[33] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[33] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[31] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[29] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[29] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[28] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[26] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[25] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Imult[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[35] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[34] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[33] ; 0 ; 0 ; @@ -3817,17 +3818,17 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Imult[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[35] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[34] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[33] ; 0 ; 0 ; @@ -3842,80 +3843,80 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[31] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[32] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[31] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[30] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[27] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[26] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[25] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Imult[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[34] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[32] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[26] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[25] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[34] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[33] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[29] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[28] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[26] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[25] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[20] ; 0 ; 0 ; @@ -3928,44 +3929,44 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Imult[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[18] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[30] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Imult[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[30] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[27] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[26] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[20] ; 0 ; 0 ; @@ -3978,43 +3979,43 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Imult[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[34] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[33] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[31] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[35] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[33] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[29] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[28] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[26] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[25] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[21] ; 0 ; 0 ; @@ -4028,9 +4029,9 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Imult[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[35] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[33] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[30] ; 0 ; 0 ; @@ -4039,20 +4040,20 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[26] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[34] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[33] ; 0 ; 0 ; @@ -4066,62 +4067,68 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[25] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Imult[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[32] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[32] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[32] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[30] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[30] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[28] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[28] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[23] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Imult[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|sample_no[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|sample_no[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|sample_no[2] ; 1 ; 0 ; @@ -4166,60 +4173,62 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][9] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[17][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|counter[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|counter[3] ; 0 ; 0 ; @@ -4235,20 +4244,20 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|counter[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|counter[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|counter[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|counter[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|counter[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|counter[4] ; 1 ; 0 ; @@ -4270,22 +4279,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|counter[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|counter[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|counter[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|counter[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|counter[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|counter[4] ; 1 ; 0 ; @@ -4300,13 +4309,13 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|counter[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|counter[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|counter[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|counter[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|counter[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|counter[4] ; 0 ; 0 ; @@ -4328,13 +4337,13 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|counter[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|counter[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|counter[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[4] ; 0 ; 0 ; @@ -4342,165 +4351,168 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[16][1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[16][3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[16][2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|counter[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[16][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[16][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[16][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[17][21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[18][6] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|counter[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|counter[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|counter[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|counter[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|counter[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|counter[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|counter[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|counter[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|counter[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|counter[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|counter[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|counter[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|counter[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|counter[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|counter[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|counter[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|counter[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|counter[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|counter[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|counter[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[17][20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[19] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[20] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[17][19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[19] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|waddr[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|waddr[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|waddr[3] ; 0 ; 0 ; @@ -4508,45 +4520,45 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|waddr[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|waddr[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|waddr[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|caddr[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|caddr[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|caddr[2] ; 1 ; 0 ; @@ -4555,38 +4567,38 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|caddr[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|caddr[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|caddr[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|caddr[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|raddr[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|raddr[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|raddr[2] ; 0 ; 0 ; @@ -4595,14 +4607,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|raddr[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|raddr[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|raddr[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|raddr[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|raddr[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|raddr[2] ; 0 ; 0 ; @@ -4619,22 +4631,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|caddr[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|caddr[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|caddr[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|caddr[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|raddr[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|raddr[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|raddr[2] ; 0 ; 0 ; @@ -4652,22 +4664,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|caddr[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|caddr[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|raddr[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|raddr[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|raddr[2] ; 1 ; 0 ; @@ -4676,29 +4688,29 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|raddr[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|raddr[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|raddr[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|raddr[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|raddr[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|raddr[2] ; 1 ; 0 ; @@ -4715,14 +4727,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|caddr[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|caddr[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|caddr[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|caddr[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|caddr[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|caddr[2] ; 0 ; 0 ; @@ -4763,14 +4775,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|caddr[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|caddr[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|caddr[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|caddr[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|caddr[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|caddr[2] ; 0 ; 0 ; @@ -4779,14 +4791,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|caddr[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|caddr[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|caddr[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|caddr[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|caddr[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|caddr[2] ; 1 ; 0 ; @@ -4795,14 +4807,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|caddr[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|caddr[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|caddr[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|caddr[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|caddr[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|caddr[2] ; 1 ; 0 ; @@ -4811,45 +4823,46 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|caddr[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|caddr[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|caddr[7] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][0] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[17][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][9] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[37] ; 1 ; 0 ; @@ -4884,68 +4897,69 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[18] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[18] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[37] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[42] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[26] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[35] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[40] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[28] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[30] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|out_data[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][0] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][7] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[12][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[17][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][11] ; 1 ; 0 ; @@ -4958,14 +4972,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[37] ; 1 ; 0 ; @@ -5000,14 +5014,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[32] ; 1 ; 0 ; @@ -5038,53 +5052,54 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[11][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][6] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[37] ; 1 ; 0 ; @@ -5120,34 +5135,34 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[36] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[26] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[34] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[39] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[33] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[28] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[20] ; 1 ; 0 ; @@ -5158,9 +5173,10 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[10][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[10][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[10][7] ; 1 ; 0 ; @@ -5171,26 +5187,26 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[10][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][13] ; 1 ; 0 ; @@ -5201,14 +5217,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[37] ; 1 ; 0 ; @@ -5245,48 +5261,49 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[37] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[42] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[26] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[35] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[40] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[28] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[30] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][8] ; 1 ; 0 ; @@ -5295,248 +5312,249 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][6] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[17][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[42] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[31] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[30] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[40] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[29] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[42] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[40] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][9] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][7] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][6] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[16][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[42] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[31] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[40] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[36] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[34] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[39] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[33] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[20] ; 0 ; 0 ; @@ -5549,21 +5567,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][14] ; 1 ; 0 ; @@ -5571,90 +5590,90 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[32] ; 0 ; 0 ; @@ -5685,97 +5704,98 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[36] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[26] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[34] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[39] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[33] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[28] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 1 ; 0 ; @@ -5789,20 +5809,20 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[32] ; 0 ; 0 ; @@ -5833,14 +5853,15 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[5][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[5][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[5][14] ; 0 ; 0 ; @@ -5856,194 +5877,195 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[5][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[5][3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[5][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][0] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[42] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[40] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[12][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][10] ; 0 ; 0 ; @@ -6056,84 +6078,84 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[42] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[31] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[30] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[40] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[29] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[37] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[42] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[36] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[41] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[35] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[40] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[30] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[34] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[39] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[33] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[38] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 0 ; 0 ; @@ -6146,209 +6168,211 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[11][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|counter[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[10][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[24] ; 0 ; 0 ; @@ -6357,14 +6381,15 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[1][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[1][18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[1][1] ; 0 ; 0 ; @@ -6384,351 +6409,353 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[1][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[1][3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[1][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[9][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[8][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[29] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[29] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[30] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[30] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[7][0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[6][0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[50] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[49] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[48] ; 1 ; 0 ; @@ -6745,75 +6772,75 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[39] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[40] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[39] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[40] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[41] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[41] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[1][4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[5][0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[8] ; 0 ; 0 ; @@ -6822,7 +6849,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y4[49] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s4[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y4[48] ; 1 ; 0 ; @@ -6839,233 +6866,233 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|s4[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y4[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s4[42] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[39] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[38] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[40] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[39] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[38] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[40] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[41] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[41] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[2][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[4][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Racc[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Racc[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[49] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[49] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[48] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[47] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[46] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[45] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[44] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[42] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[39] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[38] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[37] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[40] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[39] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[38] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[37] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[40] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[41] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[41] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[36] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[36] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[1][4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[3][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Raccum[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Raccum[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Raccum[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Raccum[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Raccum[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Raccum[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Raccum[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Raccum[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Raccum[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Raccum[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[50] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[49] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[16][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[49] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[48] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[48] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[47] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[47] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[46] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[46] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[45] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[45] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[44] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[44] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[43] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[42] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[39] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[38] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[37] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[39] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[38] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[37] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[39] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[40] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[37] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[40] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[41] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[41] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[36] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[35] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[34] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[36] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[36] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[35] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[36] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[2][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[22] ; 0 ; 0 ; @@ -7073,218 +7100,218 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[12][1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[12][3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[12][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[15][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[49] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[49] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[48] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[47] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[46] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[45] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[44] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[38] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[37] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[38] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[37] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[39] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[38] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[40] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[40] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[41] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[36] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[35] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[34] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[33] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[36] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[35] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[33] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[33] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[11][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[11][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[11][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[11][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[11][1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[11][4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[11][3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[11][2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[50] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[50] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[50] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[50] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[14][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[49] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[49] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[48] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[47] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[46] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[45] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[44] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[43] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[42] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[42] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[49] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[49] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[48] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[47] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[46] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[45] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[44] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[43] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[42] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[39] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[37] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[39] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[39] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[38] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[40] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[40] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[41] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[36] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[35] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[34] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[33] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[32] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[32] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[36] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[35] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[33] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[32] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[33] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[32] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[36] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[10][5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[10][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[10][2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[10][3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[10][5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[10][4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[10][2] ; 1 ; 0 ; @@ -7293,78 +7320,78 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[13][0] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[49] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[49] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[48] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[47] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[46] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[45] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[44] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[42] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[39] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[38] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[38] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[38] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[40] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[40] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[41] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[41] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[12][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[11][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[10][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[9][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[8][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[7][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[6][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[5][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[4][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[3][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[36] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[35] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[34] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[33] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[32] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[35] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[33] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[32] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[31] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[35] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[34] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[32] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[31] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[33] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[32] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[31] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[19] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[20] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[20] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[20] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[9][0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[9][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[9][5] ; 1 ; 0 ; @@ -7372,110 +7399,110 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[9][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[9][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[9][6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[50] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[50] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[49] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[49] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[42] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[42] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[49] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[49] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[39] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[38] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[40] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[41] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[41] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[36] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[35] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[33] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[32] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[31] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[33] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[32] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[31] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[30] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[35] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[34] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[33] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[32] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[32] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[19] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[19] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|out_data[13] ; 0 ; 0 ; @@ -7500,49 +7527,49 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[8][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[8][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[8][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[8][0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[8][1] ; 0 ; 0 ; @@ -7552,7 +7579,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[8][3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[8][4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[8][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][16] ; 0 ; 0 ; @@ -7560,13 +7587,13 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 0 ; 0 ; @@ -7592,39 +7619,39 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|q2[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[39] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[38] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[37] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[40] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[36] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[41] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[36] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[35] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[34] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[32] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[31] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[30] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[29] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[32] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[31] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[30] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[29] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[34] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[33] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[32] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[32] ; 0 ; 0 ; @@ -7655,8 +7682,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[7][0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[7][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[7][8] ; 1 ; 0 ; @@ -7666,66 +7693,66 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[7][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[7][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[7][6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[18] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[37] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[42] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[35] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[40] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[30] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[7][0] ; 0 ; 0 ; @@ -7737,9 +7764,9 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[7][3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[7][4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[7][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][15] ; 0 ; 0 ; @@ -7747,103 +7774,103 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x1[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x1[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[50] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x1[49] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x1[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[49] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x1[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x1[48] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[48] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x1[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x1[47] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[47] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x1[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x1[46] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[46] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x1[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x1[45] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[45] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x1[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x1[44] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[44] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x1[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x1[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[43] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x1[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x1[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[39] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[38] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[37] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[40] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[41] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[41] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[36] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[35] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[35] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[34] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[33] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[32] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[31] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[30] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[29] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[28] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[33] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[31] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[30] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[29] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[28] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[33] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[32] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[31] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[36] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[31] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[41] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[34] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[39] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[6][9] ; 0 ; 0 ; @@ -7854,58 +7881,58 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[6][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[6][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[6][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[42] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[26] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[35] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[40] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[33] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[28] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[20] ; 1 ; 0 ; @@ -7916,8 +7943,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[6][9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[6][8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[6][7] ; 0 ; 0 ; @@ -7926,11 +7953,11 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[6][3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[6][4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[6][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][14] ; 0 ; 0 ; @@ -7938,98 +7965,98 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[38] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[37] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[36] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[35] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[34] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[33] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[33] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[32] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[30] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[29] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[28] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[27] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[32] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[30] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[29] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[28] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[27] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[33] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[32] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[31] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[30] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|sample_no[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[36] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[31] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[41] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[34] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[39] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][9] ; 1 ; 0 ; @@ -8040,56 +8067,56 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|sample_no[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[42] ; 0 ; 0 ; @@ -8119,24 +8146,24 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][13] ; 0 ; 0 ; @@ -8144,52 +8171,52 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[37] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[36] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[35] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[34] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[33] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[32] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[32] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[31] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[29] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[28] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[27] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y5[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[32] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[31] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[29] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[28] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[27] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y5[26] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[33] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[32] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[31] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[30] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[29] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[32] ; 1 ; 0 ; @@ -8222,7 +8249,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][11] ; 0 ; 0 ; @@ -8237,73 +8264,73 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[36] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[41] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[34] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[39] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][9] ; 1 ; 0 ; @@ -8314,15 +8341,15 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][12] ; 0 ; 0 ; @@ -8330,52 +8357,52 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[35] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[34] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[33] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[32] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[31] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[30] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[28] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[27] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[28] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[27] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[26] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[25] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[32] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[30] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[33] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[32] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[30] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[29] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[28] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[25] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[32] ; 1 ; 0 ; @@ -8409,7 +8436,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][12] ; 0 ; 0 ; @@ -8423,77 +8450,77 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[36] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[41] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[34] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[39] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][12] ; 1 ; 0 ; @@ -8507,17 +8534,17 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][11] ; 0 ; 0 ; @@ -8525,172 +8552,172 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[33] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[32] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[31] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[30] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[29] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[27] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[25] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[27] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[26] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[25] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[24] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[32] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[29] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[33] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[32] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[29] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[28] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[27] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[25] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[25] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[37] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[42] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[35] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[40] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[30] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][10] ; 1 ; 0 ; @@ -8703,19 +8730,19 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][10] ; 0 ; 0 ; @@ -8723,158 +8750,158 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[32] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[31] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[30] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[29] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[28] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[24] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[26] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[24] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[32] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[28] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[32] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[28] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[27] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[26] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[24] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[24] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[26] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[28] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[25] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[42] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[26] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[30] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[40] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[33] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[28] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[38] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[20] ; 1 ; 0 ; @@ -8885,13 +8912,13 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][12] ; 1 ; 0 ; @@ -8903,91 +8930,91 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[31] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[30] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[29] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[28] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[27] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[23] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[27] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[27] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[26] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[25] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[42] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[40] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[33] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 0 ; 0 ; @@ -8998,133 +9025,133 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[2] ; 1 ; 0 ; @@ -9132,46 +9159,46 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[6] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[30] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[29] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[28] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[27] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[26] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[26] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[25] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[24] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[32] ; 0 ; 0 ; @@ -9204,14 +9231,14 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[28] ; 0 ; 0 ; @@ -9228,168 +9255,168 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[31] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[30] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[30] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[29] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[28] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[27] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[26] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q4[26] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q4[26] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[25] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[24] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[23] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[32] ; 0 ; 0 ; @@ -9423,204 +9450,204 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[26] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[36] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[31] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[41] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[25] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[34] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[39] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[28] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[28] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[27] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x3[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[25] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[25] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[28] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[26] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[26] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[25] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[24] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[23] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[14][0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[8] ; 1 ; 0 ; @@ -9628,76 +9655,76 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[14][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[27] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[25] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[24] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[25] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[24] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[27] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[25] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[24] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[23] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[22] ; 0 ; 0 ; @@ -9705,48 +9732,48 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[13][0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[13][0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[7] ; 0 ; 0 ; @@ -9757,75 +9784,75 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[13][0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[25] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[24] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[25] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[24] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[25] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[26] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[25] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[24] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[23] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[22] ; 1 ; 0 ; @@ -9834,21 +9861,21 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][7] ; 0 ; 0 ; @@ -9858,20 +9885,20 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[12][0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[12][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[6] ; 1 ; 0 ; @@ -9884,97 +9911,97 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[12][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[12][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[24] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[24] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[24] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[24] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[23] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][5] ; 0 ; 0 ; @@ -9982,119 +10009,119 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[11][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[11][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][0] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[11][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[11][0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][4] ; 0 ; 0 ; @@ -10102,115 +10129,115 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[10][0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[10][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[18] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[10][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[10][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][3] ; 0 ; 0 ; @@ -10218,111 +10245,111 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[9][0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[9][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[9][0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[9][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][2] ; 0 ; 0 ; @@ -10330,12 +10357,12 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[8][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[8][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[2] ; 1 ; 0 ; @@ -10344,200 +10371,200 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[8][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[8][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|Iacc[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[7][0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[7][0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|Iacc[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst|out_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[7][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[7][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[6][0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[6][0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Iaccum[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Iaccum[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Iaccum[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[2] ; 0 ; 0 ; @@ -10545,220 +10572,220 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[6][0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[6][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s5[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s5[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|X[0][5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[1][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[1][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[5][0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[5][0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[1][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[1][4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[5][0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[5][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[9] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[2][2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[2][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[4][0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[4][0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[2][2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[2][2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[4][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[4][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_real[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|y_imag[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y3[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y3[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[3][0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|X[3][0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[3][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|X[3][0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y2[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y2[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y3[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[7] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s2[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[7] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|out_data[8] ; 0 ; 0 ; @@ -10766,413 +10793,413 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Raccum[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|Iaccum[0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y1[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y1[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y2[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y3[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[6] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s1[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s2[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s2[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[6] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|phase[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|phase[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x5[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x5[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y2[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y3[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q5[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s1[9] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s2[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s1[9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s2[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x4[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x4[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y2[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y3[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[9] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s1[8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s2[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s1[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s2[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x4[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y2[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y3[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s1[7] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s2[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s1[7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s2[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x2[10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x2[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x4[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y2[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y3[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[7] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s1[6] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s2[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s1[6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s2[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x4[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y2[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y3[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y5[1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[6] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s1[5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s2[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s1[5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s2[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s5[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x4[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y2[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y3[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|y4[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|y4[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s1[4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s2[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s1[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s2[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|s3[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s4[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s4[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x4[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y2[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y3[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s1[3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s2[2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s3[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s1[3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s2[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s3[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x4[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y2[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s1[2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s2[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s1[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s2[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|out_data[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x4[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|y1[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|s1[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|s1[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|out_data[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x4[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x5[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q5[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q5[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x4[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q4[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[14][0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x3[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q2[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q3[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x3[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q2[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q3[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x2[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q1[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q1[2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q2[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x1[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q1[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][14] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][9] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][7] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][5] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[1] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[5] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[5] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[2] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; 0 ; 0 ; @@ -11185,10 +11212,10 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; 1 ; 0 ; @@ -11196,7 +11223,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[2] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[10] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[11] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[11] ; 0 ; 0 ; @@ -11209,10 +11236,10 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[9] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[9] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[8] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[6] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[6] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[7] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[7] ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[6] ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[7] ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[7] ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[6] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[4] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[5] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[5] ; 0 ; 0 ; @@ -11221,36 +11248,37 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[3] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[3] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|counter[0] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|wstate[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|wstate[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|wstate[4] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[0] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[0] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[1] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[9] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[7] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[6] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[6] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[7] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[4] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[4] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[5] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[5] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[2] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|wstate[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|wstate[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|wstate[4] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[0] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; 1 ; 0 ; @@ -11259,10 +11287,10 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[9] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[7] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[6] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[6] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[7] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[4] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; 1 ; 0 ; @@ -11270,128 +11298,128 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[2] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; 1 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|req ; 0 ; 0 ; ; - transmitter:transmitter_inst|pulsegen:pulse_inst|p1 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[11] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[10] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a0 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a0 ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[1] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[0] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[9] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[8] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[6] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[7] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[7] ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[6] ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[5] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[4] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[3] ; 0 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[2] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|parity5 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[0] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[1] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[9] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[4] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[5] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[4] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[5] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[2] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|parity5 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[0] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[1] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[9] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; 0 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[4] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[5] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[2] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; 1 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|parity4 ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd3 ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|parity4 ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd3 ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd4 ; 0 ; 0 ; -; - transmitter:transmitter_inst|out_data[2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|out_data[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|out_data[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|out_data[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|out_data[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|out_data[4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|out_data[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|out_data[6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|out_data[6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|out_data[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|out_data[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|out_data[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|out_data[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|out_data[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|out_data[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|out_data[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|out_data[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|out_data[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|out_data[13] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[2] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[1] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|out_strobe ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|out_strobe ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[0] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[1] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[9] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[7] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[6] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[4] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[5] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[6] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[7] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[4] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[5] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[2] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[1] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|out_strobe ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|out_strobe ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[0] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[1] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[9] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[7] ; 0 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[6] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[6] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[7] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[4] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[5] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; 1 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|sub_parity5a[2] ; 0 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|sub_parity5a[1] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; 0 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|sub_parity5a[2] ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|sub_parity5a[1] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|sub_parity5a[0] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd2 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[15] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd2 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|sample_no[15] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[0] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[1] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[6] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[4] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[5] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[6] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[4] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[5] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|sample_no[2] ; 1 ; 0 ; @@ -11414,117 +11442,117 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[1] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; 0 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[6] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[6] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[4] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[5] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd1 ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[8] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd1 ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[0] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[1] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[9] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[6] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[4] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[5] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[6] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[4] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[5] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[0] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[1] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[9] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; 0 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[6] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[6] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[4] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[5] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rDone ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[17][2] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[17][2] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[0] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[1] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[9] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[6] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[4] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[5] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[4] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[5] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[3] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[0] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[1] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[9] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[6] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; 0 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[6] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[4] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[5] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[5] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[16][0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[0] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[1] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[9] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[7] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[4] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[7] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[4] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[3] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[0] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[1] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[9] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[7] ; 0 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[4] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rAddrB ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|req ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|req ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[0] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[1] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[0] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[1] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[9] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[7] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[6] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[4] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[7] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[4] ; 0 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[5] ; 0 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[2] ; 0 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[2] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[3] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[0] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[1] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[9] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[6] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[7] ; 0 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[6] ; 0 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[4] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[5] ; 0 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[5] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[2] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rAddrA ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|counter[0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|counter[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|counter[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|counter[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|counter[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|counter[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|counter[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|counter[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|counter[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][0] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rAddr ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|counter[0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|counter[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|counter[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|counter[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|counter[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|counter[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|counter[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|counter[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|counter[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][0] ; 1 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rAddr ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[11] ; 1 ; 0 ; @@ -11539,37 +11567,37 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[26] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[25] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[28] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[36] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[42] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[9] ; 0 ; 0 ; @@ -11587,44 +11615,44 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[26] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[25] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[27] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[28] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[30] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[30] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[34] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[35] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[10][1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[10][0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[10][0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[16] ; 1 ; 0 ; @@ -11644,20 +11672,20 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[28] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[29] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[32] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[33] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[41] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[42] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[9] ; 1 ; 0 ; @@ -11673,49 +11701,49 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[26] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[25] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[30] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[33] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[36] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[37] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[38] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[40] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 1 ; 0 ; @@ -11734,16 +11762,16 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[32] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[34] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[35] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[39] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[40] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[42] ; 0 ; 0 ; @@ -11790,70 +11818,70 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[40] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[42] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[26] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[30] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[37] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[40] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[41] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[41] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[42] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[20] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 1 ; 0 ; @@ -11870,20 +11898,20 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[30] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[31] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[33] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[34] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[39] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[40] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[42] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 0 ; 0 ; @@ -11897,150 +11925,150 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[26] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[28] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[29] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[33] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[36] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[42] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[28] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[29] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[30] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[35] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[36] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[39] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[40] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[42] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][0] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[4][0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][1] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][3] ; 1 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][0] ; 0 ; 0 ; @@ -12048,11 +12076,11 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 0 ; 0 ; @@ -12064,107 +12092,107 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[13][2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[13][2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[12][0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[50] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[49] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[47] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[49] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[47] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[42] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[40] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[39] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[38] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[36] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[36] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[34] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[33] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[32] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[31] ; 0 ; 0 ; @@ -12173,22 +12201,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[28] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[27] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[25] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[25] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[24] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[7] ; 0 ; 0 ; @@ -12199,46 +12227,46 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq4[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[50] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[49] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[49] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[48] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[47] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[46] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[45] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[44] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[45] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[44] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[40] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[39] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[40] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[39] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[38] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[36] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[34] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[32] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[31] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[30] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[28] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[32] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[31] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[30] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[28] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[27] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[25] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[23] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[22] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[19] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[16] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[7] ; 0 ; 0 ; @@ -12250,13 +12278,13 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dx4[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[11][0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[11][0] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[47] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[47] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[46] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[44] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[41] ; 0 ; 0 ; @@ -12271,28 +12299,28 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[32] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[31] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[29] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[28] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[27] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[26] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[25] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[24] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[5] ; 0 ; 0 ; @@ -12301,22 +12329,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq3[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[50] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[49] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[48] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[49] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[48] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[47] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[46] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[45] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[43] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[43] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[40] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[39] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[40] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[39] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[38] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[37] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[36] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[36] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[35] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[34] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[33] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[32] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[31] ; 1 ; 0 ; @@ -12328,195 +12356,195 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[25] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[24] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[18] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[11] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx3[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[10][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[10][1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[10][0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[10][1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[10][1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[10][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[50] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[49] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[42] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[41] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[41] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[40] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[37] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[37] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[36] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[34] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[33] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[32] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[32] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[31] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[28] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[28] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[27] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[26] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[25] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[24] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[25] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[17] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[12] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[9] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[4] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[3] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[3] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq2[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[50] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[49] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[49] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[48] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[42] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[43] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[42] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[41] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[40] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[39] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[38] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[37] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[36] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[35] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[34] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[33] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[32] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[31] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[31] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[30] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[29] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[28] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[28] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[27] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[26] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[26] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[25] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[24] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[23] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[22] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[23] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[9] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx2[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[50] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[49] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[49] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[48] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[47] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[46] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[44] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[44] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[43] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[42] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[41] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[41] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[40] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[39] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[38] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[37] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[36] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[35] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[34] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[33] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[32] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[31] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[30] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[29] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[33] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[32] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[31] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[30] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[29] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[28] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[27] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[27] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[25] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[24] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[25] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[24] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[20] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[19] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[15] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[13] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[13] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[1] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq1[1] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[50] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[49] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[48] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[45] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[45] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[44] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[43] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[40] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[40] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[39] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[38] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[37] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[36] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[35] ; 1 ; 0 ; @@ -12529,22 +12557,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[28] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[27] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[26] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[25] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[24] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[22] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[25] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[24] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[23] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[21] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[19] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[18] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[17] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[16] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[18] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[17] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[16] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[7] ; 0 ; 0 ; @@ -12555,39 +12583,39 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx1[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[50] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[50] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[49] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[50] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[49] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[49] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[48] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[48] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[48] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[47] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[47] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[46] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[44] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[44] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[46] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[44] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[44] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[43] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[43] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[42] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[42] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[41] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[40] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[43] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[42] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[41] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[41] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[40] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[40] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[39] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[39] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[38] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[36] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[36] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[34] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[37] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[37] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[36] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[36] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[34] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[33] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[33] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[32] ; 0 ; 0 ; @@ -12613,44 +12641,44 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[22] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[21] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[20] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[14] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[12] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[11] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[10] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[8] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[7] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[6] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[4] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|q0[2] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|q0[2] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|q0[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dq0[1] ; 0 ; 0 ; @@ -12659,13 +12687,13 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[49] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[48] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[48] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[48] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[47] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[47] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[47] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[46] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[46] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[45] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[45] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[45] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[44] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[44] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[43] ; 0 ; 0 ; @@ -12674,22 +12702,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[42] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[41] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[41] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[40] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[39] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[38] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[37] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[36] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[36] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[35] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[34] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[33] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[33] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[40] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[39] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[38] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[37] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[37] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[36] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[36] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[35] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[34] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[33] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[33] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[32] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[32] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[31] ; 1 ; 0 ; @@ -12714,41 +12742,41 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[21] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[21] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[20] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[20] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[19] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[18] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[17] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[16] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[15] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[14] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[14] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[13] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[13] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[11] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[9] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[8] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[7] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[7] ; 1 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[8] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[6] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[5] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|CicInterpM5:in2|x0[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|CicInterpM5:in2|x0[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|x0[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|CicInterpM5:in2|dx0[2] ; 0 ; 0 ; @@ -12757,19 +12785,19 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[6][1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[6][0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[6][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[6][0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[6][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[10] ; 0 ; 0 ; @@ -12784,60 +12812,60 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_strobe ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[29] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[30] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[40] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[42] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[8] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|out_strobe ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[7] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|out_strobe ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[26] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[25] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[28] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[28] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[31] ; 0 ; 0 ; @@ -12863,20 +12891,20 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[26] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[26] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[23] ; 1 ; 0 ; @@ -12884,8 +12912,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[27] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[31] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[32] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[33] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[34] ; 1 ; 0 ; @@ -12898,17 +12926,17 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[42] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[20] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[18] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[10] ; 0 ; 0 ; @@ -12938,39 +12966,39 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[36] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[39] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[40] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[41] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[42] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[7] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[26] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[25] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[22] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[28] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[30] ; 0 ; 0 ; @@ -12978,58 +13006,58 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[32] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[33] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[35] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[37] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[5] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[29] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[29] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[31] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[32] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[35] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[37] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[39] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[40] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[38] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[2].cic_comb_inst|prev_data[42] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 0 ; 0 ; @@ -13039,9 +13067,9 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 0 ; 0 ; @@ -13050,127 +13078,127 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[27] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[30] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[34] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[35] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[37] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[38] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[33] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[34] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[36] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[38] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[40] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[42] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[42] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[7] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[26] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[25] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[28] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[31] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[29] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[31] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[33] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[35] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[34] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[35] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[36] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[37] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[38] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[40] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[41] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[40] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[42] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[11] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[26] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[25] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[25] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[27] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[28] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[27] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[29] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[32] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[33] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[33] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[34] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[36] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[37] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[38] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[39] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[40] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[39] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[40] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[41] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[42] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][3] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][0] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 1 ; 0 ; @@ -13181,55 +13209,55 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[27] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[26] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[26] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[25] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[28] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[29] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[30] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[32] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[30] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[32] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[33] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[34] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[35] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[35] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[36] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[37] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[37] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[38] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[39] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[39] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[40] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[41] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[42] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[42] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][1] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][9] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][8] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][7] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][6] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][5] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][3] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][9] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][8] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][7] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][5] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][0] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][2] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][0] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[0][17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[0][16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[0][15] ; 0 ; 0 ; @@ -13244,7 +13272,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[0][6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cordic:cordic_inst|Y[0][5] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][14] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][14] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][11] ; 1 ; 0 ; @@ -13256,83 +13284,83 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][3] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][12] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][11] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][6] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][15] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][11] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cordic:cordic_inst|Y[0][5] ; 0 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|we ; 1 ; 0 ; -; - transmitter:transmitter_inst|fir_q[0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|we ; 0 ; 0 ; +; - transmitter:transmitter_inst|fir_q[0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|fir_q[1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|fir_q[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_q[3] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_q[4] ; 0 ; 0 ; +; - transmitter:transmitter_inst|fir_q[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_q[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_q[4] ; 1 ; 0 ; ; - transmitter:transmitter_inst|fir_q[5] ; 1 ; 0 ; -; - transmitter:transmitter_inst|fir_q[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_q[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_q[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_q[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_q[10] ; 0 ; 0 ; +; - transmitter:transmitter_inst|fir_q[6] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_q[7] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_q[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_q[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_q[10] ; 1 ; 0 ; ; - transmitter:transmitter_inst|fir_q[11] ; 1 ; 0 ; -; - transmitter:transmitter_inst|fir_q[12] ; 0 ; 0 ; +; - transmitter:transmitter_inst|fir_q[12] ; 1 ; 0 ; ; - transmitter:transmitter_inst|fir_q[13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|fir_q[14] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_q[15] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[0] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[1] ; 1 ; 0 ; -; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[2] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_q[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[0] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[1] ; 0 ; 0 ; +; - transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[2] ; 0 ; 0 ; ; - transmitter:transmitter_inst|fir_i[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|fir_i[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|fir_i[2] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_i[3] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_i[3] ; 0 ; 0 ; ; - transmitter:transmitter_inst|fir_i[4] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_i[5] ; 0 ; 0 ; +; - transmitter:transmitter_inst|fir_i[5] ; 1 ; 0 ; ; - transmitter:transmitter_inst|fir_i[6] ; 1 ; 0 ; ; - transmitter:transmitter_inst|fir_i[7] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_i[8] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_i[9] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_i[10] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_i[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_i[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|fir_i[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|fir_i[8] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_i[9] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_i[10] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_i[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_i[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|fir_i[13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|fir_i[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|fir_i[15] ; 0 ; 0 ; +; - transmitter:transmitter_inst|fir_i[15] ; 1 ; 0 ; ; - adcpipe[1][11] ; 0 ; 0 ; -; - adcpipe[1][10] ; 0 ; 0 ; -; - adcpipe[1][9] ; 1 ; 0 ; +; - adcpipe[1][10] ; 1 ; 0 ; +; - adcpipe[1][9] ; 0 ; 0 ; ; - adcpipe[1][8] ; 0 ; 0 ; ; - adcpipe[1][7] ; 0 ; 0 ; ; - adcpipe[1][6] ; 0 ; 0 ; ; - adcpipe[1][5] ; 0 ; 0 ; ; - adcpipe[1][4] ; 0 ; 0 ; -; - adcpipe[1][3] ; 1 ; 0 ; -; - adcpipe[1][2] ; 0 ; 0 ; +; - adcpipe[1][3] ; 0 ; 0 ; +; - adcpipe[1][2] ; 1 ; 0 ; ; - adcpipe[1][1] ; 0 ; 0 ; ; - adcpipe[1][0] ; 0 ; 0 ; ; - adcpipe[0][11] ; 0 ; 0 ; -; - adcpipe[0][10] ; 0 ; 0 ; -; - adcpipe[0][9] ; 1 ; 0 ; -; - adcpipe[0][8] ; 0 ; 0 ; -; - adcpipe[0][7] ; 0 ; 0 ; -; - adcpipe[0][6] ; 0 ; 0 ; +; - adcpipe[0][10] ; 1 ; 0 ; +; - adcpipe[0][9] ; 0 ; 0 ; +; - adcpipe[0][8] ; 1 ; 0 ; +; - adcpipe[0][7] ; 1 ; 0 ; +; - adcpipe[0][6] ; 1 ; 0 ; ; - adcpipe[0][5] ; 0 ; 0 ; -; - adcpipe[0][4] ; 0 ; 0 ; +; - adcpipe[0][4] ; 1 ; 0 ; ; - adcpipe[0][3] ; 1 ; 0 ; -; - adcpipe[0][2] ; 0 ; 0 ; +; - adcpipe[0][2] ; 1 ; 0 ; ; - adcpipe[0][1] ; 1 ; 0 ; -; - adcpipe[0][0] ; 0 ; 0 ; +; - adcpipe[0][0] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[0] ; 0 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[1] ; 0 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[2] ; 0 ; 0 ; @@ -13340,70 +13368,70 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - transmitter:transmitter_inst|tx_IQ_data[4] ; 0 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[5] ; 0 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[6] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[7] ; 0 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[7] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[8] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[9] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[10] ; 1 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[11] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[12] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[13] ; 0 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[11] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[12] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[13] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[14] ; 1 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[15] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[16] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[17] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[18] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[19] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[20] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[21] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[15] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[16] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[17] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[18] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[19] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[20] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[21] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[22] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[23] ; 1 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[24] ; 0 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[24] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[25] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[26] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[27] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[28] ; 1 ; 0 ; ; - transmitter:transmitter_inst|tx_IQ_data[29] ; 1 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[30] ; 0 ; 0 ; -; - transmitter:transmitter_inst|tx_IQ_data[31] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[22] ; 0 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[30] ; 1 ; 0 ; +; - transmitter:transmitter_inst|tx_IQ_data[31] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[22] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[21] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[19] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[5] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[2] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|out_strobe ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[24] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[20] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[19] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[17] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[12] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[9] ; 0 ; 0 ; @@ -13417,30 +13445,30 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[2].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|out_strobe ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[23] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|sample_no[2] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|sample_no[0] ; 1 ; 0 ; @@ -13458,31 +13486,31 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|sample_no[13] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|sample_no[14] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|sample_no[15] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[24] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[20] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[17] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[15] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[13] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[10] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[8] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[7] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[5] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[4] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[3] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[2] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[1] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[1].cic_comb_inst|prev_data[0] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|sample_no[2] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|sample_no[0] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|sample_no[1] ; 0 ; 0 ; @@ -13499,75 +13527,75 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|sample_no[13] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|sample_no[14] ; 0 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|sample_no[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[11] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[9] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[11] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[9] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[7] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[24] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[23] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[22] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[21] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[20] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[19] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[18] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[17] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[16] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[15] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 0 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[14] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[13] ; 1 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[12] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[11] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[9] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[8] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[7] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[6] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[5] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[4] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[3] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[2] ; 1 ; 0 ; -; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 0 ; 0 ; +; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[1] ; 1 ; 0 ; ; - receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[0] ; 1 ; 0 ; ; - ad9866_rxclk~output ; 1 ; 0 ; ; - ad9866_txclk~output ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; -; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; +; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; @@ -13577,12 +13605,12 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; -; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 1 ; 0 ; +; - receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; - transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; 0 ; 0 ; ; KEY_DOT ; ; ; @@ -13662,8 +13690,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; 1 ; 0 ; -; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; 1 ; 0 ; +; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; 1 ; 0 ; ; - rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; 1 ; 0 ; @@ -13766,8 +13794,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[0] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[9] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[8] ; 1 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[6] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[7] ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[6] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[5] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[4] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[3] ; 1 ; 0 ; @@ -13796,8 +13824,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; 1 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[4] ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; 1 ; 0 ; @@ -13841,8 +13869,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; 1 ; 0 ; -; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; 1 ; 0 ; +; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; 1 ; 0 ; ; - txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; 1 ; 0 ; @@ -13865,10 +13893,10 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx_inst|treg[39] ; 0 ; 6 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; 1 ; 0 ; -; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; 1 ; 0 ; +; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; 1 ; 0 ; ; - rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; 1 ; 0 ; @@ -13920,7 +13948,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx_inst|rdata[35] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rdata[36] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rdata[37] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[47] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[47] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|nb[0] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|nb[1] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|nb[2] ; 0 ; 0 ; @@ -13930,7 +13958,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx2_inst|nb[6] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[46] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[47] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[46] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[46] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|nb[6] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|nb[5] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|nb[4] ; 0 ; 0 ; @@ -13938,9 +13966,9 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx_inst|nb[2] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|nb[1] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|nb[0] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rdata[31] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rdata[25] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rdata[24] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rdata[31] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rdata[25] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rdata[24] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rdata[23] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rdata[19] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rdata[17] ; 0 ; 0 ; @@ -13966,96 +13994,96 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx_inst|rdata[21] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rdata[22] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rdata[29] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rdata[30] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rdata[26] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rdata[27] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rdata[28] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[31] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[32] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[33] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[34] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[35] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[36] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rdata[30] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rdata[26] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rdata[27] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rdata[28] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[31] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[32] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[33] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[34] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[35] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[36] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[45] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[45] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[30] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[45] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[30] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[24] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[23] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[22] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[18] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[16] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[16] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[19] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[17] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[11] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[17] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[11] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[15] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[13] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[13] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[14] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[12] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[12] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[10] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[9] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[8] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[7] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[5] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[6] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[4] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[3] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[4] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[3] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[0] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[1] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[2] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[20] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[21] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[28] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[28] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx_inst|rreg[29] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[25] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[26] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[27] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[44] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[25] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[26] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[27] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[44] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|done ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[45] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[45] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[40] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[41] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[42] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[43] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[39] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[46] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[47] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[41] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[42] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[43] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[39] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[46] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[47] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[44] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[44] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rdata[40] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rdata[41] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[43] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[44] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[39] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[40] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[41] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[42] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[44] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rdata[40] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rdata[41] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[43] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[44] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[39] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[40] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[41] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[42] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rreg[38] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[45] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[46] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[45] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[46] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[43] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[43] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[39] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[40] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[43] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[39] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[40] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rreg[37] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[32] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[33] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[34] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[35] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[33] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[34] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[35] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[36] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[37] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[38] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[42] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[42] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[38] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[42] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[38] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rreg[36] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rreg[31] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[32] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[33] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[34] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[32] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[33] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[34] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rreg[35] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[41] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[41] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx_inst|rreg[37] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|rreg[37] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rreg[30] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[40] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[40] ; 0 ; 0 ; @@ -14068,13 +14096,13 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx2_inst|rreg[27] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[37] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[37] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[26] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[26] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[36] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[36] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[25] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[25] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[35] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[35] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[24] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[24] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[34] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[34] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rreg[23] ; 0 ; 0 ; @@ -14083,13 +14111,13 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx2_inst|rreg[22] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[32] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[32] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[21] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[21] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[31] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[31] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[20] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[20] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[30] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[30] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[19] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[19] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[29] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[29] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rreg[18] ; 1 ; 0 ; @@ -14107,35 +14135,35 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx2_inst|rreg[14] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[24] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[24] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[13] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[13] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[23] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[23] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[12] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[12] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[22] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[22] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[11] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[11] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[21] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[21] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[10] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[18] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[19] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[10] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[18] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[19] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[20] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[21] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[22] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[23] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[24] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[21] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[22] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[23] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[24] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[25] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[26] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[27] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[27] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[28] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[29] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[30] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[31] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[0] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[1] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[30] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[31] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[0] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[1] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[2] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[3] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[4] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[3] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[4] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[5] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[6] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[7] ; 0 ; 0 ; @@ -14145,22 +14173,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx2_inst|rdata[11] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[12] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rdata[13] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[14] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[15] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[16] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rdata[17] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[14] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[15] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[16] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rdata[17] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[20] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[20] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[9] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[0] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[1] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[2] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[9] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[0] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[1] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[2] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|rreg[3] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[4] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[5] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[6] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[7] ; 0 ; 0 ; -; - spi_slave:spi_slave_rx2_inst|rreg[8] ; 0 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[4] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[5] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[6] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[7] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx2_inst|rreg[8] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[19] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[19] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[18] ; 1 ; 0 ; @@ -14170,42 +14198,42 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - spi_slave:spi_slave_rx2_inst|treg[16] ; 1 ; 0 ; ; - spi_slave:spi_slave_rx_inst|treg[16] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[15] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[15] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[15] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[14] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[14] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[14] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[13] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[13] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[13] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[12] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[12] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[12] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[11] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[11] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[11] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[10] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[10] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[10] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[9] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[9] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[9] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[8] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[8] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[8] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[7] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[7] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[7] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[6] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[6] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[6] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[5] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[5] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[5] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[4] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[4] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[4] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[3] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[3] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[3] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[2] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[2] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[2] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[1] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[1] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[1] ; 0 ; 0 ; ; - spi_slave:spi_slave_rx2_inst|treg[0] ; 1 ; 0 ; -; - spi_slave:spi_slave_rx_inst|treg[0] ; 1 ; 0 ; +; - spi_slave:spi_slave_rx_inst|treg[0] ; 0 ; 0 ; ; spi_mosi ; ; ; -; - spi_slave:spi_slave_rx_inst|rreg[0] ; 1 ; 6 ; -; - spi_slave:spi_slave_rx2_inst|rdata[0] ; 1 ; 6 ; -; - spi_slave:spi_slave_rx2_inst|rreg[0] ; 1 ; 6 ; +; - spi_slave:spi_slave_rx2_inst|rreg[0]~feeder ; 1 ; 6 ; +; - spi_slave:spi_slave_rx2_inst|rdata[0]~feeder ; 1 ; 6 ; ; - spi_slave:spi_slave_rx_inst|rdata[0]~feeder ; 1 ; 6 ; +; - spi_slave:spi_slave_rx_inst|rreg[0]~feeder ; 1 ; 6 ; ; ad9866_sdo ; ; ; ; - ad9866:ad9866_inst|dut2_data~16 ; 1 ; 6 ; +-------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+---------+ @@ -14218,178 +14246,178 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +------------------------------------------------------------------------------------------------------+--------------------+---------+-----------------------------------------------------+--------+----------------------+------------------+---------------------------+ ; PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component|PLL_IAMBIC_altpll:auto_generated|wire_pll1_clk[0] ; PLL_4 ; 57 ; Clock ; yes ; Global Clock ; GCLK19 ; -- ; ; PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component|PLL_IAMBIC_altpll:auto_generated|wire_pll1_clk[1] ; PLL_4 ; 30 ; Clock ; yes ; Global Clock ; GCLK18 ; -- ; -; ad9866:ad9866_inst|always0~1 ; LCCOMB_X12_Y11_N0 ; 6 ; Sync. load ; no ; -- ; -- ; -- ; -; ad9866:ad9866_inst|datain[1]~30 ; LCCOMB_X11_Y11_N0 ; 13 ; Latch enable ; yes ; Global Clock ; GCLK0 ; -- ; -; ad9866:ad9866_inst|dut2_data~1 ; LCCOMB_X11_Y11_N6 ; 16 ; Clock enable ; no ; -- ; -- ; -- ; -; ad9866:ad9866_inst|sclk~0 ; LCCOMB_X14_Y24_N4 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; -; ad9866:ad9866_inst|sen_n ; FF_X11_Y11_N27 ; 22 ; Clock enable ; no ; -- ; -- ; -- ; -; ad9866_clk ; PIN_69 ; 10356 ; Clock ; no ; -- ; -- ; -- ; +; ad9866:ad9866_inst|always0~1 ; LCCOMB_X9_Y23_N26 ; 6 ; Sync. load ; no ; -- ; -- ; -- ; +; ad9866:ad9866_inst|datain[1]~30 ; LCCOMB_X10_Y23_N24 ; 13 ; Latch enable ; yes ; Global Clock ; GCLK14 ; -- ; +; ad9866:ad9866_inst|dut2_data~1 ; LCCOMB_X11_Y23_N14 ; 16 ; Clock enable ; no ; -- ; -- ; -- ; +; ad9866:ad9866_inst|sclk~0 ; LCCOMB_X11_Y23_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ad9866:ad9866_inst|sen_n ; FF_X10_Y23_N27 ; 22 ; Clock enable ; no ; -- ; -- ; -- ; +; ad9866_clk ; PIN_69 ; 10383 ; Clock ; no ; -- ; -- ; -- ; ; clk_10mhz ; PIN_55 ; 18 ; Clock ; no ; -- ; -- ; -- ; ; clk_10mhz ; PIN_55 ; 81 ; Clock ; yes ; Global Clock ; GCLK17 ; -- ; -; iambic:iambic_inst|WideOr6 ; LCCOMB_X7_Y28_N30 ; 18 ; Clock enable ; no ; -- ; -- ; -- ; -; iambic:iambic_inst|delay[16]~44 ; LCCOMB_X7_Y28_N24 ; 18 ; Sync. clear ; no ; -- ; -- ; -- ; -; profile:profile_CW|Selector33~4 ; LCCOMB_X6_Y27_N24 ; 18 ; Clock enable ; no ; -- ; -- ; -- ; -; profile:profile_CW|hang_timer[9]~20 ; LCCOMB_X3_Y27_N4 ; 19 ; Sync. clear ; no ; -- ; -- ; -- ; -; profile:profile_CW|hang_timer[9]~21 ; LCCOMB_X3_Y26_N18 ; 18 ; Clock enable ; no ; -- ; -- ; -- ; -; profile:profile_CW|profile_count[5]~1 ; LCCOMB_X4_Y27_N12 ; 10 ; Clock enable ; no ; -- ; -- ; -- ; -; profile:profile_CW|timer[12]~52 ; LCCOMB_X6_Y27_N20 ; 18 ; Sync. clear ; no ; -- ; -- ; -- ; -; ptt_in ; PIN_42 ; 168 ; Clock enable, Output enable, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cic:cic_inst_I2|out_strobe ; FF_X21_Y14_N27 ; 606 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cic:cic_inst_Q2|out_strobe ; FF_X38_Y18_N31 ; 142 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][15] ; FF_X20_Y21_N31 ; 40 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[10][5] ; FF_X33_Y19_N29 ; 20 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][14] ; FF_X20_Y21_N29 ; 45 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][13] ; FF_X21_Y25_N25 ; 44 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][12] ; FF_X20_Y24_N27 ; 41 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][11] ; FF_X20_Y23_N19 ; 37 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][10] ; FF_X22_Y24_N31 ; 35 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][6] ; FF_X23_Y24_N31 ; 22 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|cordic:cordic_inst|phase[30] ; FF_X15_Y22_N29 ; 14 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|Equal0~1 ; LCCOMB_X19_Y6_N22 ; 7 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|Equal9~0 ; LCCOMB_X16_Y3_N0 ; 49 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|Equal9~1 ; LCCOMB_X16_Y5_N0 ; 23 ; Clock enable, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[26]~1 ; LCCOMB_X20_Y3_N28 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|caddr[3]~26 ; LCCOMB_X20_Y3_N0 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|reg_q[35]~2 ; LCCOMB_X20_Y3_N26 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[20]~25 ; LCCOMB_X21_Y4_N4 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|caddr[2]~26 ; LCCOMB_X21_Y4_N26 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|reg_q[35]~2 ; LCCOMB_X21_Y4_N2 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[30]~1 ; LCCOMB_X9_Y5_N10 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[6]~26 ; LCCOMB_X9_Y5_N12 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|reg_q[35]~2 ; LCCOMB_X9_Y5_N8 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[20]~1 ; LCCOMB_X30_Y7_N0 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[1]~29 ; LCCOMB_X30_Y7_N28 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|reg_q[35]~2 ; LCCOMB_X30_Y7_N30 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[20]~25 ; LCCOMB_X15_Y6_N10 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|caddr[1]~26 ; LCCOMB_X15_Y6_N8 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|reg_q[35]~2 ; LCCOMB_X15_Y6_N6 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[21]~25 ; LCCOMB_X19_Y9_N2 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|counter[7]~29 ; LCCOMB_X19_Y9_N30 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|reg_q[35]~2 ; LCCOMB_X19_Y9_N8 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[33]~1 ; LCCOMB_X21_Y6_N4 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[6]~29 ; LCCOMB_X21_Y6_N30 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|reg_q[35]~2 ; LCCOMB_X21_Y6_N28 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[18]~25 ; LCCOMB_X17_Y9_N26 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|counter[0]~29 ; LCCOMB_X17_Y9_N20 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|reg_q[35]~2 ; LCCOMB_X17_Y9_N0 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|weA ; LCCOMB_X16_Y3_N6 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|weB ; LCCOMB_X15_Y5_N30 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|weC ; LCCOMB_X15_Y5_N8 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|weD ; LCCOMB_X17_Y5_N28 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|weE ; LCCOMB_X17_Y5_N0 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|weF ; LCCOMB_X15_Y5_N24 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|weG ; LCCOMB_X17_Y5_N4 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|weH ; LCCOMB_X15_Y5_N6 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|weH~0 ; LCCOMB_X16_Y5_N6 ; 56 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[0]~0 ; LCCOMB_X16_Y6_N28 ; 4 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|Equal0~6 ; LCCOMB_X21_Y23_N6 ; 17 ; Sync. clear ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; FF_X20_Y23_N27 ; 423 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|Equal0~6 ; LCCOMB_X21_Y12_N22 ; 17 ; Sync. clear ; no ; -- ; -- ; -- ; -; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_strobe ; FF_X36_Y14_N9 ; 419 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cic:cic_inst_I2|out_strobe ; FF_X22_Y3_N27 ; 606 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cic:cic_inst_Q2|out_strobe ; FF_X1_Y5_N31 ; 142 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][15] ; FF_X20_Y12_N5 ; 40 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cordic:cordic_inst|Z[10][5] ; FF_X28_Y6_N29 ; 20 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][14] ; FF_X20_Y12_N31 ; 45 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][13] ; FF_X21_Y14_N23 ; 44 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][12] ; FF_X22_Y15_N25 ; 41 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][11] ; FF_X21_Y13_N23 ; 37 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][10] ; FF_X19_Y13_N17 ; 35 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cordic:cordic_inst|Z[9][6] ; FF_X29_Y10_N13 ; 22 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|cordic:cordic_inst|phase[30] ; FF_X14_Y13_N29 ; 14 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|Equal0~1 ; LCCOMB_X28_Y18_N4 ; 7 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|Equal9~0 ; LCCOMB_X26_Y17_N10 ; 49 ; Sync. load ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|Equal9~1 ; LCCOMB_X26_Y19_N14 ; 23 ; Clock enable, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[30]~1 ; LCCOMB_X24_Y12_N6 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|caddr[5]~26 ; LCCOMB_X24_Y12_N8 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|reg_q[35]~2 ; LCCOMB_X24_Y12_N28 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[35]~1 ; LCCOMB_X17_Y16_N30 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|counter[3]~29 ; LCCOMB_X17_Y16_N0 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|reg_q[35]~2 ; LCCOMB_X17_Y16_N6 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[35]~1 ; LCCOMB_X26_Y23_N28 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[3]~26 ; LCCOMB_X26_Y23_N22 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|reg_q[35]~2 ; LCCOMB_X26_Y23_N2 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[35]~1 ; LCCOMB_X28_Y21_N22 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|counter[6]~29 ; LCCOMB_X28_Y21_N0 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|reg_q[35]~2 ; LCCOMB_X28_Y21_N30 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[33]~1 ; LCCOMB_X28_Y18_N10 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[7]~29 ; LCCOMB_X27_Y18_N6 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|reg_q[35]~2 ; LCCOMB_X27_Y18_N30 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[13]~75 ; LCCOMB_X23_Y23_N28 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|counter[0]~29 ; LCCOMB_X23_Y23_N0 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|reg_q[35]~2 ; LCCOMB_X23_Y23_N2 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[0]~25 ; LCCOMB_X19_Y19_N30 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[7]~29 ; LCCOMB_X19_Y19_N2 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|reg_q[35]~2 ; LCCOMB_X19_Y19_N28 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[3]~25 ; LCCOMB_X33_Y12_N8 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|counter[0]~29 ; LCCOMB_X33_Y12_N6 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|reg_q[35]~2 ; LCCOMB_X33_Y12_N4 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|weA ; LCCOMB_X27_Y16_N28 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|weB ; LCCOMB_X27_Y16_N24 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|weC ; LCCOMB_X27_Y20_N2 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|weD ; LCCOMB_X27_Y20_N24 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|weE ; LCCOMB_X26_Y18_N26 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|weF ; LCCOMB_X27_Y20_N18 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|weG ; LCCOMB_X26_Y18_N28 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|weH ; LCCOMB_X27_Y16_N2 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|weH~0 ; LCCOMB_X27_Y19_N0 ; 56 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1]~0 ; LCCOMB_X27_Y19_N28 ; 4 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|varcic:varcic_inst_I1|Equal0~6 ; LCCOMB_X24_Y3_N6 ; 17 ; Sync. clear ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; FF_X27_Y3_N1 ; 423 ; Clock enable ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|Equal0~6 ; LCCOMB_X3_Y6_N28 ; 17 ; Sync. clear ; no ; -- ; -- ; -- ; -; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|out_strobe ; FF_X35_Y4_N31 ; 419 ; Clock enable ; no ; -- ; -- ; -- ; -; reset_handler:reset_handler_inst|LessThan0~7 ; LCCOMB_X1_Y27_N24 ; 24 ; Clock enable ; no ; -- ; -- ; -- ; -; reset_handler:reset_handler_inst|reset ; FF_X1_Y24_N29 ; 28 ; Sync. clear ; no ; -- ; -- ; -- ; -; reset_handler:reset_handler_inst|reset ; FF_X1_Y24_N29 ; 699 ; Async. clear ; yes ; Global Clock ; GCLK13 ; -- ; +; iambic:iambic_inst|WideOr6 ; LCCOMB_X8_Y24_N2 ; 18 ; Clock enable ; no ; -- ; -- ; -- ; +; iambic:iambic_inst|delay[7]~44 ; LCCOMB_X7_Y25_N6 ; 18 ; Sync. clear ; no ; -- ; -- ; -- ; +; profile:profile_CW|Selector31~3 ; LCCOMB_X7_Y25_N4 ; 18 ; Clock enable ; no ; -- ; -- ; -- ; +; profile:profile_CW|hang_timer[10]~20 ; LCCOMB_X12_Y28_N12 ; 19 ; Sync. clear ; no ; -- ; -- ; -- ; +; profile:profile_CW|hang_timer[10]~21 ; LCCOMB_X12_Y27_N30 ; 18 ; Clock enable ; no ; -- ; -- ; -- ; +; profile:profile_CW|profile_count[4]~1 ; LCCOMB_X8_Y25_N0 ; 10 ; Clock enable ; no ; -- ; -- ; -- ; +; profile:profile_CW|timer[3]~52 ; LCCOMB_X7_Y24_N22 ; 18 ; Sync. clear ; no ; -- ; -- ; -- ; +; ptt_in ; PIN_42 ; 169 ; Clock enable, Output enable, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cic:cic_inst_I2|out_strobe ; FF_X23_Y1_N23 ; 606 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cic:cic_inst_Q2|out_strobe ; FF_X39_Y11_N1 ; 142 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[0][15] ; FF_X23_Y19_N1 ; 40 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[10][5] ; FF_X38_Y12_N27 ; 20 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][14] ; FF_X23_Y19_N25 ; 45 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][13] ; FF_X23_Y18_N25 ; 44 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][12] ; FF_X22_Y20_N29 ; 41 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][11] ; FF_X15_Y24_N31 ; 37 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][10] ; FF_X15_Y26_N29 ; 35 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[9][6] ; FF_X36_Y15_N13 ; 22 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|cordic:cordic_inst|phase[30] ; FF_X23_Y23_N29 ; 14 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|Equal0~1 ; LCCOMB_X23_Y6_N10 ; 7 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|Equal9~0 ; LCCOMB_X20_Y6_N6 ; 50 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|Equal9~1 ; LCCOMB_X19_Y5_N30 ; 22 ; Clock enable, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[12]~75 ; LCCOMB_X21_Y2_N28 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[1]~29 ; LCCOMB_X21_Y2_N30 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|reg_q[35]~2 ; LCCOMB_X21_Y2_N0 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[19]~25 ; LCCOMB_X21_Y8_N2 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|counter[8]~29 ; LCCOMB_X21_Y8_N24 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|reg_q[35]~2 ; LCCOMB_X21_Y8_N0 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[24]~1 ; LCCOMB_X22_Y5_N30 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[2]~26 ; LCCOMB_X22_Y5_N28 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|reg_q[35]~2 ; LCCOMB_X22_Y5_N24 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[27]~1 ; LCCOMB_X31_Y7_N24 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|caddr[5]~26 ; LCCOMB_X31_Y7_N0 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|reg_q[35]~2 ; LCCOMB_X31_Y7_N2 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[22]~75 ; LCCOMB_X15_Y8_N6 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|counter[3]~29 ; LCCOMB_X15_Y8_N0 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|reg_q[35]~2 ; LCCOMB_X15_Y8_N2 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[10]~25 ; LCCOMB_X31_Y6_N4 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|caddr[5]~26 ; LCCOMB_X31_Y6_N8 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|reg_q[35]~2 ; LCCOMB_X31_Y6_N12 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[14]~1 ; LCCOMB_X28_Y7_N4 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[2]~29 ; LCCOMB_X28_Y7_N30 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|reg_q[35]~2 ; LCCOMB_X28_Y7_N26 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[19]~25 ; LCCOMB_X14_Y9_N8 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|counter[5]~29 ; LCCOMB_X14_Y9_N10 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|reg_q[35]~2 ; LCCOMB_X14_Y9_N30 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|weA ; LCCOMB_X20_Y6_N4 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|weB ; LCCOMB_X23_Y8_N22 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|weC ; LCCOMB_X20_Y6_N2 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|weD ; LCCOMB_X24_Y6_N0 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|weE ; LCCOMB_X20_Y8_N22 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|weF ; LCCOMB_X23_Y8_N18 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|weG ; LCCOMB_X24_Y6_N28 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|weH ; LCCOMB_X20_Y8_N0 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|weH~0 ; LCCOMB_X22_Y6_N18 ; 56 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[4]~0 ; LCCOMB_X22_Y6_N28 ; 4 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|Equal0~6 ; LCCOMB_X24_Y3_N28 ; 17 ; Sync. clear ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; FF_X23_Y2_N15 ; 423 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|Equal0~6 ; LCCOMB_X28_Y13_N12 ; 17 ; Sync. clear ; no ; -- ; -- ; -- ; +; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_strobe ; FF_X33_Y7_N5 ; 419 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cic:cic_inst_I2|out_strobe ; FF_X7_Y8_N7 ; 606 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cic:cic_inst_Q2|out_strobe ; FF_X3_Y20_N31 ; 142 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][15] ; FF_X8_Y13_N31 ; 40 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cordic:cordic_inst|Z[10][5] ; FF_X3_Y9_N7 ; 20 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][14] ; FF_X7_Y13_N25 ; 45 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][13] ; FF_X8_Y13_N29 ; 44 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][12] ; FF_X2_Y22_N29 ; 41 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][11] ; FF_X3_Y22_N31 ; 37 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cordic:cordic_inst|Z[5][10] ; FF_X3_Y21_N15 ; 35 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cordic:cordic_inst|Z[9][6] ; FF_X3_Y21_N31 ; 22 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|cordic:cordic_inst|phase[30] ; FF_X14_Y21_N29 ; 14 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|Equal0~1 ; LCCOMB_X26_Y14_N28 ; 7 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|Equal9~0 ; LCCOMB_X16_Y11_N26 ; 49 ; Sync. load ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|Equal9~1 ; LCCOMB_X16_Y13_N30 ; 23 ; Clock enable, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[20]~75 ; LCCOMB_X19_Y10_N20 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[8]~29 ; LCCOMB_X19_Y10_N28 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|reg_q[35]~2 ; LCCOMB_X19_Y10_N22 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[30]~1 ; LCCOMB_X15_Y11_N24 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|counter[7]~29 ; LCCOMB_X14_Y11_N2 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|reg_q[35]~2 ; LCCOMB_X14_Y11_N0 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[13]~1 ; LCCOMB_X20_Y13_N0 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|counter[7]~29 ; LCCOMB_X20_Y13_N2 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|reg_q[35]~2 ; LCCOMB_X20_Y13_N24 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[10]~75 ; LCCOMB_X27_Y19_N28 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|counter[6]~29 ; LCCOMB_X27_Y19_N0 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|reg_q[35]~2 ; LCCOMB_X27_Y19_N30 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[22]~25 ; LCCOMB_X26_Y10_N28 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[1]~29 ; LCCOMB_X26_Y10_N0 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|reg_q[35]~2 ; LCCOMB_X26_Y10_N26 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[21]~1 ; LCCOMB_X23_Y17_N28 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|caddr[7]~26 ; LCCOMB_X23_Y17_N18 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|reg_q[35]~2 ; LCCOMB_X23_Y17_N30 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[23]~25 ; LCCOMB_X32_Y15_N28 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[2]~26 ; LCCOMB_X32_Y15_N26 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|reg_q[35]~2 ; LCCOMB_X33_Y15_N0 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[28]~1 ; LCCOMB_X30_Y15_N0 ; 98 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[2]~26 ; LCCOMB_X30_Y15_N12 ; 25 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|reg_q[35]~2 ; LCCOMB_X30_Y15_N2 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|weA ; LCCOMB_X16_Y11_N30 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|weB ; LCCOMB_X16_Y11_N28 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|weC ; LCCOMB_X20_Y15_N22 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|weD ; LCCOMB_X26_Y16_N30 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|weE ; LCCOMB_X24_Y13_N0 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|weF ; LCCOMB_X23_Y14_N16 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|weG ; LCCOMB_X26_Y16_N6 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|weH ; LCCOMB_X24_Y13_N24 ; 127 ; Clock enable, Sync. clear, Sync. load, Write enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|weH~0 ; LCCOMB_X16_Y13_N26 ; 56 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|firX8R8:fir2|wstate[4]~0 ; LCCOMB_X21_Y13_N20 ; 4 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|varcic:varcic_inst_I1|Equal0~6 ; LCCOMB_X11_Y5_N28 ; 17 ; Sync. clear ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; FF_X15_Y6_N31 ; 423 ; Clock enable ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|Equal0~6 ; LCCOMB_X6_Y14_N8 ; 17 ; Sync. clear ; no ; -- ; -- ; -- ; +; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|out_strobe ; FF_X4_Y20_N29 ; 419 ; Clock enable ; no ; -- ; -- ; -- ; +; reset_handler:reset_handler_inst|LessThan0~7 ; LCCOMB_X2_Y25_N26 ; 24 ; Clock enable ; no ; -- ; -- ; -- ; +; reset_handler:reset_handler_inst|reset ; FF_X1_Y26_N7 ; 28 ; Sync. clear ; no ; -- ; -- ; -- ; +; reset_handler:reset_handler_inst|reset ; FF_X1_Y26_N7 ; 699 ; Async. clear ; yes ; Global Clock ; GCLK10 ; -- ; ; spi_ce[0] ; PIN_51 ; 175 ; Clock, Clock enable ; no ; -- ; -- ; -- ; ; spi_ce[1] ; PIN_50 ; 133 ; Clock, Clock enable ; no ; -- ; -- ; -- ; ; spi_sck ; PIN_58 ; 288 ; Clock ; no ; -- ; -- ; -- ; -; spi_slave:spi_slave_rx2_inst|done ; FF_X5_Y14_N5 ; 20 ; Clock ; yes ; Global Clock ; GCLK1 ; -- ; -; spi_slave:spi_slave_rx2_inst|rdata[39]~0 ; LCCOMB_X19_Y20_N0 ; 48 ; Clock enable ; no ; -- ; -- ; -- ; -; spi_slave:spi_slave_rx_inst|done ; FF_X9_Y23_N7 ; 13 ; Clock ; no ; -- ; -- ; -- ; -; spi_slave:spi_slave_rx_inst|done ; FF_X9_Y23_N7 ; 38 ; Clock ; yes ; Global Clock ; GCLK4 ; -- ; -; spi_slave:spi_slave_rx_inst|rdata[37]~0 ; LCCOMB_X15_Y16_N30 ; 40 ; Clock enable ; no ; -- ; -- ; -- ; -; spi_slave:spi_slave_rx_inst|sdout~2 ; LCCOMB_X19_Y1_N6 ; 1 ; Output enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|CicInterpM5:in2|Equal0~2 ; LCCOMB_X1_Y4_N2 ; 1101 ; Clock enable, Sync. clear ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[23]~0 ; LCCOMB_X10_Y7_N6 ; 96 ; Clock enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|Selector1~0 ; LCCOMB_X10_Y9_N18 ; 4 ; Clock enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|WideOr10~0 ; LCCOMB_X10_Y5_N24 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[2]~10 ; LCCOMB_X10_Y9_N0 ; 14 ; Clock enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|req ; FF_X11_Y9_N15 ; 35 ; Clock enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rDone ; FF_X10_Y5_N1 ; 44 ; Clock enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd1 ; FF_X10_Y9_N7 ; 9 ; Clock enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; FF_X10_Y5_N23 ; 100 ; Sync. clear, Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; FF_X10_Y9_N23 ; 18 ; Sync. clear, Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; FF_X10_Y9_N3 ; 2 ; Clock enable, Write enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|afTxFIFOReadStrobe~0 ; LCCOMB_X11_Y12_N20 ; 61 ; Clock enable ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][19] ; FF_X10_Y25_N5 ; 56 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][6] ; FF_X12_Y18_N31 ; 24 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][5] ; FF_X11_Y18_N7 ; 22 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[1][18] ; FF_X10_Y24_N19 ; 59 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][17] ; FF_X9_Y24_N17 ; 58 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][16] ; FF_X6_Y24_N31 ; 55 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][13] ; FF_X8_Y22_N29 ; 43 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][12] ; FF_X10_Y18_N23 ; 41 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][11] ; FF_X12_Y19_N23 ; 39 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][10] ; FF_X15_Y21_N23 ; 37 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[30] ; FF_X14_Y26_N29 ; 37 ; Sync. load ; no ; -- ; -- ; -- ; -; transmitter:transmitter_inst|tx_IQ_data[7]~1 ; LCCOMB_X11_Y12_N22 ; 32 ; Clock enable ; no ; -- ; -- ; -- ; +; spi_slave:spi_slave_rx2_inst|done ; FF_X3_Y14_N5 ; 20 ; Clock ; yes ; Global Clock ; GCLK4 ; -- ; +; spi_slave:spi_slave_rx2_inst|rdata[39]~0 ; LCCOMB_X16_Y25_N26 ; 48 ; Clock enable ; no ; -- ; -- ; -- ; +; spi_slave:spi_slave_rx_inst|done ; FF_X12_Y19_N17 ; 13 ; Clock ; no ; -- ; -- ; -- ; +; spi_slave:spi_slave_rx_inst|done ; FF_X12_Y19_N17 ; 38 ; Clock ; yes ; Global Clock ; GCLK2 ; -- ; +; spi_slave:spi_slave_rx_inst|rdata[37]~0 ; LCCOMB_X16_Y19_N26 ; 40 ; Clock enable ; no ; -- ; -- ; -- ; +; spi_slave:spi_slave_rx_inst|sdout~2 ; LCCOMB_X19_Y8_N6 ; 1 ; Output enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|CicInterpM5:in2|Equal0~2 ; LCCOMB_X20_Y18_N24 ; 1101 ; Clock enable, Sync. clear ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[15]~0 ; LCCOMB_X12_Y20_N8 ; 96 ; Clock enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|Selector1~0 ; LCCOMB_X12_Y20_N0 ; 4 ; Clock enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|WideOr10~0 ; LCCOMB_X12_Y20_N22 ; 2 ; Clock enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[1]~10 ; LCCOMB_X12_Y20_N12 ; 14 ; Clock enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|req ; FF_X11_Y20_N5 ; 35 ; Clock enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rDone ; FF_X12_Y20_N7 ; 44 ; Clock enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd1 ; FF_X38_Y20_N15 ; 9 ; Clock enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; FF_X12_Y20_N3 ; 100 ; Sync. clear, Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; FF_X12_Y20_N31 ; 18 ; Sync. clear, Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; FF_X12_Y20_N11 ; 2 ; Clock enable, Write enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|afTxFIFOReadStrobe~0 ; LCCOMB_X11_Y20_N8 ; 61 ; Clock enable ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[0][19] ; FF_X21_Y27_N27 ; 56 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[13][6] ; FF_X14_Y23_N13 ; 24 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][5] ; FF_X15_Y23_N27 ; 22 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[1][18] ; FF_X21_Y23_N19 ; 59 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[2][17] ; FF_X20_Y23_N17 ; 58 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[3][16] ; FF_X10_Y27_N31 ; 55 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[6][13] ; FF_X11_Y27_N31 ; 43 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][12] ; FF_X17_Y23_N15 ; 41 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][11] ; FF_X20_Y22_N17 ; 39 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][10] ; FF_X19_Y21_N23 ; 37 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|cpl_cordic:cordic_inst|phase[30] ; FF_X28_Y25_N29 ; 37 ; Sync. load ; no ; -- ; -- ; -- ; +; transmitter:transmitter_inst|tx_IQ_data[0]~1 ; LCCOMB_X11_Y20_N12 ; 32 ; Clock enable ; no ; -- ; -- ; -- ; +------------------------------------------------------------------------------------------------------+--------------------+---------+-----------------------------------------------------+--------+----------------------+------------------+---------------------------+ -+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Global & Other Fast Signals ; -+------------------------------------------------------------------------------------------------------+-------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+ -; Name ; Location ; Fan-Out ; Fan-Out Using Intentional Clock Skew ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ; -+------------------------------------------------------------------------------------------------------+-------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+ -; PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component|PLL_IAMBIC_altpll:auto_generated|wire_pll1_clk[0] ; PLL_4 ; 57 ; 0 ; Global Clock ; GCLK19 ; -- ; -; PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component|PLL_IAMBIC_altpll:auto_generated|wire_pll1_clk[1] ; PLL_4 ; 30 ; 0 ; Global Clock ; GCLK18 ; -- ; -; ad9866:ad9866_inst|datain[1]~30 ; LCCOMB_X11_Y11_N0 ; 13 ; 0 ; Global Clock ; GCLK0 ; -- ; -; clk_10mhz ; PIN_55 ; 81 ; 1 ; Global Clock ; GCLK17 ; -- ; -; reset_handler:reset_handler_inst|reset ; FF_X1_Y24_N29 ; 699 ; 0 ; Global Clock ; GCLK13 ; -- ; -; spi_slave:spi_slave_rx2_inst|done ; FF_X5_Y14_N5 ; 20 ; 0 ; Global Clock ; GCLK1 ; -- ; -; spi_slave:spi_slave_rx_inst|done ; FF_X9_Y23_N7 ; 38 ; 0 ; Global Clock ; GCLK4 ; -- ; -+------------------------------------------------------------------------------------------------------+-------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+ ++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Global & Other Fast Signals ; ++------------------------------------------------------------------------------------------------------+--------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+ +; Name ; Location ; Fan-Out ; Fan-Out Using Intentional Clock Skew ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ; ++------------------------------------------------------------------------------------------------------+--------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+ +; PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component|PLL_IAMBIC_altpll:auto_generated|wire_pll1_clk[0] ; PLL_4 ; 57 ; 0 ; Global Clock ; GCLK19 ; -- ; +; PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component|PLL_IAMBIC_altpll:auto_generated|wire_pll1_clk[1] ; PLL_4 ; 30 ; 0 ; Global Clock ; GCLK18 ; -- ; +; ad9866:ad9866_inst|datain[1]~30 ; LCCOMB_X10_Y23_N24 ; 13 ; 0 ; Global Clock ; GCLK14 ; -- ; +; clk_10mhz ; PIN_55 ; 81 ; 0 ; Global Clock ; GCLK17 ; -- ; +; reset_handler:reset_handler_inst|reset ; FF_X1_Y26_N7 ; 699 ; 0 ; Global Clock ; GCLK10 ; -- ; +; spi_slave:spi_slave_rx2_inst|done ; FF_X3_Y14_N5 ; 20 ; 4 ; Global Clock ; GCLK4 ; -- ; +; spi_slave:spi_slave_rx_inst|done ; FF_X12_Y19_N17 ; 38 ; 0 ; Global Clock ; GCLK2 ; -- ; ++------------------------------------------------------------------------------------------------------+--------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+ +-----------------------------------------------------------------+ @@ -14397,7 +14425,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +-------------------------------------------------------+---------+ ; Name ; Fan-Out ; +-------------------------------------------------------+---------+ -; ad9866_clk~input ; 10373 ; +; ad9866_clk~input ; 10400 ; ; transmitter:transmitter_inst|CicInterpM5:in2|Equal0~2 ; 1101 ; ; receiver:receiver_rx2_inst|cic:cic_inst_I2|out_strobe ; 606 ; ; receiver:receiver_rx_inst|cic:cic_inst_I2|out_strobe ; 606 ; @@ -14409,44 +14437,44 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +----------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+---------------------------------+--------------------------------------------------------------------------------------------------------------------------------+----------------------+------------------------+------------------------+----------+------------------------+---------------+ ; Name ; Type ; Mode ; Clock Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M9Ks ; MIF ; Location ; Mixed Width RDW Mode ; Port A RDW Mode ; Port B RDW Mode ; ECC Mode ; ECC Pipeline Registers ; Fits in MLABs ; +----------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+---------------------------------+--------------------------------------------------------------------------------------------------------------------------------+----------------------+------------------------+------------------------+----------+------------------------+---------------+ -; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 1000 ; 16 ; -- ; -- ; yes ; yes ; -- ; -- ; 16000 ; 1000 ; 16 ; -- ; -- ; 16000 ; 2 ; profile.mif ; M9K_X13_Y25_N0, M9K_X13_Y26_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y4_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 1000 ; 16 ; -- ; -- ; yes ; yes ; -- ; -- ; 16000 ; 1000 ; 16 ; -- ; -- ; 16000 ; 2 ; profile.mif ; M9K_X13_Y27_N0, M9K_X13_Y28_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y2_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firromH:rom|altsyncram:altsyncram_component|altsyncram_ca91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8A.mif ; M9K_X25_Y1_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y5_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firromH:rom|altsyncram:altsyncram_component|altsyncram_da91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8B.mif ; M9K_X13_Y4_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y7_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firromH:rom|altsyncram:altsyncram_component|altsyncram_ea91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8C.mif ; M9K_X25_Y8_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y6_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firromH:rom|altsyncram:altsyncram_component|altsyncram_fa91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8D.mif ; M9K_X25_Y2_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y3_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firromH:rom|altsyncram:altsyncram_component|altsyncram_ga91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8E.mif ; M9K_X13_Y5_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y11_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firromH:rom|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8F.mif ; M9K_X13_Y8_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y9_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firromH:rom|altsyncram:altsyncram_component|altsyncram_ia91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8G.mif ; M9K_X13_Y9_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y10_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firromH:rom|altsyncram:altsyncram_component|altsyncram_ja91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8H.mif ; M9K_X13_Y11_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y15_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firromH:rom|altsyncram:altsyncram_component|altsyncram_ca91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8A.mif ; M9K_X25_Y13_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y14_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firromH:rom|altsyncram:altsyncram_component|altsyncram_da91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8B.mif ; M9K_X25_Y12_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y23_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firromH:rom|altsyncram:altsyncram_component|altsyncram_ea91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8C.mif ; M9K_X25_Y27_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y20_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firromH:rom|altsyncram:altsyncram_component|altsyncram_fa91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8D.mif ; M9K_X25_Y25_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y18_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firromH:rom|altsyncram:altsyncram_component|altsyncram_ga91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8E.mif ; M9K_X25_Y21_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y22_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firromH:rom|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8F.mif ; M9K_X25_Y24_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y19_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firromH:rom|altsyncram:altsyncram_component|altsyncram_ia91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8G.mif ; M9K_X13_Y22_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y16_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firromH:rom|altsyncram:altsyncram_component|altsyncram_ja91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8H.mif ; M9K_X25_Y17_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 512 ; 48 ; 512 ; 48 ; yes ; no ; yes ; yes ; 24576 ; 512 ; 48 ; 512 ; 48 ; 24576 ; 3 ; None ; M9K_X13_Y23_N0, M9K_X13_Y21_N0, M9K_X13_Y20_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 512 ; 48 ; 512 ; 48 ; yes ; no ; yes ; yes ; 24576 ; 512 ; 48 ; 512 ; 48 ; 24576 ; 3 ; None ; M9K_X13_Y1_N0, M9K_X13_Y2_N0, M9K_X13_Y3_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|firram36I_1024:ram|altsyncram:altsyncram_component|altsyncram_jin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 128 ; 36 ; 128 ; 36 ; yes ; no ; yes ; yes ; 4608 ; 128 ; 36 ; 128 ; 36 ; 4608 ; 1 ; None ; M9K_X13_Y10_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|firromI_1024:rom|altsyncram:altsyncram_component|altsyncram_23b1:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 1024 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 18432 ; 1024 ; 18 ; -- ; -- ; 18432 ; 2 ; ./Polyphase_FIR/coefI8_1024.mif ; M9K_X13_Y6_N0, M9K_X13_Y7_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; -; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 2048 ; 32 ; 2048 ; 32 ; yes ; no ; yes ; yes ; 65536 ; 2048 ; 32 ; 2048 ; 32 ; 65536 ; 8 ; None ; M9K_X13_Y19_N0, M9K_X13_Y12_N0, M9K_X13_Y14_N0, M9K_X13_Y13_N0, M9K_X13_Y16_N0, M9K_X13_Y17_N0, M9K_X13_Y18_N0, M9K_X13_Y15_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X13_Y8_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|firromH:rom|altsyncram:altsyncram_component|altsyncram_da91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8B.mif ; M9K_X25_Y10_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X13_Y3_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|firromH:rom|altsyncram:altsyncram_component|altsyncram_ea91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8C.mif ; M9K_X25_Y3_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y8_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|firromH:rom|altsyncram:altsyncram_component|altsyncram_fa91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8D.mif ; M9K_X25_Y11_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X13_Y6_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|firromH:rom|altsyncram:altsyncram_component|altsyncram_ga91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8E.mif ; M9K_X13_Y2_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y5_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firromH:rom|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8F.mif ; M9K_X25_Y7_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y4_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|firromH:rom|altsyncram:altsyncram_component|altsyncram_ia91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8G.mif ; M9K_X25_Y6_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X13_Y7_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|firromH:rom|altsyncram:altsyncram_component|altsyncram_ja91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8H.mif ; M9K_X25_Y9_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X13_Y14_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firromH:rom|altsyncram:altsyncram_component|altsyncram_ca91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8A.mif ; M9K_X13_Y10_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X13_Y13_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|firromH:rom|altsyncram:altsyncram_component|altsyncram_da91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8B.mif ; M9K_X13_Y15_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X13_Y16_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|firromH:rom|altsyncram:altsyncram_component|altsyncram_ea91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8C.mif ; M9K_X13_Y17_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y18_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|firromH:rom|altsyncram:altsyncram_component|altsyncram_fa91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8D.mif ; M9K_X25_Y22_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y13_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|firromH:rom|altsyncram:altsyncram_component|altsyncram_ga91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8E.mif ; M9K_X25_Y12_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y17_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firromH:rom|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8F.mif ; M9K_X25_Y21_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y16_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firromH:rom|altsyncram:altsyncram_component|altsyncram_ia91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8G.mif ; M9K_X25_Y19_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 256 ; 36 ; 256 ; 36 ; yes ; no ; yes ; yes ; 9216 ; 256 ; 36 ; 256 ; 36 ; 9216 ; 1 ; None ; M9K_X25_Y14_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|firromH:rom|altsyncram:altsyncram_component|altsyncram_ja91:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 256 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 4608 ; 256 ; 18 ; -- ; -- ; 4608 ; 1 ; coefL8H.mif ; M9K_X25_Y15_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 512 ; 48 ; 512 ; 48 ; yes ; no ; yes ; yes ; 24576 ; 512 ; 48 ; 512 ; 48 ; 24576 ; 3 ; None ; M9K_X13_Y9_N0, M9K_X13_Y11_N0, M9K_X13_Y12_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 512 ; 48 ; 512 ; 48 ; yes ; no ; yes ; yes ; 24576 ; 512 ; 48 ; 512 ; 48 ; 24576 ; 3 ; None ; M9K_X13_Y5_N0, M9K_X13_Y4_N0, M9K_X13_Y1_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|firram36I_1024:ram|altsyncram:altsyncram_component|altsyncram_jin1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 128 ; 36 ; 128 ; 36 ; yes ; no ; yes ; yes ; 4608 ; 128 ; 36 ; 128 ; 36 ; 4608 ; 1 ; None ; M9K_X25_Y20_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|firromI_1024:rom|altsyncram:altsyncram_component|altsyncram_23b1:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; Single Clock ; 1024 ; 18 ; -- ; -- ; yes ; yes ; -- ; -- ; 18432 ; 1024 ; 18 ; -- ; -- ; 18432 ; 2 ; ./Polyphase_FIR/coefI8_1024.mif ; M9K_X25_Y23_N0, M9K_X25_Y24_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 2048 ; 32 ; 2048 ; 32 ; yes ; no ; yes ; yes ; 65536 ; 2048 ; 32 ; 2048 ; 32 ; 65536 ; 8 ; None ; M9K_X13_Y19_N0, M9K_X13_Y20_N0, M9K_X13_Y18_N0, M9K_X13_Y21_N0, M9K_X13_Y22_N0, M9K_X13_Y23_N0, M9K_X13_Y24_N0, M9K_X13_Y25_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +----------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+---------------------------------+--------------------------------------------------------------------------------------------------------------------------------+----------------------+------------------------+------------------------+----------+------------------------+---------------+ Note: Fitter may spread logical memories into multiple blocks to improve timing. The actual required RAM blocks can be found in the Fitter Resource Usage section. @@ -15382,100 +15410,100 @@ RAM content values are presented in the following format: (Binary) (Octal) (Deci +------------------------------------------------------------------------------------------------------+----------------------------+--------------------+---------------------+--------------------------------+-----------------------+-----------------------+-------------------+-----------------+ ; Name ; Mode ; Location ; Sign Representation ; Has Input Shift Register Chain ; Data A Input Register ; Data B Input Register ; Pipeline Register ; Output Register ; +------------------------------------------------------------------------------------------------------+----------------------------+--------------------+---------------------+--------------------------------+-----------------------+-----------------------+-------------------+-----------------+ -; iambic:iambic_inst|lpm_mult:Mult0|mult_jbt:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y25_N2 ; ; No ; ; ; ; no ; -; iambic:iambic_inst|lpm_mult:Mult0|mult_jbt:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y25_N0 ; Unsigned ; ; no ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y8_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y8_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y12_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y12_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y8_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y8_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y3_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y3_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y10_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y10_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y5_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y5_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y6_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y6_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y1_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y1_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y23_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y23_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y21_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y21_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y18_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y18_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y17_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y17_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y16_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y16_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y14_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y14_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y20_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y20_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y15_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y15_N0 ; Signed ; ; yes ; yes ; no ; ; -; lpm_mult:Mult2|mult_igt:auto_generated|mac_out8 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y26_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult2|mult_igt:auto_generated|mac_mult7 ; ; DSPMULT_X18_Y26_N0 ; Unsigned ; ; yes ; no ; no ; ; -; lpm_mult:Mult2|mult_igt:auto_generated|mac_out6 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y24_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult2|mult_igt:auto_generated|mac_mult5 ; ; DSPMULT_X18_Y24_N0 ; Unsigned ; ; no ; yes ; no ; ; -; lpm_mult:Mult2|mult_igt:auto_generated|mac_out4 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y27_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult2|mult_igt:auto_generated|mac_mult3 ; ; DSPMULT_X18_Y27_N0 ; Unsigned ; ; yes ; no ; no ; ; -; lpm_mult:Mult2|mult_igt:auto_generated|w507w[0] ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y28_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult2|mult_igt:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y28_N0 ; Unsigned ; ; yes ; no ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y7_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y7_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y11_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y11_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y9_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y9_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y4_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y4_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y13_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y13_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y2_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y2_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y4_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y4_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y1_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y1_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y24_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y24_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y22_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y22_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y19_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y19_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y18_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y18_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y13_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y13_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y11_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y11_N0 ; Signed ; ; yes ; yes ; no ; ; +; iambic:iambic_inst|lpm_mult:Mult0|mult_jbt:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y27_N2 ; ; No ; ; ; ; no ; +; iambic:iambic_inst|lpm_mult:Mult0|mult_jbt:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y27_N0 ; Unsigned ; ; no ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y3_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y3_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y6_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y6_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y7_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y7_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y5_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y5_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y7_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y7_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y9_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y9_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y8_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y8_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y1_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y1_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y16_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y16_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y18_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y18_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y16_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y16_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y11_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y11_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y13_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y13_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y11_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y11_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y18_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y18_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y13_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y13_N0 ; Signed ; ; yes ; yes ; no ; ; +; lpm_mult:Mult2|mult_igt:auto_generated|mac_out8 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y22_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult2|mult_igt:auto_generated|mac_mult7 ; ; DSPMULT_X34_Y22_N0 ; Unsigned ; ; yes ; no ; no ; ; +; lpm_mult:Mult2|mult_igt:auto_generated|mac_out6 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y23_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult2|mult_igt:auto_generated|mac_mult5 ; ; DSPMULT_X34_Y23_N0 ; Unsigned ; ; no ; yes ; no ; ; +; lpm_mult:Mult2|mult_igt:auto_generated|mac_out4 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y26_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult2|mult_igt:auto_generated|mac_mult3 ; ; DSPMULT_X34_Y26_N0 ; Unsigned ; ; yes ; no ; no ; ; +; lpm_mult:Mult2|mult_igt:auto_generated|w507w[0] ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y25_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult2|mult_igt:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y25_N0 ; Unsigned ; ; yes ; no ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y4_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y4_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y5_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y5_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y4_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y4_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y6_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y6_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y10_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y10_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y8_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y8_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y9_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y9_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y2_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y2_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y15_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y15_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y17_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y17_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y15_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y15_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y12_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y12_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y14_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y14_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y12_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y12_N0 ; Signed ; ; yes ; yes ; no ; ; ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y19_N2 ; ; No ; ; ; ; no ; ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y19_N0 ; Signed ; ; yes ; yes ; no ; ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y12_N2 ; ; No ; ; ; ; no ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y12_N0 ; Signed ; ; yes ; yes ; no ; ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y7_N2 ; ; No ; ; ; ; no ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y7_N0 ; Signed ; ; yes ; yes ; no ; ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y6_N2 ; ; No ; ; ; ; no ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y6_N0 ; Signed ; ; yes ; yes ; no ; ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y14_N2 ; ; No ; ; ; ; no ; +; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y14_N0 ; Signed ; ; yes ; yes ; no ; ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult1|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y21_N2 ; ; No ; ; ; ; no ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult1|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y21_N0 ; Signed ; ; yes ; yes ; no ; ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult0|mult_56t:auto_generated|mac_out2 ; Simple Multiplier (18-bit) ; DSPOUT_X34_Y20_N2 ; ; No ; ; ; ; no ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|lpm_mult:Mult0|mult_56t:auto_generated|mac_mult1 ; ; DSPMULT_X34_Y20_N0 ; Signed ; ; yes ; yes ; no ; ; ; lpm_mult:Mult1|mult_igt:auto_generated|mac_out6 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y23_N2 ; ; No ; ; ; ; no ; ; lpm_mult:Mult1|mult_igt:auto_generated|mac_mult5 ; ; DSPMULT_X18_Y23_N0 ; Unsigned ; ; no ; yes ; no ; ; -; lpm_mult:Mult1|mult_igt:auto_generated|mac_out8 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y22_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult1|mult_igt:auto_generated|mac_mult7 ; ; DSPMULT_X18_Y22_N0 ; Unsigned ; ; yes ; no ; no ; ; -; lpm_mult:Mult1|mult_igt:auto_generated|mac_out4 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y21_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult1|mult_igt:auto_generated|mac_mult3 ; ; DSPMULT_X18_Y21_N0 ; Unsigned ; ; yes ; no ; no ; ; -; lpm_mult:Mult1|mult_igt:auto_generated|w507w[0] ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y20_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult1|mult_igt:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y20_N0 ; Unsigned ; ; yes ; no ; no ; ; -; lpm_mult:Mult0|mult_igt:auto_generated|mac_out6 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y16_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult0|mult_igt:auto_generated|mac_mult5 ; ; DSPMULT_X18_Y16_N0 ; Unsigned ; ; no ; yes ; no ; ; -; lpm_mult:Mult0|mult_igt:auto_generated|mac_out8 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y17_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult0|mult_igt:auto_generated|mac_mult7 ; ; DSPMULT_X18_Y17_N0 ; Unsigned ; ; yes ; no ; no ; ; -; lpm_mult:Mult0|mult_igt:auto_generated|mac_out4 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y14_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult0|mult_igt:auto_generated|mac_mult3 ; ; DSPMULT_X18_Y14_N0 ; Unsigned ; ; yes ; no ; no ; ; -; lpm_mult:Mult0|mult_igt:auto_generated|w507w[0] ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y15_N2 ; ; No ; ; ; ; no ; -; lpm_mult:Mult0|mult_igt:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y15_N0 ; Unsigned ; ; yes ; no ; no ; ; +; lpm_mult:Mult1|mult_igt:auto_generated|mac_out8 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y24_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult1|mult_igt:auto_generated|mac_mult7 ; ; DSPMULT_X18_Y24_N0 ; Unsigned ; ; yes ; no ; no ; ; +; lpm_mult:Mult1|mult_igt:auto_generated|mac_out4 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y25_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult1|mult_igt:auto_generated|mac_mult3 ; ; DSPMULT_X18_Y25_N0 ; Unsigned ; ; yes ; no ; no ; ; +; lpm_mult:Mult1|mult_igt:auto_generated|w507w[0] ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y26_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult1|mult_igt:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y26_N0 ; Unsigned ; ; yes ; no ; no ; ; +; lpm_mult:Mult0|mult_igt:auto_generated|mac_out6 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y22_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult0|mult_igt:auto_generated|mac_mult5 ; ; DSPMULT_X18_Y22_N0 ; Unsigned ; ; no ; yes ; no ; ; +; lpm_mult:Mult0|mult_igt:auto_generated|mac_out8 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y21_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult0|mult_igt:auto_generated|mac_mult7 ; ; DSPMULT_X18_Y21_N0 ; Unsigned ; ; yes ; no ; no ; ; +; lpm_mult:Mult0|mult_igt:auto_generated|mac_out4 ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y20_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult0|mult_igt:auto_generated|mac_mult3 ; ; DSPMULT_X18_Y20_N0 ; Unsigned ; ; yes ; no ; no ; ; +; lpm_mult:Mult0|mult_igt:auto_generated|w507w[0] ; Simple Multiplier (18-bit) ; DSPOUT_X18_Y19_N2 ; ; No ; ; ; ; no ; +; lpm_mult:Mult0|mult_igt:auto_generated|mac_mult1 ; ; DSPMULT_X18_Y19_N0 ; Unsigned ; ; yes ; no ; no ; ; +------------------------------------------------------------------------------------------------------+----------------------------+--------------------+---------------------+--------------------------------+-----------------------+-----------------------+-------------------+-----------------+ @@ -15484,181 +15512,182 @@ RAM content values are presented in the following format: (Binary) (Octal) (Deci +-----------------------+--------------------------+ ; Routing Resource Type ; Usage ; +-----------------------+--------------------------+ -; Block interconnects ; 22,715 / 47,787 ( 48 % ) ; -; C16 interconnects ; 201 / 1,804 ( 11 % ) ; -; C4 interconnects ; 9,675 / 31,272 ( 31 % ) ; -; Direct links ; 5,386 / 47,787 ( 11 % ) ; +; Block interconnects ; 22,647 / 47,787 ( 47 % ) ; +; C16 interconnects ; 171 / 1,804 ( 9 % ) ; +; C4 interconnects ; 9,960 / 31,272 ( 32 % ) ; +; Direct links ; 5,063 / 47,787 ( 11 % ) ; ; Global clocks ; 7 / 20 ( 35 % ) ; -; Local interconnects ; 4,921 / 15,408 ( 32 % ) ; -; R24 interconnects ; 225 / 1,775 ( 13 % ) ; -; R4 interconnects ; 14,798 / 41,310 ( 36 % ) ; +; Local interconnects ; 5,030 / 15,408 ( 33 % ) ; +; R24 interconnects ; 298 / 1,775 ( 17 % ) ; +; R4 interconnects ; 15,397 / 41,310 ( 37 % ) ; +-----------------------+--------------------------+ +-----------------------------------------------------------------------------+ ; LAB Logic Elements ; +---------------------------------------------+-------------------------------+ -; Number of Logic Elements (Average = 14.88) ; Number of LABs (Total = 955) ; +; Number of Logic Elements (Average = 14.89) ; Number of LABs (Total = 957) ; +---------------------------------------------+-------------------------------+ -; 1 ; 1 ; -; 2 ; 7 ; +; 1 ; 3 ; +; 2 ; 3 ; ; 3 ; 1 ; -; 4 ; 1 ; -; 5 ; 1 ; -; 6 ; 5 ; -; 7 ; 2 ; -; 8 ; 29 ; -; 9 ; 11 ; -; 10 ; 17 ; -; 11 ; 17 ; -; 12 ; 29 ; -; 13 ; 34 ; -; 14 ; 45 ; +; 4 ; 4 ; +; 5 ; 3 ; +; 6 ; 2 ; +; 7 ; 7 ; +; 8 ; 24 ; +; 9 ; 14 ; +; 10 ; 15 ; +; 11 ; 18 ; +; 12 ; 22 ; +; 13 ; 35 ; +; 14 ; 44 ; ; 15 ; 49 ; -; 16 ; 706 ; +; 16 ; 713 ; +---------------------------------------------+-------------------------------+ +--------------------------------------------------------------------+ ; LAB-wide Signals ; +------------------------------------+-------------------------------+ -; LAB-wide Signals (Average = 1.85) ; Number of LABs (Total = 955) ; +; LAB-wide Signals (Average = 1.84) ; Number of LABs (Total = 957) ; +------------------------------------+-------------------------------+ -; 1 Async. clear ; 64 ; -; 1 Clock ; 853 ; -; 1 Clock enable ; 501 ; -; 1 Sync. clear ; 167 ; -; 1 Sync. load ; 108 ; -; 2 Clock enables ; 54 ; -; 2 Clocks ; 22 ; +; 1 Async. clear ; 65 ; +; 1 Clock ; 850 ; +; 1 Clock enable ; 508 ; +; 1 Sync. clear ; 158 ; +; 1 Sync. load ; 100 ; +; 2 Clock enables ; 55 ; +; 2 Clocks ; 23 ; +------------------------------------+-------------------------------+ +------------------------------------------------------------------------------+ ; LAB Signals Sourced ; +----------------------------------------------+-------------------------------+ -; Number of Signals Sourced (Average = 24.46) ; Number of LABs (Total = 955) ; +; Number of Signals Sourced (Average = 24.51) ; Number of LABs (Total = 957) ; +----------------------------------------------+-------------------------------+ ; 0 ; 0 ; -; 1 ; 1 ; -; 2 ; 5 ; -; 3 ; 3 ; -; 4 ; 1 ; -; 5 ; 1 ; -; 6 ; 6 ; -; 7 ; 1 ; -; 8 ; 1 ; -; 9 ; 5 ; -; 10 ; 12 ; -; 11 ; 4 ; -; 12 ; 8 ; -; 13 ; 12 ; -; 14 ; 17 ; -; 15 ; 25 ; -; 16 ; 84 ; -; 17 ; 17 ; -; 18 ; 21 ; -; 19 ; 12 ; -; 20 ; 16 ; -; 21 ; 21 ; +; 1 ; 3 ; +; 2 ; 3 ; +; 3 ; 0 ; +; 4 ; 3 ; +; 5 ; 4 ; +; 6 ; 3 ; +; 7 ; 6 ; +; 8 ; 3 ; +; 9 ; 10 ; +; 10 ; 1 ; +; 11 ; 8 ; +; 12 ; 4 ; +; 13 ; 8 ; +; 14 ; 16 ; +; 15 ; 32 ; +; 16 ; 71 ; +; 17 ; 15 ; +; 18 ; 25 ; +; 19 ; 19 ; +; 20 ; 19 ; +; 21 ; 17 ; ; 22 ; 32 ; -; 23 ; 36 ; -; 24 ; 42 ; +; 23 ; 39 ; +; 24 ; 38 ; ; 25 ; 52 ; -; 26 ; 85 ; -; 27 ; 47 ; -; 28 ; 61 ; -; 29 ; 35 ; -; 30 ; 60 ; -; 31 ; 59 ; -; 32 ; 173 ; +; 26 ; 81 ; +; 27 ; 53 ; +; 28 ; 65 ; +; 29 ; 36 ; +; 30 ; 53 ; +; 31 ; 68 ; +; 32 ; 170 ; +----------------------------------------------+-------------------------------+ +----------------------------------------------------------------------------------+ ; LAB Signals Sourced Out ; +--------------------------------------------------+-------------------------------+ -; Number of Signals Sourced Out (Average = 12.64) ; Number of LABs (Total = 955) ; +; Number of Signals Sourced Out (Average = 12.45) ; Number of LABs (Total = 957) ; +--------------------------------------------------+-------------------------------+ -; 0 ; 2 ; -; 1 ; 18 ; -; 2 ; 10 ; -; 3 ; 25 ; +; 0 ; 3 ; +; 1 ; 19 ; +; 2 ; 11 ; +; 3 ; 24 ; ; 4 ; 12 ; -; 5 ; 13 ; -; 6 ; 9 ; -; 7 ; 19 ; +; 5 ; 14 ; +; 6 ; 18 ; +; 7 ; 16 ; ; 8 ; 46 ; -; 9 ; 49 ; -; 10 ; 36 ; -; 11 ; 75 ; -; 12 ; 67 ; -; 13 ; 93 ; -; 14 ; 77 ; -; 15 ; 54 ; +; 9 ; 67 ; +; 10 ; 42 ; +; 11 ; 84 ; +; 12 ; 51 ; +; 13 ; 86 ; +; 14 ; 71 ; +; 15 ; 48 ; ; 16 ; 303 ; -; 17 ; 23 ; -; 18 ; 6 ; -; 19 ; 6 ; -; 20 ; 1 ; -; 21 ; 1 ; +; 17 ; 11 ; +; 18 ; 10 ; +; 19 ; 5 ; +; 20 ; 2 ; +; 21 ; 2 ; ; 22 ; 1 ; -; 23 ; 3 ; -; 24 ; 2 ; -; 25 ; 0 ; -; 26 ; 0 ; -; 27 ; 0 ; +; 23 ; 2 ; +; 24 ; 1 ; +; 25 ; 2 ; +; 26 ; 1 ; +; 27 ; 1 ; ; 28 ; 0 ; -; 29 ; 0 ; +; 29 ; 2 ; ; 30 ; 1 ; -; 31 ; 1 ; -; 32 ; 2 ; +; 31 ; 0 ; +; 32 ; 1 ; +--------------------------------------------------+-------------------------------+ +------------------------------------------------------------------------------+ ; LAB Distinct Inputs ; +----------------------------------------------+-------------------------------+ -; Number of Distinct Inputs (Average = 19.13) ; Number of LABs (Total = 955) ; +; Number of Distinct Inputs (Average = 18.98) ; Number of LABs (Total = 957) ; +----------------------------------------------+-------------------------------+ ; 0 ; 0 ; -; 1 ; 0 ; -; 2 ; 1 ; -; 3 ; 40 ; -; 4 ; 5 ; +; 1 ; 3 ; +; 2 ; 3 ; +; 3 ; 34 ; +; 4 ; 7 ; ; 5 ; 14 ; -; 6 ; 20 ; -; 7 ; 9 ; -; 8 ; 10 ; -; 9 ; 12 ; -; 10 ; 7 ; -; 11 ; 18 ; -; 12 ; 13 ; -; 13 ; 20 ; -; 14 ; 38 ; -; 15 ; 54 ; -; 16 ; 50 ; -; 17 ; 80 ; -; 18 ; 102 ; -; 19 ; 84 ; -; 20 ; 45 ; -; 21 ; 32 ; -; 22 ; 37 ; -; 23 ; 20 ; -; 24 ; 33 ; -; 25 ; 17 ; -; 26 ; 21 ; -; 27 ; 16 ; -; 28 ; 19 ; -; 29 ; 40 ; -; 30 ; 8 ; -; 31 ; 5 ; -; 32 ; 4 ; -; 33 ; 14 ; -; 34 ; 8 ; -; 35 ; 48 ; -; 36 ; 10 ; -; 37 ; 1 ; +; 6 ; 16 ; +; 7 ; 13 ; +; 8 ; 6 ; +; 9 ; 10 ; +; 10 ; 16 ; +; 11 ; 21 ; +; 12 ; 20 ; +; 13 ; 23 ; +; 14 ; 37 ; +; 15 ; 56 ; +; 16 ; 48 ; +; 17 ; 76 ; +; 18 ; 113 ; +; 19 ; 91 ; +; 20 ; 41 ; +; 21 ; 26 ; +; 22 ; 22 ; +; 23 ; 14 ; +; 24 ; 27 ; +; 25 ; 19 ; +; 26 ; 27 ; +; 27 ; 14 ; +; 28 ; 16 ; +; 29 ; 31 ; +; 30 ; 16 ; +; 31 ; 9 ; +; 32 ; 11 ; +; 33 ; 8 ; +; 34 ; 7 ; +; 35 ; 50 ; +; 36 ; 9 ; +; 37 ; 2 ; +; 38 ; 1 ; +----------------------------------------------+-------------------------------+ @@ -15814,122 +15843,123 @@ RAM content values are presented in the following format: (Binary) (Octal) (Deci +--------------------------------------------+----------------------------------+-------------------+ ; Source Clock(s) ; Destination Clock(s) ; Delay Added in ns ; +--------------------------------------------+----------------------------------+-------------------+ -; I/O ; ad9866_clk ; 311.6 ; -; I/O ; spi_sck ; 45.6 ; -; clk_10mhz ; ad9866:ad9866_inst|dut1_pc[0] ; 34.8 ; -; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 17.9 ; -; clk_10mhz,spi_slave:spi_slave_rx_inst|done ; ad9866:ad9866_inst|dut1_pc[0] ; 16.9 ; +; I/O ; ad9866_clk ; 308.7 ; +; I/O ; spi_sck ; 47.1 ; +; clk_10mhz ; ad9866:ad9866_inst|dut1_pc[0] ; 43.2 ; +; clk_10mhz,spi_slave:spi_slave_rx_inst|done ; ad9866:ad9866_inst|dut1_pc[0] ; 22.4 ; +; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 14.5 ; +; ad9866_clk ; ad9866_clk ; 9.3 ; +--------------------------------------------+----------------------------------+-------------------+ Note: For more information on problematic transfers, consider running the Fitter again with the Optimize hold timing option (Settings Menu) turned off. This will disable optimization of problematic paths and expose them for further analysis using the TimeQuest Timing Analyzer. -+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Estimated Delay Added for Hold Timing Details ; -+----------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------+-------------------+ -; Source Register ; Destination Register ; Delay Added in ns ; -+----------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------+-------------------+ -; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; 4.877 ; -; spi_ce[0] ; spi_slave:spi_slave_rx_inst|treg[15] ; 3.884 ; -; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[47] ; 3.561 ; -; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|datain[6] ; 3.110 ; -; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|datain[6] ; 3.110 ; -; ad9866:ad9866_inst|sen_n ; ad9866:ad9866_inst|datain[6] ; 3.110 ; -; ad9866:ad9866_inst|dut1_pc[5] ; ad9866:ad9866_inst|datain[6] ; 3.110 ; -; spi_mosi ; spi_slave:spi_slave_rx2_inst|rdata[0] ; 2.911 ; -; rx_gain[2] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; prev_tx_gain[0] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; tx_gain[1] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; prev_tx_gain[1] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; tx_gain[0] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; tx_gain[3] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; prev_tx_gain[3] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; tx_gain[2] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; prev_tx_gain[2] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; tx_gain[5] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; prev_tx_gain[5] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; tx_gain[4] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; prev_tx_gain[4] ; ad9866:ad9866_inst|datain[2] ; 2.597 ; -; rx_gain[3] ; ad9866:ad9866_inst|datain[3] ; 2.580 ; -; rx_gain[4] ; ad9866:ad9866_inst|datain[4] ; 2.443 ; -; rx_gain[5] ; ad9866:ad9866_inst|datain[5] ; 2.443 ; -; rx_gain[0] ; ad9866:ad9866_inst|datain[0] ; 2.392 ; -; rx_gain[1] ; ad9866:ad9866_inst|datain[1] ; 1.909 ; -; spi_slave:spi_slave_rx_inst|done ; rx_gain[3] ; 1.811 ; -; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|datain[6] ; 1.555 ; -; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|datain[6] ; 1.555 ; -; ad9866_clk ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|counter[0] ; 1.546 ; -; spi_slave:spi_slave_rx_inst|nb[6] ; spi_slave:spi_slave_rx_inst|rdata[16] ; 1.068 ; -; spi_slave:spi_slave_rx_inst|nb[5] ; spi_slave:spi_slave_rx_inst|rdata[16] ; 1.068 ; -; spi_slave:spi_slave_rx_inst|nb[4] ; spi_slave:spi_slave_rx_inst|rdata[16] ; 1.068 ; -; spi_slave:spi_slave_rx_inst|nb[3] ; spi_slave:spi_slave_rx_inst|rdata[16] ; 1.068 ; -; spi_slave:spi_slave_rx_inst|nb[2] ; spi_slave:spi_slave_rx_inst|rdata[16] ; 1.068 ; -; spi_slave:spi_slave_rx_inst|nb[1] ; spi_slave:spi_slave_rx_inst|rdata[16] ; 1.068 ; -; spi_slave:spi_slave_rx_inst|nb[0] ; spi_slave:spi_slave_rx_inst|rdata[16] ; 1.068 ; -; spi_slave:spi_slave_rx2_inst|nb[6] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; 0.775 ; -; spi_slave:spi_slave_rx2_inst|nb[5] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; 0.775 ; -; spi_slave:spi_slave_rx2_inst|nb[4] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; 0.775 ; -; spi_slave:spi_slave_rx2_inst|nb[3] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; 0.775 ; -; spi_slave:spi_slave_rx2_inst|nb[2] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; 0.775 ; -; spi_slave:spi_slave_rx2_inst|nb[1] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; 0.775 ; -; spi_slave:spi_slave_rx2_inst|nb[0] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; 0.775 ; -; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; 0.723 ; -; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; 0.691 ; -; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; 0.676 ; -; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; 0.676 ; -; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; 0.676 ; -; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; 0.670 ; -; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; 0.634 ; -; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; 0.634 ; -; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; 0.628 ; -; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; 0.628 ; -; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; 0.628 ; -; ad9866_adio[10] ; adcpipe[1][10] ; 0.505 ; -; ad9866_adio[8] ; adcpipe[1][8] ; 0.503 ; -; spi_sck ; spi_slave:spi_slave_rx_inst|rreg[17] ; 0.445 ; -; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; 0.407 ; -; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; 0.407 ; -; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; 0.407 ; -; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; 0.362 ; -; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; 0.362 ; -; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; 0.362 ; -; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; 0.362 ; -; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; 0.360 ; -; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; 0.346 ; -; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; 0.346 ; -; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; 0.346 ; -; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; 0.338 ; -; clk_10mhz ; prev_rx_gain[5] ; 0.293 ; -; ad9866_adio[1] ; adcpipe[0][1] ; 0.239 ; -; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; 0.239 ; -; ad9866_adio[6] ; adcpipe[1][6] ; 0.201 ; -; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; 0.137 ; -; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; 0.137 ; -; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a31~porta_address_reg0 ; 0.120 ; -; ad9866_adio[2] ; adcpipe[1][2] ; 0.120 ; -; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a31~porta_address_reg0 ; 0.111 ; -; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; 0.105 ; -; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; 0.101 ; -; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; 0.101 ; -; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; 0.092 ; -; ad9866_adio[3] ; adcpipe[0][3] ; 0.082 ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rAddrB ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; 0.054 ; -; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd2 ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; 0.054 ; -; ad9866_adio[0] ; adcpipe[1][0] ; 0.052 ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[23] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Iaccum[23] ; 0.052 ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[23] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Iaccum[23] ; 0.052 ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[23] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[23] ; 0.052 ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[23] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[23] ; 0.052 ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[23] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[23] ; 0.052 ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[23] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Iaccum[23] ; 0.052 ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[23] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Iaccum[23] ; 0.052 ; -; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 0.052 ; -; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 0.052 ; -; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 0.052 ; -; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[23] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Iaccum[23] ; 0.052 ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[23] ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[23] ; 0.052 ; -; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[23] ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[23] ; 0.052 ; -+----------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------+-------------------+ ++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Estimated Delay Added for Hold Timing Details ; ++----------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+ +; Source Register ; Destination Register ; Delay Added in ns ; ++----------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+ +; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; 5.698 ; +; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[14] ; 3.928 ; +; rx_gain[1] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; prev_tx_gain[0] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; tx_gain[1] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; prev_tx_gain[1] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; tx_gain[0] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; tx_gain[3] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; prev_tx_gain[3] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; tx_gain[2] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; prev_tx_gain[2] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; tx_gain[5] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; prev_tx_gain[5] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; tx_gain[4] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; prev_tx_gain[4] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; ad9866:ad9866_inst|sen_n ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; ad9866:ad9866_inst|dut1_pc[5] ; ad9866:ad9866_inst|datain[1] ; 3.672 ; +; spi_ce[0] ; spi_slave:spi_slave_rx_inst|treg[30] ; 3.581 ; +; rx_gain[5] ; ad9866:ad9866_inst|datain[5] ; 3.528 ; +; rx_gain[3] ; ad9866:ad9866_inst|datain[3] ; 3.105 ; +; rx_gain[4] ; ad9866:ad9866_inst|datain[4] ; 3.046 ; +; spi_mosi ; spi_slave:spi_slave_rx_inst|rdata[0] ; 2.971 ; +; rx_gain[0] ; ad9866:ad9866_inst|datain[0] ; 2.956 ; +; rx_gain[2] ; ad9866:ad9866_inst|datain[2] ; 2.956 ; +; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|datain[1] ; 1.669 ; +; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|datain[1] ; 1.669 ; +; ad9866_clk ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|reg_coef[17] ; 1.392 ; +; spi_slave:spi_slave_rx_inst|done ; tx_gain[5] ; 1.340 ; +; spi_slave:spi_slave_rx2_inst|nb[6] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; 1.159 ; +; spi_slave:spi_slave_rx2_inst|nb[5] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; 1.159 ; +; spi_slave:spi_slave_rx2_inst|nb[4] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; 1.159 ; +; spi_slave:spi_slave_rx2_inst|nb[3] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; 1.159 ; +; spi_slave:spi_slave_rx2_inst|nb[2] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; 1.159 ; +; spi_slave:spi_slave_rx2_inst|nb[1] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; 1.159 ; +; spi_slave:spi_slave_rx2_inst|nb[0] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; 1.159 ; +; spi_slave:spi_slave_rx_inst|nb[6] ; spi_slave:spi_slave_rx_inst|rdata[40] ; 1.064 ; +; spi_slave:spi_slave_rx_inst|nb[5] ; spi_slave:spi_slave_rx_inst|rdata[40] ; 1.064 ; +; spi_slave:spi_slave_rx_inst|nb[4] ; spi_slave:spi_slave_rx_inst|rdata[40] ; 1.064 ; +; spi_slave:spi_slave_rx_inst|nb[3] ; spi_slave:spi_slave_rx_inst|rdata[40] ; 1.064 ; +; spi_slave:spi_slave_rx_inst|nb[2] ; spi_slave:spi_slave_rx_inst|rdata[40] ; 1.064 ; +; spi_slave:spi_slave_rx_inst|nb[1] ; spi_slave:spi_slave_rx_inst|rdata[40] ; 1.064 ; +; spi_slave:spi_slave_rx_inst|nb[0] ; spi_slave:spi_slave_rx_inst|rdata[40] ; 1.064 ; +; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; 0.912 ; +; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; 0.758 ; +; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; 0.551 ; +; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; 0.533 ; +; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; 0.533 ; +; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; 0.533 ; +; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; 0.530 ; +; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; 0.444 ; +; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; 0.437 ; +; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; 0.419 ; +; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; 0.419 ; +; spi_sck ; spi_slave:spi_slave_rx_inst|rreg[5] ; 0.413 ; +; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; 0.394 ; +; ad9866_adio[8] ; adcpipe[0][8] ; 0.312 ; +; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; 0.310 ; +; ad9866_adio[10] ; adcpipe[0][10] ; 0.301 ; +; ad9866_adio[0] ; adcpipe[1][0] ; 0.289 ; +; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; 0.259 ; +; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; 0.259 ; +; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; 0.259 ; +; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; 0.228 ; +; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; 0.228 ; +; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; 0.228 ; +; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; 0.228 ; +; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|sub_parity5a[0] ; 0.217 ; +; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; 0.204 ; +; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a11~porta_address_reg0 ; 0.194 ; +; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; 0.186 ; +; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a11~porta_address_reg0 ; 0.185 ; +; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a11~porta_address_reg0 ; 0.185 ; +; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a11~porta_address_reg0 ; 0.185 ; +; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a11~porta_address_reg0 ; 0.185 ; +; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a11~porta_address_reg0 ; 0.185 ; +; ad9866_adio[11] ; adcpipe[0][11] ; 0.174 ; +; ad9866_adio[4] ; adcpipe[0][4] ; 0.150 ; +; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; 0.143 ; +; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_1 ; 0.113 ; +; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; 0.113 ; +; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; 0.113 ; +; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|sub_parity5a[0] ; 0.102 ; +; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; 0.099 ; +; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; 0.099 ; +; clk_10mhz ; prev_rx_gain[5] ; 0.097 ; +; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; 0.097 ; +; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; 0.090 ; +; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a31~porta_address_reg0 ; 0.079 ; +; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a31~porta_address_reg0 ; 0.079 ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rAddrB ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; 0.065 ; +; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd2 ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; 0.065 ; +; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 0.063 ; +; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 0.063 ; +; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 0.063 ; +; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[35] ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[23] ; 0.063 ; +; receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[0].cic_integrator_inst|out_data[24] ; 0.063 ; +; receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst|out_data[24] ; 0.063 ; +; receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst|out_data[24] ; 0.063 ; ++----------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------+ Note: This table only shows the top 100 path(s) that have the largest delay added for hold. @@ -16047,24 +16077,24 @@ Info (176235): Finished register packing Extra Info (176220): Created 434 register duplicates Info (128000): Starting physical synthesis optimizations for speed Info (128001): Physical synthesis optimizations for speed complete: elapsed time is 00:00:05 -Info (171121): Fitter preparation operations ending: elapsed time is 00:00:19 +Info (171121): Fitter preparation operations ending: elapsed time is 00:00:20 Info (14896): Fitter has disabled Advanced Physical Optimization because it is not supported for the current family. Info (170189): Fitter placement preparation operations beginning -Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:09 +Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:08 Info (170191): Fitter placement operations beginning Info (170137): Fitter placement was successful -Info (170192): Fitter placement operations ending: elapsed time is 00:01:51 +Info (170192): Fitter placement operations ending: elapsed time is 00:01:48 Info (170193): Fitter routing operations beginning Info (170089): 5e+02 ns of routing delay (approximately 1.2% of available device routing delay) has been added to meet hold timing. For more information, refer to the Estimated Delay Added for Hold Timing section in the Fitter report. -Info (170195): Router estimated average interconnect usage is 28% of the available device resources - Info (170196): Router estimated peak interconnect usage is 41% of the available device resources in the region that extends from location X21_Y10 to location X30_Y19 -Info (170194): Fitter routing operations ending: elapsed time is 00:00:35 -Info (11888): Total time spent on timing analysis during the Fitter is 29.38 seconds. +Info (170195): Router estimated average interconnect usage is 30% of the available device resources + Info (170196): Router estimated peak interconnect usage is 39% of the available device resources in the region that extends from location X10_Y10 to location X20_Y19 +Info (170194): Fitter routing operations ending: elapsed time is 00:00:37 +Info (11888): Total time spent on timing analysis during the Fitter is 27.67 seconds. Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully -Info (11218): Fitter post-fit operations ending: elapsed time is 00:00:11 +Info (11218): Fitter post-fit operations ending: elapsed time is 00:00:12 Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information. Warning (169177): 23 pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing Cyclone 10 LP Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems. Info (169178): Pin spi_miso uses I/O standard 3.3-V LVCMOS at 59 File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.v Line: 52 @@ -16092,10 +16122,10 @@ Warning (169177): 23 pins must meet Intel FPGA requirements for 3.3-, 3.0-, and Info (169178): Pin ad9866_sdo uses I/O standard 3.3-V LVCMOS at 67 File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.v Line: 43 Info (144001): Generated suppressed messages file C:/dev/git/Radioberry-2.x/firmware/output_files/radioberry-10CL016.fit.smsg Info: Quartus Prime Fitter was successful. 0 errors, 10 warnings - Info: Peak virtual memory: 1433 megabytes - Info: Processing ended: Sat Feb 24 19:55:03 2018 - Info: Elapsed time: 00:03:24 - Info: Total CPU time (on all processors): 00:05:26 + Info: Peak virtual memory: 1427 megabytes + Info: Processing ended: Fri Mar 09 21:37:54 2018 + Info: Elapsed time: 00:03:23 + Info: Total CPU time (on all processors): 00:05:12 +----------------------------+ diff --git a/firmware/output_files/radioberry-10CL016.fit.summary b/firmware/output_files/radioberry-10CL016.fit.summary index 86e51ba..3f0f842 100644 --- a/firmware/output_files/radioberry-10CL016.fit.summary +++ b/firmware/output_files/radioberry-10CL016.fit.summary @@ -1,14 +1,14 @@ -Fitter Status : Successful - Sat Feb 24 19:54:59 2018 +Fitter Status : Successful - Fri Mar 09 21:37:51 2018 Quartus Prime Version : 17.0.2 Build 602 07/19/2017 SJ Lite Edition Revision Name : radioberry-10CL016 Top-level Entity Name : radioberry Family : Cyclone 10 LP Device : 10CL016YE144C8G Timing Models : Final -Total logic elements : 14,210 / 15,408 ( 92 % ) - Total combinational functions : 11,268 / 15,408 ( 73 % ) - Dedicated logic registers : 10,886 / 15,408 ( 71 % ) -Total registers : 10886 +Total logic elements : 14,248 / 15,408 ( 92 % ) + Total combinational functions : 11,301 / 15,408 ( 73 % ) + Dedicated logic registers : 10,913 / 15,408 ( 71 % ) +Total registers : 10913 Total pins : 48 / 79 ( 61 % ) Total virtual pins : 0 Total memory bits : 374,912 / 516,096 ( 73 % ) diff --git a/firmware/output_files/radioberry-10CL016.flow.rpt b/firmware/output_files/radioberry-10CL016.flow.rpt index be506c9..415e65c 100644 --- a/firmware/output_files/radioberry-10CL016.flow.rpt +++ b/firmware/output_files/radioberry-10CL016.flow.rpt @@ -1,5 +1,5 @@ Flow report for radioberry-10CL016 -Sat Feb 24 19:55:21 2018 +Fri Mar 09 21:38:13 2018 Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition @@ -41,17 +41,17 @@ agreement for further details. +----------------------------------------------------------------------------------+ ; Flow Summary ; +------------------------------------+---------------------------------------------+ -; Flow Status ; Successful - Sat Feb 24 19:55:07 2018 ; +; Flow Status ; Successful - Fri Mar 09 21:37:58 2018 ; ; Quartus Prime Version ; 17.0.2 Build 602 07/19/2017 SJ Lite Edition ; ; Revision Name ; radioberry-10CL016 ; ; Top-level Entity Name ; radioberry ; ; Family ; Cyclone 10 LP ; ; Device ; 10CL016YE144C8G ; ; Timing Models ; Final ; -; Total logic elements ; 14,210 / 15,408 ( 92 % ) ; -; Total combinational functions ; 11,268 / 15,408 ( 73 % ) ; -; Dedicated logic registers ; 10,886 / 15,408 ( 71 % ) ; -; Total registers ; 10886 ; +; Total logic elements ; 14,248 / 15,408 ( 92 % ) ; +; Total combinational functions ; 11,301 / 15,408 ( 73 % ) ; +; Dedicated logic registers ; 10,913 / 15,408 ( 71 % ) ; +; Total registers ; 10913 ; ; Total pins ; 48 / 79 ( 61 % ) ; ; Total virtual pins ; 0 ; ; Total memory bits ; 374,912 / 516,096 ( 73 % ) ; @@ -65,7 +65,7 @@ agreement for further details. +-------------------+---------------------+ ; Option ; Setting ; +-------------------+---------------------+ -; Start date & time ; 02/24/2018 19:50:41 ; +; Start date & time ; 03/09/2018 21:33:27 ; ; Main task ; Compilation ; ; Revision Name ; radioberry-10CL016 ; +-------------------+---------------------+ @@ -79,7 +79,7 @@ agreement for further details. ; ALLOW_REGISTER_DUPLICATION ; Off ; On ; -- ; -- ; ; ALLOW_REGISTER_MERGING ; Off ; On ; -- ; -- ; ; ALLOW_REGISTER_RETIMING ; Off ; On ; -- ; -- ; -; COMPILER_SIGNATURE_ID ; 220295161909995.151949824103568 ; -- ; -- ; -- ; +; COMPILER_SIGNATURE_ID ; 220295161909995.152062760612452 ; -- ; -- ; -- ; ; FITTER_EFFORT ; Standard Fit ; Auto Fit ; -- ; -- ; ; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ; ; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ; @@ -114,11 +114,11 @@ agreement for further details. +---------------------------+--------------+-------------------------+---------------------+------------------------------------+ ; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ; +---------------------------+--------------+-------------------------+---------------------+------------------------------------+ -; Analysis & Synthesis ; 00:00:53 ; 1.0 ; 953 MB ; 00:01:15 ; -; Fitter ; 00:03:20 ; 1.1 ; 1433 MB ; 00:05:23 ; -; Assembler ; 00:00:03 ; 1.0 ; 655 MB ; 00:00:02 ; -; TimeQuest Timing Analyzer ; 00:00:13 ; 1.3 ; 853 MB ; 00:00:15 ; -; Total ; 00:04:29 ; -- ; -- ; 00:06:55 ; +; Analysis & Synthesis ; 00:01:01 ; 1.0 ; 953 MB ; 00:01:15 ; +; Fitter ; 00:03:20 ; 1.1 ; 1427 MB ; 00:05:09 ; +; Assembler ; 00:00:02 ; 1.0 ; 658 MB ; 00:00:02 ; +; TimeQuest Timing Analyzer ; 00:00:13 ; 1.3 ; 854 MB ; 00:00:15 ; +; Total ; 00:04:36 ; -- ; -- ; 00:06:41 ; +---------------------------+--------------+-------------------------+---------------------+------------------------------------+ diff --git a/firmware/output_files/radioberry-10CL016.map.rpt b/firmware/output_files/radioberry-10CL016.map.rpt index 757f177..201e336 100644 --- a/firmware/output_files/radioberry-10CL016.map.rpt +++ b/firmware/output_files/radioberry-10CL016.map.rpt @@ -1,5 +1,5 @@ Analysis & Synthesis report for radioberry-10CL016 -Sat Feb 24 19:51:38 2018 +Fri Mar 09 21:34:30 2018 Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition @@ -334,15 +334,15 @@ agreement for further details. +----------------------------------------------------------------------------------+ ; Analysis & Synthesis Summary ; +------------------------------------+---------------------------------------------+ -; Analysis & Synthesis Status ; Successful - Sat Feb 24 19:51:37 2018 ; +; Analysis & Synthesis Status ; Successful - Fri Mar 09 21:34:29 2018 ; ; Quartus Prime Version ; 17.0.2 Build 602 07/19/2017 SJ Lite Edition ; ; Revision Name ; radioberry-10CL016 ; ; Top-level Entity Name ; radioberry ; ; Family ; Cyclone 10 LP ; -; Total logic elements ; 15,517 ; -; Total combinational functions ; 11,268 ; -; Dedicated logic registers ; 11,875 ; -; Total registers ; 11875 ; +; Total logic elements ; 15,550 ; +; Total combinational functions ; 11,301 ; +; Dedicated logic registers ; 11,902 ; +; Total registers ; 11902 ; ; Total pins ; 48 ; ; Total virtual pins ; 0 ; ; Total memory bits ; 374,912 ; @@ -451,7 +451,7 @@ agreement for further details. ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; -; Processor 2 ; 3.1% ; +; Processor 2 ; 2.7% ; +----------------------------+-------------+ @@ -567,20 +567,20 @@ agreement for further details. +---------------------------------------------+------------------+ ; Resource ; Usage ; +---------------------------------------------+------------------+ -; Estimated Total logic elements ; 15,517 ; +; Estimated Total logic elements ; 15,550 ; ; ; ; -; Total combinational functions ; 11268 ; +; Total combinational functions ; 11301 ; ; Logic element usage by number of LUT inputs ; ; -; -- 4 input functions ; 1188 ; -; -- 3 input functions ; 7017 ; -; -- <=2 input functions ; 3063 ; +; -- 4 input functions ; 1189 ; +; -- 3 input functions ; 7026 ; +; -- <=2 input functions ; 3086 ; ; ; ; ; Logic elements by mode ; ; -; -- normal mode ; 3100 ; -; -- arithmetic mode ; 8168 ; +; -- normal mode ; 3108 ; +; -- arithmetic mode ; 8193 ; ; ; ; -; Total registers ; 11875 ; -; -- Dedicated logic registers ; 11875 ; +; Total registers ; 11902 ; +; -- Dedicated logic registers ; 11902 ; ; -- I/O registers ; 0 ; ; ; ; ; I/O pins ; 48 ; @@ -592,8 +592,8 @@ agreement for further details. ; -- PLLs ; 1 ; ; ; ; ; Maximum fan-out node ; ad9866_clk~input ; -; Maximum fan-out ; 12237 ; -; Total fan-out ; 87184 ; +; Maximum fan-out ; 12264 ; +; Total fan-out ; 87314 ; ; Average fan-out ; 3.57 ; +---------------------------------------------+------------------+ @@ -603,12 +603,12 @@ agreement for further details. +-------------------------------------------------------------+---------------------+---------------------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------+---------------------+--------------+ ; Compilation Hierarchy Node ; Combinational ALUTs ; Dedicated Logic Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ; +-------------------------------------------------------------+---------------------+---------------------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------+---------------------+--------------+ -; |radioberry ; 11268 (138) ; 11875 (188) ; 374912 ; 94 ; 0 ; 47 ; 48 ; 0 ; |radioberry ; radioberry ; work ; +; |radioberry ; 11301 (138) ; 11902 (188) ; 374912 ; 94 ; 0 ; 47 ; 48 ; 0 ; |radioberry ; radioberry ; work ; ; |PLL_IAMBIC:PLL_IAMBIC_inst| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|PLL_IAMBIC:PLL_IAMBIC_inst ; PLL_IAMBIC ; work ; ; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component ; altpll ; work ; ; |PLL_IAMBIC_altpll:auto_generated| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|PLL_IAMBIC:PLL_IAMBIC_inst|altpll:altpll_component|PLL_IAMBIC_altpll:auto_generated ; PLL_IAMBIC_altpll ; work ; ; |ad9866:ad9866_inst| ; 92 (92) ; 29 (29) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|ad9866:ad9866_inst ; ad9866 ; work ; -; |filter:filter_inst| ; 59 (59) ; 7 (7) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|filter:filter_inst ; filter ; work ; +; |filter:filter_inst| ; 58 (58) ; 7 (7) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|filter:filter_inst ; filter ; work ; ; |iambic:iambic_inst| ; 654 (95) ; 30 (30) ; 0 ; 2 ; 0 ; 1 ; 0 ; 0 ; |radioberry|iambic:iambic_inst ; iambic ; work ; ; |lpm_divide:Div0| ; 191 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|iambic:iambic_inst|lpm_divide:Div0 ; lpm_divide ; work ; ; |lpm_divide_tim:auto_generated| ; 191 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|iambic:iambic_inst|lpm_divide:Div0|lpm_divide_tim:auto_generated ; lpm_divide_tim ; work ; @@ -630,7 +630,7 @@ agreement for further details. ; |profile_ROM:profile_ROM_inst| ; 0 (0) ; 0 (0) ; 16000 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|profile:profile_CW|profile_ROM:profile_ROM_inst ; profile_ROM ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 16000 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_6f91:auto_generated| ; 0 (0) ; 0 (0) ; 16000 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated ; altsyncram_6f91 ; work ; -; |receiver:receiver_rx2_inst| ; 3352 (0) ; 3960 (0) ; 110592 ; 32 ; 0 ; 16 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst ; receiver ; work ; +; |receiver:receiver_rx2_inst| ; 3354 (0) ; 3960 (0) ; 110592 ; 32 ; 0 ; 16 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst ; receiver ; work ; ; |cic:cic_inst_I2| ; 189 (39) ; 234 (17) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2 ; cic ; work ; ; |cic_comb:cic_stages[0].cic_comb_inst| ; 25 (25) ; 50 (50) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[1].cic_comb_inst| ; 25 (25) ; 50 (50) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; @@ -646,7 +646,7 @@ agreement for further details. ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; ; |cordic:cordic_inst| ; 1037 (1037) ; 681 (681) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|cordic:cordic_inst ; cordic ; work ; -; |firX8R8:fir2| ; 928 (272) ; 1477 (61) ; 110592 ; 32 ; 0 ; 16 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2 ; firX8R8 ; work ; +; |firX8R8:fir2| ; 930 (274) ; 1477 (61) ; 110592 ; 32 ; 0 ; 16 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2 ; firX8R8 ; work ; ; |fir256:A| ; 82 (82) ; 177 (177) ; 13824 ; 4 ; 0 ; 2 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 9216 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 9216 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; @@ -757,7 +757,7 @@ agreement for further details. ; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[3].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[3].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[4].cic_integrator_inst| ; 43 (43) ; 43 (43) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_integrator:cic_stages[4].cic_integrator_inst ; cic_integrator ; work ; -; |receiver:receiver_rx_inst| ; 3352 (0) ; 3960 (0) ; 110592 ; 32 ; 0 ; 16 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst ; receiver ; work ; +; |receiver:receiver_rx_inst| ; 3356 (0) ; 3960 (0) ; 110592 ; 32 ; 0 ; 16 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst ; receiver ; work ; ; |cic:cic_inst_I2| ; 189 (39) ; 234 (17) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2 ; cic ; work ; ; |cic_comb:cic_stages[0].cic_comb_inst| ; 25 (25) ; 50 (50) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst ; cic_comb ; work ; ; |cic_comb:cic_stages[1].cic_comb_inst| ; 25 (25) ; 50 (50) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_I2|cic_comb:cic_stages[1].cic_comb_inst ; cic_comb ; work ; @@ -773,7 +773,7 @@ agreement for further details. ; |cic_integrator:cic_stages[1].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[1].cic_integrator_inst ; cic_integrator ; work ; ; |cic_integrator:cic_stages[2].cic_integrator_inst| ; 25 (25) ; 25 (25) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|cic:cic_inst_Q2|cic_integrator:cic_stages[2].cic_integrator_inst ; cic_integrator ; work ; ; |cordic:cordic_inst| ; 1037 (1037) ; 681 (681) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|cordic:cordic_inst ; cordic ; work ; -; |firX8R8:fir2| ; 928 (272) ; 1477 (61) ; 110592 ; 32 ; 0 ; 16 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2 ; firX8R8 ; work ; +; |firX8R8:fir2| ; 932 (276) ; 1477 (61) ; 110592 ; 32 ; 0 ; 16 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2 ; firX8R8 ; work ; ; |fir256:A| ; 82 (82) ; 177 (177) ; 13824 ; 4 ; 0 ; 2 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A ; fir256 ; work ; ; |firram36:ram| ; 0 (0) ; 0 (0) ; 9216 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firram36:ram ; firram36 ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 9216 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|firram36:ram|altsyncram:altsyncram_component ; altsyncram ; work ; @@ -905,7 +905,7 @@ agreement for further details. ; |cmpr_g76:wrempty_eq_comp| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|cmpr_g76:wrempty_eq_comp ; cmpr_g76 ; work ; ; |spi_slave:spi_slave_rx2_inst| ; 63 (63) ; 151 (151) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|spi_slave:spi_slave_rx2_inst ; spi_slave ; work ; ; |spi_slave:spi_slave_rx_inst| ; 65 (65) ; 137 (137) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|spi_slave:spi_slave_rx_inst ; spi_slave ; work ; -; |transmitter:transmitter_inst| ; 2981 (46) ; 2965 (76) ; 23040 ; 4 ; 0 ; 2 ; 0 ; 0 ; |radioberry|transmitter:transmitter_inst ; transmitter ; work ; +; |transmitter:transmitter_inst| ; 3009 (74) ; 2992 (103) ; 23040 ; 4 ; 0 ; 2 ; 0 ; 0 ; |radioberry|transmitter:transmitter_inst ; transmitter ; work ; ; |CicInterpM5:in2| ; 1078 (1078) ; 1610 (1610) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|transmitter:transmitter_inst|CicInterpM5:in2 ; CicInterpM5 ; work ; ; |FirInterp8_1024:fi| ; 131 (131) ; 227 (227) ; 23040 ; 4 ; 0 ; 2 ; 0 ; 0 ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi ; FirInterp8_1024 ; work ; ; |firram36I_1024:ram| ; 0 (0) ; 0 (0) ; 4608 ; 0 ; 0 ; 0 ; 0 ; 0 ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|firram36I_1024:ram ; firram36I_1024 ; work ; @@ -1557,7 +1557,7 @@ Note: All latches listed above may not be present at the end of synthesis due to +----------------------------------------------+-------+ ; Statistic ; Value ; +----------------------------------------------+-------+ -; Total registers ; 11875 ; +; Total registers ; 11902 ; ; Number of registers using Synchronous Clear ; 2031 ; ; Number of registers using Synchronous Load ; 861 ; ; Number of registers using Asynchronous Clear ; 685 ; @@ -1611,85 +1611,85 @@ Note: All latches listed above may not be present at the end of synthesis due to +--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------------------------------------------+ ; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ; +--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------------------------------------------+ -; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |radioberry|ad9866:ad9866_inst|dut2_data[13] ; -; 3:1 ; 13 bits ; 26 LEs ; 13 LEs ; 13 LEs ; Yes ; |radioberry|ad9866:ad9866_inst|dut2_data[11] ; -; 3:1 ; 32 bits ; 64 LEs ; 32 LEs ; 32 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|tx_IQ_data[7] ; -; 3:1 ; 18 bits ; 36 LEs ; 36 LEs ; 0 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][14] ; -; 3:1 ; 18 bits ; 36 LEs ; 36 LEs ; 0 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][20] ; -; 3:1 ; 13 bits ; 26 LEs ; 26 LEs ; 0 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|cordic:cordic_inst|X[0][16] ; -; 3:1 ; 13 bits ; 26 LEs ; 26 LEs ; 0 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][15] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Rmult[30] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[35] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Rmult[35] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Rmult[35] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Rmult[33] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Raccum[13] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[0] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Iaccum[3] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Imult[26] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[20] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[30] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[20] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Iaccum[20] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[21] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[33] ; -; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[18] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|caddr[5] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|raddr[7] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|counter[3] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|raddr[6] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|caddr[3] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[7] ; +; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |radioberry|ad9866:ad9866_inst|dut2_data[15] ; +; 3:1 ; 13 bits ; 26 LEs ; 13 LEs ; 13 LEs ; Yes ; |radioberry|ad9866:ad9866_inst|dut2_data[6] ; +; 3:1 ; 32 bits ; 64 LEs ; 32 LEs ; 32 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|tx_IQ_data[0] ; +; 3:1 ; 18 bits ; 36 LEs ; 36 LEs ; 0 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][21] ; +; 3:1 ; 18 bits ; 36 LEs ; 36 LEs ; 0 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][16] ; +; 3:1 ; 13 bits ; 26 LEs ; 26 LEs ; 0 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|cordic:cordic_inst|X[0][11] ; +; 3:1 ; 13 bits ; 26 LEs ; 26 LEs ; 0 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|cordic:cordic_inst|X[0][14] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|Raccum[20] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Rmult[30] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|Imult[13] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|Raccum[10] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|Iaccum[22] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|Imult[21] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[23] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|Rmult[28] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|Raccum[12] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|Iaccum[19] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Imult[24] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|Rmult[27] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|Raccum[22] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|Iaccum[10] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|Imult[14] ; +; 3:1 ; 98 bits ; 196 LEs ; 98 LEs ; 98 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|Iaccum[19] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|counter[8] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:A|raddr[4] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|counter[7] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|raddr[7] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|counter[7] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:C|raddr[4] ; ; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|counter[6] ; ; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:D|raddr[6] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[7] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[4] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|counter[0] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[6] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|counter[7] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[1] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|counter[0] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|raddr[2] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|caddr[3] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|counter[1] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:E|raddr[7] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|caddr[7] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|raddr[7] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|caddr[2] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|raddr[0] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|caddr[2] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|fir256:H|raddr[1] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|counter[1] ; ; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:A|raddr[3] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|caddr[2] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[6] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[6] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|raddr[1] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|counter[1] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[2] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|caddr[1] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|counter[8] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:B|raddr[1] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|caddr[2] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|raddr[2] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|caddr[5] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:D|raddr[4] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|counter[3] ; ; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:E|raddr[2] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|counter[7] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|raddr[1] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[6] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[3] ; -; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|counter[0] ; -; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|raddr[0] ; -; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |radioberry|ad9866:ad9866_inst|dut2_bitcount[2] ; -; 4:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; -; 4:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|wstate[0] ; -; 3:1 ; 6 bits ; 12 LEs ; 6 LEs ; 6 LEs ; Yes ; |radioberry|ad9866:ad9866_inst|dut1_pc[5] ; -; 4:1 ; 18 bits ; 36 LEs ; 18 LEs ; 18 LEs ; Yes ; |radioberry|profile:profile_CW|hang_timer[9] ; -; 4:1 ; 108 bits ; 216 LEs ; 108 LEs ; 108 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[23] ; -; 4:1 ; 18 bits ; 36 LEs ; 18 LEs ; 18 LEs ; Yes ; |radioberry|profile:profile_CW|timer[12] ; -; 7:1 ; 48 bits ; 192 LEs ; 48 LEs ; 144 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|Iacc[13] ; -; 7:1 ; 48 bits ; 192 LEs ; 48 LEs ; 144 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|Racc[21] ; -; 6:1 ; 3 bits ; 12 LEs ; 12 LEs ; 0 LEs ; Yes ; |radioberry|filter:filter_inst|selected_filter[5] ; -; 7:1 ; 7 bits ; 28 LEs ; 7 LEs ; 21 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[4] ; -; 7:1 ; 7 bits ; 28 LEs ; 7 LEs ; 21 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[2] ; -; 7:1 ; 10 bits ; 40 LEs ; 20 LEs ; 20 LEs ; Yes ; |radioberry|profile:profile_CW|profile_count[5] ; -; 7:1 ; 18 bits ; 72 LEs ; 18 LEs ; 54 LEs ; Yes ; |radioberry|iambic:iambic_inst|delay[16] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|caddr[5] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|raddr[6] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|counter[2] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:G|raddr[2] ; +; 3:1 ; 17 bits ; 34 LEs ; 17 LEs ; 17 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|counter[5] ; +; 3:1 ; 8 bits ; 16 LEs ; 8 LEs ; 8 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|fir256:H|raddr[6] ; +; 3:1 ; 4 bits ; 8 LEs ; 4 LEs ; 4 LEs ; Yes ; |radioberry|ad9866:ad9866_inst|dut2_bitcount[1] ; +; 4:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|wstate[4] ; +; 4:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|wstate[4] ; +; 3:1 ; 6 bits ; 12 LEs ; 6 LEs ; 6 LEs ; Yes ; |radioberry|ad9866:ad9866_inst|dut1_pc[0] ; +; 4:1 ; 18 bits ; 36 LEs ; 18 LEs ; 18 LEs ; Yes ; |radioberry|profile:profile_CW|hang_timer[10] ; +; 4:1 ; 108 bits ; 216 LEs ; 108 LEs ; 108 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|Rmult[15] ; +; 4:1 ; 18 bits ; 36 LEs ; 18 LEs ; 18 LEs ; Yes ; |radioberry|profile:profile_CW|timer[3] ; +; 7:1 ; 48 bits ; 192 LEs ; 48 LEs ; 144 LEs ; Yes ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|Racc[10] ; +; 7:1 ; 48 bits ; 192 LEs ; 48 LEs ; 144 LEs ; Yes ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|Racc[22] ; +; 6:1 ; 3 bits ; 12 LEs ; 12 LEs ; 0 LEs ; Yes ; |radioberry|filter:filter_inst|selected_filter[1] ; +; 7:1 ; 7 bits ; 28 LEs ; 7 LEs ; 21 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|caddr[9] ; +; 7:1 ; 7 bits ; 28 LEs ; 7 LEs ; 21 LEs ; Yes ; |radioberry|transmitter:transmitter_inst|FirInterp8_1024:fi|raddr[1] ; +; 7:1 ; 10 bits ; 40 LEs ; 20 LEs ; 20 LEs ; Yes ; |radioberry|profile:profile_CW|profile_count[4] ; +; 7:1 ; 18 bits ; 72 LEs ; 18 LEs ; 54 LEs ; Yes ; |radioberry|iambic:iambic_inst|delay[7] ; ; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; No ; |radioberry|ad9866:ad9866_inst|datain[8] ; -; 4:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; No ; |radioberry|ad9866:ad9866_inst|datain[7] ; -; 3:1 ; 6 bits ; 12 LEs ; 12 LEs ; 0 LEs ; No ; |radioberry|ad9866:ad9866_inst|datain[1] ; +; 4:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; No ; |radioberry|ad9866:ad9866_inst|datain[12] ; +; 3:1 ; 6 bits ; 12 LEs ; 12 LEs ; 0 LEs ; No ; |radioberry|ad9866:ad9866_inst|datain[4] ; ; 7:1 ; 48 bits ; 192 LEs ; 192 LEs ; 0 LEs ; No ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|Add2 ; ; 7:1 ; 48 bits ; 192 LEs ; 192 LEs ; 0 LEs ; No ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|Add3 ; ; 12:1 ; 34 bits ; 272 LEs ; 68 LEs ; 204 LEs ; No ; |radioberry|receiver:receiver_rx_inst|varcic:varcic_inst_I1|Selector0 ; ; 12:1 ; 34 bits ; 272 LEs ; 68 LEs ; 204 LEs ; No ; |radioberry|receiver:receiver_rx2_inst|varcic:varcic_inst_I1|Selector13 ; ; 8:1 ; 3 bits ; 15 LEs ; 9 LEs ; 6 LEs ; No ; |radioberry|profile:profile_CW|Selector30 ; -; 10:1 ; 2 bits ; 12 LEs ; 4 LEs ; 8 LEs ; No ; |radioberry|profile:profile_CW|Selector33 ; -; 3:1 ; 48 bits ; 96 LEs ; 0 LEs ; 96 LEs ; No ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|Add3 ; +; 10:1 ; 2 bits ; 12 LEs ; 4 LEs ; 8 LEs ; No ; |radioberry|profile:profile_CW|Selector31 ; +; 3:1 ; 48 bits ; 96 LEs ; 0 LEs ; 96 LEs ; No ; |radioberry|receiver:receiver_rx_inst|firX8R8:fir2|Add2 ; ; 3:1 ; 48 bits ; 96 LEs ; 0 LEs ; 96 LEs ; No ; |radioberry|receiver:receiver_rx2_inst|firX8R8:fir2|Add2 ; +--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------------------------------------------+ @@ -8472,7 +8472,6 @@ Note: In order to hide this table in the UI and the text report file, please set ; Port ; Type ; Severity ; Details ; +----------------+--------+----------+-------------------------------------------------------------------------------------+ ; out_data[1..0] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; -; LED ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; +----------------+--------+----------+-------------------------------------------------------------------------------------+ @@ -8601,7 +8600,7 @@ Note: In order to hide this table in the UI and the text report file, please set ; Type ; Count ; +-----------------------+-----------------------------+ ; boundary_port ; 48 ; -; cycloneiii_ff ; 11875 ; +; cycloneiii_ff ; 11902 ; ; CLR ; 277 ; ; ENA ; 5314 ; ; ENA CLR ; 402 ; @@ -8610,26 +8609,26 @@ Note: In order to hide this table in the UI and the text report file, please set ; ENA SLD ; 385 ; ; SCLR ; 124 ; ; SLD ; 470 ; -; plain ; 2990 ; +; plain ; 3017 ; ; cycloneiii_io_obuf ; 13 ; -; cycloneiii_lcell_comb ; 11272 ; -; arith ; 8168 ; +; cycloneiii_lcell_comb ; 11305 ; +; arith ; 8193 ; ; 1 data inputs ; 1 ; -; 2 data inputs ; 1405 ; -; 3 data inputs ; 6762 ; -; normal ; 3104 ; +; 2 data inputs ; 1429 ; +; 3 data inputs ; 6763 ; +; normal ; 3112 ; ; 0 data inputs ; 39 ; -; 1 data inputs ; 186 ; -; 2 data inputs ; 1436 ; -; 3 data inputs ; 255 ; -; 4 data inputs ; 1188 ; +; 1 data inputs ; 188 ; +; 2 data inputs ; 1433 ; +; 3 data inputs ; 263 ; +; 4 data inputs ; 1189 ; ; cycloneiii_mac_mult ; 47 ; ; cycloneiii_mac_out ; 47 ; ; cycloneiii_pll ; 1 ; ; cycloneiii_ram_block ; 1062 ; ; ; ; ; Max LUT depth ; 54.00 ; -; Average LUT depth ; 3.97 ; +; Average LUT depth ; 3.96 ; +-----------------------+-----------------------------+ @@ -8638,7 +8637,7 @@ Note: In order to hide this table in the UI and the text report file, please set +----------------+--------------+ ; Partition Name ; Elapsed Time ; +----------------+--------------+ -; Top ; 00:00:34 ; +; Top ; 00:00:37 ; +----------------+--------------+ @@ -8648,7 +8647,7 @@ Note: In order to hide this table in the UI and the text report file, please set Info: ******************************************************************* Info: Running Quartus Prime Analysis & Synthesis Info: Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition - Info: Processing started: Sat Feb 24 19:50:41 2018 + Info: Processing started: Fri Mar 09 21:33:25 2018 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off radioberry -c radioberry-10CL016 Info (16303): High Performance Effort optimization mode selected -- timing performance will be prioritized at the potential cost of increased compilation time Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance. @@ -8713,9 +8712,7 @@ Info (12021): Found 1 design units, including 1 entities, in source file cyclone Info (12023): Found entity 1: txFIFO File: C:/dev/git/Radioberry-2.x/firmware/cyclone_ip/txFIFO.v Line: 40 Info (12021): Found 1 design units, including 1 entities, in source file cyclone_ip/rxfifo.v Info (12023): Found entity 1: rxFIFO File: C:/dev/git/Radioberry-2.x/firmware/cyclone_ip/rxFIFO.v Line: 40 -Warning (10236): Verilog HDL Implicit Net warning at radioberry.v(380): created implicit net for "DEBUG_LED4" File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.v Line: 380 Info (12127): Elaborating entity "radioberry" for the top level hierarchy -Warning (10034): Output port "rb_info_2" at radioberry.v(59) has no driver File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.v Line: 59 Info (12128): Elaborating entity "ad9866" for hierarchy "ad9866:ad9866_inst" File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.v Line: 104 Warning (10240): Verilog HDL Always Construct warning at ad9866.v(88): inferring latch(es) for variable "initarrayv", which holds its previous value in one or more paths through the always construct File: C:/dev/git/Radioberry-2.x/firmware/rtl/ad9866.v Line: 88 Warning (10240): Verilog HDL Always Construct warning at ad9866.v(88): inferring latch(es) for variable "datain", which holds its previous value in one or more paths through the always construct File: C:/dev/git/Radioberry-2.x/firmware/rtl/ad9866.v Line: 88 @@ -9344,7 +9341,6 @@ Info (13000): Registers with preset signals will power-up high File: C:/dev/git/ Info (13003): DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back Warning (13024): Output pins are stuck at VCC or GND Warning (13410): Pin "ad9866_mode" is stuck at GND File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.v Line: 46 - Warning (13410): Pin "rb_info_2" is stuck at GND File: C:/dev/git/Radioberry-2.x/firmware/rtl/radioberry.v Line: 59 Info (286030): Timing-Driven Synthesis is running Info (17049): 39 registers lost all their fanouts during netlist optimizations. Info (17016): Found the following redundant logic cells in design @@ -9392,19 +9388,19 @@ Info (128001): Physical synthesis optimizations for speed complete: elapsed time Info (144001): Generated suppressed messages file C:/dev/git/Radioberry-2.x/firmware/output_files/radioberry-10CL016.map.smsg Info (16010): Generating hard_block partition "hard_block:auto_generated_inst" Info (16011): Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL -Info (21057): Implemented 16768 device resources after synthesis - the final resource count might be different +Info (21057): Implemented 16801 device resources after synthesis - the final resource count might be different Info (21058): Implemented 10 input pins Info (21059): Implemented 26 output pins Info (21060): Implemented 12 bidirectional pins - Info (21061): Implemented 15563 logic cells + Info (21061): Implemented 15596 logic cells Info (21064): Implemented 1062 RAM segments Info (21065): Implemented 1 PLLs Info (21062): Implemented 94 DSP elements -Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 59 warnings +Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 56 warnings Info: Peak virtual memory: 953 megabytes - Info: Processing ended: Sat Feb 24 19:51:38 2018 - Info: Elapsed time: 00:00:57 - Info: Total CPU time (on all processors): 00:01:19 + Info: Processing ended: Fri Mar 09 21:34:30 2018 + Info: Elapsed time: 00:01:05 + Info: Total CPU time (on all processors): 00:01:18 +------------------------------------------+ diff --git a/firmware/output_files/radioberry-10CL016.map.summary b/firmware/output_files/radioberry-10CL016.map.summary index ac79182..e18cc55 100644 --- a/firmware/output_files/radioberry-10CL016.map.summary +++ b/firmware/output_files/radioberry-10CL016.map.summary @@ -1,12 +1,12 @@ -Analysis & Synthesis Status : Successful - Sat Feb 24 19:51:37 2018 +Analysis & Synthesis Status : Successful - Fri Mar 09 21:34:29 2018 Quartus Prime Version : 17.0.2 Build 602 07/19/2017 SJ Lite Edition Revision Name : radioberry-10CL016 Top-level Entity Name : radioberry Family : Cyclone 10 LP -Total logic elements : 15,517 - Total combinational functions : 11,268 - Dedicated logic registers : 11,875 -Total registers : 11875 +Total logic elements : 15,550 + Total combinational functions : 11,301 + Dedicated logic registers : 11,902 +Total registers : 11902 Total pins : 48 Total virtual pins : 0 Total memory bits : 374,912 diff --git a/firmware/output_files/radioberry-10CL016.rbf b/firmware/output_files/radioberry-10CL016.rbf index daefe08..00f8f38 100644 Binary files a/firmware/output_files/radioberry-10CL016.rbf and b/firmware/output_files/radioberry-10CL016.rbf differ diff --git a/firmware/output_files/radioberry-10CL016.sof b/firmware/output_files/radioberry-10CL016.sof index 35adef9..008cc51 100644 Binary files a/firmware/output_files/radioberry-10CL016.sof and b/firmware/output_files/radioberry-10CL016.sof differ diff --git a/firmware/output_files/radioberry-10CL016.sta.rpt b/firmware/output_files/radioberry-10CL016.sta.rpt index 126fa98..2fd0f33 100644 --- a/firmware/output_files/radioberry-10CL016.sta.rpt +++ b/firmware/output_files/radioberry-10CL016.sta.rpt @@ -1,5 +1,5 @@ TimeQuest Timing Analyzer report for radioberry-10CL016 -Sat Feb 24 19:55:21 2018 +Fri Mar 09 21:38:13 2018 Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition @@ -19,26 +19,26 @@ Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition 11. Slow 1200mV 85C Model Removal Summary 12. Slow 1200mV 85C Model Minimum Pulse Width Summary 13. Slow 1200mV 85C Model Setup: 'spi_sck' - 14. Slow 1200mV 85C Model Setup: 'spi_ce0' - 15. Slow 1200mV 85C Model Setup: 'ad9866_clk' - 16. Slow 1200mV 85C Model Setup: 'spi_slave:spi_slave_rx2_inst|done' - 17. Slow 1200mV 85C Model Setup: 'virt_ad9866_rxclk' + 14. Slow 1200mV 85C Model Setup: 'spi_slave:spi_slave_rx2_inst|done' + 15. Slow 1200mV 85C Model Setup: 'virt_ad9866_rxclk' + 16. Slow 1200mV 85C Model Setup: 'spi_ce0' + 17. Slow 1200mV 85C Model Setup: 'ad9866_clk' 18. Slow 1200mV 85C Model Setup: 'spi_slave:spi_slave_rx_inst|done' 19. Slow 1200mV 85C Model Setup: 'ad9866:ad9866_inst|dut1_pc[0]' 20. Slow 1200mV 85C Model Setup: 'clk_10mhz' 21. Slow 1200mV 85C Model Setup: 'spi_ce1' 22. Slow 1200mV 85C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' 23. Slow 1200mV 85C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' - 24. Slow 1200mV 85C Model Hold: 'spi_ce0' + 24. Slow 1200mV 85C Model Hold: 'spi_ce1' 25. Slow 1200mV 85C Model Hold: 'ad9866_clk' - 26. Slow 1200mV 85C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' - 27. Slow 1200mV 85C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' - 28. Slow 1200mV 85C Model Hold: 'clk_10mhz' - 29. Slow 1200mV 85C Model Hold: 'spi_ce1' - 30. Slow 1200mV 85C Model Hold: 'spi_sck' + 26. Slow 1200mV 85C Model Hold: 'spi_ce0' + 27. Slow 1200mV 85C Model Hold: 'spi_sck' + 28. Slow 1200mV 85C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' + 29. Slow 1200mV 85C Model Hold: 'clk_10mhz' + 30. Slow 1200mV 85C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' 31. Slow 1200mV 85C Model Hold: 'spi_slave:spi_slave_rx_inst|done' - 32. Slow 1200mV 85C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' - 33. Slow 1200mV 85C Model Hold: 'spi_slave:spi_slave_rx2_inst|done' + 32. Slow 1200mV 85C Model Hold: 'spi_slave:spi_slave_rx2_inst|done' + 33. Slow 1200mV 85C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' 34. Slow 1200mV 85C Model Hold: 'virt_ad9866_rxclk' 35. Slow 1200mV 85C Model Metastability Summary 36. Slow 1200mV 0C Model Fmax Summary @@ -47,9 +47,9 @@ Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition 39. Slow 1200mV 0C Model Recovery Summary 40. Slow 1200mV 0C Model Removal Summary 41. Slow 1200mV 0C Model Minimum Pulse Width Summary - 42. Slow 1200mV 0C Model Setup: 'spi_ce0' - 43. Slow 1200mV 0C Model Setup: 'spi_sck' - 44. Slow 1200mV 0C Model Setup: 'spi_slave:spi_slave_rx2_inst|done' + 42. Slow 1200mV 0C Model Setup: 'spi_sck' + 43. Slow 1200mV 0C Model Setup: 'spi_slave:spi_slave_rx2_inst|done' + 44. Slow 1200mV 0C Model Setup: 'spi_ce0' 45. Slow 1200mV 0C Model Setup: 'ad9866_clk' 46. Slow 1200mV 0C Model Setup: 'spi_slave:spi_slave_rx_inst|done' 47. Slow 1200mV 0C Model Setup: 'ad9866:ad9866_inst|dut1_pc[0]' @@ -58,16 +58,16 @@ Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition 50. Slow 1200mV 0C Model Setup: 'spi_ce1' 51. Slow 1200mV 0C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' 52. Slow 1200mV 0C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' - 53. Slow 1200mV 0C Model Hold: 'spi_ce0' + 53. Slow 1200mV 0C Model Hold: 'spi_ce1' 54. Slow 1200mV 0C Model Hold: 'ad9866_clk' - 55. Slow 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' - 56. Slow 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' - 57. Slow 1200mV 0C Model Hold: 'clk_10mhz' - 58. Slow 1200mV 0C Model Hold: 'spi_ce1' + 55. Slow 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' + 56. Slow 1200mV 0C Model Hold: 'clk_10mhz' + 57. Slow 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' + 58. Slow 1200mV 0C Model Hold: 'spi_ce0' 59. Slow 1200mV 0C Model Hold: 'spi_sck' 60. Slow 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx_inst|done' - 61. Slow 1200mV 0C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' - 62. Slow 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx2_inst|done' + 61. Slow 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx2_inst|done' + 62. Slow 1200mV 0C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' 63. Slow 1200mV 0C Model Hold: 'virt_ad9866_rxclk' 64. Slow 1200mV 0C Model Metastability Summary 65. Fast 1200mV 0C Model Setup Summary @@ -86,16 +86,16 @@ Quartus Prime Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition 78. Fast 1200mV 0C Model Setup: 'spi_ce1' 79. Fast 1200mV 0C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' 80. Fast 1200mV 0C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' - 81. Fast 1200mV 0C Model Hold: 'spi_ce0' - 82. Fast 1200mV 0C Model Hold: 'ad9866_clk' - 83. Fast 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx_inst|done' - 84. Fast 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' - 85. Fast 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' - 86. Fast 1200mV 0C Model Hold: 'clk_10mhz' - 87. Fast 1200mV 0C Model Hold: 'spi_sck' - 88. Fast 1200mV 0C Model Hold: 'spi_ce1' - 89. Fast 1200mV 0C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' - 90. Fast 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx2_inst|done' + 81. Fast 1200mV 0C Model Hold: 'ad9866_clk' + 82. Fast 1200mV 0C Model Hold: 'spi_ce1' + 83. Fast 1200mV 0C Model Hold: 'spi_ce0' + 84. Fast 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx_inst|done' + 85. Fast 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' + 86. Fast 1200mV 0C Model Hold: 'spi_sck' + 87. Fast 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' + 88. Fast 1200mV 0C Model Hold: 'clk_10mhz' + 89. Fast 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx2_inst|done' + 90. Fast 1200mV 0C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' 91. Fast 1200mV 0C Model Hold: 'virt_ad9866_rxclk' 92. Fast 1200mV 0C Model Metastability Summary 93. Multicorner Timing Analysis Summary @@ -158,12 +158,12 @@ agreement for further details. ; Number detected on machine ; 4 ; ; Maximum allowed ; 2 ; ; ; ; -; Average used ; 1.28 ; +; Average used ; 1.26 ; ; Maximum used ; 2 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; -; Processor 2 ; 27.8% ; +; Processor 2 ; 26.4% ; +----------------------------+-------------+ @@ -172,7 +172,7 @@ agreement for further details. +--------------------+--------+--------------------------+ ; SDC File Path ; Status ; Read at ; +--------------------+--------+--------------------------+ -; rtl/radioberry.sdc ; OK ; Sat Feb 24 19:55:11 2018 ; +; rtl/radioberry.sdc ; OK ; Fri Mar 09 21:38:03 2018 ; +--------------------+--------+--------------------------+ @@ -204,14 +204,14 @@ agreement for further details. +------------+-----------------+-------------------------------------------------------------+---------------------------------------------------+ ; Fmax ; Restricted Fmax ; Clock Name ; Note ; +------------+-----------------+-------------------------------------------------------------+---------------------------------------------------+ -; 80.81 MHz ; 80.81 MHz ; ad9866_clk ; ; -; 103.52 MHz ; 103.52 MHz ; spi_sck ; ; -; 108.05 MHz ; 108.05 MHz ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; ; -; 123.62 MHz ; 123.62 MHz ; clk_10mhz ; ; -; 136.0 MHz ; 136.0 MHz ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; ; -; 147.67 MHz ; 147.67 MHz ; ad9866:ad9866_inst|dut1_pc[0] ; ; -; 209.82 MHz ; 63.75 MHz ; spi_ce0 ; limit due to minimum port rate restriction (tmin) ; -; 272.78 MHz ; 63.75 MHz ; spi_ce1 ; limit due to minimum port rate restriction (tmin) ; +; 77.8 MHz ; 77.8 MHz ; spi_sck ; ; +; 80.26 MHz ; 80.26 MHz ; ad9866_clk ; ; +; 96.57 MHz ; 96.57 MHz ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; ; +; 124.52 MHz ; 124.52 MHz ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; ; +; 135.87 MHz ; 135.87 MHz ; clk_10mhz ; ; +; 139.59 MHz ; 139.59 MHz ; ad9866:ad9866_inst|dut1_pc[0] ; ; +; 194.29 MHz ; 63.75 MHz ; spi_ce1 ; limit due to minimum port rate restriction (tmin) ; +; 234.47 MHz ; 63.75 MHz ; spi_ce0 ; limit due to minimum port rate restriction (tmin) ; +------------+-----------------+-------------------------------------------------------------+---------------------------------------------------+ This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. @@ -227,17 +227,17 @@ HTML report is unavailable in plain text report export. +-------------------------------------------------------------+-----------+---------------+ ; Clock ; Slack ; End Point TNS ; +-------------------------------------------------------------+-----------+---------------+ -; spi_sck ; 0.283 ; 0.000 ; -; spi_ce0 ; 0.286 ; 0.000 ; -; ad9866_clk ; 0.646 ; 0.000 ; -; spi_slave:spi_slave_rx2_inst|done ; 0.732 ; 0.000 ; -; virt_ad9866_rxclk ; 1.131 ; 0.000 ; -; spi_slave:spi_slave_rx_inst|done ; 1.487 ; 0.000 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 1.614 ; 0.000 ; -; clk_10mhz ; 91.911 ; 0.000 ; -; spi_ce1 ; 2496.334 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2599.539 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33325.980 ; 0.000 ; +; spi_sck ; 0.080 ; 0.000 ; +; spi_slave:spi_slave_rx2_inst|done ; 0.384 ; 0.000 ; +; virt_ad9866_rxclk ; 0.442 ; 0.000 ; +; spi_ce0 ; 0.515 ; 0.000 ; +; ad9866_clk ; 0.550 ; 0.000 ; +; spi_slave:spi_slave_rx_inst|done ; 1.349 ; 0.000 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 1.418 ; 0.000 ; +; clk_10mhz ; 92.640 ; 0.000 ; +; spi_ce1 ; 2494.853 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2598.989 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33325.302 ; 0.000 ; +-------------------------------------------------------------+-----------+---------------+ @@ -246,17 +246,17 @@ HTML report is unavailable in plain text report export. +-------------------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +-------------------------------------------------------------+--------+---------------+ -; spi_ce0 ; 0.258 ; 0.000 ; -; ad9866_clk ; 0.344 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.454 ; 0.000 ; +; spi_ce1 ; 0.370 ; 0.000 ; +; ad9866_clk ; 0.385 ; 0.000 ; +; spi_ce0 ; 0.426 ; 0.000 ; +; spi_sck ; 0.447 ; 0.000 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.454 ; 0.000 ; ; clk_10mhz ; 0.454 ; 0.000 ; -; spi_ce1 ; 0.476 ; 0.000 ; -; spi_sck ; 0.476 ; 0.000 ; -; spi_slave:spi_slave_rx_inst|done ; 0.564 ; 0.000 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 1.174 ; 0.000 ; -; spi_slave:spi_slave_rx2_inst|done ; 1.564 ; 0.000 ; -; virt_ad9866_rxclk ; 14.885 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.455 ; 0.000 ; +; spi_slave:spi_slave_rx_inst|done ; 0.709 ; 0.000 ; +; spi_slave:spi_slave_rx2_inst|done ; 1.524 ; 0.000 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 1.759 ; 0.000 ; +; virt_ad9866_rxclk ; 15.143 ; 0.000 ; +-------------------------------------------------------------+--------+---------------+ @@ -279,341 +279,125 @@ No paths to report. +-------------------------------------------------------------+-----------+---------------+ ; ad9866_rxclk ; -2.666 ; -2.666 ; ; ad9866_txclk ; -2.666 ; -2.666 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 4.607 ; 0.000 ; -; ad9866_clk ; 5.751 ; 0.000 ; -; spi_sck ; 31.545 ; 0.000 ; -; clk_10mhz ; 49.516 ; 0.000 ; -; spi_ce0 ; 1248.952 ; 0.000 ; -; spi_ce1 ; 1249.122 ; 0.000 ; -; spi_slave:spi_slave_rx_inst|done ; 1249.363 ; 0.000 ; -; spi_slave:spi_slave_rx2_inst|done ; 1249.369 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2603.373 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 16665.873 ; 0.000 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 4.642 ; 0.000 ; +; ad9866_clk ; 5.747 ; 0.000 ; +; spi_sck ; 31.573 ; 0.000 ; +; clk_10mhz ; 49.555 ; 0.000 ; +; spi_ce0 ; 1248.954 ; 0.000 ; +; spi_ce1 ; 1249.077 ; 0.000 ; +; spi_slave:spi_slave_rx2_inst|done ; 1249.371 ; 0.000 ; +; spi_slave:spi_slave_rx_inst|done ; 1249.378 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2603.370 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 16665.870 ; 0.000 ; +-------------------------------------------------------------+-----------+---------------+ -+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Setup: 'spi_sck' ; -+-------+----------------------------------------------------------------------------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+----------------------------------------------------------------------------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.283 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[32] ; spi_ce0 ; spi_sck ; 2.000 ; 3.616 ; 5.324 ; -; 0.288 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[3] ; spi_ce0 ; spi_sck ; 2.000 ; 3.613 ; 5.316 ; -; 0.288 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[5] ; spi_ce0 ; spi_sck ; 2.000 ; 3.613 ; 5.316 ; -; 0.288 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[0] ; spi_ce0 ; spi_sck ; 2.000 ; 3.613 ; 5.316 ; -; 0.288 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[2] ; spi_ce0 ; spi_sck ; 2.000 ; 3.613 ; 5.316 ; -; 0.288 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[6] ; spi_ce0 ; spi_sck ; 2.000 ; 3.613 ; 5.316 ; -; 0.288 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[4] ; spi_ce0 ; spi_sck ; 2.000 ; 3.613 ; 5.316 ; -; 0.288 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[1] ; spi_ce0 ; spi_sck ; 2.000 ; 3.613 ; 5.316 ; -; 0.288 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|done ; spi_ce0 ; spi_sck ; 2.000 ; 3.613 ; 5.316 ; -; 0.315 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[4] ; spi_ce1 ; spi_sck ; 2.000 ; 3.468 ; 5.144 ; -; 0.315 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; spi_ce1 ; spi_sck ; 2.000 ; 3.468 ; 5.144 ; -; 0.315 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[8] ; spi_ce1 ; spi_sck ; 2.000 ; 3.468 ; 5.144 ; -; 0.315 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[7] ; spi_ce1 ; spi_sck ; 2.000 ; 3.468 ; 5.144 ; -; 0.315 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[6] ; spi_ce1 ; spi_sck ; 2.000 ; 3.468 ; 5.144 ; -; 0.315 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[5] ; spi_ce1 ; spi_sck ; 2.000 ; 3.468 ; 5.144 ; -; 0.315 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[3] ; spi_ce1 ; spi_sck ; 2.000 ; 3.468 ; 5.144 ; -; 0.315 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[29] ; spi_ce1 ; spi_sck ; 2.000 ; 3.468 ; 5.144 ; -; 0.315 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[24] ; spi_ce1 ; spi_sck ; 2.000 ; 3.468 ; 5.144 ; -; 0.367 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[31] ; spi_ce0 ; spi_sck ; 2.000 ; 3.456 ; 5.080 ; -; 0.367 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[30] ; spi_ce0 ; spi_sck ; 2.000 ; 3.456 ; 5.080 ; -; 0.367 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_ce0 ; spi_sck ; 2.000 ; 3.456 ; 5.080 ; -; 0.367 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[40] ; spi_ce0 ; spi_sck ; 2.000 ; 3.456 ; 5.080 ; -; 0.385 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[36] ; spi_ce0 ; spi_sck ; 2.000 ; 3.646 ; 5.252 ; -; 0.388 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[20] ; spi_ce1 ; spi_sck ; 2.000 ; 3.613 ; 5.216 ; -; 0.388 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_ce1 ; spi_sck ; 2.000 ; 3.613 ; 5.216 ; -; 0.388 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[30] ; spi_ce1 ; spi_sck ; 2.000 ; 3.613 ; 5.216 ; -; 0.388 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[28] ; spi_ce1 ; spi_sck ; 2.000 ; 3.613 ; 5.216 ; -; 0.388 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[27] ; spi_ce1 ; spi_sck ; 2.000 ; 3.613 ; 5.216 ; -; 0.388 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[22] ; spi_ce1 ; spi_sck ; 2.000 ; 3.613 ; 5.216 ; -; 0.388 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[21] ; spi_ce1 ; spi_sck ; 2.000 ; 3.613 ; 5.216 ; -; 0.394 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[34] ; spi_ce0 ; spi_sck ; 2.000 ; 3.656 ; 5.253 ; -; 0.394 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[37] ; spi_ce0 ; spi_sck ; 2.000 ; 3.656 ; 5.253 ; -; 0.394 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[33] ; spi_ce0 ; spi_sck ; 2.000 ; 3.656 ; 5.253 ; -; 0.394 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[35] ; spi_ce0 ; spi_sck ; 2.000 ; 3.656 ; 5.253 ; -; 0.402 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_slave:spi_slave_rx_inst|treg[47] ; spi_ce0 ; spi_sck ; 4.000 ; -0.406 ; 3.183 ; -; 0.437 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[23] ; spi_ce1 ; spi_sck ; 2.000 ; 3.603 ; 5.157 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[29] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[31] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[30] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[28] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[27] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[26] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[25] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[24] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[16] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[18] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[17] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[19] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[20] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[21] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[22] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.444 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[23] ; spi_ce1 ; spi_sck ; 3.000 ; 3.187 ; 5.734 ; -; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[28] ; spi_ce0 ; spi_sck ; 2.000 ; 3.314 ; 4.855 ; -; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[27] ; spi_ce0 ; spi_sck ; 2.000 ; 3.314 ; 4.855 ; -; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[26] ; spi_ce0 ; spi_sck ; 2.000 ; 3.314 ; 4.855 ; -; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[17] ; spi_ce0 ; spi_sck ; 2.000 ; 3.314 ; 4.855 ; -; 0.463 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[14] ; spi_ce1 ; spi_sck ; 2.000 ; 3.603 ; 5.131 ; -; 0.463 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[15] ; spi_ce1 ; spi_sck ; 2.000 ; 3.603 ; 5.131 ; -; 0.463 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[2] ; spi_ce1 ; spi_sck ; 2.000 ; 3.603 ; 5.131 ; -; 0.463 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[1] ; spi_ce1 ; spi_sck ; 2.000 ; 3.603 ; 5.131 ; -; 0.463 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[0] ; spi_ce1 ; spi_sck ; 2.000 ; 3.603 ; 5.131 ; -; 0.463 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_ce1 ; spi_sck ; 2.000 ; 3.603 ; 5.131 ; -; 0.463 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_ce1 ; spi_sck ; 2.000 ; 3.603 ; 5.131 ; -; 0.463 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; spi_ce1 ; spi_sck ; 2.000 ; 3.603 ; 5.131 ; -; 0.466 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[33] ; spi_ce1 ; spi_sck ; 2.000 ; 3.673 ; 5.198 ; -; 0.466 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_ce1 ; spi_sck ; 2.000 ; 3.673 ; 5.198 ; -; 0.466 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[13] ; spi_ce1 ; spi_sck ; 2.000 ; 3.673 ; 5.198 ; -; 0.466 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[12] ; spi_ce1 ; spi_sck ; 2.000 ; 3.673 ; 5.198 ; -; 0.466 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[11] ; spi_ce1 ; spi_sck ; 2.000 ; 3.673 ; 5.198 ; -; 0.466 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[10] ; spi_ce1 ; spi_sck ; 2.000 ; 3.673 ; 5.198 ; -; 0.466 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_ce1 ; spi_sck ; 2.000 ; 3.673 ; 5.198 ; -; 0.466 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_ce1 ; spi_sck ; 2.000 ; 3.673 ; 5.198 ; -; 0.508 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[17] ; spi_ce1 ; spi_sck ; 2.000 ; 3.682 ; 5.165 ; -; 0.508 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[16] ; spi_ce1 ; spi_sck ; 2.000 ; 3.682 ; 5.165 ; -; 0.508 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[38] ; spi_ce1 ; spi_sck ; 2.000 ; 3.682 ; 5.165 ; -; 0.508 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[37] ; spi_ce1 ; spi_sck ; 2.000 ; 3.682 ; 5.165 ; -; 0.508 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[36] ; spi_ce1 ; spi_sck ; 2.000 ; 3.682 ; 5.165 ; -; 0.508 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[18] ; spi_ce1 ; spi_sck ; 2.000 ; 3.682 ; 5.165 ; -; 0.508 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[19] ; spi_ce1 ; spi_sck ; 2.000 ; 3.682 ; 5.165 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[37] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[41] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[45] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[39] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[40] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[38] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[36] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[47] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[46] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[42] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[43] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.516 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[44] ; spi_ce1 ; spi_sck ; 3.000 ; 3.140 ; 5.615 ; -; 0.559 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[4] ; spi_ce1 ; spi_sck ; 2.000 ; 3.275 ; 4.707 ; -; 0.559 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[3] ; spi_ce1 ; spi_sck ; 2.000 ; 3.275 ; 4.707 ; -; 0.559 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[5] ; spi_ce1 ; spi_sck ; 2.000 ; 3.275 ; 4.707 ; -; 0.559 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[6] ; spi_ce1 ; spi_sck ; 2.000 ; 3.275 ; 4.707 ; -; 0.559 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[0] ; spi_ce1 ; spi_sck ; 2.000 ; 3.275 ; 4.707 ; -+-------+----------------------------------------------------------------------------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ - - -+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Setup: 'spi_ce0' ; -+----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.286 ; spi_slave:spi_slave_rx_inst|rdata[15] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; -0.065 ; 1.687 ; -; 0.302 ; spi_slave:spi_slave_rx_inst|rdata[13] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; -0.065 ; 1.671 ; -; 0.341 ; spi_slave:spi_slave_rx_inst|rdata[12] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; -0.065 ; 1.632 ; -; 0.349 ; spi_slave:spi_slave_rx_inst|rdata[14] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; -0.065 ; 1.624 ; -; 0.463 ; spi_slave:spi_slave_rx_inst|rdata[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.218 ; 1.793 ; -; 0.518 ; spi_slave:spi_slave_rx_inst|rdata[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.218 ; 1.738 ; -; 0.560 ; spi_slave:spi_slave_rx_inst|rdata[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.195 ; 1.673 ; -; 0.583 ; spi_slave:spi_slave_rx_inst|rdata[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.195 ; 1.650 ; -; 0.584 ; spi_slave:spi_slave_rx_inst|rdata[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.218 ; 1.672 ; -; 0.585 ; spi_slave:spi_slave_rx_inst|rdata[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.218 ; 1.671 ; -; 0.592 ; spi_slave:spi_slave_rx_inst|rdata[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.195 ; 1.641 ; -; 0.625 ; spi_slave:spi_slave_rx_inst|rdata[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.195 ; 1.608 ; -; 2.103 ; spi_slave:spi_slave_rx_inst|rdata[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.195 ; 2.130 ; -; 2.302 ; spi_slave:spi_slave_rx_inst|rdata[20] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.227 ; 1.963 ; -; 2.425 ; spi_slave:spi_slave_rx_inst|rdata[19] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.259 ; 1.872 ; -; 2.436 ; spi_slave:spi_slave_rx_inst|rdata[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.195 ; 1.797 ; -; 2.494 ; spi_slave:spi_slave_rx_inst|rdata[30] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.130 ; 1.674 ; -; 2.504 ; spi_slave:spi_slave_rx_inst|rdata[31] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.130 ; 1.664 ; -; 2.517 ; spi_slave:spi_slave_rx_inst|rdata[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.195 ; 1.716 ; -; 2.552 ; spi_slave:spi_slave_rx_inst|rdata[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.195 ; 1.681 ; -; 2.586 ; spi_slave:spi_slave_rx_inst|rdata[26] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.254 ; 1.706 ; -; 2.596 ; spi_slave:spi_slave_rx_inst|rdata[25] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.191 ; 1.633 ; -; 2.599 ; spi_slave:spi_slave_rx_inst|rdata[22] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.227 ; 1.666 ; -; 2.607 ; spi_slave:spi_slave_rx_inst|rdata[27] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.254 ; 1.685 ; -; 2.612 ; spi_slave:spi_slave_rx_inst|rdata[24] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.191 ; 1.617 ; -; 2.618 ; spi_slave:spi_slave_rx_inst|rdata[17] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.322 ; 1.742 ; -; 2.650 ; spi_slave:spi_slave_rx_inst|rdata[23] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.227 ; 1.615 ; -; 2.668 ; spi_slave:spi_slave_rx_inst|rdata[21] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.227 ; 1.597 ; -; 2.715 ; spi_slave:spi_slave_rx_inst|rdata[18] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.259 ; 1.582 ; -; 3.014 ; spi_slave:spi_slave_rx_inst|rdata[29] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.215 ; 1.239 ; -; 3.041 ; spi_slave:spi_slave_rx_inst|rdata[28] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.278 ; 1.275 ; -; 3.092 ; spi_slave:spi_slave_rx_inst|rdata[16] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.285 ; 1.231 ; -; 2495.234 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.014 ; 4.773 ; -; 2495.286 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.014 ; 4.721 ; -; 2495.393 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.654 ; -; 2495.445 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.602 ; -; 2495.503 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.014 ; 4.504 ; -; 2495.555 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.014 ; 4.452 ; -; 2495.568 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.014 ; 4.439 ; -; 2495.679 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.368 ; -; 2495.699 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.348 ; -; 2495.727 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.320 ; -; 2495.731 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.316 ; -; 2495.751 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.296 ; -; 2495.818 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.229 ; -; 2495.837 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.014 ; 4.170 ; -; 2495.870 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.177 ; -; 2496.013 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.034 ; -; 2496.033 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 4.014 ; -; 2496.152 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.026 ; 3.895 ; -; 2496.158 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.201 ; 3.662 ; -; 2496.159 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.201 ; 3.661 ; -; 2496.186 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.201 ; 3.634 ; -; 2496.187 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.201 ; 3.633 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[25] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[24] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[22] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[21] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[18] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[17] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[16] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[15] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[14] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[13] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[12] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.313 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.147 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[10] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[3] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[8] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[6] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[11] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[4] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[7] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[5] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[9] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -; 2496.315 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[1] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.145 ; 3.476 ; -+----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ - - -+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Setup: 'ad9866_clk' ; -+-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ -; 0.646 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.236 ; 7.638 ; -; 0.664 ; ad9866_clk ; ad9866_txclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 5.346 ; -; 0.664 ; ad9866_clk ; ad9866_rxclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 5.346 ; -; 0.938 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.236 ; 7.346 ; -; 0.974 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.090 ; 7.456 ; -; 1.020 ; ad9866_adio[4] ; adcpipe[1][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.195 ; 5.196 ; -; 1.034 ; ad9866_adio[7] ; adcpipe[0][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.222 ; 5.209 ; -; 1.052 ; ad9866_adio[6] ; adcpipe[1][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.947 ; 4.916 ; -; 1.053 ; ad9866_adio[8] ; adcpipe[0][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.222 ; 5.190 ; -; 1.065 ; ad9866_adio[8] ; adcpipe[1][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.947 ; 4.903 ; -; 1.071 ; ad9866_adio[10] ; adcpipe[0][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.222 ; 5.172 ; -; 1.131 ; ad9866_adio[0] ; adcpipe[0][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.920 ; 4.810 ; -; 1.134 ; ad9866_adio[4] ; adcpipe[0][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.244 ; 5.131 ; -; 1.154 ; ad9866_adio[6] ; adcpipe[0][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.222 ; 5.089 ; -; 1.162 ; ad9866_adio[1] ; adcpipe[1][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.025 ; 4.884 ; -; 1.201 ; ad9866_adio[0] ; adcpipe[1][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.981 ; 4.801 ; -; 1.204 ; ad9866_adio[2] ; adcpipe[1][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.323 ; 5.140 ; -; 1.213 ; ad9866_adio[2] ; adcpipe[0][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.220 ; 5.028 ; -; 1.214 ; spi_slave:spi_slave_rx_inst|treg[47] ; spi_miso ; spi_sck ; ad9866_clk ; 11.000 ; -3.605 ; 5.651 ; -; 1.227 ; ad9866_adio[10] ; adcpipe[1][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.947 ; 4.741 ; -; 1.246 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.047 ; 7.227 ; -; 1.257 ; ad9866_adio[7] ; adcpipe[1][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.025 ; 4.789 ; -; 1.259 ; ad9866_adio[3] ; adcpipe[1][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.091 ; 4.853 ; -; 1.261 ; ad9866_adio[11] ; adcpipe[1][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.221 ; 4.981 ; -; 1.261 ; ad9866_adio[11] ; adcpipe[0][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.221 ; 4.981 ; -; 1.288 ; ad9866_adio[9] ; adcpipe[1][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.091 ; 4.824 ; -; 1.288 ; ad9866_adio[9] ; adcpipe[0][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.091 ; 4.824 ; -; 1.310 ; ad9866_adio[5] ; adcpipe[1][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.050 ; 4.761 ; -; 1.311 ; ad9866_adio[5] ; adcpipe[0][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.050 ; 4.760 ; -; 1.349 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.090 ; 7.081 ; -; 1.357 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.124 ; 7.039 ; -; 1.399 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.298 ; 6.823 ; -; 1.400 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.000 ; 7.120 ; -; 1.417 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.047 ; 7.056 ; -; 1.440 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.034 ; 7.046 ; -; 1.456 ; ad9866_adio[1] ; adcpipe[0][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.804 ; 4.369 ; -; 1.513 ; ad9866_adio[3] ; adcpipe[0][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.090 ; 4.598 ; -; 1.547 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.047 ; 6.926 ; -; 1.566 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.013 ; 6.941 ; -; 1.575 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.013 ; 6.932 ; -; 1.585 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.660 ; 7.275 ; -; 1.599 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.106 ; 6.815 ; -; 1.634 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.660 ; 7.226 ; -; 1.635 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.620 ; 7.265 ; -; 1.636 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.368 ; 6.516 ; -; 1.645 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.028 ; 6.847 ; -; 1.743 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.620 ; 7.157 ; -; 1.745 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.657 ; 7.118 ; -; 1.751 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.755 ; 10.994 ; -; 1.755 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.657 ; 7.108 ; -; 1.764 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.124 ; 6.632 ; -; 1.769 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.047 ; 6.704 ; -; 1.795 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.937 ; 6.788 ; -; 1.814 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.937 ; 6.769 ; -; 1.820 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.034 ; 6.666 ; -; 1.836 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.298 ; 6.386 ; -; 1.873 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.657 ; 6.990 ; -; 1.882 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.657 ; 6.981 ; -; 1.923 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.937 ; 6.660 ; -; 1.923 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.013 ; 6.584 ; -; 1.934 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.013 ; 6.573 ; -; 1.938 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.972 ; 6.610 ; -; 1.942 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.937 ; 6.641 ; -; 1.958 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.972 ; 6.590 ; -; 1.974 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.660 ; 6.886 ; -; 1.974 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.106 ; 6.440 ; -; 2.014 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.718 ; 10.768 ; -; 2.034 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.620 ; 6.866 ; -; 2.102 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.660 ; 6.758 ; -; 2.182 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.755 ; 10.563 ; -; 2.330 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.624 ; 10.546 ; -; 2.334 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.972 ; 6.214 ; -; 2.395 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.028 ; 6.097 ; -; 2.415 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.972 ; 6.133 ; -; 2.430 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.620 ; 6.470 ; -; 2.432 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.718 ; 10.350 ; -; 2.725 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.624 ; 10.151 ; -; 2.976 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.562 ; 9.962 ; -; 3.017 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.624 ; 9.859 ; -; 3.086 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][19] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.372 ; 10.327 ; -; 3.095 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][19] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.372 ; 10.318 ; -; 3.155 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.755 ; 9.590 ; -; 3.156 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[22] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.726 ; 9.159 ; -; 3.161 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[23] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.726 ; 9.154 ; -; 3.230 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][22] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.379 ; 10.190 ; -; 3.239 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][22] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.379 ; 10.181 ; -; 3.259 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.624 ; 9.617 ; -; 3.277 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[37] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][19] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.372 ; 10.136 ; -; 3.294 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[38] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][19] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.372 ; 10.119 ; -; 3.302 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[20] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.726 ; 9.013 ; -; 3.307 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[21] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.726 ; 9.008 ; -; 3.311 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.624 ; 9.565 ; -; 3.349 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.745 ; 9.406 ; -; 3.350 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[12] ; transmitter:transmitter_inst|out_data[12] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.690 ; 2.491 ; -; 3.367 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[3] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[23] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.726 ; 8.948 ; -; 3.401 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[40] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][19] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.372 ; 10.012 ; -; 3.406 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[3] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[22] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.726 ; 8.909 ; -; 3.409 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][21] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.103 ; 9.735 ; -; 3.412 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.103 ; 9.732 ; -; 3.413 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[37] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][22] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.379 ; 10.007 ; -+-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ ++----------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Setup: 'spi_sck' ; ++-------+-----------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+-----------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.080 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[33] ; spi_ce1 ; spi_sck ; 2.000 ; 3.631 ; 5.542 ; +; 0.080 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[37] ; spi_ce1 ; spi_sck ; 2.000 ; 3.631 ; 5.542 ; +; 0.080 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[36] ; spi_ce1 ; spi_sck ; 2.000 ; 3.631 ; 5.542 ; +; 0.080 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_ce1 ; spi_sck ; 2.000 ; 3.631 ; 5.542 ; +; 0.080 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_ce1 ; spi_sck ; 2.000 ; 3.631 ; 5.542 ; +; 0.080 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[38] ; spi_ce1 ; spi_sck ; 2.000 ; 3.631 ; 5.542 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[24] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[21] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[22] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[4] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[3] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[27] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[30] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[2] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.154 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[23] ; spi_ce1 ; spi_sck ; 2.000 ; 3.655 ; 5.492 ; +; 0.182 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[7] ; spi_ce1 ; spi_sck ; 2.000 ; 3.560 ; 5.369 ; +; 0.182 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[28] ; spi_ce1 ; spi_sck ; 2.000 ; 3.560 ; 5.369 ; +; 0.217 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_ce1 ; spi_sck ; 2.000 ; 3.728 ; 5.502 ; +; 0.217 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[1] ; spi_ce1 ; spi_sck ; 2.000 ; 3.728 ; 5.502 ; +; 0.217 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[29] ; spi_ce1 ; spi_sck ; 2.000 ; 3.728 ; 5.502 ; +; 0.374 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[39] ; spi_ce1 ; spi_sck ; 2.000 ; 3.693 ; 5.310 ; +; 0.374 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[41] ; spi_ce1 ; spi_sck ; 2.000 ; 3.693 ; 5.310 ; +; 0.374 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_ce1 ; spi_sck ; 2.000 ; 3.693 ; 5.310 ; +; 0.374 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[47] ; spi_ce1 ; spi_sck ; 2.000 ; 3.693 ; 5.310 ; +; 0.374 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[44] ; spi_ce1 ; spi_sck ; 2.000 ; 3.693 ; 5.310 ; +; 0.374 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[42] ; spi_ce1 ; spi_sck ; 2.000 ; 3.693 ; 5.310 ; +; 0.374 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_ce1 ; spi_sck ; 2.000 ; 3.693 ; 5.310 ; +; 0.374 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[43] ; spi_ce1 ; spi_sck ; 2.000 ; 3.693 ; 5.310 ; +; 0.379 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[3] ; spi_ce1 ; spi_sck ; 2.000 ; 3.232 ; 4.844 ; +; 0.379 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[4] ; spi_ce1 ; spi_sck ; 2.000 ; 3.232 ; 4.844 ; +; 0.379 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[5] ; spi_ce1 ; spi_sck ; 2.000 ; 3.232 ; 4.844 ; +; 0.379 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[6] ; spi_ce1 ; spi_sck ; 2.000 ; 3.232 ; 4.844 ; +; 0.379 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[0] ; spi_ce1 ; spi_sck ; 2.000 ; 3.232 ; 4.844 ; +; 0.379 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[1] ; spi_ce1 ; spi_sck ; 2.000 ; 3.232 ; 4.844 ; +; 0.379 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[2] ; spi_ce1 ; spi_sck ; 2.000 ; 3.232 ; 4.844 ; +; 0.390 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[0] ; spi_ce1 ; spi_sck ; 2.000 ; 3.492 ; 5.093 ; +; 0.390 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[18] ; spi_ce1 ; spi_sck ; 2.000 ; 3.492 ; 5.093 ; +; 0.404 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[17] ; spi_ce1 ; spi_sck ; 2.000 ; 3.488 ; 5.075 ; +; 0.404 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; spi_ce1 ; spi_sck ; 2.000 ; 3.488 ; 5.075 ; +; 0.404 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[8] ; spi_ce1 ; spi_sck ; 2.000 ; 3.488 ; 5.075 ; +; 0.404 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[6] ; spi_ce1 ; spi_sck ; 2.000 ; 3.488 ; 5.075 ; +; 0.404 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[5] ; spi_ce1 ; spi_sck ; 2.000 ; 3.488 ; 5.075 ; +; 0.404 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[19] ; spi_ce1 ; spi_sck ; 2.000 ; 3.488 ; 5.075 ; +; 0.404 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[20] ; spi_ce1 ; spi_sck ; 2.000 ; 3.488 ; 5.075 ; +; 0.422 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_ce0 ; spi_sck ; 2.000 ; 3.304 ; 4.873 ; +; 0.422 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[3] ; spi_ce0 ; spi_sck ; 2.000 ; 3.304 ; 4.873 ; +; 0.422 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[2] ; spi_ce0 ; spi_sck ; 2.000 ; 3.304 ; 4.873 ; +; 0.422 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[1] ; spi_ce0 ; spi_sck ; 2.000 ; 3.304 ; 4.873 ; +; 0.422 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[0] ; spi_ce0 ; spi_sck ; 2.000 ; 3.304 ; 4.873 ; +; 0.422 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_ce0 ; spi_sck ; 2.000 ; 3.304 ; 4.873 ; +; 0.422 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[31] ; spi_ce0 ; spi_sck ; 2.000 ; 3.304 ; 4.873 ; +; 0.449 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|done ; spi_ce1 ; spi_sck ; 2.000 ; 3.237 ; 4.779 ; +; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[5] ; spi_ce0 ; spi_sck ; 2.000 ; 3.325 ; 4.866 ; +; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[12] ; spi_ce0 ; spi_sck ; 2.000 ; 3.325 ; 4.866 ; +; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[10] ; spi_ce0 ; spi_sck ; 2.000 ; 3.325 ; 4.866 ; +; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[6] ; spi_ce0 ; spi_sck ; 2.000 ; 3.325 ; 4.866 ; +; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[7] ; spi_ce0 ; spi_sck ; 2.000 ; 3.325 ; 4.866 ; +; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[8] ; spi_ce0 ; spi_sck ; 2.000 ; 3.325 ; 4.866 ; +; 0.450 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[9] ; spi_ce0 ; spi_sck ; 2.000 ; 3.325 ; 4.866 ; +; 0.451 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[3] ; spi_ce0 ; spi_sck ; 2.000 ; 3.725 ; 5.265 ; +; 0.451 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[4] ; spi_ce0 ; spi_sck ; 2.000 ; 3.725 ; 5.265 ; +; 0.451 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[5] ; spi_ce0 ; spi_sck ; 2.000 ; 3.725 ; 5.265 ; +; 0.451 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[0] ; spi_ce0 ; spi_sck ; 2.000 ; 3.725 ; 5.265 ; +; 0.451 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[6] ; spi_ce0 ; spi_sck ; 2.000 ; 3.725 ; 5.265 ; +; 0.451 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[2] ; spi_ce0 ; spi_sck ; 2.000 ; 3.725 ; 5.265 ; +; 0.451 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rreg[30] ; spi_ce0 ; spi_sck ; 2.000 ; 3.725 ; 5.265 ; +; 0.451 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[1] ; spi_ce0 ; spi_sck ; 2.000 ; 3.725 ; 5.265 ; +; 0.451 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|done ; spi_ce0 ; spi_sck ; 2.000 ; 3.725 ; 5.265 ; +; 0.453 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[13] ; spi_ce1 ; spi_sck ; 2.000 ; 3.543 ; 5.081 ; +; 0.453 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[16] ; spi_ce1 ; spi_sck ; 2.000 ; 3.543 ; 5.081 ; +; 0.453 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[15] ; spi_ce1 ; spi_sck ; 2.000 ; 3.543 ; 5.081 ; +; 0.453 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[14] ; spi_ce1 ; spi_sck ; 2.000 ; 3.543 ; 5.081 ; +; 0.453 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[12] ; spi_ce1 ; spi_sck ; 2.000 ; 3.543 ; 5.081 ; +; 0.453 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[11] ; spi_ce1 ; spi_sck ; 2.000 ; 3.543 ; 5.081 ; +; 0.453 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[10] ; spi_ce1 ; spi_sck ; 2.000 ; 3.543 ; 5.081 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[39] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[43] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[31] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[37] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[38] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[36] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[30] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[45] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[44] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[40] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[41] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.490 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[42] ; spi_ce1 ; spi_sck ; 3.000 ; 3.195 ; 5.696 ; +; 0.501 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[24] ; spi_ce0 ; spi_sck ; 2.000 ; 3.617 ; 5.107 ; +; 0.501 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[26] ; spi_ce0 ; spi_sck ; 2.000 ; 3.617 ; 5.107 ; +; 0.501 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[25] ; spi_ce0 ; spi_sck ; 2.000 ; 3.617 ; 5.107 ; +; 0.501 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[28] ; spi_ce0 ; spi_sck ; 2.000 ; 3.617 ; 5.107 ; +; 0.501 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[27] ; spi_ce0 ; spi_sck ; 2.000 ; 3.617 ; 5.107 ; ++-------+-----------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -621,106 +405,106 @@ No paths to report. +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ -; 0.732 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.861 ; 2.149 ; -; 0.733 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.855 ; 2.154 ; -; 0.747 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.847 ; 2.148 ; -; 0.807 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.847 ; 2.088 ; -; 0.819 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.704 ; 2.219 ; -; 0.820 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.834 ; 2.088 ; -; 0.849 ; spi_slave:spi_slave_rx2_inst|rdata[46] ; iambic_mode[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.805 ; 2.337 ; -; 0.889 ; spi_slave:spi_slave_rx2_inst|rdata[47] ; iambic_mode[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.805 ; 2.297 ; -; 0.892 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.706 ; 2.144 ; -; 0.892 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.706 ; 2.144 ; -; 0.900 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.853 ; 1.989 ; -; 0.904 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.693 ; 2.145 ; -; 0.912 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.693 ; 2.137 ; -; 0.941 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.921 ; 1.880 ; -; 1.005 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.931 ; 1.806 ; -; 1.008 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.923 ; 1.811 ; -; 1.011 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.921 ; 1.810 ; -; 1.012 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.921 ; 1.809 ; -; 1.017 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.847 ; 1.878 ; -; 1.028 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.933 ; 1.781 ; -; 1.029 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.834 ; 1.879 ; -; 1.031 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.921 ; 1.790 ; -; 1.053 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.847 ; 1.842 ; -; 1.062 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.834 ; 1.846 ; -; 1.063 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.916 ; 1.763 ; -; 1.071 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.923 ; 1.748 ; -; 1.072 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.834 ; 1.836 ; -; 1.085 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.845 ; 1.812 ; -; 1.087 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.845 ; 1.810 ; -; 1.090 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.863 ; 1.789 ; -; 1.092 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.861 ; 1.789 ; -; 1.099 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.849 ; 1.794 ; -; 1.101 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.834 ; 1.807 ; -; 1.103 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.906 ; 1.733 ; -; 1.105 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.929 ; 1.708 ; -; 1.105 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.927 ; 1.710 ; -; 1.106 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.861 ; 1.775 ; -; 1.106 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.855 ; 1.781 ; -; 1.114 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.847 ; 1.781 ; -; 1.115 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.933 ; 1.694 ; -; 1.117 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.931 ; 1.694 ; -; 1.120 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.906 ; 1.716 ; -; 1.122 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.918 ; 1.702 ; -; 1.126 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.863 ; 1.753 ; -; 1.127 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.836 ; 1.779 ; -; 1.131 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.919 ; 1.692 ; -; 1.136 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.861 ; 1.745 ; -; 1.138 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.851 ; 1.753 ; -; 1.146 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.861 ; 1.735 ; -; 1.153 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.855 ; 1.734 ; -; 1.157 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.863 ; 1.722 ; -; 1.160 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.845 ; 1.737 ; -; 1.160 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.855 ; 1.727 ; -; 1.161 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.706 ; 1.875 ; -; 1.161 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.706 ; 1.875 ; -; 1.173 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.693 ; 1.876 ; -; 1.177 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.851 ; 1.714 ; -; 1.177 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.863 ; 1.702 ; -; 1.191 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.693 ; 1.858 ; -; 1.193 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.861 ; 1.688 ; -; 1.201 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.704 ; 1.837 ; -; 1.207 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.706 ; 1.829 ; -; 1.207 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; cw_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.811 ; 1.973 ; -; 1.211 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.693 ; 1.838 ; -; 1.213 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.846 ; 1.683 ; -; 1.219 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.693 ; 1.830 ; -; 1.220 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.706 ; 1.816 ; -; 1.221 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.712 ; 1.809 ; -; 1.233 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.706 ; 1.803 ; -; 1.245 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.693 ; 1.804 ; -; 1.271 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.695 ; 1.776 ; -; 1.282 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; rx2_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.670 ; 2.039 ; -; 1.297 ; spi_slave:spi_slave_rx2_inst|rdata[44] ; cw_speed[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.811 ; 1.883 ; -; 1.309 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.710 ; 1.723 ; -; 1.313 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; rx2_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.816 ; 1.862 ; -; 1.329 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.710 ; 1.703 ; -; 1.330 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.933 ; 1.479 ; -; 1.335 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.710 ; 1.697 ; -; 1.337 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; cw_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.663 ; 1.991 ; -; 1.341 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.710 ; 1.691 ; -; 1.346 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.935 ; 1.461 ; -; 1.349 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.710 ; 1.683 ; -; 1.351 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.923 ; 1.468 ; -; 1.354 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.933 ; 1.455 ; -; 1.360 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.935 ; 1.447 ; -; 1.372 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.919 ; 1.451 ; -; 1.374 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.919 ; 1.449 ; -; 1.382 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.906 ; 1.454 ; -; 1.387 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.918 ; 1.437 ; -; 1.387 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.906 ; 1.449 ; -; 1.396 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.923 ; 1.423 ; -; 1.398 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.863 ; 1.481 ; -; 1.406 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.929 ; 1.407 ; -; 1.407 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.927 ; 1.408 ; -; 1.419 ; spi_slave:spi_slave_rx2_inst|rdata[39] ; keyer_revers ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.809 ; 1.763 ; -; 1.423 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.919 ; 1.400 ; -; 1.430 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.849 ; 1.463 ; -; 1.432 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.849 ; 1.461 ; -; 1.438 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.863 ; 1.441 ; -; 1.438 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.855 ; 1.449 ; +; 0.384 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.479 ; 2.879 ; +; 0.391 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.477 ; 2.874 ; +; 0.403 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.727 ; 2.612 ; +; 0.422 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.669 ; +; 0.472 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.473 ; 2.797 ; +; 0.497 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.594 ; +; 0.500 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.479 ; 2.763 ; +; 0.506 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.478 ; 2.758 ; +; 0.506 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.653 ; 2.583 ; +; 0.508 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.583 ; +; 0.509 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.729 ; 2.504 ; +; 0.514 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.477 ; 2.751 ; +; 0.530 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; rx2_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.833 ; 2.628 ; +; 0.537 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.724 ; 2.481 ; +; 0.537 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.653 ; 2.552 ; +; 0.538 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.477 ; 2.727 ; +; 0.543 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.653 ; 2.546 ; +; 0.544 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.473 ; 2.725 ; +; 0.549 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.473 ; 2.720 ; +; 0.562 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.529 ; +; 0.567 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.524 ; +; 0.570 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.521 ; +; 0.588 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.653 ; 2.501 ; +; 0.595 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.653 ; 2.494 ; +; 0.603 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.653 ; 2.486 ; +; 0.627 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.532 ; 2.583 ; +; 0.654 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.554 ; 2.534 ; +; 0.658 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.552 ; 2.532 ; +; 0.690 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.532 ; 2.520 ; +; 0.701 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.960 ; 2.081 ; +; 0.728 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.473 ; 2.541 ; +; 0.732 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.532 ; 2.478 ; +; 0.745 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.532 ; 2.465 ; +; 0.759 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.857 ; 2.126 ; +; 0.767 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.548 ; 2.427 ; +; 0.767 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.532 ; 2.443 ; +; 0.770 ; spi_slave:spi_slave_rx2_inst|rdata[38] ; keyer_weight[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.949 ; 2.023 ; +; 0.784 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.648 ; 2.310 ; +; 0.786 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.473 ; 2.483 ; +; 0.789 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.723 ; 2.230 ; +; 0.798 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.647 ; 2.297 ; +; 0.799 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.653 ; 2.290 ; +; 0.800 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.647 ; 2.295 ; +; 0.804 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.531 ; 2.407 ; +; 0.806 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.786 ; 2.150 ; +; 0.810 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.648 ; 2.284 ; +; 0.810 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.786 ; 2.146 ; +; 0.820 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.474 ; 2.448 ; +; 0.824 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.653 ; 2.265 ; +; 0.827 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.786 ; 2.129 ; +; 0.844 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.531 ; 2.367 ; +; 0.850 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.549 ; 2.343 ; +; 0.867 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.531 ; 2.344 ; +; 0.868 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.653 ; 2.221 ; +; 0.870 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.221 ; +; 0.870 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.647 ; 2.225 ; +; 0.883 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.786 ; 2.073 ; +; 0.887 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.532 ; 2.323 ; +; 0.890 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.804 ; 2.048 ; +; 0.892 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.199 ; +; 0.892 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.474 ; 2.376 ; +; 0.899 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.531 ; 2.312 ; +; 0.909 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.474 ; 2.359 ; +; 0.913 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.532 ; 2.297 ; +; 0.917 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.174 ; +; 0.924 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.474 ; 2.344 ; +; 0.926 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.474 ; 2.342 ; +; 0.926 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.857 ; 1.959 ; +; 0.930 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.039 ; 1.773 ; +; 0.934 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.054 ; 1.754 ; +; 0.940 ; spi_slave:spi_slave_rx2_inst|rdata[32] ; keyer_weight[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.050 ; 1.752 ; +; 0.940 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.648 ; 2.154 ; +; 0.945 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.793 ; 2.004 ; +; 0.949 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.804 ; 1.989 ; +; 0.958 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.531 ; 2.253 ; +; 0.959 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.978 ; 1.805 ; +; 0.975 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.963 ; 1.804 ; +; 0.980 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.978 ; 1.784 ; +; 0.981 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.789 ; 1.972 ; +; 0.983 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.978 ; 1.781 ; +; 0.984 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.960 ; 1.798 ; +; 0.985 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.978 ; 1.779 ; +; 0.988 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.036 ; 1.718 ; +; 0.994 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.789 ; 1.959 ; +; 1.006 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.978 ; 1.758 ; +; 1.008 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.978 ; 1.756 ; +; 1.010 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.963 ; 1.769 ; +; 1.010 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.963 ; 1.769 ; +; 1.018 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.978 ; 1.746 ; +; 1.023 ; spi_slave:spi_slave_rx2_inst|rdata[34] ; keyer_weight[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.949 ; 1.770 ; +; 1.025 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.963 ; 1.754 ; +; 1.031 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.973 ; 1.738 ; +; 1.039 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.857 ; 1.846 ; +; 1.047 ; spi_slave:spi_slave_rx2_inst|rdata[33] ; keyer_weight[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.949 ; 1.746 ; +; 1.048 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.857 ; 1.837 ; +; 1.048 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.531 ; 2.163 ; +; 1.049 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.963 ; 1.730 ; +; 1.050 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.963 ; 1.729 ; +; 1.054 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.963 ; 1.725 ; +; 1.057 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.978 ; 1.707 ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ @@ -729,126 +513,342 @@ No paths to report. +-------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ -; 1.131 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.294 ; 8.555 ; -; 1.245 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.324 ; 8.411 ; -; 1.450 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.455 ; 8.075 ; -; 1.815 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.324 ; 7.841 ; -; 3.577 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.866 ; 5.537 ; -; 3.880 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.455 ; 5.645 ; -; 3.886 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.455 ; 5.639 ; -; 3.915 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.294 ; 5.771 ; -; 4.342 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.294 ; 5.344 ; -; 4.472 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.294 ; 5.214 ; -; 4.715 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.294 ; 4.971 ; -; 4.722 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.294 ; 4.964 ; +; 0.442 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.630 ; 8.908 ; +; 1.524 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.197 ; 8.259 ; +; 1.586 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.993 ; 8.401 ; +; 1.678 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.197 ; 8.105 ; +; 2.663 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.630 ; 6.687 ; +; 2.785 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.934 ; 6.261 ; +; 4.006 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.197 ; 5.777 ; +; 4.103 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.197 ; 5.680 ; +; 4.159 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.197 ; 5.624 ; +; 4.189 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.628 ; 5.163 ; +; 4.275 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.197 ; 5.508 ; +; 4.416 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.263 ; 5.301 ; +-------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ ++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Setup: 'spi_ce0' ; ++----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.515 ; spi_slave:spi_slave_rx_inst|rdata[15] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.311 ; 1.834 ; +; 0.707 ; spi_slave:spi_slave_rx_inst|rdata[13] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.311 ; 1.642 ; +; 0.718 ; spi_slave:spi_slave_rx_inst|rdata[14] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.311 ; 1.631 ; +; 0.725 ; spi_slave:spi_slave_rx_inst|rdata[12] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.307 ; 1.620 ; +; 1.031 ; spi_slave:spi_slave_rx_inst|rdata[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.323 ; 1.330 ; +; 1.044 ; spi_slave:spi_slave_rx_inst|rdata[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.281 ; 1.275 ; +; 1.048 ; spi_slave:spi_slave_rx_inst|rdata[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.323 ; 1.313 ; +; 1.053 ; spi_slave:spi_slave_rx_inst|rdata[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.281 ; 1.266 ; +; 1.069 ; spi_slave:spi_slave_rx_inst|rdata[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.323 ; 1.292 ; +; 1.070 ; spi_slave:spi_slave_rx_inst|rdata[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.281 ; 1.249 ; +; 1.098 ; spi_slave:spi_slave_rx_inst|rdata[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.285 ; 1.225 ; +; 1.102 ; spi_slave:spi_slave_rx_inst|rdata[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.323 ; 1.259 ; +; 1.221 ; spi_slave:spi_slave_rx_inst|rdata[28] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.116 ; 2.933 ; +; 2.152 ; spi_slave:spi_slave_rx_inst|rdata[20] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.326 ; 2.212 ; +; 2.289 ; spi_slave:spi_slave_rx_inst|rdata[25] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.090 ; 1.839 ; +; 2.320 ; spi_slave:spi_slave_rx_inst|rdata[24] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.090 ; 1.808 ; +; 2.430 ; spi_slave:spi_slave_rx_inst|rdata[16] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.396 ; 2.004 ; +; 2.437 ; spi_slave:spi_slave_rx_inst|rdata[29] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.425 ; 2.026 ; +; 2.438 ; spi_slave:spi_slave_rx_inst|rdata[30] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.425 ; 2.025 ; +; 2.445 ; spi_slave:spi_slave_rx_inst|rdata[27] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.090 ; 1.683 ; +; 2.463 ; spi_slave:spi_slave_rx_inst|rdata[26] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.090 ; 1.665 ; +; 2.488 ; spi_slave:spi_slave_rx_inst|rdata[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.286 ; 1.836 ; +; 2.539 ; spi_slave:spi_slave_rx_inst|rdata[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.308 ; 1.807 ; +; 2.566 ; spi_slave:spi_slave_rx_inst|rdata[31] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.443 ; 1.915 ; +; 2.593 ; spi_slave:spi_slave_rx_inst|rdata[23] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.326 ; 1.771 ; +; 2.627 ; spi_slave:spi_slave_rx_inst|rdata[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.286 ; 1.697 ; +; 2.636 ; spi_slave:spi_slave_rx_inst|rdata[19] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.396 ; 1.798 ; +; 2.641 ; spi_slave:spi_slave_rx_inst|rdata[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.286 ; 1.683 ; +; 2.660 ; spi_slave:spi_slave_rx_inst|rdata[21] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.326 ; 1.704 ; +; 2.696 ; spi_slave:spi_slave_rx_inst|rdata[22] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.326 ; 1.668 ; +; 2.772 ; spi_slave:spi_slave_rx_inst|rdata[17] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.396 ; 1.662 ; +; 2.772 ; spi_slave:spi_slave_rx_inst|rdata[18] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.396 ; 1.662 ; +; 2495.735 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.131 ; 4.417 ; +; 2495.752 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.091 ; 4.360 ; +; 2496.008 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.222 ; 3.791 ; +; 2496.032 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.222 ; 3.767 ; +; 2496.047 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.131 ; 4.105 ; +; 2496.062 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.222 ; 3.737 ; +; 2496.064 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.091 ; 4.048 ; +; 2496.104 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.222 ; 3.695 ; +; 2496.128 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.222 ; 3.671 ; +; 2496.148 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.266 ; 3.607 ; +; 2496.158 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.222 ; 3.641 ; +; 2496.172 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.266 ; 3.583 ; +; 2496.202 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.266 ; 3.553 ; +; 2496.244 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.091 ; 3.868 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.139 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[4] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[9] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[0] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[11] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[7] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[8] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[6] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[5] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[10] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[2] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[1] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[25] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[24] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[22] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[21] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[18] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[17] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[16] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[15] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[14] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[13] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[12] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.326 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[3] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.134 ; 3.476 ; +; 2496.401 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.266 ; 3.354 ; +; 2496.418 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.266 ; 3.337 ; +; 2496.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.266 ; 3.330 ; +; 2496.442 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.266 ; 3.313 ; +; 2496.446 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.131 ; 3.706 ; +; 2496.448 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.266 ; 3.307 ; ++----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ + + ++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Setup: 'ad9866_clk' ; ++-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ +; 0.550 ; ad9866_clk ; ad9866_txclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 5.460 ; +; 0.550 ; ad9866_clk ; ad9866_rxclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 5.460 ; +; 0.560 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.997 ; 7.963 ; +; 0.611 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.008 ; 7.901 ; +; 0.613 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.956 ; 7.951 ; +; 0.657 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.060 ; 7.803 ; +; 0.662 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.967 ; 7.891 ; +; 0.698 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.019 ; 7.803 ; +; 0.749 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.060 ; 7.711 ; +; 0.801 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.019 ; 7.700 ; +; 0.891 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.997 ; 7.632 ; +; 0.905 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.030 ; 7.585 ; +; 0.909 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.987 ; 7.624 ; +; 0.940 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.008 ; 7.572 ; +; 0.951 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.956 ; 7.613 ; +; 0.975 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.060 ; 7.485 ; +; 1.001 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.967 ; 7.552 ; +; 1.020 ; ad9866_adio[8] ; adcpipe[0][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.631 ; 5.632 ; +; 1.028 ; spi_slave:spi_slave_rx_inst|treg[47] ; spi_miso ; spi_sck ; ad9866_clk ; 11.000 ; -3.366 ; 6.076 ; +; 1.036 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.019 ; 7.465 ; +; 1.078 ; ad9866_adio[2] ; adcpipe[0][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.678 ; 5.621 ; +; 1.081 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.060 ; 7.379 ; +; 1.085 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.526 ; 7.909 ; +; 1.094 ; ad9866_adio[7] ; adcpipe[0][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.678 ; 5.605 ; +; 1.107 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.968 ; 7.445 ; +; 1.131 ; ad9866_adio[6] ; adcpipe[1][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.073 ; 4.963 ; +; 1.140 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.019 ; 7.361 ; +; 1.140 ; ad9866_adio[10] ; adcpipe[0][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.631 ; 5.512 ; +; 1.141 ; ad9866_adio[8] ; adcpipe[1][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.096 ; 4.976 ; +; 1.145 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.060 ; 7.315 ; +; 1.156 ; ad9866_adio[4] ; adcpipe[0][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.284 ; 5.149 ; +; 1.157 ; ad9866_adio[5] ; adcpipe[0][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.872 ; 4.736 ; +; 1.158 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.060 ; 7.302 ; +; 1.158 ; ad9866_adio[5] ; adcpipe[1][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.872 ; 4.735 ; +; 1.161 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.672 ; 7.687 ; +; 1.173 ; ad9866_adio[9] ; adcpipe[1][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.929 ; 4.777 ; +; 1.173 ; ad9866_adio[9] ; adcpipe[0][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.929 ; 4.777 ; +; 1.178 ; ad9866_adio[0] ; adcpipe[0][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.678 ; 5.521 ; +; 1.205 ; ad9866_adio[1] ; adcpipe[0][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.380 ; 5.196 ; +; 1.207 ; ad9866_adio[2] ; adcpipe[1][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.291 ; 5.105 ; +; 1.223 ; ad9866_adio[3] ; adcpipe[0][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.678 ; 5.476 ; +; 1.226 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.876 ; 7.418 ; +; 1.232 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.913 ; 7.375 ; +; 1.250 ; ad9866_adio[7] ; adcpipe[1][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.073 ; 4.844 ; +; 1.267 ; ad9866_adio[4] ; adcpipe[1][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.073 ; 4.827 ; +; 1.279 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.030 ; 7.211 ; +; 1.290 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.537 ; 7.693 ; +; 1.303 ; ad9866_adio[6] ; adcpipe[0][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.631 ; 5.349 ; +; 1.336 ; ad9866_adio[1] ; adcpipe[1][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.073 ; 4.758 ; +; 1.344 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.908 ; 7.268 ; +; 1.376 ; ad9866_adio[11] ; adcpipe[0][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.203 ; 4.848 ; +; 1.429 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.934 ; 7.157 ; +; 1.448 ; ad9866_adio[11] ; adcpipe[1][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.096 ; 4.669 ; +; 1.469 ; ad9866_adio[0] ; adcpipe[1][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.234 ; 4.786 ; +; 1.481 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.526 ; 7.513 ; +; 1.488 ; ad9866_adio[10] ; adcpipe[1][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.053 ; 4.586 ; +; 1.515 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.672 ; 7.333 ; +; 1.519 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.019 ; 6.982 ; +; 1.538 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.019 ; 6.963 ; +; 1.539 ; ad9866_adio[3] ; adcpipe[1][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.096 ; 4.578 ; +; 1.562 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.019 ; 6.939 ; +; 1.564 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.019 ; 6.937 ; +; 1.576 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.672 ; 7.272 ; +; 1.610 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.913 ; 6.997 ; +; 1.725 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.537 ; 7.258 ; +; 1.805 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.934 ; 6.781 ; +; 1.842 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.427 ; 11.626 ; +; 1.848 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.525 ; 11.718 ; +; 1.876 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.658 ; 6.986 ; +; 1.904 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.060 ; 6.556 ; +; 1.912 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.525 ; 11.654 ; +; 1.953 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.525 ; 11.613 ; +; 1.973 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.060 ; 6.487 ; +; 1.979 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[38] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.525 ; 11.587 ; +; 2.050 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.672 ; 6.798 ; +; 2.069 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[37] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.525 ; 11.497 ; +; 2.082 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.397 ; 11.021 ; +; 2.135 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[40] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.525 ; 11.431 ; +; 2.233 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[39] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.525 ; 11.333 ; +; 2.368 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[41] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.525 ; 11.198 ; +; 2.391 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.397 ; 10.712 ; +; 2.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.502 ; 10.522 ; +; 2.518 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.283 ; 10.806 ; +; 2.539 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[43] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.427 ; 10.929 ; +; 2.562 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.419 ; 10.898 ; +; 2.580 ; transmitter:transmitter_inst|CicInterpM5:in2|y5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.490 ; 10.951 ; +; 2.596 ; transmitter:transmitter_inst|CicInterpM5:in2|y5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.490 ; 10.935 ; +; 2.615 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[5] ; transmitter:transmitter_inst|out_data[5] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.473 ; 3.443 ; +; 2.624 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.658 ; 6.238 ; +; 2.626 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.419 ; 10.834 ; +; 2.627 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.289 ; 10.703 ; +; 2.650 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.502 ; 10.348 ; +; 2.667 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.419 ; 10.793 ; +; 2.690 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.444 ; 10.795 ; +; 2.693 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[38] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.419 ; 10.767 ; +; 2.706 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[12] ; transmitter:transmitter_inst|out_data[12] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.669 ; 3.156 ; +; 2.748 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[45] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.408 ; 10.701 ; +; 2.754 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.444 ; 10.731 ; +; 2.783 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[37] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.419 ; 10.677 ; +; 2.786 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][17] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.283 ; 10.538 ; ++-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ + + +----------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Setup: 'spi_slave:spi_slave_rx_inst|done' ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ -; 1.487 ; spi_slave:spi_slave_rx_inst|rdata[34] ; rx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.785 ; 1.719 ; -; 1.495 ; spi_slave:spi_slave_rx_inst|rdata[33] ; rx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.785 ; 1.711 ; -; 1.539 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 2.737 ; -; 1.587 ; spi_slave:spi_slave_rx_inst|rdata[34] ; tx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.784 ; 1.620 ; -; 1.589 ; spi_slave:spi_slave_rx_inst|rdata[35] ; tx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.784 ; 1.618 ; -; 1.600 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.726 ; 3.117 ; -; 1.604 ; spi_slave:spi_slave_rx_inst|rdata[37] ; tx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.784 ; 1.603 ; -; 1.637 ; spi_slave:spi_slave_rx_inst|rdata[32] ; rx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -1.434 ; 0.920 ; -; 1.675 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.767 ; 3.083 ; -; 1.696 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.744 ; 3.039 ; -; 1.697 ; spi_slave:spi_slave_rx_inst|rdata[37] ; rx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.415 ; 1.879 ; -; 1.730 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.704 ; 2.965 ; -; 1.736 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.739 ; 2.994 ; -; 1.756 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.726 ; 2.961 ; -; 1.766 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.767 ; 2.992 ; -; 1.769 ; spi_slave:spi_slave_rx_inst|rdata[35] ; rx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.785 ; 1.437 ; -; 1.773 ; spi_slave:spi_slave_rx_inst|rdata[36] ; tx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.774 ; 1.444 ; -; 1.778 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.506 ; -; 1.779 ; spi_slave:spi_slave_rx_inst|rdata[33] ; tx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.784 ; 1.428 ; -; 1.796 ; spi_slave:spi_slave_rx_inst|rdata[32] ; tx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.743 ; 1.452 ; -; 1.879 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.597 ; 2.460 ; -; 1.882 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.597 ; 2.457 ; -; 1.885 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.399 ; -; 1.905 ; spi_slave:spi_slave_rx_inst|rdata[36] ; rx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.405 ; 1.681 ; -; 1.952 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.767 ; 2.806 ; -; 1.972 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.704 ; 2.723 ; -; 2.005 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.730 ; 2.716 ; -; 2.012 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.631 ; 2.610 ; -; 2.029 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.619 ; 2.581 ; -; 2.035 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.449 ; 2.156 ; -; 2.039 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.704 ; 2.656 ; -; 2.051 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.631 ; 2.571 ; -; 2.079 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.726 ; 2.638 ; -; 2.082 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.730 ; 2.639 ; -; 2.093 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.597 ; 2.246 ; -; 2.094 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.190 ; -; 2.118 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.730 ; 2.603 ; -; 2.128 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 2.174 ; -; 2.129 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.704 ; 2.566 ; -; 2.144 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.597 ; 2.195 ; -; 2.163 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 2.139 ; -; 2.164 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.726 ; 2.553 ; -; 2.166 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.118 ; -; 2.189 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 2.113 ; -; 2.195 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.611 ; 2.158 ; -; 2.205 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.739 ; 2.525 ; -; 2.212 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.072 ; -; 2.212 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.619 ; 2.398 ; -; 2.213 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.597 ; 2.126 ; -; 2.220 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.556 ; 2.078 ; -; 2.246 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 2.030 ; -; 2.271 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.597 ; 2.068 ; -; 2.293 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.739 ; 2.437 ; -; 2.340 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.739 ; 2.390 ; -; 2.344 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.704 ; 2.351 ; -; 2.377 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.449 ; 1.814 ; -; 2.386 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.726 ; 2.331 ; -; 2.387 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.704 ; 2.308 ; -; 2.396 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.726 ; 2.321 ; -; 2.399 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.717 ; 2.309 ; -; 2.402 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.717 ; 2.306 ; -; 2.434 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.704 ; 2.261 ; -; 2.440 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.726 ; 2.277 ; -; 2.444 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.449 ; 1.747 ; -; 2.445 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.449 ; 1.746 ; -; 2.475 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.730 ; 2.246 ; -; 2.482 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.794 ; -; 2.483 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.793 ; -; 2.486 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 1.816 ; -; 2.489 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.726 ; 2.228 ; -; 2.490 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 1.794 ; -; 2.496 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.780 ; -; 2.502 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.556 ; 1.796 ; -; 2.505 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.771 ; -; 2.513 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.574 ; 1.803 ; -; 2.521 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.755 ; -; 2.524 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.574 ; 1.792 ; -; 2.525 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 1.777 ; -; 2.529 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.574 ; 1.787 ; -; 2.530 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.556 ; 1.768 ; -; 2.539 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.597 ; 1.800 ; -; 2.541 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.735 ; -; 2.542 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.574 ; 1.774 ; -; 2.546 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 1.756 ; -; 2.550 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.556 ; 1.748 ; -; 2.552 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.556 ; 1.746 ; -; 2.555 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.721 ; -; 2.555 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.721 ; -; 2.555 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.721 ; -; 2.558 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.574 ; 1.758 ; -; 2.559 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.574 ; 1.757 ; -; 2.559 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 1.743 ; -; 2.562 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 1.740 ; -; 2.563 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.767 ; 2.195 ; -; 2.567 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.709 ; -; 2.568 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.708 ; -; 2.569 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.707 ; -; 2.571 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.556 ; 1.727 ; -; 2.573 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.574 ; 1.743 ; -; 2.574 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.534 ; 1.702 ; +; 1.349 ; spi_slave:spi_slave_rx_inst|rdata[32] ; tx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -1.035 ; 1.607 ; +; 1.353 ; spi_slave:spi_slave_rx_inst|rdata[34] ; rx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.970 ; 1.668 ; +; 1.354 ; spi_slave:spi_slave_rx_inst|rdata[36] ; tx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -1.035 ; 1.602 ; +; 1.415 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.544 ; 3.120 ; +; 1.424 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 3.109 ; +; 1.453 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.387 ; 2.676 ; +; 1.461 ; spi_slave:spi_slave_rx_inst|rdata[33] ; tx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -1.035 ; 1.495 ; +; 1.478 ; spi_slave:spi_slave_rx_inst|rdata[37] ; rx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.970 ; 1.543 ; +; 1.511 ; spi_slave:spi_slave_rx_inst|rdata[37] ; tx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.696 ; 1.784 ; +; 1.517 ; spi_slave:spi_slave_rx_inst|rdata[34] ; tx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -1.035 ; 1.439 ; +; 1.526 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.544 ; 3.009 ; +; 1.532 ; spi_slave:spi_slave_rx_inst|rdata[32] ; rx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.970 ; 1.489 ; +; 1.541 ; spi_slave:spi_slave_rx_inst|rdata[36] ; rx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.970 ; 1.480 ; +; 1.553 ; spi_slave:spi_slave_rx_inst|rdata[33] ; rx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.970 ; 1.468 ; +; 1.574 ; spi_slave:spi_slave_rx_inst|rdata[35] ; tx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -1.035 ; 1.382 ; +; 1.596 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.544 ; 2.939 ; +; 1.619 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.566 ; 2.938 ; +; 1.639 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.369 ; 2.472 ; +; 1.644 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.889 ; +; 1.644 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.889 ; +; 1.656 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 2.451 ; +; 1.663 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.536 ; 2.864 ; +; 1.703 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.058 ; 2.097 ; +; 1.743 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.231 ; 2.479 ; +; 1.777 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.058 ; 2.023 ; +; 1.783 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.233 ; 2.441 ; +; 1.788 ; spi_slave:spi_slave_rx_inst|rdata[35] ; rx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.970 ; 1.233 ; +; 1.827 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.544 ; 2.708 ; +; 1.831 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.536 ; 2.696 ; +; 1.854 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.233 ; 2.370 ; +; 1.870 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.663 ; +; 1.900 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.385 ; 2.227 ; +; 1.904 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.532 ; 2.619 ; +; 1.914 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.558 ; 2.635 ; +; 1.933 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 2.618 ; +; 1.952 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.387 ; 2.177 ; +; 1.956 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 2.595 ; +; 1.959 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.540 ; 2.572 ; +; 1.963 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.523 ; 2.551 ; +; 1.968 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 2.139 ; +; 1.977 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.227 ; 2.241 ; +; 1.979 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.540 ; 2.552 ; +; 1.989 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.387 ; 2.140 ; +; 1.991 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.383 ; 2.134 ; +; 1.991 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.369 ; 2.120 ; +; 1.993 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.056 ; 1.805 ; +; 1.993 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.368 ; 2.117 ; +; 1.993 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.387 ; 2.136 ; +; 2.023 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 2.084 ; +; 2.024 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.387 ; 2.105 ; +; 2.029 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.058 ; 1.771 ; +; 2.053 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.372 ; 2.061 ; +; 2.061 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.056 ; 1.737 ; +; 2.065 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.056 ; 1.733 ; +; 2.067 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.056 ; 1.731 ; +; 2.068 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.216 ; 2.139 ; +; 2.077 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.056 ; 1.721 ; +; 2.084 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.532 ; 2.439 ; +; 2.086 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.058 ; 1.714 ; +; 2.092 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.441 ; +; 2.097 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 2.454 ; +; 2.109 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.058 ; 1.691 ; +; 2.141 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.532 ; 2.382 ; +; 2.145 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.540 ; 2.386 ; +; 2.156 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.542 ; 2.377 ; +; 2.189 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.540 ; 2.342 ; +; 2.204 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.560 ; 2.347 ; +; 2.205 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.540 ; 2.326 ; +; 2.230 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.563 ; 2.324 ; +; 2.286 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.390 ; 1.846 ; +; 2.317 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.368 ; 1.793 ; +; 2.326 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.781 ; +; 2.335 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.367 ; 1.774 ; +; 2.337 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.390 ; 1.795 ; +; 2.340 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.767 ; +; 2.341 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.367 ; 1.768 ; +; 2.346 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.761 ; +; 2.347 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.367 ; 1.762 ; +; 2.348 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.390 ; 1.784 ; +; 2.350 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.368 ; 1.760 ; +; 2.351 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.756 ; +; 2.352 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.369 ; 1.759 ; +; 2.352 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.755 ; +; 2.355 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.368 ; 1.755 ; +; 2.357 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.368 ; 1.753 ; +; 2.361 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.367 ; 1.748 ; +; 2.364 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.743 ; +; 2.367 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.368 ; 1.743 ; +; 2.367 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.367 ; 1.742 ; +; 2.368 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.739 ; +; 2.371 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.736 ; +; 2.373 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.734 ; +; 2.374 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.733 ; +; 2.380 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.365 ; 1.727 ; +; 2.381 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.367 ; 1.728 ; +; 2.385 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.368 ; 1.725 ; +; 2.386 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.390 ; 1.746 ; +; 2.387 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.369 ; 1.724 ; +; 2.389 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.369 ; 1.722 ; +; 2.395 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.390 ; 1.737 ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ @@ -857,141 +857,141 @@ No paths to report. +-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -; 1.614 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.523 ; 7.174 ; -; 2.007 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.512 ; 6.770 ; -; 2.100 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.586 ; 6.762 ; -; 2.196 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.728 ; 6.996 ; -; 2.215 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.583 ; 6.641 ; -; 2.258 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.529 ; 6.729 ; -; 2.310 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.715 ; 6.874 ; -; 2.303 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.584 ; 6.556 ; -; 2.330 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.583 ; 6.526 ; -; 1.830 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.583 ; 7.018 ; -; 2.368 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.730 ; 6.832 ; -; 2.446 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.731 ; 6.755 ; -; 2.543 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.526 ; 6.434 ; -; 6.205 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.523 ; 7.583 ; -; 6.438 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.512 ; 7.339 ; -; 6.660 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.586 ; 7.202 ; -; 6.865 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.584 ; 6.994 ; -; 6.884 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.728 ; 7.308 ; -; 6.889 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.715 ; 7.295 ; -; 6.935 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.529 ; 7.052 ; -; 6.975 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.526 ; 7.002 ; -; 6.999 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.583 ; 6.857 ; -; 7.190 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.583 ; 6.666 ; -; 6.427 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.583 ; 7.421 ; -; 7.454 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.730 ; 6.746 ; -; 7.500 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.731 ; 6.701 ; +; 1.418 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.476 ; 7.507 ; +; 1.425 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.488 ; 7.521 ; +; 1.438 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.477 ; 7.304 ; +; 1.455 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.498 ; 7.307 ; +; 1.481 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.499 ; 7.467 ; +; 1.496 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.489 ; 7.452 ; +; 1.513 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.489 ; 7.435 ; +; 1.604 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.490 ; 7.342 ; +; 1.657 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.501 ; 7.295 ; +; 1.695 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.490 ; 7.066 ; +; 1.800 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.490 ; 7.148 ; +; 1.847 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.498 ; 7.101 ; +; 1.868 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.464 ; 7.046 ; +; 6.007 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.476 ; 7.918 ; +; 6.063 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.477 ; 7.679 ; +; 6.068 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.498 ; 7.694 ; +; 6.211 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.489 ; 7.737 ; +; 6.229 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.501 ; 7.723 ; +; 6.216 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.488 ; 7.730 ; +; 6.320 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.489 ; 7.628 ; +; 6.203 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.499 ; 7.745 ; +; 6.273 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.490 ; 7.673 ; +; 6.563 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.498 ; 7.385 ; +; 6.645 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.490 ; 7.116 ; +; 6.666 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.490 ; 7.282 ; +; 6.946 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.464 ; 6.968 ; +-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -+-----------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Setup: 'clk_10mhz' ; -+--------+-----------------+----------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+--------+-----------------+----------------------------------+--------------+-------------+--------------+------------+------------+ -; 91.911 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.626 ; 7.464 ; -; 92.009 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.375 ; -; 92.009 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.375 ; -; 92.009 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.375 ; -; 92.009 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.375 ; -; 92.009 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.375 ; -; 92.009 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.375 ; -; 92.009 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.375 ; -; 92.224 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.637 ; 7.140 ; -; 92.285 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.626 ; 7.090 ; -; 92.322 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 7.051 ; -; 92.322 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 7.051 ; -; 92.322 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 7.051 ; -; 92.322 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 7.051 ; -; 92.322 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 7.051 ; -; 92.322 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 7.051 ; -; 92.322 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 7.051 ; -; 92.343 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 7.028 ; -; 92.343 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 7.028 ; -; 92.343 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 7.028 ; -; 92.343 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 7.028 ; -; 92.343 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 7.028 ; -; 92.343 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 7.028 ; -; 92.343 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 7.028 ; -; 92.343 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 7.028 ; -; 92.383 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.001 ; -; 92.383 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.001 ; -; 92.383 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.001 ; -; 92.383 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.001 ; -; 92.383 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.001 ; -; 92.383 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.001 ; -; 92.383 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.617 ; 7.001 ; -; 92.491 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.637 ; 6.873 ; -; 92.510 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.637 ; 6.854 ; -; 92.589 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.784 ; -; 92.589 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.784 ; -; 92.589 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.784 ; -; 92.589 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.784 ; -; 92.589 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.784 ; -; 92.589 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.784 ; -; 92.589 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.784 ; -; 92.608 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.765 ; -; 92.608 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.765 ; -; 92.608 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.765 ; -; 92.608 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.765 ; -; 92.608 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.765 ; -; 92.608 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.765 ; -; 92.608 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.765 ; -; 92.622 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.637 ; 6.742 ; -; 92.656 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.704 ; -; 92.656 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.704 ; -; 92.656 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.704 ; -; 92.656 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.704 ; -; 92.656 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.704 ; -; 92.656 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.704 ; -; 92.656 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.704 ; -; 92.656 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.704 ; -; 92.717 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 6.654 ; -; 92.717 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 6.654 ; -; 92.717 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 6.654 ; -; 92.717 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 6.654 ; -; 92.717 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 6.654 ; -; 92.717 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 6.654 ; -; 92.717 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 6.654 ; -; 92.717 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.630 ; 6.654 ; -; 92.720 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.653 ; -; 92.720 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.653 ; -; 92.720 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.653 ; -; 92.720 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.653 ; -; 92.720 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.653 ; -; 92.720 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.653 ; -; 92.720 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.653 ; -; 92.786 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.637 ; 6.578 ; -; 92.806 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.637 ; 6.558 ; -; 92.884 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.489 ; -; 92.884 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.489 ; -; 92.884 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.489 ; -; 92.884 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.489 ; -; 92.884 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.489 ; -; 92.884 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.489 ; -; 92.884 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.489 ; -; 92.904 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.469 ; -; 92.904 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.469 ; -; 92.904 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.469 ; -; 92.904 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.469 ; -; 92.904 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.469 ; -; 92.904 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.469 ; -; 92.904 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.628 ; 6.469 ; -; 92.913 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.120 ; 6.968 ; -; 92.923 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.437 ; -; 92.923 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.437 ; -; 92.923 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.437 ; -; 92.923 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.437 ; -; 92.923 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.437 ; -; 92.923 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.437 ; -; 92.923 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.437 ; -; 92.923 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.437 ; -; 92.942 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.418 ; -; 92.942 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.418 ; -; 92.942 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.641 ; 6.418 ; -+--------+-----------------+----------------------------------+--------------+-------------+--------------+------------+------------+ ++-------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Setup: 'clk_10mhz' ; ++--------+-------------------------------+----------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++--------+-------------------------------+----------------------------------+--------------+-------------+--------------+------------+------------+ +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.640 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.817 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.901 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.465 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.921 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.445 ; +; 92.939 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.543 ; 6.519 ; +; 92.939 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.543 ; 6.519 ; +; 92.939 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.543 ; 6.519 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 92.996 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.544 ; 6.461 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.027 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.339 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.047 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.635 ; 6.319 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.109 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.079 ; 6.813 ; +; 93.114 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.685 ; 6.202 ; +; 93.114 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.685 ; 6.202 ; +; 93.114 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.685 ; 6.202 ; +; 93.114 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.685 ; 6.202 ; +; 93.114 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.685 ; 6.202 ; +; 93.114 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.685 ; 6.202 ; ++--------+-------------------------------+----------------------------------+--------------+-------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -999,43 +999,54 @@ No paths to report. +----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[25] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[24] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[22] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[21] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[18] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[17] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[16] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[15] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[14] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[13] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[12] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.125 ; 3.476 ; -; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; +; 2494.853 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.124 ; 5.044 ; +; 2494.854 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.124 ; 5.043 ; +; 2494.982 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.124 ; 4.915 ; +; 2494.983 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.124 ; 4.914 ; +; 2495.324 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.124 ; 4.573 ; +; 2495.354 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 4.602 ; +; 2495.355 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 4.601 ; +; 2495.453 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.124 ; 4.444 ; +; 2495.825 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 4.131 ; +; 2495.919 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.423 ; 3.679 ; +; 2495.920 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.423 ; 3.678 ; +; 2496.313 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.257 ; 3.965 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.327 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.133 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[24] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[25] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[22] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[21] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[18] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[17] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[16] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[15] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[14] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[13] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; +; 2496.334 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[12] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.126 ; 3.476 ; ; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[11] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; ; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[10] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; ; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[9] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; @@ -1045,60 +1056,49 @@ No paths to report. ; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[5] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; ; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[4] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; ; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[3] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; +; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; ; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; ; 2496.337 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[0] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.123 ; 3.476 ; -; 2496.358 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.018 ; 3.681 ; -; 2496.414 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.018 ; 3.625 ; -; 2496.648 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.374 ; 2.999 ; -; 2496.829 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.240 ; 2.999 ; -; 2496.853 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 3.054 ; -; 2496.858 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.374 ; 2.789 ; -; 2496.896 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.184 ; 2.988 ; -; 2496.909 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.998 ; -; 2496.942 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.156 ; 3.235 ; -; 2496.998 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.156 ; 3.179 ; -; 2497.009 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.018 ; 3.030 ; -; 2497.039 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.240 ; 2.789 ; -; 2497.041 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.018 ; 2.998 ; -; 2497.085 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.062 ; 2.998 ; -; 2497.106 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.184 ; 2.778 ; -; 2497.141 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.062 ; 2.942 ; -; 2497.154 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.108 ; 2.806 ; -; 2497.249 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.658 ; -; 2497.254 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.052 ; 2.762 ; -; 2497.273 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.176 ; 2.619 ; -; 2497.302 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.605 ; -; 2497.483 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.176 ; 2.409 ; -; 2497.504 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.403 ; -; 2497.536 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.371 ; -; 2497.582 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.325 ; -; 2497.592 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.156 ; 2.585 ; -; 2497.625 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.156 ; 2.552 ; -; 2497.633 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.176 ; 2.259 ; -; 2497.635 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.272 ; -; 2497.671 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.058 ; 2.292 ; -; 2497.685 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.044 ; 2.339 ; -; 2497.703 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.018 ; 2.336 ; -; 2497.736 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.062 ; 2.347 ; -; 2497.768 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.062 ; 2.315 ; -; 2497.825 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.342 ; 1.854 ; -; 2497.836 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.018 ; 2.203 ; -; 2497.837 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.240 ; 1.991 ; -; 2497.839 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.068 ; -; 2497.840 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.283 ; 1.898 ; -; 2497.848 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.059 ; -; 2497.874 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.033 ; -; 2497.892 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.015 ; -; 2497.901 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.006 ; -; 2497.903 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 2.004 ; -; 2497.905 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.184 ; 1.979 ; -; 2497.908 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.114 ; 1.999 ; -; 2497.948 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.184 ; 1.936 ; -; 2497.952 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.176 ; 1.940 ; -; 2497.955 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.212 ; 2.278 ; -; 2497.993 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.074 ; 2.102 ; -; 2498.003 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.342 ; 1.676 ; -; 2498.056 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.374 ; 1.591 ; +; 2496.390 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.423 ; 3.208 ; +; 2496.408 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 3.137 ; +; 2496.409 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 3.136 ; +; 2496.442 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.257 ; 3.836 ; +; 2496.445 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 3.100 ; +; 2496.447 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 3.098 ; +; 2496.669 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.433 ; 2.919 ; +; 2496.703 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.257 ; 3.575 ; +; 2496.714 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 2.831 ; +; 2496.715 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 2.830 ; +; 2496.814 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.316 ; 3.523 ; +; 2496.832 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.257 ; 3.446 ; +; 2496.863 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.433 ; 2.725 ; +; 2496.879 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 2.666 ; +; 2496.900 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 2.645 ; +; 2496.902 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 2.643 ; +; 2496.907 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.257 ; 3.371 ; +; 2496.917 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.480 ; 3.631 ; +; 2496.955 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.257 ; 3.323 ; +; 2497.036 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.257 ; 3.242 ; +; 2497.084 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.257 ; 3.194 ; +; 2497.185 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 2.360 ; +; 2497.204 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.316 ; 3.133 ; +; 2497.241 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.261 ; 3.088 ; +; 2497.283 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.534 ; 2.204 ; +; 2497.366 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.433 ; 2.222 ; +; 2497.379 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.042 ; 2.600 ; +; 2497.382 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 2.163 ; +; 2497.391 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.476 ; 2.154 ; +; 2497.394 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.561 ; 2.066 ; +; 2497.399 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.333 ; 3.002 ; +; 2497.408 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.316 ; 2.929 ; +; 2497.456 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.316 ; 2.881 ; +; 2497.522 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.128 ; 2.674 ; +; 2497.562 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.534 ; 1.925 ; +; 2497.581 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.091 ; 2.396 ; +; 2497.649 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.019 ; 2.400 ; +; 2497.695 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.392 ; 2.765 ; +; 2497.722 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.433 ; 1.866 ; +; 2497.742 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.042 ; 2.237 ; +----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ @@ -1107,322 +1107,322 @@ No paths to report. +----------+-------------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +----------+-------------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; 2599.539 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 4.399 ; -; 2599.539 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 4.399 ; -; 2599.539 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 4.399 ; -; 2599.539 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 4.399 ; -; 2599.539 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 4.399 ; -; 2599.539 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 4.399 ; -; 2599.539 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 4.399 ; -; 2599.539 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 4.399 ; -; 2599.539 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 4.399 ; -; 2600.172 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.214 ; 3.781 ; -; 2600.172 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.214 ; 3.781 ; -; 2600.172 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.214 ; 3.781 ; -; 2600.172 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.214 ; 3.781 ; -; 2600.172 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.214 ; 3.781 ; -; 2600.172 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.214 ; 3.781 ; -; 2600.172 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.214 ; 3.781 ; -; 2600.172 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.214 ; 3.781 ; -; 2600.172 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.214 ; 3.781 ; -; 2602.201 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 1.737 ; -; 2602.847 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 1.091 ; -; 2602.847 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.229 ; 1.091 ; -; 5201.840 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.414 ; -; 5201.840 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.414 ; -; 5201.840 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.414 ; -; 5201.840 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.414 ; -; 5201.882 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.372 ; -; 5201.882 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.372 ; -; 5201.882 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.372 ; -; 5201.882 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.372 ; -; 5201.882 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.372 ; -; 5201.882 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.372 ; -; 5202.181 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.073 ; -; 5202.181 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.073 ; -; 5202.181 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.073 ; -; 5202.181 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.073 ; -; 5202.223 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.031 ; -; 5202.223 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.031 ; -; 5202.223 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.031 ; -; 5202.223 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.031 ; -; 5202.223 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.031 ; -; 5202.223 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.031 ; -; 5202.372 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.882 ; -; 5202.372 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.882 ; -; 5202.372 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.882 ; -; 5202.372 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.882 ; -; 5202.401 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.853 ; -; 5202.401 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.853 ; -; 5202.401 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.853 ; -; 5202.401 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.853 ; -; 5202.414 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.840 ; -; 5202.414 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.840 ; -; 5202.414 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.840 ; -; 5202.414 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.840 ; -; 5202.414 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.840 ; -; 5202.414 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.840 ; -; 5202.424 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.830 ; -; 5202.424 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.830 ; -; 5202.424 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.830 ; -; 5202.424 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.830 ; -; 5202.443 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.811 ; -; 5202.443 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.811 ; -; 5202.443 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.811 ; -; 5202.443 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.811 ; -; 5202.443 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.811 ; -; 5202.443 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.811 ; -; 5202.466 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.788 ; -; 5202.466 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.788 ; -; 5202.466 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.788 ; -; 5202.466 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.788 ; -; 5202.466 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.788 ; -; 5202.466 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.788 ; -; 5202.479 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.775 ; -; 5202.479 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.775 ; -; 5202.479 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.775 ; -; 5202.479 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.775 ; -; 5202.521 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.733 ; -; 5202.521 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.733 ; -; 5202.521 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.733 ; -; 5202.521 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.733 ; -; 5202.521 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.733 ; -; 5202.521 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.733 ; -; 5202.667 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.587 ; -; 5202.667 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.587 ; -; 5202.667 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.587 ; -; 5202.667 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.587 ; -; 5202.709 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.545 ; -; 5202.709 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.545 ; -; 5202.709 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.545 ; -; 5202.709 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.545 ; -; 5202.709 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.545 ; -; 5202.709 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.545 ; -; 5202.733 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.521 ; -; 5202.733 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.521 ; -; 5202.733 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.521 ; -; 5202.733 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.521 ; -; 5202.775 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.479 ; -; 5202.775 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.479 ; -; 5202.775 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.479 ; -; 5202.775 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.479 ; -; 5202.775 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.479 ; +; 2598.989 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.963 ; +; 2598.989 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.963 ; +; 2598.989 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.963 ; +; 2598.989 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.963 ; +; 2598.989 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.963 ; +; 2598.989 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.963 ; +; 2598.989 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.963 ; +; 2598.989 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.963 ; +; 2598.989 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.963 ; +; 2599.496 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.456 ; +; 2599.496 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.456 ; +; 2599.496 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.456 ; +; 2599.496 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.456 ; +; 2599.496 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.456 ; +; 2599.496 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.456 ; +; 2599.496 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.456 ; +; 2599.496 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.456 ; +; 2599.496 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 4.456 ; +; 2601.773 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 2.179 ; +; 2601.773 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 2.179 ; +; 2601.863 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.215 ; 2.089 ; +; 5200.664 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.589 ; +; 5200.664 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.589 ; +; 5200.664 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.589 ; +; 5200.664 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.589 ; +; 5200.880 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.373 ; +; 5200.880 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.373 ; +; 5200.880 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.373 ; +; 5200.880 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.373 ; +; 5200.880 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.373 ; +; 5200.880 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.373 ; +; 5200.970 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.283 ; +; 5200.970 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.283 ; +; 5200.970 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.283 ; +; 5200.970 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.283 ; +; 5201.134 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.119 ; +; 5201.134 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.119 ; +; 5201.134 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.119 ; +; 5201.134 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.119 ; +; 5201.186 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.067 ; +; 5201.186 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.067 ; +; 5201.186 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.067 ; +; 5201.186 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.067 ; +; 5201.186 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.067 ; +; 5201.186 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 7.067 ; +; 5201.210 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 7.044 ; +; 5201.210 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 7.044 ; +; 5201.210 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 7.044 ; +; 5201.210 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 7.044 ; +; 5201.350 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 6.903 ; +; 5201.350 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 6.903 ; +; 5201.350 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 6.903 ; +; 5201.350 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 6.903 ; +; 5201.350 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 6.903 ; +; 5201.350 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.081 ; 6.903 ; +; 5201.426 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.828 ; +; 5201.426 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.828 ; +; 5201.426 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.828 ; +; 5201.426 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.828 ; +; 5201.426 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.828 ; +; 5201.426 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.828 ; +; 5201.741 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.095 ; 6.498 ; +; 5201.877 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.377 ; +; 5201.877 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.377 ; +; 5201.877 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.377 ; +; 5201.877 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.377 ; +; 5201.944 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.310 ; +; 5201.944 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.310 ; +; 5201.944 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.310 ; +; 5201.944 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.310 ; +; 5201.957 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.297 ; +; 5201.957 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.297 ; +; 5201.957 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.297 ; +; 5201.957 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.297 ; +; 5202.047 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.095 ; 6.192 ; +; 5202.093 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.161 ; +; 5202.093 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.161 ; +; 5202.093 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.161 ; +; 5202.093 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.161 ; +; 5202.093 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.161 ; +; 5202.093 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.161 ; +; 5202.128 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.126 ; +; 5202.128 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.126 ; +; 5202.128 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.126 ; +; 5202.128 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.126 ; +; 5202.160 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.094 ; +; 5202.160 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.094 ; +; 5202.160 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.094 ; +; 5202.160 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.094 ; +; 5202.160 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.094 ; +; 5202.160 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.094 ; +; 5202.173 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.081 ; +; 5202.173 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.081 ; +; 5202.173 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.081 ; +; 5202.173 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.081 ; +; 5202.173 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.081 ; +; 5202.173 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 6.081 ; +; 5202.211 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.095 ; 6.028 ; +; 5202.280 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.974 ; +; 5202.280 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.080 ; 5.974 ; +----------+-------------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' ; -+-----------+------------------------------+------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-----------+------------------------------+------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; 33325.980 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 7.275 ; -; 33325.980 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 7.275 ; -; 33325.980 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 7.275 ; -; 33325.980 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 7.275 ; -; 33325.980 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 7.275 ; -; 33325.980 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 7.275 ; -; 33325.980 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 7.275 ; -; 33325.980 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 7.275 ; -; 33325.980 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 7.275 ; -; 33325.981 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.273 ; -; 33325.981 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.273 ; -; 33325.981 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.273 ; -; 33325.981 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.273 ; -; 33325.981 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.273 ; -; 33325.981 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.273 ; -; 33325.981 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.273 ; -; 33325.981 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.273 ; -; 33325.981 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.273 ; -; 33326.172 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.082 ; -; 33326.172 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.082 ; -; 33326.172 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.082 ; -; 33326.172 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.082 ; -; 33326.172 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.082 ; -; 33326.172 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.082 ; -; 33326.172 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.082 ; -; 33326.172 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.082 ; -; 33326.172 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.082 ; -; 33326.173 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.080 ; -; 33326.173 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.080 ; -; 33326.173 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.080 ; -; 33326.173 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.080 ; -; 33326.173 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.080 ; -; 33326.173 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.080 ; -; 33326.173 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.080 ; -; 33326.173 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.080 ; -; 33326.173 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.080 ; -; 33326.281 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.973 ; -; 33326.281 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.973 ; -; 33326.281 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.973 ; -; 33326.281 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.973 ; -; 33326.281 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.973 ; -; 33326.281 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.973 ; -; 33326.281 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.973 ; -; 33326.281 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.973 ; -; 33326.281 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.973 ; -; 33326.282 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.971 ; -; 33326.282 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.971 ; -; 33326.282 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.971 ; -; 33326.282 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.971 ; -; 33326.282 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.971 ; -; 33326.282 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.971 ; -; 33326.282 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.971 ; -; 33326.282 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.971 ; -; 33326.282 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.971 ; -; 33326.340 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|keyer_out ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.077 ; 6.917 ; -; 33326.431 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.824 ; -; 33326.431 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.824 ; -; 33326.431 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.824 ; -; 33326.431 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.824 ; -; 33326.431 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.824 ; -; 33326.431 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.824 ; -; 33326.431 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.824 ; -; 33326.431 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.824 ; -; 33326.431 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.824 ; -; 33326.432 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.822 ; -; 33326.432 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.822 ; -; 33326.432 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.822 ; -; 33326.432 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.822 ; -; 33326.432 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.822 ; -; 33326.432 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.822 ; -; 33326.432 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.822 ; -; 33326.432 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.822 ; -; 33326.432 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.822 ; -; 33326.454 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.801 ; -; 33326.454 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.801 ; -; 33326.454 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.801 ; -; 33326.454 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.801 ; -; 33326.454 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.801 ; -; 33326.454 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.801 ; -; 33326.454 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.801 ; -; 33326.454 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.801 ; -; 33326.454 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.801 ; -; 33326.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.799 ; -; 33326.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.799 ; -; 33326.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.799 ; -; 33326.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.799 ; -; 33326.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.799 ; -; 33326.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.799 ; -; 33326.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.799 ; -; 33326.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.799 ; -; 33326.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.799 ; -; 33326.494 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|keyer_out ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.078 ; 6.762 ; -; 33326.574 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.680 ; -; 33326.574 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.680 ; -; 33326.574 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.680 ; -; 33326.574 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.680 ; -; 33326.574 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.680 ; -; 33326.574 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.680 ; -; 33326.574 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.680 ; -; 33326.574 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.680 ; -+-----------+------------------------------+------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' ; ++-----------+------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-----------+------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; 33325.302 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.951 ; +; 33325.302 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.951 ; +; 33325.302 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.951 ; +; 33325.302 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.951 ; +; 33325.302 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.951 ; +; 33325.302 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.951 ; +; 33325.302 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.951 ; +; 33325.302 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.951 ; +; 33325.302 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.951 ; +; 33325.345 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.909 ; +; 33325.345 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.909 ; +; 33325.345 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.909 ; +; 33325.345 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.909 ; +; 33325.345 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.909 ; +; 33325.345 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.909 ; +; 33325.345 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.909 ; +; 33325.345 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.909 ; +; 33325.345 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.909 ; +; 33325.700 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.553 ; +; 33325.700 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.553 ; +; 33325.700 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.553 ; +; 33325.700 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.553 ; +; 33325.700 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.553 ; +; 33325.700 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.553 ; +; 33325.700 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.553 ; +; 33325.700 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.553 ; +; 33325.700 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.553 ; +; 33325.743 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.511 ; +; 33325.743 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.511 ; +; 33325.743 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.511 ; +; 33325.743 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.511 ; +; 33325.743 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.511 ; +; 33325.743 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.511 ; +; 33325.743 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.511 ; +; 33325.743 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.511 ; +; 33325.743 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.511 ; +; 33325.773 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.480 ; +; 33325.773 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.480 ; +; 33325.773 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.480 ; +; 33325.773 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.480 ; +; 33325.773 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.480 ; +; 33325.773 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.480 ; +; 33325.773 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.480 ; +; 33325.773 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.480 ; +; 33325.773 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.480 ; +; 33325.816 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.438 ; +; 33325.816 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.438 ; +; 33325.816 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.438 ; +; 33325.816 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.438 ; +; 33325.816 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.438 ; +; 33325.816 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.438 ; +; 33325.816 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.438 ; +; 33325.816 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.438 ; +; 33325.816 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.438 ; +; 33326.053 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.200 ; +; 33326.053 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.200 ; +; 33326.053 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.200 ; +; 33326.053 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.200 ; +; 33326.053 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.200 ; +; 33326.053 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.200 ; +; 33326.053 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.200 ; +; 33326.053 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.200 ; +; 33326.053 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 7.200 ; +; 33326.096 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.158 ; +; 33326.096 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.158 ; +; 33326.096 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.158 ; +; 33326.096 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.158 ; +; 33326.096 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.158 ; +; 33326.096 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.158 ; +; 33326.096 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.158 ; +; 33326.096 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.158 ; +; 33326.096 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 7.158 ; +; 33326.322 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.932 ; +; 33326.322 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.932 ; +; 33326.322 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.932 ; +; 33326.322 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.932 ; +; 33326.322 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.932 ; +; 33326.322 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.932 ; +; 33326.322 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.932 ; +; 33326.322 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.932 ; +; 33326.322 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.080 ; 6.932 ; +; 33326.327 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.926 ; +; 33326.327 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.926 ; +; 33326.327 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.926 ; +; 33326.327 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.926 ; +; 33326.327 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.926 ; +; 33326.327 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.926 ; +; 33326.327 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.926 ; +; 33326.327 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.926 ; +; 33326.327 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.081 ; 6.926 ; +; 33326.365 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.890 ; +; 33326.365 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.890 ; +; 33326.365 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.890 ; +; 33326.365 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.890 ; +; 33326.365 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.890 ; +; 33326.365 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.890 ; +; 33326.365 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.890 ; +; 33326.365 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.890 ; +; 33326.365 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.079 ; 6.890 ; +; 33326.365 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|key_state.PREDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.083 ; 6.886 ; ++-----------+------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Hold: 'spi_ce0' ; +; Slow 1200mV 85C Model Hold: 'spi_ce1' ; +-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.258 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.703 ; 1.215 ; -; 0.459 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.126 ; 0.797 ; -; 0.464 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.126 ; 0.802 ; -; 0.475 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.059 ; 0.746 ; -; 0.475 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.059 ; 0.746 ; -; 0.475 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.059 ; 0.746 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; -; 0.477 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 0.746 ; -; 0.479 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 0.746 ; -; 0.480 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.128 ; 0.820 ; -; 0.480 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.128 ; 0.820 ; -; 0.480 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.128 ; 0.820 ; -; 0.481 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[5] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.128 ; 0.821 ; -; 0.481 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.053 ; 0.746 ; -; 0.481 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.053 ; 0.746 ; -; 0.481 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.053 ; 0.746 ; -; 0.481 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.053 ; 0.746 ; -; 0.481 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.053 ; 0.746 ; -; 0.502 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.103 ; 0.817 ; -; 0.509 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 0.778 ; -; 0.511 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 0.778 ; -; 0.520 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.103 ; 0.835 ; -; 0.531 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.801 ; -; 0.533 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.803 ; -; 0.536 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 0.803 ; -; 0.541 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 0.810 ; -; 0.548 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.818 ; -; 0.564 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.010 ; 0.786 ; -; 0.564 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.801 ; -; 0.579 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.010 ; 0.801 ; -; 0.596 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.820 ; -; 0.598 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.010 ; 0.820 ; -; 0.631 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.540 ; 1.383 ; -; 0.634 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.669 ; 1.557 ; -; 0.634 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.540 ; 1.386 ; -; 0.641 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.657 ; 1.552 ; -; 0.643 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.386 ; 1.283 ; -; 0.644 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.103 ; 0.959 ; -; 0.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 0.918 ; -; 0.650 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.340 ; 1.244 ; -; 0.653 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.592 ; 1.499 ; -; 0.657 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.592 ; 1.503 ; -; 0.679 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.126 ; 1.017 ; -; 0.686 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.632 ; 1.572 ; -; 0.689 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.592 ; 1.535 ; -; 0.689 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.481 ; 1.382 ; -; 0.690 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.481 ; 1.383 ; -; 0.693 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.481 ; 1.386 ; -; 0.696 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 0.965 ; -; 0.698 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.629 ; 1.581 ; -; 0.700 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 0.969 ; -; 0.702 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.270 ; 1.226 ; -; 0.703 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.270 ; 1.227 ; -; 0.704 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.010 ; 0.926 ; -; 0.711 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.340 ; 1.305 ; -; 0.718 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.270 ; 1.242 ; -; 0.722 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.633 ; 1.609 ; -; 0.722 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.340 ; 1.316 ; -; 0.724 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.948 ; -; 0.730 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.103 ; 1.045 ; -; 0.735 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.629 ; 1.618 ; -; 0.738 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.628 ; 1.620 ; -; 0.746 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.270 ; 1.270 ; -; 0.764 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 1.033 ; -; 0.764 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 1.002 ; -; 0.769 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.340 ; 1.363 ; -; 0.779 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.010 ; 1.001 ; -; 0.779 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 1.017 ; -; 0.798 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 1.022 ; -; 0.799 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 1.069 ; -; 0.801 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 1.071 ; -; 0.807 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 1.077 ; -; 0.807 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.053 ; 1.072 ; -; 0.812 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.053 ; 1.077 ; -; 0.813 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 1.083 ; -; 0.817 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 1.087 ; -; 0.817 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 1.084 ; -; 0.818 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.386 ; 1.458 ; -; 0.828 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.703 ; 1.785 ; -; 0.836 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.010 ; 1.058 ; -; 0.836 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 1.060 ; -; 0.838 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.053 ; 1.103 ; -; 0.847 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 1.117 ; -; 0.854 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.352 ; 1.460 ; -; 0.858 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.443 ; 1.513 ; -; 0.861 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.059 ; 1.132 ; -; 0.867 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.126 ; 1.205 ; -; 0.867 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.352 ; 1.473 ; -; 0.879 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.669 ; 1.802 ; +; 0.370 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.622 ; 1.246 ; +; 0.468 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 0.804 ; +; 0.468 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 0.804 ; +; 0.475 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 0.746 ; +; 0.475 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 0.746 ; +; 0.475 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 0.746 ; +; 0.475 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 0.746 ; +; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.746 ; +; 0.477 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.057 ; 0.746 ; +; 0.478 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.056 ; 0.746 ; +; 0.508 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.778 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.776 ; 1.556 ; +; 0.539 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.776 ; 1.569 ; +; 0.626 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 0.962 ; +; 0.649 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.919 ; +; 0.687 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.957 ; +; 0.688 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 1.024 ; +; 0.690 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.960 ; +; 0.733 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 1.069 ; +; 0.753 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.547 ; 1.554 ; +; 0.764 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.034 ; +; 0.784 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.008 ; 1.004 ; +; 0.787 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 1.058 ; +; 0.789 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.059 ; +; 0.796 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.547 ; 1.597 ; +; 0.803 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.776 ; 1.833 ; +; 0.805 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.056 ; 1.073 ; +; 0.812 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.056 ; 1.080 ; +; 0.853 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 1.189 ; +; 0.871 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 1.142 ; +; 0.909 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.381 ; 1.544 ; +; 0.924 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.008 ; 1.144 ; +; 0.925 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 1.196 ; +; 0.963 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.622 ; 1.839 ; +; 0.975 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.278 ; 1.507 ; +; 1.015 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.156 ; 1.383 ; +; 1.017 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.156 ; 1.385 ; +; 1.068 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.203 ; 1.525 ; +; 1.083 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.776 ; 2.113 ; +; 1.093 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.227 ; 1.574 ; +; 1.103 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.547 ; 1.904 ; +; 1.133 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 1.469 ; +; 1.133 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.447 ; 1.792 ; +; 1.182 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.432 ; 1.868 ; +; 1.240 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 1.511 ; +; 1.243 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 1.514 ; +; 1.283 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.622 ; 2.159 ; +; 1.336 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.031 ; 1.579 ; +; 1.345 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.227 ; 1.826 ; +; 1.359 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.196 ; 1.375 ; +; 1.383 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.547 ; 2.184 ; +; 1.436 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.152 ; 1.842 ; +; 1.443 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.227 ; 1.924 ; +; 1.472 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.313 ; 1.371 ; +; 1.474 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.390 ; 2.076 ; +; 1.495 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.152 ; 1.901 ; +; 1.521 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.152 ; 1.927 ; +; 1.563 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.622 ; 2.439 ; +; 1.565 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.059 ; 1.836 ; +; 1.566 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.381 ; 2.201 ; +; 1.567 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.390 ; 2.169 ; +; 1.627 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.381 ; 2.262 ; +; 1.694 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.257 ; 1.649 ; +; 1.737 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.257 ; 1.692 ; +; 1.746 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.227 ; 2.227 ; +; 1.750 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.156 ; 2.118 ; +; 1.798 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.381 ; 2.433 ; +; 1.822 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.152 ; 2.228 ; +; 1.912 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.342 ; 1.782 ; +; 1.952 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.490 ; 2.654 ; +; 2.011 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.156 ; 2.379 ; +; 2.029 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.490 ; 2.731 ; +; 2.039 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.257 ; 1.994 ; +; 2.070 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.565 ; 2.889 ; +; 2.075 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.316 ; 1.971 ; +; 2.099 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.364 ; 1.947 ; +; 2.118 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.316 ; 2.014 ; +; 2.145 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.342 ; 2.015 ; +; 2.170 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.316 ; 2.066 ; +; 2.224 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.490 ; 2.968 ; +; 2.230 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.490 ; 2.932 ; +; 2.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.433 ; 2.980 ; +; 2.360 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.433 ; 3.005 ; +; 2.412 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.433 ; 3.057 ; +; 2.437 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.433 ; 3.082 ; +; 2.495 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.316 ; 2.391 ; +; 2.497 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.719 ; 3.470 ; +; 2.542 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.316 ; 2.438 ; +; 2.543 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.316 ; 2.439 ; +; 2.544 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.490 ; 3.246 ; +; 2.558 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.316 ; 2.454 ; +; 2.559 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.316 ; 2.455 ; +; 2.563 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.257 ; 2.518 ; +; 2.590 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.257 ; 2.545 ; +; 2.613 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.433 ; 3.258 ; +; 2.638 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.433 ; 3.283 ; +; 2.883 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.316 ; 2.779 ; +-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ @@ -1431,215 +1431,323 @@ No paths to report. +-------+------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.344 ; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[12] ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0~porta_datain_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.845 ; 1.443 ; -; 0.410 ; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[9] ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0~porta_datain_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.845 ; 1.509 ; -; 0.443 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][22] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][22] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.371 ; 1.026 ; -; 0.476 ; transmitter:transmitter_inst|FirInterp8_1024:fi|req ; transmitter:transmitter_inst|FirInterp8_1024:fi|req ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; -; 0.477 ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.746 ; -; 0.477 ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.746 ; -; 0.478 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; -; 0.479 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; -; 0.479 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; -; 0.479 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; -; 0.479 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; -; 0.479 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; -; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; +; 0.385 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.548 ; 1.187 ; +; 0.410 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.557 ; 1.221 ; +; 0.475 ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.059 ; 0.746 ; +; 0.475 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.059 ; 0.746 ; +; 0.475 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.059 ; 0.746 ; +; 0.475 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.059 ; 0.746 ; +; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.116 ; 0.804 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.746 ; +; 0.478 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.746 ; +; 0.479 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; +; 0.479 ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; +; 0.479 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; +; 0.479 ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; +; 0.479 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; +; 0.479 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.746 ; +; 0.480 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; +; 0.480 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; ; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; +; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; ; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; ; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; ; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; -; 0.480 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; -; 0.480 ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; -; 0.480 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; -; 0.480 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; -; 0.480 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; -; 0.480 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; -; 0.480 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; -; 0.480 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; -; 0.481 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; -; 0.481 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; -; 0.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; -; 0.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; -; 0.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.480 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; +; 0.480 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; +; 0.480 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; +; 0.480 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.746 ; +; 0.481 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.481 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.481 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.481 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; ; 0.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; -; 0.482 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.746 ; -; 0.482 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.746 ; -; 0.482 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.746 ; -; 0.482 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.746 ; -; 0.482 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.746 ; -; 0.494 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.103 ; 0.809 ; -; 0.510 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[12][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.777 ; -; 0.510 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.777 ; -; 0.512 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.102 ; 0.826 ; -; 0.513 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.103 ; 0.828 ; -; 0.518 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.103 ; 0.833 ; -; 0.523 ; transmitter:transmitter_inst|CicInterpM5:in2|x2[8] ; transmitter:transmitter_inst|CicInterpM5:in2|dx2[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.269 ; 1.004 ; -; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.793 ; -; 0.525 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.793 ; -; 0.525 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.793 ; -; 0.525 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][0] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.793 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.793 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.793 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[9] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.793 ; -; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.793 ; -; 0.526 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[5] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; -; 0.526 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.793 ; -; 0.526 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.793 ; -; 0.526 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[10] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.793 ; -; 0.526 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][0] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[10][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.793 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.794 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.794 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.794 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.794 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.794 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.794 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.794 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.794 ; -; 0.527 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[3] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.795 ; -; 0.527 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[6] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.793 ; +; 0.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.481 ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.481 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.481 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.746 ; +; 0.485 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.106 ; 0.803 ; +; 0.488 ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.542 ; 1.284 ; +; 0.491 ; transmitter:transmitter_inst|counter[0] ; transmitter:transmitter_inst|counter[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.055 ; 0.758 ; +; 0.500 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.116 ; 0.828 ; +; 0.507 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.116 ; 0.835 ; +; 0.507 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.776 ; +; 0.509 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|parity5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.777 ; +; 0.510 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[12][1] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.054 ; 0.776 ; +; 0.510 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.063 ; 0.785 ; +; 0.512 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.502 ; 1.226 ; +; 0.524 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.793 ; +; 0.524 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[9] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.793 ; +; 0.524 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.794 ; +; 0.524 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.794 ; +; 0.524 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.794 ; +; 0.524 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.794 ; +; 0.524 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[9] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.794 ; +; 0.524 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.793 ; +; 0.524 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.063 ; 0.799 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.793 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[9] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.793 ; +; 0.525 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.795 ; +; 0.525 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.058 ; 0.795 ; +; 0.525 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.794 ; +; 0.525 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][0] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.793 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.795 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.795 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.795 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.795 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.057 ; 0.795 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; +; 0.526 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.056 ; 0.794 ; +-------+------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' ; -+-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; 0.454 ; profile:profile_CW|char_PTT ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 0.746 ; -; 0.455 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0001 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; -; 0.455 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; -; 0.455 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0011 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; -; 0.455 ; profile:profile_CW|hang_PTT ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; -; 0.455 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; -; 0.455 ; profile:profile_CW|enable_hang ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; -; 0.455 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; -; 0.543 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.834 ; -; 0.545 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.836 ; -; 0.745 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.037 ; -; 0.745 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.036 ; -; 0.746 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.037 ; -; 0.746 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.037 ; -; 0.746 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.037 ; -; 0.746 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.038 ; -; 0.747 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; -; 0.747 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; -; 0.747 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; -; 0.747 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; -; 0.747 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; -; 0.747 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; -; 0.747 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; -; 0.747 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; -; 0.747 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.039 ; -; 0.747 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.039 ; -; 0.748 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.039 ; -; 0.748 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.039 ; -; 0.748 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.039 ; -; 0.748 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.040 ; -; 0.748 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.039 ; -; 0.748 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.040 ; -; 0.749 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.040 ; -; 0.750 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.041 ; -; 0.758 ; profile:profile_CW|timer[16] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.050 ; -; 0.759 ; profile:profile_CW|hang_timer[17] ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.050 ; -; 0.759 ; profile:profile_CW|timer[17] ; profile:profile_CW|timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.051 ; -; 0.759 ; profile:profile_CW|hang_timer[16] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.050 ; -; 0.764 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.056 ; -; 0.765 ; profile:profile_CW|timer[8] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.056 ; -; 0.765 ; profile:profile_CW|timer[1] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.056 ; -; 0.765 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.056 ; -; 0.766 ; profile:profile_CW|hang_timer[14] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.057 ; -; 0.773 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.064 ; -; 0.773 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.064 ; -; 0.778 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.069 ; -; 0.824 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.115 ; -; 0.824 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.115 ; -; 0.834 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.125 ; -; 0.836 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.127 ; -; 0.911 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.203 ; -; 0.923 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.214 ; -; 0.925 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.463 ; 1.642 ; -; 0.941 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|prof_state.0001 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.232 ; -; 0.941 ; profile:profile_CW|hang_timer[8] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.232 ; -; 0.951 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.475 ; 1.680 ; -; 0.962 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.463 ; 1.679 ; -; 1.054 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.475 ; 1.783 ; -; 1.070 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.362 ; -; 1.099 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.391 ; -; 1.099 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.390 ; -; 1.100 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.391 ; -; 1.100 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.391 ; -; 1.100 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.391 ; -; 1.100 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.392 ; -; 1.101 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.392 ; -; 1.101 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.393 ; -; 1.101 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.392 ; -; 1.101 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.392 ; -; 1.102 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.393 ; -; 1.102 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.393 ; -; 1.102 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.393 ; -; 1.102 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.463 ; 1.819 ; -; 1.108 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.400 ; -; 1.108 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.399 ; -; 1.108 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.399 ; -; 1.108 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.399 ; -; 1.108 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.399 ; -; 1.109 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.401 ; -; 1.109 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.400 ; -; 1.109 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.401 ; -; 1.109 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.400 ; -; 1.110 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.401 ; -; 1.111 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.402 ; -; 1.111 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.402 ; -; 1.111 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.402 ; -; 1.117 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.408 ; -; 1.117 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.408 ; -; 1.117 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.408 ; -; 1.117 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.409 ; -; 1.117 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.408 ; -; 1.118 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.409 ; -; 1.118 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.409 ; -; 1.118 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.410 ; -; 1.118 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.410 ; -; 1.119 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.410 ; -; 1.119 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.411 ; -; 1.119 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.410 ; -; 1.119 ; profile:profile_CW|timer[16] ; profile:profile_CW|timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.411 ; -; 1.119 ; profile:profile_CW|timer[1] ; profile:profile_CW|timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.410 ; -+-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Hold: 'spi_ce0' ; ++-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.426 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.157 ; 0.795 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.100 ; 0.788 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; +; 0.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 0.746 ; +; 0.477 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 0.746 ; +; 0.477 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 0.746 ; +; 0.477 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 0.746 ; +; 0.478 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.746 ; +; 0.478 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.746 ; +; 0.479 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 0.746 ; +; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.054 ; 0.746 ; +; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.054 ; 0.746 ; +; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.054 ; 0.746 ; +; 0.480 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.054 ; 0.746 ; +; 0.488 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.100 ; 0.800 ; +; 0.508 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.100 ; 0.820 ; +; 0.510 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 0.777 ; +; 0.512 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.095 ; 0.819 ; +; 0.512 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.095 ; 0.819 ; +; 0.513 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.095 ; 0.820 ; +; 0.536 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.804 ; +; 0.544 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.812 ; +; 0.544 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.071 ; 0.827 ; +; 0.563 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.801 ; +; 0.587 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.397 ; 1.238 ; +; 0.604 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.397 ; 1.255 ; +; 0.609 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.397 ; 1.260 ; +; 0.615 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.404 ; 1.273 ; +; 0.616 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.100 ; 0.928 ; +; 0.617 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.397 ; 1.268 ; +; 0.631 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.157 ; 1.000 ; +; 0.632 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.403 ; 1.289 ; +; 0.648 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.157 ; 1.017 ; +; 0.650 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.918 ; +; 0.650 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.157 ; 1.019 ; +; 0.658 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.071 ; 0.941 ; +; 0.675 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.304 ; 1.233 ; +; 0.682 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.950 ; +; 0.684 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.952 ; +; 0.687 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.315 ; 1.256 ; +; 0.688 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.100 ; 1.000 ; +; 0.698 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.104 ; 1.014 ; +; 0.700 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.331 ; 1.285 ; +; 0.700 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 0.967 ; +; 0.703 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.941 ; +; 0.711 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[5] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.095 ; 1.018 ; +; 0.714 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.104 ; 1.030 ; +; 0.718 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 0.986 ; +; 0.733 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.071 ; 1.016 ; +; 0.734 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 1.001 ; +; 0.734 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.315 ; 1.303 ; +; 0.746 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.100 ; 1.058 ; +; 0.754 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.104 ; 1.070 ; +; 0.758 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.111 ; 1.081 ; +; 0.759 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.543 ; 1.556 ; +; 0.760 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 1.028 ; +; 0.760 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 1.028 ; +; 0.765 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 1.033 ; +; 0.776 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.543 ; 1.573 ; +; 0.776 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 1.014 ; +; 0.779 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.111 ; 1.102 ; +; 0.782 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.071 ; 1.065 ; +; 0.784 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.104 ; 1.100 ; +; 0.791 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 1.058 ; +; 0.791 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 1.029 ; +; 0.797 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.214 ; 1.223 ; +; 0.803 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.007 ; 1.022 ; +; 0.804 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 1.072 ; +; 0.816 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 1.084 ; +; 0.818 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 1.088 ; +; 0.819 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 1.089 ; +; 0.821 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.054 ; 1.087 ; +; 0.825 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.058 ; 1.095 ; +; 0.825 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.543 ; 1.622 ; +; 0.826 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.007 ; 1.045 ; +; 0.828 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 1.066 ; +; 0.831 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.054 ; 1.097 ; +; 0.833 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.054 ; 1.099 ; +; 0.835 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 1.104 ; +; 0.840 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.289 ; 1.383 ; +; 0.851 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.057 ; 1.120 ; +; 0.855 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 1.093 ; +; 0.862 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; -0.271 ; 0.803 ; +; 0.862 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; -0.271 ; 0.803 ; +; 0.865 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.056 ; 1.133 ; +; 0.870 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.285 ; 1.409 ; +; 0.873 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.289 ; 1.416 ; +; 0.893 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.427 ; 1.574 ; +; 0.896 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.285 ; 1.435 ; +; 0.912 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.433 ; 1.599 ; ++-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ + + ++--------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Hold: 'spi_sck' ; ++-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.447 ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_slave:spi_slave_rx_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; 0.142 ; 0.801 ; +; 0.448 ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_slave:spi_slave_rx_inst|rdata[26] ; spi_sck ; spi_sck ; 0.000 ; 0.142 ; 0.802 ; +; 0.449 ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_slave:spi_slave_rx_inst|rdata[28] ; spi_sck ; spi_sck ; 0.000 ; 0.142 ; 0.803 ; +; 0.450 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rdata[24] ; spi_sck ; spi_sck ; 0.000 ; 0.142 ; 0.804 ; +; 0.450 ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_slave:spi_slave_rx_inst|rdata[27] ; spi_sck ; spi_sck ; 0.000 ; 0.142 ; 0.804 ; +; 0.471 ; spi_slave:spi_slave_rx2_inst|rreg[28] ; spi_slave:spi_slave_rx2_inst|rdata[29] ; spi_sck ; spi_sck ; 0.000 ; 0.118 ; 0.801 ; +; 0.472 ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_slave:spi_slave_rx_inst|rdata[35] ; spi_sck ; spi_sck ; 0.000 ; 0.117 ; 0.801 ; +; 0.473 ; spi_slave:spi_slave_rx2_inst|rreg[46] ; spi_slave:spi_slave_rx2_inst|rdata[47] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.793 ; +; 0.475 ; spi_slave:spi_slave_rx_inst|rreg[33] ; spi_slave:spi_slave_rx_inst|rdata[34] ; spi_sck ; spi_sck ; 0.000 ; 0.117 ; 0.804 ; +; 0.479 ; spi_slave:spi_slave_rx_inst|rreg[2] ; spi_slave:spi_slave_rx_inst|rdata[3] ; spi_sck ; spi_sck ; 0.000 ; 0.111 ; 0.802 ; +; 0.480 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_sck ; spi_sck ; 0.000 ; 0.111 ; 0.803 ; +; 0.482 ; spi_slave:spi_slave_rx_inst|rreg[1] ; spi_slave:spi_slave_rx_inst|rdata[2] ; spi_sck ; spi_sck ; 0.000 ; 0.111 ; 0.805 ; +; 0.482 ; spi_slave:spi_slave_rx2_inst|rreg[40] ; spi_slave:spi_slave_rx2_inst|rdata[41] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.802 ; +; 0.483 ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_slave:spi_slave_rx2_inst|rdata[43] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.803 ; +; 0.483 ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.803 ; +; 0.483 ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_slave:spi_slave_rx2_inst|rdata[44] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.803 ; +; 0.484 ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.804 ; +; 0.484 ; spi_slave:spi_slave_rx2_inst|rreg[41] ; spi_slave:spi_slave_rx2_inst|rdata[42] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.804 ; +; 0.523 ; spi_slave:spi_slave_rx2_inst|treg[3] ; spi_slave:spi_slave_rx2_inst|treg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.059 ; 0.794 ; +; 0.523 ; spi_slave:spi_slave_rx2_inst|treg[5] ; spi_slave:spi_slave_rx2_inst|treg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.059 ; 0.794 ; +; 0.525 ; spi_slave:spi_slave_rx_inst|treg[12] ; spi_slave:spi_slave_rx_inst|treg[13] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.793 ; +; 0.525 ; spi_slave:spi_slave_rx2_inst|treg[41] ; spi_slave:spi_slave_rx2_inst|treg[42] ; spi_sck ; spi_sck ; 0.000 ; 0.058 ; 0.795 ; +; 0.525 ; spi_slave:spi_slave_rx2_inst|treg[31] ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_sck ; spi_sck ; 0.000 ; 0.058 ; 0.795 ; +; 0.526 ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_slave:spi_slave_rx_inst|treg[10] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.794 ; +; 0.527 ; spi_slave:spi_slave_rx_inst|treg[20] ; spi_slave:spi_slave_rx_inst|treg[21] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.795 ; +; 0.527 ; spi_slave:spi_slave_rx_inst|treg[8] ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.795 ; +; 0.527 ; spi_slave:spi_slave_rx_inst|treg[4] ; spi_slave:spi_slave_rx_inst|treg[5] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.795 ; +; 0.527 ; spi_slave:spi_slave_rx_inst|treg[3] ; spi_slave:spi_slave_rx_inst|treg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.795 ; +; 0.527 ; spi_slave:spi_slave_rx_inst|treg[2] ; spi_slave:spi_slave_rx_inst|treg[3] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.795 ; +; 0.527 ; spi_slave:spi_slave_rx_inst|treg[29] ; spi_slave:spi_slave_rx_inst|treg[30] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.795 ; +; 0.528 ; spi_slave:spi_slave_rx_inst|treg[24] ; spi_slave:spi_slave_rx_inst|treg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.796 ; +; 0.535 ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.802 ; +; 0.535 ; spi_slave:spi_slave_rx2_inst|rreg[37] ; spi_slave:spi_slave_rx2_inst|rreg[38] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.802 ; +; 0.535 ; spi_slave:spi_slave_rx2_inst|rreg[36] ; spi_slave:spi_slave_rx2_inst|rreg[37] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.802 ; +; 0.535 ; spi_slave:spi_slave_rx2_inst|rreg[35] ; spi_slave:spi_slave_rx2_inst|rreg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.802 ; +; 0.535 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.802 ; +; 0.535 ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_slave:spi_slave_rx2_inst|rreg[46] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.801 ; +; 0.535 ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_slave:spi_slave_rx_inst|rreg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.802 ; +; 0.536 ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_slave:spi_slave_rx2_inst|rreg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.803 ; +; 0.536 ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.803 ; +; 0.536 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.802 ; +; 0.536 ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.802 ; +; 0.536 ; spi_slave:spi_slave_rx2_inst|rreg[40] ; spi_slave:spi_slave_rx2_inst|rreg[41] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.802 ; +; 0.537 ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.804 ; +; 0.537 ; spi_slave:spi_slave_rx_inst|rreg[33] ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.804 ; +; 0.537 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.804 ; +; 0.537 ; spi_slave:spi_slave_rx2_inst|rreg[28] ; spi_slave:spi_slave_rx2_inst|rreg[29] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.804 ; +; 0.537 ; spi_slave:spi_slave_rx_inst|rreg[2] ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.803 ; +; 0.537 ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.803 ; +; 0.537 ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.803 ; +; 0.537 ; spi_slave:spi_slave_rx2_inst|rreg[41] ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.803 ; +; 0.537 ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.804 ; +; 0.538 ; spi_slave:spi_slave_rx_inst|rreg[1] ; spi_slave:spi_slave_rx_inst|rreg[2] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.804 ; +; 0.552 ; spi_slave:spi_slave_rx2_inst|rreg[27] ; spi_slave:spi_slave_rx2_inst|rreg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.819 ; +; 0.552 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.819 ; +; 0.552 ; spi_slave:spi_slave_rx_inst|rreg[21] ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.819 ; +; 0.553 ; spi_slave:spi_slave_rx2_inst|rreg[29] ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.820 ; +; 0.553 ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.820 ; +; 0.553 ; spi_slave:spi_slave_rx2_inst|rreg[23] ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.820 ; +; 0.553 ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_slave:spi_slave_rx_inst|rreg[16] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.819 ; +; 0.553 ; spi_slave:spi_slave_rx_inst|rreg[14] ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.819 ; +; 0.553 ; spi_slave:spi_slave_rx2_inst|rreg[1] ; spi_slave:spi_slave_rx2_inst|rreg[2] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.820 ; +; 0.554 ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.821 ; +; 0.554 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.821 ; +; 0.555 ; spi_slave:spi_slave_rx_inst|rreg[10] ; spi_slave:spi_slave_rx_inst|rreg[11] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.821 ; +; 0.555 ; spi_slave:spi_slave_rx_inst|rreg[39] ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.821 ; +; 0.555 ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.822 ; +; 0.556 ; spi_slave:spi_slave_rx_inst|rreg[18] ; spi_slave:spi_slave_rx_inst|rreg[19] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.823 ; +; 0.564 ; spi_slave:spi_slave_rx2_inst|rreg[14] ; spi_slave:spi_slave_rx2_inst|rdata[15] ; spi_sck ; spi_sck ; 0.000 ; 0.044 ; 0.820 ; +; 0.588 ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_slave:spi_slave_rx2_inst|rreg[32] ; spi_sck ; spi_sck ; 0.000 ; 0.198 ; 0.998 ; +; 0.601 ; spi_slave:spi_slave_rx2_inst|rreg[37] ; spi_slave:spi_slave_rx2_inst|rdata[38] ; spi_sck ; spi_sck ; 0.000 ; -0.011 ; 0.802 ; +; 0.602 ; spi_slave:spi_slave_rx2_inst|rreg[36] ; spi_slave:spi_slave_rx2_inst|rdata[37] ; spi_sck ; spi_sck ; 0.000 ; -0.011 ; 0.803 ; +; 0.602 ; spi_slave:spi_slave_rx2_inst|rreg[35] ; spi_slave:spi_slave_rx2_inst|rdata[36] ; spi_sck ; spi_sck ; 0.000 ; -0.011 ; 0.803 ; +; 0.602 ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_sck ; spi_sck ; 0.000 ; -0.011 ; 0.803 ; +; 0.602 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_sck ; spi_sck ; 0.000 ; -0.011 ; 0.803 ; +; 0.653 ; spi_slave:spi_slave_rx2_inst|rreg[21] ; spi_slave:spi_slave_rx2_inst|rreg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.176 ; 1.041 ; +; 0.656 ; spi_slave:spi_slave_rx2_inst|rreg[20] ; spi_slave:spi_slave_rx2_inst|rdata[21] ; spi_sck ; spi_sck ; 0.000 ; 0.132 ; 1.000 ; +; 0.657 ; spi_slave:spi_slave_rx2_inst|rreg[29] ; spi_slave:spi_slave_rx2_inst|rdata[30] ; spi_sck ; spi_sck ; 0.000 ; 0.129 ; 0.998 ; +; 0.657 ; spi_slave:spi_slave_rx2_inst|rreg[22] ; spi_slave:spi_slave_rx2_inst|rdata[23] ; spi_sck ; spi_sck ; 0.000 ; 0.129 ; 0.998 ; +; 0.661 ; spi_slave:spi_slave_rx2_inst|rreg[2] ; spi_slave:spi_slave_rx2_inst|rdata[3] ; spi_sck ; spi_sck ; 0.000 ; 0.129 ; 1.002 ; +; 0.662 ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_sck ; spi_sck ; 0.000 ; 0.118 ; 0.992 ; +; 0.663 ; spi_slave:spi_slave_rx2_inst|treg[10] ; spi_slave:spi_slave_rx2_inst|treg[11] ; spi_sck ; spi_sck ; 0.000 ; 0.059 ; 0.934 ; +; 0.664 ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_slave:spi_slave_rx2_inst|treg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.058 ; 0.934 ; +; 0.665 ; spi_slave:spi_slave_rx2_inst|treg[37] ; spi_slave:spi_slave_rx2_inst|treg[38] ; spi_sck ; spi_sck ; 0.000 ; 0.058 ; 0.935 ; +; 0.665 ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.058 ; 0.935 ; +; 0.666 ; spi_slave:spi_slave_rx_inst|treg[44] ; spi_slave:spi_slave_rx_inst|treg[45] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.934 ; +; 0.666 ; spi_slave:spi_slave_rx_inst|treg[32] ; spi_slave:spi_slave_rx_inst|treg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.934 ; +; 0.667 ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.058 ; 0.937 ; +; 0.667 ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.058 ; 0.937 ; +; 0.667 ; spi_slave:spi_slave_rx_inst|treg[34] ; spi_slave:spi_slave_rx_inst|treg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.935 ; +; 0.668 ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_sck ; spi_sck ; 0.000 ; 0.111 ; 0.991 ; +; 0.668 ; spi_slave:spi_slave_rx_inst|treg[38] ; spi_slave:spi_slave_rx_inst|treg[39] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.936 ; +; 0.668 ; spi_slave:spi_slave_rx2_inst|treg[21] ; spi_slave:spi_slave_rx2_inst|treg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.935 ; +; 0.669 ; spi_slave:spi_slave_rx2_inst|treg[27] ; spi_slave:spi_slave_rx2_inst|treg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.936 ; +; 0.669 ; spi_slave:spi_slave_rx_inst|treg[31] ; spi_slave:spi_slave_rx_inst|treg[32] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.937 ; +; 0.670 ; spi_slave:spi_slave_rx2_inst|treg[22] ; spi_slave:spi_slave_rx2_inst|treg[23] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.937 ; +; 0.674 ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_slave:spi_slave_rx_inst|rdata[37] ; spi_sck ; spi_sck ; 0.000 ; 0.117 ; 1.003 ; +; 0.674 ; spi_slave:spi_slave_rx2_inst|rreg[21] ; spi_slave:spi_slave_rx2_inst|rdata[22] ; spi_sck ; spi_sck ; 0.000 ; 0.132 ; 1.018 ; +; 0.677 ; spi_slave:spi_slave_rx_inst|rreg[0] ; spi_slave:spi_slave_rx_inst|rdata[1] ; spi_sck ; spi_sck ; 0.000 ; 0.111 ; 1.000 ; +; 0.677 ; spi_slave:spi_slave_rx2_inst|rreg[3] ; spi_slave:spi_slave_rx2_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.131 ; 1.020 ; ++-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -1647,106 +1755,106 @@ No paths to report. +-------+----------------------------------------+----------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------+----------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; 0.454 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 0.746 ; ; 0.454 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 0.746 ; -; 0.454 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 0.746 ; ; 0.454 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|key_state.SENDDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 0.746 ; -; 0.455 ; iambic:iambic_inst|dot_memory ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 0.746 ; -; 0.455 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 0.746 ; -; 0.455 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 0.746 ; -; 0.748 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.PREDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.040 ; -; 0.749 ; iambic:iambic_inst|key_state.PREDOT ; iambic:iambic_inst|key_state.SENDDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.041 ; -; 0.752 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.043 ; +; 0.454 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 0.746 ; +; 0.454 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 0.746 ; +; 0.454 ; iambic:iambic_inst|dot_memory ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 0.746 ; +; 0.511 ; iambic:iambic_inst|dot_memory ; iambic:iambic_inst|key_state.DASHHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 0.803 ; +; 0.669 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.PREDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 0.961 ; +; 0.734 ; iambic:iambic_inst|key_state.DOTHELD ; iambic:iambic_inst|key_state.PREDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.081 ; 1.027 ; +; 0.743 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.035 ; +; 0.751 ; iambic:iambic_inst|key_state.PREDOT ; iambic:iambic_inst|key_state.SENDDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.043 ; ; 0.753 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.045 ; -; 0.753 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.045 ; -; 0.754 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.046 ; ; 0.754 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.046 ; -; 0.755 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.047 ; -; 0.757 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.049 ; +; 0.755 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.047 ; +; 0.756 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.048 ; ; 0.758 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.050 ; -; 0.758 ; iambic:iambic_inst|delay[17] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.050 ; -; 0.763 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.055 ; -; 0.764 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.056 ; ; 0.764 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.056 ; -; 0.764 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.056 ; -; 0.765 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.057 ; -; 0.767 ; iambic:iambic_inst|key_state.PREDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.058 ; +; 0.770 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.062 ; +; 0.770 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.062 ; ; 0.770 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.062 ; +; 0.771 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.063 ; ; 0.771 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.063 ; +; 0.772 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.064 ; +; 0.772 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.064 ; ; 0.772 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.064 ; +; 0.772 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.064 ; ; 0.773 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.065 ; -; 0.789 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.081 ; -; 0.842 ; iambic:iambic_inst|key_state.DOTHELD ; iambic:iambic_inst|key_state.PREDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.134 ; -; 0.868 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.160 ; -; 0.915 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.00000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.206 ; -; 1.059 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.351 ; -; 1.074 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.366 ; -; 1.107 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.399 ; +; 0.776 ; iambic:iambic_inst|delay[17] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.068 ; +; 0.783 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.075 ; +; 0.797 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.089 ; +; 0.833 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|key_state.DASHHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.125 ; +; 0.942 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.234 ; +; 0.956 ; iambic:iambic_inst|key_state.PREDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.081 ; 1.249 ; +; 1.066 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.357 ; +; 1.070 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.362 ; ; 1.107 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.399 ; -; 1.108 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.400 ; +; 1.109 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.401 ; ; 1.115 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.407 ; -; 1.116 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.408 ; -; 1.117 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.409 ; -; 1.118 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.410 ; -; 1.118 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.410 ; +; 1.117 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.409 ; ; 1.119 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.411 ; -; 1.119 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.411 ; -; 1.119 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.411 ; ; 1.124 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.416 ; +; 1.124 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.416 ; +; 1.124 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.416 ; ; 1.124 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.416 ; -; 1.125 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.417 ; +; 1.126 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.418 ; ; 1.126 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.417 ; -; 1.127 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.419 ; -; 1.127 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.419 ; +; 1.126 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.418 ; +; 1.126 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.418 ; +; 1.126 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.418 ; ; 1.132 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.424 ; +; 1.133 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.425 ; ; 1.133 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.425 ; ; 1.134 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.426 ; ; 1.135 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.426 ; -; 1.136 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.428 ; +; 1.135 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.PREDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.426 ; +; 1.135 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.427 ; ; 1.141 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.433 ; +; 1.142 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.434 ; ; 1.142 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.434 ; ; 1.143 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.435 ; -; 1.198 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.489 ; +; 1.144 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.436 ; ; 1.238 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.530 ; -; 1.238 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.530 ; -; 1.239 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.531 ; -; 1.247 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.539 ; +; 1.240 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.532 ; ; 1.247 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.539 ; -; 1.248 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.540 ; -; 1.248 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.540 ; -; 1.249 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.541 ; -; 1.250 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.542 ; -; 1.250 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.542 ; +; 1.249 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.541 ; +; 1.255 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.547 ; ; 1.255 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.547 ; -; 1.256 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.548 ; +; 1.255 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.547 ; ; 1.256 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.547 ; -; 1.257 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.549 ; -; 1.258 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.550 ; -; 1.258 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.550 ; -; 1.259 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.551 ; +; 1.257 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.549 ; +; 1.257 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.549 ; +; 1.257 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.549 ; +; 1.257 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.549 ; +; 1.264 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.556 ; ; 1.264 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.556 ; -; 1.265 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.557 ; +; 1.264 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.556 ; ; 1.265 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.556 ; +; 1.266 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.558 ; +; 1.266 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.558 ; +; 1.266 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.558 ; ; 1.266 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.557 ; -; 1.267 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.559 ; -; 1.267 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.559 ; -; 1.273 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.565 ; ; 1.273 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.564 ; +; 1.273 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.565 ; +; 1.273 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.565 ; ; 1.274 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.566 ; ; 1.275 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.566 ; -; 1.276 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.568 ; +; 1.275 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.567 ; +; 1.282 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.574 ; ; 1.282 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.573 ; ; 1.282 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.574 ; +; 1.284 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.576 ; ; 1.378 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.670 ; -; 1.379 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.671 ; -; 1.379 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.670 ; +; 1.378 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.670 ; +; 1.380 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.672 ; ; 1.387 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.679 ; -; 1.388 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.680 ; -; 1.388 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.679 ; -; 1.388 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.680 ; -; 1.389 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.681 ; -; 1.390 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.682 ; -; 1.393 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.685 ; -; 1.396 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.688 ; +; 1.389 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.681 ; +; 1.395 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.080 ; 1.687 ; +; 1.396 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.687 ; +; 1.396 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.687 ; +; 1.396 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.079 ; 1.687 ; +-------+----------------------------------------+----------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ @@ -1756,34 +1864,28 @@ No paths to report. ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------------------+----------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; 0.454 ; ad9866:ad9866_inst|dut2_bitcount[3] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.746 ; -; 0.454 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.746 ; ; 0.454 ; reset_handler:reset_handler_inst|reset_counter[0] ; reset_handler:reset_handler_inst|reset_counter[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.746 ; +; 0.455 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.746 ; ; 0.466 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.758 ; -; 0.643 ; ad9866:ad9866_inst|dut2_data[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.934 ; -; 0.643 ; ad9866:ad9866_inst|dut2_data[12] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.934 ; -; 0.644 ; ad9866:ad9866_inst|dut2_data[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.935 ; -; 0.644 ; ad9866:ad9866_inst|dut2_data[6] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.935 ; -; 0.644 ; ad9866:ad9866_inst|dut2_data[7] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.935 ; -; 0.644 ; ad9866:ad9866_inst|dut2_data[14] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.935 ; -; 0.645 ; ad9866:ad9866_inst|dut2_data[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.936 ; -; 0.645 ; ad9866:ad9866_inst|dut2_data[9] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.936 ; -; 0.645 ; ad9866:ad9866_inst|dut2_data[13] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.936 ; -; 0.646 ; ad9866:ad9866_inst|dut2_data[1] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.937 ; -; 0.647 ; ad9866:ad9866_inst|dut2_data[11] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 0.938 ; -; 0.700 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.992 ; +; 0.502 ; ad9866:ad9866_inst|dut2_data[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.794 ; +; 0.502 ; ad9866:ad9866_inst|dut2_data[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.794 ; +; 0.503 ; ad9866:ad9866_inst|dut2_data[1] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.795 ; +; 0.505 ; ad9866:ad9866_inst|dut2_data[0] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.797 ; +; 0.699 ; ad9866:ad9866_inst|dut2_data[6] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 0.991 ; +; 0.712 ; ad9866:ad9866_inst|dut2_data[9] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.003 ; ; 0.736 ; counter[11] ; counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.028 ; -; 0.737 ; counter[9] ; counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.029 ; ; 0.737 ; counter[7] ; counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.029 ; +; 0.737 ; counter[9] ; counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.029 ; ; 0.737 ; counter[1] ; counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.029 ; ; 0.738 ; counter[13] ; counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.030 ; ; 0.738 ; counter[17] ; counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.030 ; ; 0.738 ; counter[15] ; counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.030 ; -; 0.739 ; counter[5] ; counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.031 ; -; 0.739 ; counter[3] ; counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.031 ; ; 0.739 ; counter[2] ; counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.031 ; +; 0.739 ; counter[3] ; counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.031 ; +; 0.739 ; counter[5] ; counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.031 ; +; 0.740 ; counter[8] ; counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.032 ; ; 0.740 ; counter[10] ; counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.032 ; ; 0.740 ; counter[12] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.032 ; -; 0.740 ; counter[8] ; counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.032 ; ; 0.740 ; counter[21] ; counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.032 ; ; 0.740 ; counter[19] ; counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.032 ; ; 0.740 ; counter[18] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.032 ; @@ -1791,287 +1893,185 @@ No paths to report. ; 0.741 ; counter[6] ; counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.033 ; ; 0.741 ; counter[4] ; counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.033 ; ; 0.741 ; counter[16] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.033 ; -; 0.742 ; ad9866:ad9866_inst|dut2_data[10] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.033 ; +; 0.742 ; ad9866:ad9866_inst|dut2_data[8] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.033 ; ; 0.742 ; counter[22] ; counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.034 ; ; 0.742 ; counter[20] ; counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.034 ; -; 0.743 ; ad9866:ad9866_inst|dut2_data[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.034 ; -; 0.745 ; reset_handler:reset_handler_inst|reset_counter[9] ; reset_handler:reset_handler_inst|reset_counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; -; 0.745 ; reset_handler:reset_handler_inst|reset_counter[8] ; reset_handler:reset_handler_inst|reset_counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; -; 0.745 ; reset_handler:reset_handler_inst|reset_counter[14] ; reset_handler:reset_handler_inst|reset_counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; -; 0.745 ; reset_handler:reset_handler_inst|reset_counter[2] ; reset_handler:reset_handler_inst|reset_counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; -; 0.745 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; -; 0.745 ; reset_handler:reset_handler_inst|reset_counter[11] ; reset_handler:reset_handler_inst|reset_counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; +; 0.743 ; ad9866:ad9866_inst|dut2_data[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.035 ; +; 0.744 ; ad9866:ad9866_inst|dut2_data[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.036 ; +; 0.744 ; ad9866:ad9866_inst|dut2_data[10] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.036 ; +; 0.744 ; ad9866:ad9866_inst|dut2_data[11] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.036 ; ; 0.745 ; reset_handler:reset_handler_inst|reset_counter[10] ; reset_handler:reset_handler_inst|reset_counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; -; 0.746 ; reset_handler:reset_handler_inst|reset_counter[16] ; reset_handler:reset_handler_inst|reset_counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.038 ; -; 0.746 ; reset_handler:reset_handler_inst|reset_counter[7] ; reset_handler:reset_handler_inst|reset_counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.038 ; +; 0.745 ; reset_handler:reset_handler_inst|reset_counter[9] ; reset_handler:reset_handler_inst|reset_counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; +; 0.745 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.036 ; +; 0.745 ; reset_handler:reset_handler_inst|reset_counter[2] ; reset_handler:reset_handler_inst|reset_counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; +; 0.745 ; reset_handler:reset_handler_inst|reset_counter[11] ; reset_handler:reset_handler_inst|reset_counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; +; 0.745 ; ad9866:ad9866_inst|dut2_data[12] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; +; 0.745 ; reset_handler:reset_handler_inst|reset_counter[8] ; reset_handler:reset_handler_inst|reset_counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; +; 0.745 ; ad9866:ad9866_inst|dut2_data[13] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.037 ; ; 0.746 ; reset_handler:reset_handler_inst|reset_counter[6] ; reset_handler:reset_handler_inst|reset_counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.038 ; -; 0.746 ; reset_handler:reset_handler_inst|reset_counter[18] ; reset_handler:reset_handler_inst|reset_counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.038 ; -; 0.747 ; reset_handler:reset_handler_inst|reset_counter[15] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.039 ; -; 0.748 ; reset_handler:reset_handler_inst|reset_counter[17] ; reset_handler:reset_handler_inst|reset_counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.040 ; -; 0.748 ; reset_handler:reset_handler_inst|reset_counter[20] ; reset_handler:reset_handler_inst|reset_counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.040 ; +; 0.746 ; reset_handler:reset_handler_inst|reset_counter[4] ; reset_handler:reset_handler_inst|reset_counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.038 ; +; 0.746 ; reset_handler:reset_handler_inst|reset_counter[14] ; reset_handler:reset_handler_inst|reset_counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.037 ; +; 0.746 ; ad9866:ad9866_inst|dut2_data[7] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.037 ; +; 0.746 ; reset_handler:reset_handler_inst|reset_counter[7] ; reset_handler:reset_handler_inst|reset_counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.038 ; +; 0.747 ; reset_handler:reset_handler_inst|reset_counter[15] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.038 ; +; 0.747 ; reset_handler:reset_handler_inst|reset_counter[16] ; reset_handler:reset_handler_inst|reset_counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.038 ; +; 0.747 ; reset_handler:reset_handler_inst|reset_counter[18] ; reset_handler:reset_handler_inst|reset_counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.038 ; +; 0.748 ; reset_handler:reset_handler_inst|reset_counter[17] ; reset_handler:reset_handler_inst|reset_counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.039 ; +; 0.748 ; reset_handler:reset_handler_inst|reset_counter[13] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.039 ; ; 0.749 ; reset_handler:reset_handler_inst|reset_counter[3] ; reset_handler:reset_handler_inst|reset_counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.041 ; -; 0.749 ; reset_handler:reset_handler_inst|reset_counter[5] ; reset_handler:reset_handler_inst|reset_counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.041 ; -; 0.750 ; reset_handler:reset_handler_inst|reset_counter[21] ; reset_handler:reset_handler_inst|reset_counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.042 ; -; 0.750 ; reset_handler:reset_handler_inst|reset_counter[23] ; reset_handler:reset_handler_inst|reset_counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.042 ; -; 0.750 ; reset_handler:reset_handler_inst|reset_counter[19] ; reset_handler:reset_handler_inst|reset_counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.042 ; +; 0.751 ; reset_handler:reset_handler_inst|reset_counter[23] ; reset_handler:reset_handler_inst|reset_counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.042 ; +; 0.751 ; reset_handler:reset_handler_inst|reset_counter[19] ; reset_handler:reset_handler_inst|reset_counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.042 ; ; 0.763 ; counter[0] ; counter[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.055 ; -; 0.764 ; reset_handler:reset_handler_inst|reset_counter[4] ; reset_handler:reset_handler_inst|reset_counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.056 ; -; 0.765 ; reset_handler:reset_handler_inst|reset_counter[22] ; reset_handler:reset_handler_inst|reset_counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.057 ; ; 0.766 ; counter[23] ; counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.058 ; ; 0.766 ; reset_handler:reset_handler_inst|reset_counter[0] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.058 ; -; 0.767 ; reset_handler:reset_handler_inst|reset_counter[1] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.059 ; -; 0.797 ; ad9866:ad9866_inst|dut1_pc[5] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.056 ; 1.065 ; -; 0.806 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.097 ; -; 0.816 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.107 ; -; 0.858 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.056 ; 1.126 ; -; 0.859 ; ad9866:ad9866_inst|dut2_bitcount[1] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.151 ; -; 0.877 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.169 ; -; 0.955 ; reset_handler:reset_handler_inst|reset_counter[13] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.247 ; -; 0.967 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.279 ; 1.458 ; -; 0.976 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.279 ; 1.467 ; -; 1.000 ; ad9866:ad9866_inst|dut2_bitcount[1] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.292 ; -; 1.016 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.056 ; 1.284 ; -; 1.080 ; counter[11] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.091 ; 1.383 ; +; 0.766 ; reset_handler:reset_handler_inst|reset_counter[1] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.058 ; +; 0.798 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.090 ; +; 0.818 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.545 ; 1.575 ; +; 0.819 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.057 ; 1.088 ; +; 0.820 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.057 ; 1.089 ; +; 0.827 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.545 ; 1.584 ; +; 0.827 ; ad9866:ad9866_inst|dut1_pc[5] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.057 ; 1.096 ; +; 0.879 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.545 ; 1.636 ; +; 0.888 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.545 ; 1.645 ; +; 0.950 ; reset_handler:reset_handler_inst|reset_counter[5] ; reset_handler:reset_handler_inst|reset_counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.242 ; +; 0.952 ; reset_handler:reset_handler_inst|reset_counter[21] ; reset_handler:reset_handler_inst|reset_counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.243 ; +; 0.958 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.545 ; 1.715 ; +; 0.966 ; reset_handler:reset_handler_inst|reset_counter[20] ; reset_handler:reset_handler_inst|reset_counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.257 ; +; 0.967 ; reset_handler:reset_handler_inst|reset_counter[22] ; reset_handler:reset_handler_inst|reset_counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.258 ; +; 0.982 ; ad9866:ad9866_inst|dut2_bitcount[1] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.273 ; +; 0.983 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.275 ; +; 1.003 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.295 ; +; 1.011 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.303 ; +; 1.017 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.309 ; +; 1.017 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|dut2_bitcount[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.309 ; +; 1.019 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.545 ; 1.776 ; +; 1.029 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.320 ; +; 1.040 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|sen_n ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.628 ; 1.880 ; +; 1.090 ; counter[11] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.081 ; 1.383 ; ; 1.092 ; counter[1] ; counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.384 ; +; 1.092 ; counter[9] ; counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.384 ; ; 1.092 ; counter[13] ; counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.384 ; ; 1.092 ; counter[7] ; counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.384 ; -; 1.092 ; counter[9] ; counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.384 ; ; 1.093 ; counter[17] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.385 ; -; 1.093 ; counter[5] ; counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.385 ; ; 1.093 ; counter[15] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.385 ; +; 1.093 ; counter[5] ; counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.385 ; ; 1.093 ; counter[3] ; counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.385 ; ; 1.094 ; counter[21] ; counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.386 ; ; 1.094 ; counter[19] ; counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.386 ; -; 1.099 ; counter[10] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.091 ; 1.402 ; +; 1.099 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.390 ; ; 1.099 ; reset_handler:reset_handler_inst|reset_counter[8] ; reset_handler:reset_handler_inst|reset_counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.391 ; -; 1.099 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.391 ; ; 1.099 ; reset_handler:reset_handler_inst|reset_counter[10] ; reset_handler:reset_handler_inst|reset_counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.391 ; -; 1.099 ; reset_handler:reset_handler_inst|reset_counter[14] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.391 ; -; 1.100 ; reset_handler:reset_handler_inst|reset_counter[2] ; reset_handler:reset_handler_inst|reset_counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.392 ; -; 1.100 ; reset_handler:reset_handler_inst|reset_counter[6] ; reset_handler:reset_handler_inst|reset_counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.392 ; -; 1.100 ; reset_handler:reset_handler_inst|reset_counter[16] ; reset_handler:reset_handler_inst|reset_counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.392 ; -; 1.100 ; counter[2] ; counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.392 ; -; 1.101 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.279 ; 1.592 ; -; 1.101 ; reset_handler:reset_handler_inst|reset_counter[18] ; reset_handler:reset_handler_inst|reset_counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.393 ; -; 1.101 ; counter[14] ; counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.393 ; -; 1.101 ; counter[8] ; counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.393 ; +; 1.100 ; reset_handler:reset_handler_inst|reset_counter[4] ; reset_handler:reset_handler_inst|reset_counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.080 ; 1.392 ; +; 1.100 ; reset_handler:reset_handler_inst|reset_counter[14] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.079 ; 1.391 ; +-------+----------------------------------------------------+----------------------------------------------------+--------------+-------------+--------------+------------+------------+ -+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Hold: 'spi_ce1' ; -+-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.746 ; -; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.746 ; -; 0.478 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.056 ; 0.746 ; -; 0.507 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.057 ; 0.776 ; -; 0.548 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.818 ; -; 0.549 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.819 ; -; 0.557 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.827 ; -; 0.558 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 0.828 ; -; 0.648 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.057 ; 0.917 ; -; 0.756 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.026 ; -; 0.756 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.283 ; 1.251 ; -; 0.758 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.028 ; -; 0.766 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.057 ; 1.035 ; -; 0.773 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.156 ; 0.829 ; -; 0.815 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.085 ; -; 0.818 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.374 ; 1.404 ; -; 0.828 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.018 ; 1.022 ; -; 0.828 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.178 ; 1.260 ; -; 0.858 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.018 ; 1.052 ; -; 0.861 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.242 ; 1.315 ; -; 0.896 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.166 ; -; 0.964 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.227 ; -; 0.973 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.156 ; 1.029 ; -; 0.973 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.236 ; -; 0.988 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.251 ; -; 1.006 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.269 ; -; 1.016 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.156 ; 1.072 ; -; 1.021 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.284 ; -; 1.028 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.156 ; 1.084 ; -; 1.045 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.236 ; 1.535 ; -; 1.070 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.245 ; 1.569 ; -; 1.079 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.374 ; 1.665 ; -; 1.081 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.018 ; 1.275 ; -; 1.122 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.283 ; 1.617 ; -; 1.142 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.029 ; 1.325 ; -; 1.152 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.283 ; 1.647 ; -; 1.170 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.440 ; -; 1.170 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.156 ; 1.226 ; -; 1.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.067 ; 1.520 ; -; 1.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.374 ; 1.785 ; -; 1.209 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.076 ; 1.539 ; -; 1.210 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.156 ; 1.266 ; -; 1.217 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.487 ; -; 1.218 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.076 ; 1.548 ; -; 1.224 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.076 ; 1.554 ; -; 1.232 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.124 ; 1.320 ; -; 1.235 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.505 ; -; 1.240 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.510 ; -; 1.240 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.076 ; 1.570 ; -; 1.243 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.067 ; 1.564 ; -; 1.244 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.067 ; 1.565 ; -; 1.256 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.067 ; 1.577 ; -; 1.277 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.013 ; 1.502 ; -; 1.284 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.027 ; 1.523 ; -; 1.296 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.566 ; -; 1.356 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.013 ; 1.581 ; -; 1.361 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.241 ; 1.814 ; -; 1.385 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.198 ; 1.795 ; -; 1.429 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.156 ; 1.485 ; -; 1.441 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.076 ; 1.771 ; -; 1.445 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.067 ; 1.766 ; -; 1.446 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.124 ; 1.534 ; -; 1.477 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.241 ; 1.930 ; -; 1.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.751 ; -; 1.497 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.767 ; -; 1.502 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.124 ; 1.590 ; -; 1.517 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.067 ; 1.838 ; -; 1.530 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.374 ; 2.116 ; -; 1.543 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.813 ; -; 1.559 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.829 ; -; 1.575 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.845 ; -; 1.577 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.124 ; 1.665 ; -; 1.580 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.850 ; -; 1.586 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.849 ; -; 1.620 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 1.890 ; -; 1.627 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.062 ; 1.777 ; -; 1.635 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.241 ; 2.088 ; -; 1.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.203 ; 2.118 ; -; 1.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.283 ; 2.156 ; -; 1.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.283 ; 2.171 ; -; 1.696 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.076 ; 2.026 ; -; 1.760 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.241 ; 2.213 ; -; 1.799 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 2.069 ; -; 1.832 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.374 ; 2.418 ; -; 1.841 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.374 ; 2.427 ; -; 1.861 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 2.131 ; -; 1.879 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 2.149 ; -; 1.891 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 2.161 ; -; 1.906 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 2.176 ; -; 1.912 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.076 ; 2.242 ; -; 2.021 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.076 ; 2.351 ; -; 2.056 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.194 ; 2.504 ; -; 2.139 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.058 ; 2.409 ; -; 2.161 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.136 ; 2.551 ; -+-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ - - -+--------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Hold: 'spi_sck' ; -+-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.476 ; spi_slave:spi_slave_rx2_inst|rreg[32] ; spi_slave:spi_slave_rx2_inst|rdata[33] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 0.803 ; -; 0.476 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 0.803 ; -; 0.482 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.802 ; -; 0.483 ; spi_slave:spi_slave_rx2_inst|rreg[0] ; spi_slave:spi_slave_rx2_inst|rdata[1] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.803 ; -; 0.484 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.804 ; -; 0.492 ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 0.819 ; -; 0.498 ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_sck ; spi_sck ; 0.000 ; 0.109 ; 0.819 ; -; 0.500 ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_sck ; spi_sck ; 0.000 ; 0.109 ; 0.821 ; -; 0.503 ; spi_slave:spi_slave_rx_inst|rreg[13] ; spi_slave:spi_slave_rx_inst|rdata[14] ; spi_sck ; spi_sck ; 0.000 ; 0.106 ; 0.821 ; -; 0.504 ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_slave:spi_slave_rx_inst|rdata[16] ; spi_sck ; spi_sck ; 0.000 ; 0.106 ; 0.822 ; -; 0.508 ; spi_slave:spi_slave_rx_inst|treg[7] ; spi_slave:spi_slave_rx_inst|treg[8] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.777 ; -; 0.508 ; spi_slave:spi_slave_rx2_inst|treg[7] ; spi_slave:spi_slave_rx2_inst|treg[8] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.777 ; -; 0.525 ; spi_slave:spi_slave_rx2_inst|treg[0] ; spi_slave:spi_slave_rx2_inst|treg[1] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.794 ; -; 0.525 ; spi_slave:spi_slave_rx2_inst|treg[3] ; spi_slave:spi_slave_rx2_inst|treg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.794 ; -; 0.526 ; spi_slave:spi_slave_rx_inst|treg[5] ; spi_slave:spi_slave_rx_inst|treg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.795 ; -; 0.527 ; spi_slave:spi_slave_rx_inst|rreg[37] ; spi_slave:spi_slave_rx_inst|rreg[38] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.795 ; -; 0.533 ; spi_slave:spi_slave_rx2_inst|rreg[5] ; spi_slave:spi_slave_rx2_inst|rreg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.801 ; -; 0.533 ; spi_slave:spi_slave_rx2_inst|rreg[3] ; spi_slave:spi_slave_rx2_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.801 ; -; 0.534 ; spi_slave:spi_slave_rx_inst|rreg[21] ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.801 ; -; 0.534 ; spi_slave:spi_slave_rx2_inst|rreg[6] ; spi_slave:spi_slave_rx2_inst|rreg[7] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.802 ; -; 0.535 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.802 ; -; 0.535 ; spi_slave:spi_slave_rx_inst|rreg[39] ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.803 ; -; 0.535 ; spi_slave:spi_slave_rx_inst|rreg[18] ; spi_slave:spi_slave_rx_inst|rreg[19] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.802 ; -; 0.536 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.803 ; -; 0.536 ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.053 ; 0.801 ; -; 0.536 ; spi_slave:spi_slave_rx_inst|rreg[5] ; spi_slave:spi_slave_rx_inst|rreg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.802 ; -; 0.536 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.802 ; -; 0.536 ; spi_slave:spi_slave_rx2_inst|rreg[32] ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.802 ; -; 0.536 ; spi_slave:spi_slave_rx2_inst|rreg[0] ; spi_slave:spi_slave_rx2_inst|rreg[1] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.803 ; -; 0.536 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.802 ; -; 0.536 ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.803 ; -; 0.537 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.055 ; 0.804 ; -; 0.538 ; spi_slave:spi_slave_rx_inst|rreg[6] ; spi_slave:spi_slave_rx_inst|rreg[7] ; spi_sck ; spi_sck ; 0.000 ; 0.054 ; 0.804 ; -; 0.538 ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_slave:spi_slave_rx_inst|rreg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.053 ; 0.803 ; -; 0.538 ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_sck ; spi_sck ; 0.000 ; 0.053 ; 0.803 ; -; 0.552 ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_slave:spi_slave_rx_inst|rreg[37] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.820 ; -; 0.552 ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.820 ; -; 0.552 ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.820 ; -; 0.556 ; spi_slave:spi_slave_rx_inst|rreg[28] ; spi_slave:spi_slave_rx_inst|rreg[29] ; spi_sck ; spi_sck ; 0.000 ; 0.053 ; 0.821 ; -; 0.566 ; spi_slave:spi_slave_rx_inst|rreg[6] ; spi_slave:spi_slave_rx_inst|rdata[7] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.802 ; -; 0.567 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.803 ; -; 0.568 ; spi_slave:spi_slave_rx_inst|rreg[5] ; spi_slave:spi_slave_rx_inst|rdata[6] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.804 ; -; 0.591 ; spi_slave:spi_slave_rx_inst|rreg[29] ; spi_slave:spi_slave_rx_inst|rreg[30] ; spi_sck ; spi_sck ; 0.000 ; 0.195 ; 0.998 ; -; 0.593 ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_sck ; spi_sck ; 0.000 ; 0.016 ; 0.821 ; -; 0.613 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rdata[24] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.802 ; -; 0.614 ; spi_slave:spi_slave_rx_inst|rreg[18] ; spi_slave:spi_slave_rx_inst|rdata[19] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.803 ; -; 0.615 ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_slave:spi_slave_rx_inst|rdata[23] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.804 ; -; 0.617 ; spi_slave:spi_slave_rx_inst|rreg[21] ; spi_slave:spi_slave_rx_inst|rdata[22] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.806 ; -; 0.630 ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_sck ; spi_sck ; 0.000 ; -0.046 ; 0.796 ; -; 0.631 ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_slave:spi_slave_rx_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.820 ; -; 0.635 ; spi_slave:spi_slave_rx_inst|rreg[39] ; spi_slave:spi_slave_rx_inst|rdata[40] ; spi_sck ; spi_sck ; 0.000 ; -0.046 ; 0.801 ; -; 0.652 ; spi_slave:spi_slave_rx_inst|rreg[14] ; spi_slave:spi_slave_rx_inst|rdata[15] ; spi_sck ; spi_sck ; 0.000 ; 0.125 ; 0.989 ; -; 0.658 ; spi_slave:spi_slave_rx2_inst|rreg[5] ; spi_slave:spi_slave_rx2_inst|rdata[6] ; spi_sck ; spi_sck ; 0.000 ; -0.067 ; 0.803 ; -; 0.659 ; spi_slave:spi_slave_rx2_inst|rreg[6] ; spi_slave:spi_slave_rx2_inst|rdata[7] ; spi_sck ; spi_sck ; 0.000 ; -0.067 ; 0.804 ; -; 0.659 ; spi_slave:spi_slave_rx2_inst|rreg[3] ; spi_slave:spi_slave_rx2_inst|rdata[4] ; spi_sck ; spi_sck ; 0.000 ; -0.067 ; 0.804 ; -; 0.665 ; spi_slave:spi_slave_rx_inst|treg[14] ; spi_slave:spi_slave_rx_inst|treg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.934 ; -; 0.665 ; spi_slave:spi_slave_rx_inst|treg[12] ; spi_slave:spi_slave_rx_inst|treg[13] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.934 ; -; 0.665 ; spi_slave:spi_slave_rx_inst|treg[40] ; spi_slave:spi_slave_rx_inst|treg[41] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.934 ; -; 0.665 ; spi_slave:spi_slave_rx2_inst|treg[10] ; spi_slave:spi_slave_rx2_inst|treg[11] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.934 ; -; 0.666 ; spi_slave:spi_slave_rx_inst|treg[11] ; spi_slave:spi_slave_rx_inst|treg[12] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.935 ; -; 0.666 ; spi_slave:spi_slave_rx_inst|treg[8] ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.935 ; -; 0.666 ; spi_slave:spi_slave_rx_inst|treg[33] ; spi_slave:spi_slave_rx_inst|treg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.935 ; -; 0.666 ; spi_slave:spi_slave_rx2_inst|treg[8] ; spi_slave:spi_slave_rx2_inst|treg[9] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.935 ; -; 0.666 ; spi_slave:spi_slave_rx2_inst|treg[11] ; spi_slave:spi_slave_rx2_inst|treg[12] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.935 ; -; 0.666 ; spi_slave:spi_slave_rx2_inst|treg[12] ; spi_slave:spi_slave_rx2_inst|treg[13] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.935 ; -; 0.666 ; spi_slave:spi_slave_rx2_inst|treg[14] ; spi_slave:spi_slave_rx2_inst|treg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.935 ; -; 0.667 ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_slave:spi_slave_rx_inst|treg[10] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.936 ; -; 0.667 ; spi_slave:spi_slave_rx_inst|treg[26] ; spi_slave:spi_slave_rx_inst|treg[27] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.935 ; -; 0.667 ; spi_slave:spi_slave_rx_inst|treg[25] ; spi_slave:spi_slave_rx_inst|treg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.935 ; -; 0.667 ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.935 ; -; 0.667 ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.935 ; -; 0.667 ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.935 ; -; 0.667 ; spi_slave:spi_slave_rx2_inst|treg[24] ; spi_slave:spi_slave_rx2_inst|treg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.935 ; -; 0.667 ; spi_slave:spi_slave_rx_inst|treg[39] ; spi_slave:spi_slave_rx_inst|treg[40] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.936 ; -; 0.667 ; spi_slave:spi_slave_rx_inst|treg[32] ; spi_slave:spi_slave_rx_inst|treg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.936 ; -; 0.667 ; spi_slave:spi_slave_rx2_inst|treg[19] ; spi_slave:spi_slave_rx2_inst|treg[20] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.935 ; -; 0.667 ; spi_slave:spi_slave_rx2_inst|treg[13] ; spi_slave:spi_slave_rx2_inst|treg[14] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.936 ; -; 0.668 ; spi_slave:spi_slave_rx2_inst|treg[43] ; spi_slave:spi_slave_rx2_inst|treg[44] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.936 ; -; 0.668 ; spi_slave:spi_slave_rx_inst|treg[13] ; spi_slave:spi_slave_rx_inst|treg[14] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.937 ; -; 0.668 ; spi_slave:spi_slave_rx2_inst|treg[45] ; spi_slave:spi_slave_rx2_inst|treg[46] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.936 ; -; 0.668 ; spi_slave:spi_slave_rx2_inst|treg[42] ; spi_slave:spi_slave_rx2_inst|treg[43] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.936 ; -; 0.668 ; spi_slave:spi_slave_rx2_inst|treg[16] ; spi_slave:spi_slave_rx2_inst|treg[17] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.936 ; -; 0.668 ; spi_slave:spi_slave_rx2_inst|treg[25] ; spi_slave:spi_slave_rx2_inst|treg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.936 ; -; 0.668 ; spi_slave:spi_slave_rx2_inst|treg[23] ; spi_slave:spi_slave_rx2_inst|treg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.936 ; -; 0.668 ; spi_slave:spi_slave_rx_inst|treg[41] ; spi_slave:spi_slave_rx_inst|treg[42] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.937 ; -; 0.668 ; spi_slave:spi_slave_rx_inst|treg[36] ; spi_slave:spi_slave_rx_inst|treg[37] ; spi_sck ; spi_sck ; 0.000 ; 0.057 ; 0.937 ; -; 0.668 ; spi_slave:spi_slave_rx2_inst|treg[22] ; spi_slave:spi_slave_rx2_inst|treg[23] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.936 ; -; 0.670 ; spi_slave:spi_slave_rx_inst|treg[18] ; spi_slave:spi_slave_rx_inst|treg[19] ; spi_sck ; spi_sck ; 0.000 ; 0.056 ; 0.938 ; -; 0.671 ; spi_slave:spi_slave_rx2_inst|rreg[11] ; spi_slave:spi_slave_rx2_inst|rdata[12] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 0.998 ; -; 0.672 ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 0.999 ; -; 0.674 ; spi_slave:spi_slave_rx2_inst|rreg[10] ; spi_slave:spi_slave_rx2_inst|rdata[11] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 1.001 ; -; 0.675 ; spi_slave:spi_slave_rx2_inst|rreg[12] ; spi_slave:spi_slave_rx2_inst|rdata[13] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 1.002 ; -; 0.675 ; spi_slave:spi_slave_rx2_inst|rreg[23] ; spi_slave:spi_slave_rx2_inst|rdata[24] ; spi_sck ; spi_sck ; 0.000 ; -0.067 ; 0.820 ; -; 0.679 ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_slave:spi_slave_rx2_inst|rdata[43] ; spi_sck ; spi_sck ; 0.000 ; 0.109 ; 1.000 ; -; 0.679 ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_slave:spi_slave_rx2_inst|rdata[44] ; spi_sck ; spi_sck ; 0.000 ; 0.109 ; 1.000 ; -; 0.680 ; spi_slave:spi_slave_rx_inst|rreg[11] ; spi_slave:spi_slave_rx_inst|rdata[12] ; spi_sck ; spi_sck ; 0.000 ; 0.106 ; 0.998 ; -; 0.680 ; spi_slave:spi_slave_rx_inst|rreg[0] ; spi_slave:spi_slave_rx_inst|rdata[1] ; spi_sck ; spi_sck ; 0.000 ; 0.106 ; 0.998 ; -; 0.681 ; spi_slave:spi_slave_rx2_inst|rreg[1] ; spi_slave:spi_slave_rx2_inst|rdata[2] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 1.001 ; -; 0.681 ; spi_slave:spi_slave_rx_inst|rreg[1] ; spi_slave:spi_slave_rx_inst|rdata[2] ; spi_sck ; spi_sck ; 0.000 ; 0.106 ; 0.999 ; -; 0.682 ; spi_slave:spi_slave_rx_inst|rreg[12] ; spi_slave:spi_slave_rx_inst|rdata[13] ; spi_sck ; spi_sck ; 0.000 ; 0.106 ; 1.000 ; -+-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ ++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' ; ++-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; 0.455 ; profile:profile_CW|hang_PTT ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; +; 0.455 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0011 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; +; 0.455 ; profile:profile_CW|enable_hang ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; +; 0.455 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; +; 0.455 ; profile:profile_CW|char_PTT ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; +; 0.455 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; +; 0.455 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0001 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; +; 0.455 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.746 ; +; 0.493 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.784 ; +; 0.504 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.795 ; +; 0.517 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 0.808 ; +; 0.729 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.464 ; 1.447 ; +; 0.731 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.465 ; 1.450 ; +; 0.741 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.465 ; 1.460 ; +; 0.745 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.037 ; +; 0.745 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.036 ; +; 0.745 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.037 ; +; 0.745 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.037 ; +; 0.746 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.038 ; +; 0.746 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.038 ; +; 0.746 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.038 ; +; 0.746 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.037 ; +; 0.746 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.037 ; +; 0.746 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.037 ; +; 0.746 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.038 ; +; 0.746 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.038 ; +; 0.747 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.039 ; +; 0.747 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.039 ; +; 0.747 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; +; 0.747 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; +; 0.747 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.038 ; +; 0.748 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.040 ; +; 0.748 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.039 ; +; 0.748 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.039 ; +; 0.748 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.039 ; +; 0.748 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.039 ; +; 0.748 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.039 ; +; 0.749 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.041 ; +; 0.758 ; profile:profile_CW|timer[17] ; profile:profile_CW|timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.050 ; +; 0.758 ; profile:profile_CW|timer[16] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.050 ; +; 0.759 ; profile:profile_CW|hang_timer[17] ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.050 ; +; 0.760 ; profile:profile_CW|hang_timer[16] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.051 ; +; 0.764 ; profile:profile_CW|timer[8] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.056 ; +; 0.765 ; profile:profile_CW|hang_timer[8] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.056 ; +; 0.766 ; profile:profile_CW|hang_timer[14] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.057 ; +; 0.770 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.465 ; 1.489 ; +; 0.772 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.064 ; +; 0.773 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.064 ; +; 0.778 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.069 ; +; 0.792 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.465 ; 1.511 ; +; 0.793 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.465 ; 1.512 ; +; 0.798 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.465 ; 1.517 ; +; 0.806 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.465 ; 1.525 ; +; 0.809 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.464 ; 1.527 ; +; 0.816 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.107 ; +; 0.818 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.464 ; 1.536 ; +; 0.834 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.465 ; 1.553 ; +; 0.835 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.126 ; +; 0.839 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.130 ; +; 0.947 ; profile:profile_CW|timer[1] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.239 ; +; 0.956 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.248 ; +; 0.985 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.276 ; +; 1.001 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.465 ; 1.720 ; +; 1.070 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.464 ; 1.788 ; +; 1.073 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.464 ; 1.791 ; +; 1.078 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.464 ; 1.796 ; +; 1.096 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.387 ; +; 1.099 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.391 ; +; 1.099 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.391 ; +; 1.099 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.391 ; +; 1.099 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.390 ; +; 1.100 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.392 ; +; 1.100 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.391 ; +; 1.100 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.391 ; +; 1.100 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.392 ; +; 1.101 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.393 ; +; 1.101 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.392 ; +; 1.101 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.393 ; +; 1.101 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.392 ; +; 1.102 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.393 ; +; 1.102 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.393 ; +; 1.103 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.394 ; +; 1.107 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.399 ; +; 1.107 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.399 ; +; 1.107 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.398 ; +; 1.107 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.464 ; 1.825 ; +; 1.108 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.399 ; +; 1.108 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.400 ; +; 1.109 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.401 ; +; 1.109 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.400 ; +; 1.109 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.400 ; +; 1.110 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.402 ; +; 1.110 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.402 ; +; 1.111 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.402 ; +; 1.112 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.464 ; 1.830 ; +; 1.116 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.408 ; +; 1.116 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.408 ; +; 1.116 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.407 ; +; 1.117 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.079 ; 1.408 ; +; 1.117 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.080 ; 1.409 ; ++-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +----------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -2079,268 +2079,268 @@ No paths to report. +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ -; 0.564 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.913 ; 1.286 ; -; 0.678 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.094 ; 2.014 ; -; 0.771 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.056 ; 2.069 ; -; 0.776 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.059 ; 2.077 ; -; 0.832 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.546 ; -; 0.838 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.047 ; 2.127 ; -; 0.839 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.056 ; 2.137 ; -; 0.841 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.067 ; 2.150 ; -; 0.845 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.033 ; 2.120 ; -; 0.846 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.560 ; -; 0.850 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.055 ; 2.147 ; -; 0.851 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.033 ; 2.126 ; -; 0.853 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.047 ; 2.142 ; -; 0.855 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 1.594 ; -; 0.856 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.570 ; -; 0.860 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.913 ; 1.582 ; -; 0.860 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.574 ; -; 0.865 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.927 ; 1.601 ; -; 0.865 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.944 ; 1.618 ; -; 0.867 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.581 ; -; 0.868 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.927 ; 1.604 ; -; 0.868 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.582 ; -; 0.870 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.584 ; -; 0.872 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.944 ; 1.625 ; -; 0.876 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.927 ; 1.612 ; -; 0.877 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.944 ; 1.630 ; -; 0.877 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.591 ; -; 0.878 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.944 ; 1.631 ; -; 0.878 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.927 ; 1.614 ; -; 0.879 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.055 ; 2.176 ; -; 0.885 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 1.624 ; -; 0.885 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.599 ; -; 0.885 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.966 ; 1.660 ; -; 0.887 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.601 ; -; 0.889 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.067 ; 2.198 ; -; 0.889 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.603 ; -; 0.890 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.944 ; 1.643 ; -; 0.890 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.604 ; -; 0.891 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.944 ; 1.644 ; -; 0.892 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 1.631 ; -; 0.894 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.033 ; 2.169 ; -; 0.895 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.927 ; 1.631 ; -; 0.896 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 1.635 ; -; 0.902 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.944 ; 1.655 ; -; 0.904 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.944 ; 1.657 ; -; 0.905 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.927 ; 1.641 ; -; 0.907 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.621 ; -; 0.908 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.944 ; 1.661 ; -; 0.908 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.622 ; -; 0.914 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 1.653 ; -; 0.921 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.635 ; -; 0.925 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.927 ; 1.661 ; -; 0.938 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.913 ; 1.660 ; -; 0.945 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 1.684 ; -; 0.953 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.667 ; -; 0.972 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.824 ; 1.605 ; -; 0.986 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.824 ; 1.619 ; -; 1.020 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.067 ; 2.329 ; -; 1.032 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.952 ; 2.226 ; -; 1.042 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.056 ; 2.340 ; -; 1.059 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.033 ; 2.334 ; -; 1.060 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.824 ; 1.693 ; -; 1.092 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.058 ; 2.392 ; -; 1.115 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.058 ; 2.415 ; -; 1.117 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.966 ; 1.892 ; -; 1.120 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.056 ; 2.418 ; -; 1.140 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.033 ; 2.415 ; -; 1.141 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.905 ; 1.855 ; -; 1.180 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.966 ; 1.955 ; -; 1.181 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.927 ; 1.917 ; -; 1.191 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.980 ; 1.980 ; -; 1.195 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.913 ; 1.917 ; -; 1.199 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.964 ; 2.405 ; -; 1.206 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.964 ; 2.412 ; -; 1.208 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 1.947 ; -; 1.209 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.058 ; 2.509 ; -; 1.210 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.034 ; 2.486 ; -; 1.231 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.952 ; 2.425 ; -; 1.240 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.094 ; 2.576 ; -; 1.241 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.966 ; 2.016 ; -; 1.242 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.913 ; 1.964 ; -; 1.242 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 1.981 ; -; 1.251 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 1.990 ; -; 1.282 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.913 ; 2.004 ; -; 1.287 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.966 ; 2.062 ; -; 1.330 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.824 ; 1.963 ; -; 1.393 ; spi_slave:spi_slave_rx_inst|rdata[36] ; rx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.099 ; 1.536 ; -; 1.427 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.055 ; 2.724 ; -; 1.440 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.094 ; 2.776 ; -; 1.449 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.913 ; 2.171 ; -; 1.451 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.966 ; 2.226 ; -; 1.472 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.094 ; 2.808 ; -; 1.472 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.073 ; 2.787 ; -; 1.478 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.966 ; 2.253 ; -; 1.498 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.033 ; 2.773 ; -; 1.514 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.067 ; 2.823 ; -; 1.554 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 1.056 ; 2.852 ; -; 1.578 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.913 ; 2.300 ; -; 1.586 ; spi_slave:spi_slave_rx_inst|rdata[32] ; tx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.452 ; 1.376 ; -; 1.602 ; spi_slave:spi_slave_rx_inst|rdata[33] ; tx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.492 ; 1.352 ; +; 0.709 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.731 ; 1.249 ; +; 0.716 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.731 ; 1.256 ; +; 0.723 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.731 ; 1.263 ; +; 0.738 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.731 ; 1.278 ; +; 0.740 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.731 ; 1.280 ; +; 0.950 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.858 ; 2.050 ; +; 0.950 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.876 ; 2.068 ; +; 1.014 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.880 ; 2.136 ; +; 1.020 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.876 ; 2.138 ; +; 1.034 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.850 ; 2.126 ; +; 1.038 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.729 ; 1.576 ; +; 1.045 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 1.581 ; +; 1.045 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.729 ; 1.583 ; +; 1.052 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.726 ; 1.587 ; +; 1.053 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.858 ; 2.153 ; +; 1.053 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.587 ; +; 1.055 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.726 ; 1.590 ; +; 1.059 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.748 ; 1.616 ; +; 1.060 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.748 ; 1.617 ; +; 1.063 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 1.599 ; +; 1.065 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.729 ; 1.603 ; +; 1.065 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.726 ; 1.600 ; +; 1.069 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 1.605 ; +; 1.071 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.729 ; 1.609 ; +; 1.071 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.605 ; +; 1.076 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.860 ; 2.178 ; +; 1.076 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.850 ; 2.168 ; +; 1.076 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.724 ; 1.609 ; +; 1.077 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.726 ; 1.612 ; +; 1.078 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.612 ; +; 1.078 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.724 ; 1.611 ; +; 1.080 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.614 ; +; 1.083 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.724 ; 1.616 ; +; 1.084 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.726 ; 1.619 ; +; 1.090 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.726 ; 1.625 ; +; 1.092 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.626 ; +; 1.092 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.626 ; +; 1.095 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 1.631 ; +; 1.099 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.858 ; 2.199 ; +; 1.101 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.748 ; 1.658 ; +; 1.102 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.748 ; 1.659 ; +; 1.102 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.724 ; 1.635 ; +; 1.102 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 1.638 ; +; 1.102 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.636 ; +; 1.106 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.726 ; 1.641 ; +; 1.108 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.726 ; 1.643 ; +; 1.112 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.724 ; 1.645 ; +; 1.123 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.860 ; 2.225 ; +; 1.128 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 1.664 ; +; 1.128 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.858 ; 2.228 ; +; 1.144 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.546 ; 1.932 ; +; 1.151 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.748 ; 1.708 ; +; 1.234 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.857 ; 2.333 ; +; 1.238 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.876 ; 2.356 ; +; 1.242 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.876 ; 2.360 ; +; 1.261 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.859 ; 2.362 ; +; 1.271 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.558 ; 2.071 ; +; 1.276 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.850 ; 2.368 ; +; 1.305 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.840 ; 2.387 ; +; 1.309 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.875 ; 2.426 ; +; 1.332 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.430 ; 1.571 ; +; 1.334 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.858 ; 2.434 ; +; 1.343 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.731 ; 1.883 ; +; 1.348 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.428 ; 1.585 ; +; 1.355 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.430 ; 1.594 ; +; 1.363 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.724 ; 1.896 ; +; 1.376 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.746 ; 1.931 ; +; 1.376 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.428 ; 1.613 ; +; 1.377 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.428 ; 1.614 ; +; 1.381 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.428 ; 1.618 ; +; 1.389 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.564 ; 2.195 ; +; 1.397 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.854 ; 2.493 ; +; 1.402 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.729 ; 1.940 ; +; 1.402 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.746 ; 1.957 ; +; 1.410 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.430 ; 1.649 ; +; 1.412 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.741 ; 1.962 ; +; 1.414 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.746 ; 1.969 ; +; 1.417 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 1.953 ; +; 1.427 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.724 ; 1.960 ; +; 1.433 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.746 ; 1.988 ; +; 1.435 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.428 ; 1.672 ; +; 1.441 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.862 ; 2.545 ; +; 1.479 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.564 ; 2.285 ; +; 1.490 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.743 ; 2.042 ; +; 1.515 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.860 ; 2.617 ; +; 1.516 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.562 ; 2.320 ; +; 1.524 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.860 ; 2.626 ; +; 1.551 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.883 ; 2.676 ; +; 1.562 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.862 ; 2.666 ; +; 1.571 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.854 ; 2.667 ; +; 1.597 ; spi_slave:spi_slave_rx_inst|rdata[35] ; rx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.677 ; 1.162 ; +; 1.623 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.430 ; 1.862 ; +; 1.648 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.862 ; 2.752 ; +; 1.690 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.724 ; 2.223 ; +; 1.695 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.430 ; 1.934 ; +; 1.724 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.729 ; 2.262 ; +; 1.748 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.860 ; 2.850 ; +; 1.759 ; spi_slave:spi_slave_rx_inst|rdata[37] ; tx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.391 ; 1.610 ; +; 1.791 ; spi_slave:spi_slave_rx_inst|rdata[35] ; tx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.744 ; 1.289 ; +; 1.813 ; spi_slave:spi_slave_rx_inst|rdata[33] ; rx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.677 ; 1.378 ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ -+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' ; -+-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -; 1.174 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.929 ; 6.364 ; -; 1.229 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.927 ; 6.417 ; -; 1.353 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.775 ; 6.389 ; -; 1.374 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.775 ; 6.410 ; -; 1.452 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.775 ; 6.488 ; -; 1.583 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.718 ; 6.562 ; -; 1.374 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.776 ; 6.411 ; -; 1.371 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.912 ; 6.544 ; -; 1.733 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.715 ; 6.709 ; -; 1.774 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.926 ; 6.961 ; -; 1.416 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.778 ; 6.455 ; -; 1.236 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.701 ; 6.198 ; -; 1.720 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.712 ; 6.693 ; -; 6.096 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.775 ; 6.152 ; -; 6.160 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.715 ; 6.156 ; -; 6.186 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.775 ; 6.242 ; -; 6.207 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.776 ; 6.264 ; -; 6.218 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.929 ; 6.428 ; -; 6.220 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.775 ; 6.276 ; -; 6.134 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.912 ; 6.327 ; -; 6.298 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.927 ; 6.506 ; -; 6.272 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.778 ; 6.331 ; -; 6.356 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.718 ; 6.355 ; -; 6.105 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.701 ; 6.087 ; -; 6.439 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.926 ; 6.646 ; -; 6.520 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.712 ; 6.513 ; -+-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ - - +------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Hold: 'spi_slave:spi_slave_rx2_inst|done' ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ -; 1.564 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.381 ; 0.992 ; -; 1.568 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.381 ; 0.996 ; -; 1.573 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.381 ; 1.001 ; -; 1.604 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.381 ; 1.032 ; -; 1.613 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.381 ; 1.041 ; -; 1.718 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.518 ; 1.009 ; -; 1.722 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.518 ; 1.013 ; -; 1.722 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.518 ; 1.013 ; -; 1.726 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.023 ; -; 1.740 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.037 ; -; 1.741 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.518 ; 1.032 ; -; 1.746 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.043 ; -; 1.748 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.045 ; -; 1.751 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.518 ; 1.042 ; -; 1.760 ; spi_slave:spi_slave_rx2_inst|rdata[35] ; keyer_weight[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.583 ; 0.986 ; -; 1.763 ; spi_slave:spi_slave_rx2_inst|rdata[32] ; keyer_weight[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.583 ; 0.989 ; -; 1.764 ; spi_slave:spi_slave_rx2_inst|rdata[34] ; keyer_weight[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.583 ; 0.990 ; -; 1.796 ; spi_slave:spi_slave_rx2_inst|rdata[37] ; keyer_weight[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.592 ; 1.013 ; -; 1.805 ; spi_slave:spi_slave_rx2_inst|rdata[36] ; keyer_weight[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.592 ; 1.022 ; -; 1.813 ; spi_slave:spi_slave_rx2_inst|rdata[33] ; keyer_weight[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.583 ; 1.039 ; -; 1.815 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.381 ; 1.243 ; -; 1.833 ; spi_slave:spi_slave_rx2_inst|rdata[45] ; cw_speed[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.513 ; 1.562 ; -; 1.861 ; spi_slave:spi_slave_rx2_inst|rdata[43] ; cw_speed[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.513 ; 1.590 ; -; 1.869 ; spi_slave:spi_slave_rx2_inst|rdata[39] ; keyer_revers ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.511 ; 1.600 ; -; 1.873 ; spi_slave:spi_slave_rx2_inst|rdata[42] ; cw_speed[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.513 ; 1.602 ; -; 1.884 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.381 ; 1.312 ; -; 1.933 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.386 ; 1.356 ; -; 1.941 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.383 ; 1.367 ; -; 1.948 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.383 ; 1.374 ; -; 1.954 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; rx2_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.379 ; 1.817 ; -; 1.963 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.516 ; 1.256 ; -; 1.968 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.383 ; 1.394 ; -; 1.973 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.270 ; -; 1.977 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.518 ; 1.268 ; -; 1.979 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.383 ; 1.405 ; -; 1.980 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.277 ; -; 1.987 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.367 ; 1.429 ; -; 2.007 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; rx2_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.519 ; 1.730 ; -; 2.018 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; cw_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.371 ; 1.889 ; -; 2.024 ; spi_slave:spi_slave_rx2_inst|rdata[38] ; keyer_weight[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.592 ; 1.241 ; -; 2.036 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.516 ; 1.329 ; -; 2.039 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.502 ; 1.346 ; -; 2.039 ; spi_slave:spi_slave_rx2_inst|rdata[44] ; cw_speed[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.513 ; 1.768 ; -; 2.052 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.522 ; 1.339 ; -; 2.069 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.521 ; 1.357 ; -; 2.071 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.502 ; 1.378 ; -; 2.076 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.528 ; 1.357 ; -; 2.078 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.516 ; 1.371 ; -; 2.081 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.521 ; 1.369 ; -; 2.082 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.360 ; -; 2.090 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.579 ; 1.320 ; -; 2.091 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.522 ; 1.378 ; -; 2.092 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.370 ; -; 2.099 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.522 ; 1.386 ; -; 2.100 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.516 ; 1.393 ; -; 2.114 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.584 ; 1.339 ; -; 2.114 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.591 ; 1.332 ; -; 2.122 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; cw_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.513 ; 1.851 ; -; 2.126 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.404 ; -; 2.127 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.581 ; 1.355 ; -; 2.130 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.593 ; 1.346 ; -; 2.137 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.588 ; 1.358 ; -; 2.142 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.570 ; 1.381 ; -; 2.145 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.383 ; 1.571 ; -; 2.146 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.383 ; 1.572 ; -; 2.150 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.570 ; 1.389 ; -; 2.153 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.600 ; 1.362 ; -; 2.156 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.383 ; 1.582 ; -; 2.158 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.584 ; 1.383 ; -; 2.161 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.584 ; 1.386 ; -; 2.162 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.383 ; 1.588 ; -; 2.165 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.597 ; 1.377 ; -; 2.169 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.383 ; 1.595 ; -; 2.177 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.588 ; 1.398 ; -; 2.188 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.600 ; 1.397 ; -; 2.203 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.597 ; 1.415 ; -; 2.213 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.367 ; 1.655 ; -; 2.253 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.386 ; 1.676 ; -; 2.256 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.553 ; -; 2.261 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.365 ; 1.705 ; -; 2.275 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.379 ; 1.705 ; -; 2.276 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.365 ; 1.720 ; -; 2.284 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.377 ; 1.716 ; -; 2.285 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.379 ; 1.715 ; -; 2.290 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.379 ; 1.720 ; -; 2.295 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.365 ; 1.739 ; -; 2.301 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.528 ; 1.582 ; -; 2.304 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.518 ; 1.595 ; -; 2.305 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.583 ; -; 2.307 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.365 ; 1.751 ; -; 2.318 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.528 ; 1.599 ; -; 2.320 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.598 ; -; 2.324 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.365 ; 1.768 ; -; 2.326 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.522 ; 1.613 ; -; 2.331 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.522 ; 1.618 ; -; 2.336 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.633 ; -; 2.337 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.379 ; 1.767 ; -; 2.338 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.379 ; 1.768 ; -; 2.342 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.502 ; 1.649 ; -; 2.343 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.591 ; 1.561 ; +; 1.524 ; spi_slave:spi_slave_rx2_inst|rdata[39] ; keyer_revers ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.535 ; 1.231 ; +; 1.700 ; spi_slave:spi_slave_rx2_inst|rdata[42] ; cw_speed[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.411 ; +; 1.745 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.546 ; 1.008 ; +; 1.759 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; cw_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.514 ; 1.487 ; +; 1.759 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; rx2_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.514 ; 1.487 ; +; 1.826 ; spi_slave:spi_slave_rx2_inst|rdata[45] ; cw_speed[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.537 ; +; 1.838 ; spi_slave:spi_slave_rx2_inst|rdata[47] ; iambic_mode[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.535 ; 1.545 ; +; 1.880 ; spi_slave:spi_slave_rx2_inst|rdata[43] ; cw_speed[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.591 ; +; 1.880 ; spi_slave:spi_slave_rx2_inst|rdata[44] ; cw_speed[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.591 ; +; 1.885 ; spi_slave:spi_slave_rx2_inst|rdata[46] ; iambic_mode[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.535 ; 1.592 ; +; 1.923 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.474 ; 1.258 ; +; 1.930 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.474 ; 1.265 ; +; 1.964 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.515 ; 1.258 ; +; 1.969 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.515 ; 1.263 ; +; 1.981 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.515 ; 1.275 ; +; 1.996 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.515 ; 1.290 ; +; 2.019 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.483 ; 1.345 ; +; 2.036 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.515 ; 1.330 ; +; 2.042 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.474 ; 1.377 ; +; 2.058 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.515 ; 1.352 ; +; 2.074 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.515 ; 1.368 ; +; 2.085 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; cw_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.531 ; 1.796 ; +; 2.087 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.641 ; 1.255 ; +; 2.088 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.551 ; 1.346 ; +; 2.102 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.474 ; 1.437 ; +; 2.110 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.641 ; 1.278 ; +; 2.111 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.290 ; +; 2.119 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.627 ; 1.301 ; +; 2.160 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.714 ; 1.255 ; +; 2.279 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.478 ; 1.610 ; +; 2.284 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.464 ; 1.629 ; +; 2.285 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.532 ; 1.562 ; +; 2.294 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.474 ; 1.629 ; +; 2.322 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.535 ; 1.596 ; +; 2.336 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.529 ; 1.616 ; +; 2.340 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.189 ; 1.960 ; +; 2.345 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.529 ; 1.625 ; +; 2.351 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.142 ; 2.018 ; +; 2.351 ; spi_slave:spi_slave_rx2_inst|rdata[37] ; keyer_weight[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 1.542 ; +; 2.355 ; spi_slave:spi_slave_rx2_inst|rdata[35] ; keyer_weight[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 1.546 ; +; 2.390 ; spi_slave:spi_slave_rx2_inst|rdata[36] ; keyer_weight[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 1.581 ; +; 2.393 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.572 ; +; 2.400 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.460 ; 1.749 ; +; 2.405 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.584 ; +; 2.406 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.585 ; +; 2.415 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.189 ; 2.035 ; +; 2.415 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.646 ; 1.578 ; +; 2.419 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.598 ; +; 2.420 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.646 ; 1.583 ; +; 2.424 ; spi_slave:spi_slave_rx2_inst|rdata[33] ; keyer_weight[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 1.615 ; +; 2.426 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.529 ; 1.706 ; +; 2.428 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.529 ; 1.708 ; +; 2.428 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.145 ; 2.092 ; +; 2.432 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.529 ; 1.712 ; +; 2.433 ; spi_slave:spi_slave_rx2_inst|rdata[34] ; keyer_weight[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 1.624 ; +; 2.436 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.136 ; 2.109 ; +; 2.436 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.136 ; 2.109 ; +; 2.437 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.136 ; 2.110 ; +; 2.437 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.646 ; 1.600 ; +; 2.445 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.641 ; 1.613 ; +; 2.445 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.624 ; +; 2.456 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.635 ; +; 2.456 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.646 ; 1.619 ; +; 2.457 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.646 ; 1.620 ; +; 2.457 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.189 ; 2.077 ; +; 2.457 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.636 ; +; 2.470 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.191 ; 2.088 ; +; 2.472 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.627 ; 1.654 ; +; 2.472 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.646 ; 1.635 ; +; 2.483 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.700 ; 1.592 ; +; 2.486 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.136 ; 2.159 ; +; 2.487 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.646 ; 1.650 ; +; 2.487 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.666 ; +; 2.489 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.189 ; 2.109 ; +; 2.498 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.646 ; 1.661 ; +; 2.507 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.189 ; 2.127 ; +; 2.509 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.646 ; 1.672 ; +; 2.514 ; spi_slave:spi_slave_rx2_inst|rdata[32] ; keyer_weight[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.715 ; 1.608 ; +; 2.515 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.208 ; 2.116 ; +; 2.528 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.189 ; 2.148 ; +; 2.528 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.136 ; 2.201 ; +; 2.531 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.463 ; 1.877 ; +; 2.536 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.463 ; 1.882 ; +; 2.537 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.189 ; 2.157 ; +; 2.540 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.303 ; 2.046 ; +; 2.545 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.703 ; 1.651 ; +; 2.545 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.719 ; 1.635 ; +; 2.563 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.305 ; 2.067 ; +; 2.564 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.460 ; 1.913 ; +; 2.569 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.479 ; 1.899 ; +; 2.570 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.467 ; 1.912 ; +; 2.571 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.191 ; 2.189 ; +; 2.592 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.305 ; 2.096 ; +; 2.595 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.529 ; 1.875 ; +; 2.608 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.308 ; 2.109 ; +; 2.610 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.305 ; 2.114 ; +; 2.614 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.301 ; 2.122 ; +; 2.617 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.206 ; 2.220 ; +; 2.621 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.134 ; 2.296 ; +; 2.621 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.460 ; 1.970 ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' ; ++-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ +; 1.759 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.650 ; 6.670 ; +; 1.874 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.677 ; 6.812 ; +; 2.033 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.677 ; 6.971 ; +; 2.131 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.686 ; 7.078 ; +; 2.246 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.677 ; 7.184 ; +; 2.267 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.687 ; 7.215 ; +; 2.306 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.676 ; 7.243 ; +; 2.309 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.676 ; 7.246 ; +; 2.343 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.685 ; 7.289 ; +; 1.979 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.663 ; 6.903 ; +; 2.100 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.689 ; 7.050 ; +; 2.372 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.676 ; 7.309 ; +; 2.083 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.663 ; 7.007 ; +; 6.813 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.677 ; 6.771 ; +; 6.822 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.650 ; 6.753 ; +; 6.829 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.686 ; 6.796 ; +; 6.892 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.677 ; 6.850 ; +; 6.928 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.689 ; 6.898 ; +; 6.931 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.676 ; 6.888 ; +; 6.833 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.663 ; 6.777 ; +; 6.953 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.685 ; 6.919 ; +; 7.043 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.676 ; 7.000 ; +; 7.048 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.677 ; 7.006 ; +; 6.945 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.663 ; 6.889 ; +; 6.919 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.687 ; 6.887 ; +; 7.055 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.676 ; 7.012 ; ++-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ + + +--------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 85C Model Hold: 'virt_ad9866_rxclk' ; +--------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ -; 14.885 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.165 ; 4.730 ; -; 14.891 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.165 ; 4.736 ; -; 15.077 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.165 ; 4.922 ; -; 15.239 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.165 ; 5.084 ; -; 15.605 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.165 ; 5.450 ; -; 15.621 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.320 ; 5.311 ; -; 15.636 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.320 ; 5.326 ; -; 15.898 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.715 ; 5.193 ; -; 17.585 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.194 ; 7.401 ; -; 17.965 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.320 ; 7.655 ; -; 18.101 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.194 ; 7.917 ; -; 18.276 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.165 ; 8.121 ; +; 15.143 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.135 ; 5.018 ; +; 15.222 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.072 ; 5.160 ; +; 15.344 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.486 ; 4.868 ; +; 15.351 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.072 ; 5.289 ; +; 15.386 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.072 ; 5.324 ; +; 15.486 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.072 ; 5.424 ; +; 16.740 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.779 ; 5.971 ; +; 16.902 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.488 ; 6.424 ; +; 17.722 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.072 ; 7.660 ; +; 17.806 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.876 ; 7.940 ; +; 17.873 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.072 ; 7.811 ; +; 18.944 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.488 ; 8.466 ; +--------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ @@ -2352,7 +2352,7 @@ Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds. Number of Synchronizer Chains Found: 64 Shortest Synchronizer Chain: 2 Registers Fraction of Chains for which MTBFs Could Not be Calculated: 0.500 -Worst Case Available Settling Time: 13.637 ns +Worst Case Available Settling Time: 12.716 ns Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions. - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 10.8 @@ -2364,14 +2364,14 @@ Typical MTBF values are calculated based on the nominal silicon characteristics, +------------+-----------------+-------------------------------------------------------------+---------------------------------------------------+ ; Fmax ; Restricted Fmax ; Clock Name ; Note ; +------------+-----------------+-------------------------------------------------------------+---------------------------------------------------+ -; 85.71 MHz ; 85.71 MHz ; ad9866_clk ; ; -; 107.18 MHz ; 107.18 MHz ; spi_sck ; ; -; 112.75 MHz ; 112.75 MHz ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; ; -; 130.55 MHz ; 130.55 MHz ; clk_10mhz ; ; -; 142.09 MHz ; 142.09 MHz ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; ; -; 165.73 MHz ; 165.73 MHz ; ad9866:ad9866_inst|dut1_pc[0] ; ; -; 219.44 MHz ; 63.75 MHz ; spi_ce0 ; limit due to minimum port rate restriction (tmin) ; -; 296.74 MHz ; 63.75 MHz ; spi_ce1 ; limit due to minimum port rate restriction (tmin) ; +; 81.45 MHz ; 81.45 MHz ; spi_sck ; ; +; 86.52 MHz ; 86.52 MHz ; ad9866_clk ; ; +; 101.47 MHz ; 101.47 MHz ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; ; +; 129.62 MHz ; 129.62 MHz ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; ; +; 143.8 MHz ; 143.8 MHz ; clk_10mhz ; ; +; 148.99 MHz ; 148.99 MHz ; ad9866:ad9866_inst|dut1_pc[0] ; ; +; 203.46 MHz ; 63.75 MHz ; spi_ce1 ; limit due to minimum port rate restriction (tmin) ; +; 248.51 MHz ; 63.75 MHz ; spi_ce0 ; limit due to minimum port rate restriction (tmin) ; +------------+-----------------+-------------------------------------------------------------+---------------------------------------------------+ This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. @@ -2381,17 +2381,17 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp +-------------------------------------------------------------+-----------+---------------+ ; Clock ; Slack ; End Point TNS ; +-------------------------------------------------------------+-----------+---------------+ -; spi_ce0 ; 0.240 ; 0.000 ; -; spi_sck ; 0.475 ; 0.000 ; -; spi_slave:spi_slave_rx2_inst|done ; 0.768 ; 0.000 ; -; ad9866_clk ; 1.199 ; 0.000 ; -; spi_slave:spi_slave_rx_inst|done ; 1.560 ; 0.000 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 1.983 ; 0.000 ; -; virt_ad9866_rxclk ; 2.561 ; 0.000 ; -; clk_10mhz ; 92.340 ; 0.000 ; -; spi_ce1 ; 2496.630 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2599.732 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33326.295 ; 0.000 ; +; spi_sck ; 0.293 ; 0.000 ; +; spi_slave:spi_slave_rx2_inst|done ; 0.422 ; 0.000 ; +; spi_ce0 ; 0.437 ; 0.000 ; +; ad9866_clk ; 1.088 ; 0.000 ; +; spi_slave:spi_slave_rx_inst|done ; 1.441 ; 0.000 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 1.644 ; 0.000 ; +; virt_ad9866_rxclk ; 1.915 ; 0.000 ; +; clk_10mhz ; 93.046 ; 0.000 ; +; spi_ce1 ; 2495.085 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2599.239 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33325.618 ; 0.000 ; +-------------------------------------------------------------+-----------+---------------+ @@ -2400,17 +2400,17 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp +-------------------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +-------------------------------------------------------------+--------+---------------+ -; spi_ce0 ; 0.241 ; 0.000 ; -; ad9866_clk ; 0.329 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.403 ; 0.000 ; +; spi_ce1 ; 0.341 ; 0.000 ; +; ad9866_clk ; 0.387 ; 0.000 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.403 ; 0.000 ; ; clk_10mhz ; 0.403 ; 0.000 ; -; spi_ce1 ; 0.423 ; 0.000 ; -; spi_sck ; 0.437 ; 0.000 ; -; spi_slave:spi_slave_rx_inst|done ; 0.574 ; 0.000 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 1.219 ; 0.000 ; -; spi_slave:spi_slave_rx2_inst|done ; 1.599 ; 0.000 ; -; virt_ad9866_rxclk ; 14.058 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.404 ; 0.000 ; +; spi_ce0 ; 0.407 ; 0.000 ; +; spi_sck ; 0.410 ; 0.000 ; +; spi_slave:spi_slave_rx_inst|done ; 0.703 ; 0.000 ; +; spi_slave:spi_slave_rx2_inst|done ; 1.541 ; 0.000 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 1.754 ; 0.000 ; +; virt_ad9866_rxclk ; 14.280 ; 0.000 ; +-------------------------------------------------------------+--------+---------------+ @@ -2433,233 +2433,125 @@ No paths to report. +-------------------------------------------------------------+-----------+---------------+ ; ad9866_rxclk ; -2.666 ; -2.666 ; ; ad9866_txclk ; -2.666 ; -2.666 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 4.543 ; 0.000 ; -; ad9866_clk ; 5.748 ; 0.000 ; -; spi_sck ; 31.454 ; 0.000 ; -; clk_10mhz ; 49.411 ; 0.000 ; -; spi_ce0 ; 1249.076 ; 0.000 ; -; spi_ce1 ; 1249.187 ; 0.000 ; -; spi_slave:spi_slave_rx_inst|done ; 1249.229 ; 0.000 ; -; spi_slave:spi_slave_rx2_inst|done ; 1249.453 ; 0.000 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 4.550 ; 0.000 ; +; ad9866_clk ; 5.706 ; 0.000 ; +; spi_sck ; 31.477 ; 0.000 ; +; clk_10mhz ; 49.459 ; 0.000 ; +; spi_ce0 ; 1249.091 ; 0.000 ; +; spi_ce1 ; 1249.208 ; 0.000 ; +; spi_slave:spi_slave_rx_inst|done ; 1249.297 ; 0.000 ; +; spi_slave:spi_slave_rx2_inst|done ; 1249.412 ; 0.000 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2603.435 ; 0.000 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 16665.935 ; 0.000 ; +-------------------------------------------------------------+-----------+---------------+ -+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 0C Model Setup: 'spi_ce0' ; -+----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.240 ; spi_slave:spi_slave_rx_inst|rdata[15] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; -0.174 ; 1.615 ; -; 0.257 ; spi_slave:spi_slave_rx_inst|rdata[13] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; -0.174 ; 1.598 ; -; 0.293 ; spi_slave:spi_slave_rx_inst|rdata[12] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; -0.174 ; 1.562 ; -; 0.298 ; spi_slave:spi_slave_rx_inst|rdata[14] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; -0.174 ; 1.557 ; -; 0.399 ; spi_slave:spi_slave_rx_inst|rdata[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.074 ; 1.704 ; -; 0.434 ; spi_slave:spi_slave_rx_inst|rdata[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.074 ; 1.669 ; -; 0.473 ; spi_slave:spi_slave_rx_inst|rdata[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.049 ; 1.605 ; -; 0.496 ; spi_slave:spi_slave_rx_inst|rdata[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.049 ; 1.582 ; -; 0.501 ; spi_slave:spi_slave_rx_inst|rdata[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.074 ; 1.602 ; -; 0.504 ; spi_slave:spi_slave_rx_inst|rdata[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.074 ; 1.599 ; -; 0.505 ; spi_slave:spi_slave_rx_inst|rdata[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.049 ; 1.573 ; -; 0.539 ; spi_slave:spi_slave_rx_inst|rdata[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.049 ; 1.539 ; -; 2.044 ; spi_slave:spi_slave_rx_inst|rdata[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.051 ; 2.036 ; -; 2.232 ; spi_slave:spi_slave_rx_inst|rdata[20] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.082 ; 1.879 ; -; 2.345 ; spi_slave:spi_slave_rx_inst|rdata[19] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.112 ; 1.796 ; -; 2.367 ; spi_slave:spi_slave_rx_inst|rdata[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.051 ; 1.713 ; -; 2.397 ; spi_slave:spi_slave_rx_inst|rdata[30] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; -0.037 ; 1.595 ; -; 2.406 ; spi_slave:spi_slave_rx_inst|rdata[31] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; -0.037 ; 1.586 ; -; 2.430 ; spi_slave:spi_slave_rx_inst|rdata[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.051 ; 1.650 ; -; 2.467 ; spi_slave:spi_slave_rx_inst|rdata[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.051 ; 1.613 ; -; 2.494 ; spi_slave:spi_slave_rx_inst|rdata[26] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.098 ; 1.633 ; -; 2.506 ; spi_slave:spi_slave_rx_inst|rdata[25] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.041 ; 1.564 ; -; 2.515 ; spi_slave:spi_slave_rx_inst|rdata[22] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.082 ; 1.596 ; -; 2.519 ; spi_slave:spi_slave_rx_inst|rdata[27] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.098 ; 1.608 ; -; 2.526 ; spi_slave:spi_slave_rx_inst|rdata[24] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.041 ; 1.544 ; -; 2.549 ; spi_slave:spi_slave_rx_inst|rdata[17] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.169 ; 1.649 ; -; 2.564 ; spi_slave:spi_slave_rx_inst|rdata[23] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.082 ; 1.547 ; -; 2.583 ; spi_slave:spi_slave_rx_inst|rdata[21] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.082 ; 1.528 ; -; 2.628 ; spi_slave:spi_slave_rx_inst|rdata[18] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.112 ; 1.513 ; -; 2.913 ; spi_slave:spi_slave_rx_inst|rdata[29] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.070 ; 1.186 ; -; 2.941 ; spi_slave:spi_slave_rx_inst|rdata[28] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.127 ; 1.215 ; -; 2.995 ; spi_slave:spi_slave_rx_inst|rdata[16] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.146 ; 1.180 ; -; 2495.443 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.027 ; 4.552 ; -; 2495.491 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.027 ; 4.504 ; -; 2495.605 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 4.425 ; -; 2495.653 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 4.377 ; -; 2495.709 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.027 ; 4.286 ; -; 2495.750 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.027 ; 4.245 ; -; 2495.757 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.027 ; 4.238 ; -; 2495.895 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 4.135 ; -; 2495.910 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 4.120 ; -; 2495.912 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 4.118 ; -; 2495.943 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 4.087 ; -; 2495.958 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 4.072 ; -; 2496.007 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 4.023 ; -; 2496.016 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.027 ; 3.979 ; -; 2496.055 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 3.975 ; -; 2496.202 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 3.828 ; -; 2496.217 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 3.813 ; -; 2496.314 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.008 ; 3.716 ; -; 2496.433 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.179 ; 3.410 ; -; 2496.434 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.179 ; 3.409 ; -; 2496.455 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.179 ; 3.388 ; -; 2496.456 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.179 ; 3.387 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.662 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.125 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[25] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[24] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[22] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[21] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[18] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[17] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[16] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[15] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[14] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[13] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.663 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[12] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.124 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[11] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[4] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[7] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[5] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[8] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[1] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[9] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[6] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[2] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -; 2496.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[0] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.123 ; 3.157 ; -+----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ - - -+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 0C Model Setup: 'spi_sck' ; -+-------+----------------------------------------------------------------------------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+----------------------------------------------------------------------------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.475 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[32] ; spi_ce0 ; spi_sck ; 2.000 ; 3.451 ; 4.968 ; -; 0.533 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[6] ; spi_ce1 ; spi_sck ; 2.000 ; 3.322 ; 4.781 ; -; 0.533 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; spi_ce1 ; spi_sck ; 2.000 ; 3.322 ; 4.781 ; -; 0.533 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[8] ; spi_ce1 ; spi_sck ; 2.000 ; 3.322 ; 4.781 ; -; 0.533 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[7] ; spi_ce1 ; spi_sck ; 2.000 ; 3.322 ; 4.781 ; -; 0.533 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[5] ; spi_ce1 ; spi_sck ; 2.000 ; 3.322 ; 4.781 ; -; 0.533 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[4] ; spi_ce1 ; spi_sck ; 2.000 ; 3.322 ; 4.781 ; -; 0.533 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[3] ; spi_ce1 ; spi_sck ; 2.000 ; 3.322 ; 4.781 ; -; 0.533 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[29] ; spi_ce1 ; spi_sck ; 2.000 ; 3.322 ; 4.781 ; -; 0.533 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[24] ; spi_ce1 ; spi_sck ; 2.000 ; 3.322 ; 4.781 ; -; 0.562 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[36] ; spi_ce0 ; spi_sck ; 2.000 ; 3.479 ; 4.909 ; -; 0.579 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[33] ; spi_ce0 ; spi_sck ; 2.000 ; 3.489 ; 4.902 ; -; 0.579 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[34] ; spi_ce0 ; spi_sck ; 2.000 ; 3.489 ; 4.902 ; -; 0.579 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[37] ; spi_ce0 ; spi_sck ; 2.000 ; 3.489 ; 4.902 ; -; 0.579 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[35] ; spi_ce0 ; spi_sck ; 2.000 ; 3.489 ; 4.902 ; -; 0.583 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_ce0 ; spi_sck ; 2.000 ; 3.318 ; 4.727 ; -; 0.583 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[40] ; spi_ce0 ; spi_sck ; 2.000 ; 3.318 ; 4.727 ; -; 0.583 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[31] ; spi_ce0 ; spi_sck ; 2.000 ; 3.318 ; 4.727 ; -; 0.583 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[30] ; spi_ce0 ; spi_sck ; 2.000 ; 3.318 ; 4.727 ; -; 0.605 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_ce1 ; spi_sck ; 2.000 ; 3.442 ; 4.829 ; -; 0.605 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[30] ; spi_ce1 ; spi_sck ; 2.000 ; 3.442 ; 4.829 ; -; 0.605 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[28] ; spi_ce1 ; spi_sck ; 2.000 ; 3.442 ; 4.829 ; -; 0.605 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[27] ; spi_ce1 ; spi_sck ; 2.000 ; 3.442 ; 4.829 ; -; 0.605 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[20] ; spi_ce1 ; spi_sck ; 2.000 ; 3.442 ; 4.829 ; -; 0.605 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[21] ; spi_ce1 ; spi_sck ; 2.000 ; 3.442 ; 4.829 ; -; 0.605 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[22] ; spi_ce1 ; spi_sck ; 2.000 ; 3.442 ; 4.829 ; -; 0.611 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[3] ; spi_ce0 ; spi_sck ; 2.000 ; 3.445 ; 4.826 ; -; 0.611 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[5] ; spi_ce0 ; spi_sck ; 2.000 ; 3.445 ; 4.826 ; -; 0.611 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[2] ; spi_ce0 ; spi_sck ; 2.000 ; 3.445 ; 4.826 ; -; 0.611 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[0] ; spi_ce0 ; spi_sck ; 2.000 ; 3.445 ; 4.826 ; -; 0.611 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[6] ; spi_ce0 ; spi_sck ; 2.000 ; 3.445 ; 4.826 ; -; 0.611 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[1] ; spi_ce0 ; spi_sck ; 2.000 ; 3.445 ; 4.826 ; -; 0.611 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[4] ; spi_ce0 ; spi_sck ; 2.000 ; 3.445 ; 4.826 ; -; 0.611 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|done ; spi_ce0 ; spi_sck ; 2.000 ; 3.445 ; 4.826 ; -; 0.612 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_slave:spi_slave_rx_inst|treg[47] ; spi_ce0 ; spi_sck ; 4.000 ; -0.363 ; 3.017 ; -; 0.641 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[28] ; spi_ce0 ; spi_sck ; 2.000 ; 3.160 ; 4.511 ; -; 0.641 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[27] ; spi_ce0 ; spi_sck ; 2.000 ; 3.160 ; 4.511 ; -; 0.641 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[26] ; spi_ce0 ; spi_sck ; 2.000 ; 3.160 ; 4.511 ; -; 0.641 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[17] ; spi_ce0 ; spi_sck ; 2.000 ; 3.160 ; 4.511 ; -; 0.679 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[33] ; spi_ce1 ; spi_sck ; 2.000 ; 3.503 ; 4.816 ; -; 0.679 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_ce1 ; spi_sck ; 2.000 ; 3.503 ; 4.816 ; -; 0.679 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[13] ; spi_ce1 ; spi_sck ; 2.000 ; 3.503 ; 4.816 ; -; 0.679 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[12] ; spi_ce1 ; spi_sck ; 2.000 ; 3.503 ; 4.816 ; -; 0.679 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[11] ; spi_ce1 ; spi_sck ; 2.000 ; 3.503 ; 4.816 ; -; 0.679 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[10] ; spi_ce1 ; spi_sck ; 2.000 ; 3.503 ; 4.816 ; -; 0.679 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_ce1 ; spi_sck ; 2.000 ; 3.503 ; 4.816 ; -; 0.679 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_ce1 ; spi_sck ; 2.000 ; 3.503 ; 4.816 ; -; 0.682 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[23] ; spi_ce1 ; spi_sck ; 2.000 ; 3.457 ; 4.767 ; -; 0.684 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[14] ; spi_ce1 ; spi_sck ; 2.000 ; 3.444 ; 4.752 ; -; 0.684 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[15] ; spi_ce1 ; spi_sck ; 2.000 ; 3.444 ; 4.752 ; -; 0.684 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[2] ; spi_ce1 ; spi_sck ; 2.000 ; 3.444 ; 4.752 ; -; 0.684 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[1] ; spi_ce1 ; spi_sck ; 2.000 ; 3.444 ; 4.752 ; -; 0.684 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[0] ; spi_ce1 ; spi_sck ; 2.000 ; 3.444 ; 4.752 ; -; 0.684 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_ce1 ; spi_sck ; 2.000 ; 3.444 ; 4.752 ; -; 0.684 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_ce1 ; spi_sck ; 2.000 ; 3.444 ; 4.752 ; -; 0.684 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; spi_ce1 ; spi_sck ; 2.000 ; 3.444 ; 4.752 ; -; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[17] ; spi_ce1 ; spi_sck ; 2.000 ; 3.505 ; 4.792 ; -; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[16] ; spi_ce1 ; spi_sck ; 2.000 ; 3.505 ; 4.792 ; -; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[38] ; spi_ce1 ; spi_sck ; 2.000 ; 3.505 ; 4.792 ; -; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[19] ; spi_ce1 ; spi_sck ; 2.000 ; 3.505 ; 4.792 ; -; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[18] ; spi_ce1 ; spi_sck ; 2.000 ; 3.505 ; 4.792 ; -; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[37] ; spi_ce1 ; spi_sck ; 2.000 ; 3.505 ; 4.792 ; -; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[36] ; spi_ce1 ; spi_sck ; 2.000 ; 3.505 ; 4.792 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[29] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[31] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[30] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[28] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[27] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[26] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[25] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[18] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[19] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[17] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[24] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[16] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[20] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[21] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[22] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.737 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[23] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.164 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[16] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[30] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[31] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[29] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[28] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[27] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[26] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[25] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[18] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[17] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[19] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[24] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[20] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[21] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[22] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.745 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[23] ; spi_ce1 ; spi_sck ; 3.000 ; 2.909 ; 5.156 ; -; 0.793 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[15] ; spi_ce0 ; spi_sck ; 2.000 ; 3.182 ; 4.381 ; -; 0.793 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[13] ; spi_ce0 ; spi_sck ; 2.000 ; 3.182 ; 4.381 ; -; 0.793 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[16] ; spi_ce0 ; spi_sck ; 2.000 ; 3.182 ; 4.381 ; -; 0.793 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[12] ; spi_ce0 ; spi_sck ; 2.000 ; 3.182 ; 4.381 ; -; 0.793 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[3] ; spi_ce0 ; spi_sck ; 2.000 ; 3.182 ; 4.381 ; -+-------+----------------------------------------------------------------------------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ ++----------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 0C Model Setup: 'spi_sck' ; ++-------+-----------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+-----------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.293 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[33] ; spi_ce1 ; spi_sck ; 2.000 ; 3.462 ; 5.161 ; +; 0.293 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[37] ; spi_ce1 ; spi_sck ; 2.000 ; 3.462 ; 5.161 ; +; 0.293 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[36] ; spi_ce1 ; spi_sck ; 2.000 ; 3.462 ; 5.161 ; +; 0.293 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_ce1 ; spi_sck ; 2.000 ; 3.462 ; 5.161 ; +; 0.293 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_ce1 ; spi_sck ; 2.000 ; 3.462 ; 5.161 ; +; 0.293 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[38] ; spi_ce1 ; spi_sck ; 2.000 ; 3.462 ; 5.161 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[24] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[21] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[22] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[4] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[3] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[27] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[30] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[2] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.370 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[23] ; spi_ce1 ; spi_sck ; 2.000 ; 3.487 ; 5.109 ; +; 0.403 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[7] ; spi_ce1 ; spi_sck ; 2.000 ; 3.405 ; 4.994 ; +; 0.403 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[28] ; spi_ce1 ; spi_sck ; 2.000 ; 3.405 ; 4.994 ; +; 0.431 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_ce1 ; spi_sck ; 2.000 ; 3.559 ; 5.120 ; +; 0.431 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[1] ; spi_ce1 ; spi_sck ; 2.000 ; 3.559 ; 5.120 ; +; 0.431 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[29] ; spi_ce1 ; spi_sck ; 2.000 ; 3.559 ; 5.120 ; +; 0.563 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[39] ; spi_ce1 ; spi_sck ; 2.000 ; 3.525 ; 4.954 ; +; 0.563 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[41] ; spi_ce1 ; spi_sck ; 2.000 ; 3.525 ; 4.954 ; +; 0.563 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_ce1 ; spi_sck ; 2.000 ; 3.525 ; 4.954 ; +; 0.563 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[47] ; spi_ce1 ; spi_sck ; 2.000 ; 3.525 ; 4.954 ; +; 0.563 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[44] ; spi_ce1 ; spi_sck ; 2.000 ; 3.525 ; 4.954 ; +; 0.563 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[42] ; spi_ce1 ; spi_sck ; 2.000 ; 3.525 ; 4.954 ; +; 0.563 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_ce1 ; spi_sck ; 2.000 ; 3.525 ; 4.954 ; +; 0.563 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[43] ; spi_ce1 ; spi_sck ; 2.000 ; 3.525 ; 4.954 ; +; 0.606 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_ce0 ; spi_sck ; 2.000 ; 3.153 ; 4.539 ; +; 0.606 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[3] ; spi_ce0 ; spi_sck ; 2.000 ; 3.153 ; 4.539 ; +; 0.606 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[2] ; spi_ce0 ; spi_sck ; 2.000 ; 3.153 ; 4.539 ; +; 0.606 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[1] ; spi_ce0 ; spi_sck ; 2.000 ; 3.153 ; 4.539 ; +; 0.606 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[0] ; spi_ce0 ; spi_sck ; 2.000 ; 3.153 ; 4.539 ; +; 0.606 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_ce0 ; spi_sck ; 2.000 ; 3.153 ; 4.539 ; +; 0.606 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[31] ; spi_ce0 ; spi_sck ; 2.000 ; 3.153 ; 4.539 ; +; 0.613 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[0] ; spi_ce1 ; spi_sck ; 2.000 ; 3.345 ; 4.724 ; +; 0.613 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[18] ; spi_ce1 ; spi_sck ; 2.000 ; 3.345 ; 4.724 ; +; 0.615 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[17] ; spi_ce1 ; spi_sck ; 2.000 ; 3.335 ; 4.712 ; +; 0.615 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; spi_ce1 ; spi_sck ; 2.000 ; 3.335 ; 4.712 ; +; 0.615 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[8] ; spi_ce1 ; spi_sck ; 2.000 ; 3.335 ; 4.712 ; +; 0.615 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[6] ; spi_ce1 ; spi_sck ; 2.000 ; 3.335 ; 4.712 ; +; 0.615 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[5] ; spi_ce1 ; spi_sck ; 2.000 ; 3.335 ; 4.712 ; +; 0.615 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[19] ; spi_ce1 ; spi_sck ; 2.000 ; 3.335 ; 4.712 ; +; 0.615 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[20] ; spi_ce1 ; spi_sck ; 2.000 ; 3.335 ; 4.712 ; +; 0.646 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[5] ; spi_ce0 ; spi_sck ; 2.000 ; 3.172 ; 4.518 ; +; 0.646 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[12] ; spi_ce0 ; spi_sck ; 2.000 ; 3.172 ; 4.518 ; +; 0.646 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[10] ; spi_ce0 ; spi_sck ; 2.000 ; 3.172 ; 4.518 ; +; 0.646 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[9] ; spi_ce0 ; spi_sck ; 2.000 ; 3.172 ; 4.518 ; +; 0.646 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[8] ; spi_ce0 ; spi_sck ; 2.000 ; 3.172 ; 4.518 ; +; 0.646 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[7] ; spi_ce0 ; spi_sck ; 2.000 ; 3.172 ; 4.518 ; +; 0.646 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[6] ; spi_ce0 ; spi_sck ; 2.000 ; 3.172 ; 4.518 ; +; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[15] ; spi_ce1 ; spi_sck ; 2.000 ; 3.386 ; 4.712 ; +; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[16] ; spi_ce1 ; spi_sck ; 2.000 ; 3.386 ; 4.712 ; +; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[14] ; spi_ce1 ; spi_sck ; 2.000 ; 3.386 ; 4.712 ; +; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[13] ; spi_ce1 ; spi_sck ; 2.000 ; 3.386 ; 4.712 ; +; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[10] ; spi_ce1 ; spi_sck ; 2.000 ; 3.386 ; 4.712 ; +; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[11] ; spi_ce1 ; spi_sck ; 2.000 ; 3.386 ; 4.712 ; +; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[12] ; spi_ce1 ; spi_sck ; 2.000 ; 3.386 ; 4.712 ; +; 0.667 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[3] ; spi_ce1 ; spi_sck ; 2.000 ; 3.075 ; 4.400 ; +; 0.667 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[4] ; spi_ce1 ; spi_sck ; 2.000 ; 3.075 ; 4.400 ; +; 0.667 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[5] ; spi_ce1 ; spi_sck ; 2.000 ; 3.075 ; 4.400 ; +; 0.667 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[6] ; spi_ce1 ; spi_sck ; 2.000 ; 3.075 ; 4.400 ; +; 0.667 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[2] ; spi_ce1 ; spi_sck ; 2.000 ; 3.075 ; 4.400 ; +; 0.667 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[1] ; spi_ce1 ; spi_sck ; 2.000 ; 3.075 ; 4.400 ; +; 0.667 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[0] ; spi_ce1 ; spi_sck ; 2.000 ; 3.075 ; 4.400 ; +; 0.692 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[33] ; spi_ce0 ; spi_sck ; 2.000 ; 3.587 ; 4.887 ; +; 0.692 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[35] ; spi_ce0 ; spi_sck ; 2.000 ; 3.587 ; 4.887 ; +; 0.692 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[32] ; spi_ce0 ; spi_sck ; 2.000 ; 3.587 ; 4.887 ; +; 0.692 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[34] ; spi_ce0 ; spi_sck ; 2.000 ; 3.587 ; 4.887 ; +; 0.692 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[37] ; spi_ce0 ; spi_sck ; 2.000 ; 3.587 ; 4.887 ; +; 0.692 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[36] ; spi_ce0 ; spi_sck ; 2.000 ; 3.587 ; 4.887 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[21] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[30] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[13] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[40] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[23] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[16] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[18] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[17] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[20] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[19] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[14] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[29] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[15] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[22] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.693 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[11] ; spi_ce0 ; spi_sck ; 2.000 ; 3.165 ; 4.464 ; +; 0.701 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[26] ; spi_ce0 ; spi_sck ; 2.000 ; 3.457 ; 4.748 ; +; 0.701 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[27] ; spi_ce0 ; spi_sck ; 2.000 ; 3.457 ; 4.748 ; +; 0.701 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[24] ; spi_ce0 ; spi_sck ; 2.000 ; 3.457 ; 4.748 ; +; 0.701 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[25] ; spi_ce0 ; spi_sck ; 2.000 ; 3.457 ; 4.748 ; +; 0.701 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[28] ; spi_ce0 ; spi_sck ; 2.000 ; 3.457 ; 4.748 ; +; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_ce1 ; spi_sck ; 3.000 ; 2.917 ; 5.204 ; +; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[39] ; spi_ce1 ; spi_sck ; 3.000 ; 2.917 ; 5.204 ; +; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[43] ; spi_ce1 ; spi_sck ; 3.000 ; 2.917 ; 5.204 ; +; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[31] ; spi_ce1 ; spi_sck ; 3.000 ; 2.917 ; 5.204 ; +; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[37] ; spi_ce1 ; spi_sck ; 3.000 ; 2.917 ; 5.204 ; ++-------+-----------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -2667,214 +2559,322 @@ No paths to report. +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ -; 0.768 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.938 ; 2.053 ; -; 0.772 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.932 ; 2.055 ; -; 0.783 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.933 ; 2.043 ; -; 0.834 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.807 ; 2.118 ; -; 0.849 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.933 ; 1.977 ; -; 0.854 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.923 ; 1.982 ; -; 0.873 ; spi_slave:spi_slave_rx2_inst|rdata[46] ; iambic_mode[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.880 ; 2.239 ; -; 0.902 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.957 ; 1.900 ; -; 0.907 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.806 ; 2.046 ; -; 0.911 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.806 ; 2.042 ; -; 0.913 ; spi_slave:spi_slave_rx2_inst|rdata[47] ; iambic_mode[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.880 ; 2.199 ; -; 0.919 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.796 ; 2.044 ; -; 0.920 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.796 ; 2.043 ; -; 0.973 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.000 ; 1.786 ; -; 1.039 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.002 ; 1.718 ; -; 1.040 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.002 ; 1.717 ; -; 1.041 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.000 ; 1.718 ; -; 1.044 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.933 ; 1.782 ; -; 1.046 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.000 ; 1.713 ; -; 1.054 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.923 ; 1.782 ; -; 1.061 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.000 ; 1.698 ; -; 1.068 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.004 ; 1.687 ; -; 1.081 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.933 ; 1.745 ; -; 1.086 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.923 ; 1.750 ; -; 1.092 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.987 ; 1.680 ; -; 1.098 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.923 ; 1.738 ; -; 1.105 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.002 ; 1.652 ; -; 1.109 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.934 ; 1.716 ; -; 1.111 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.934 ; 1.714 ; -; 1.113 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.938 ; 1.708 ; -; 1.114 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.941 ; 1.704 ; -; 1.117 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.985 ; 1.657 ; -; 1.118 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.938 ; 1.703 ; -; 1.121 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.923 ; 1.715 ; -; 1.128 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.938 ; 1.693 ; -; 1.131 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.932 ; 1.696 ; -; 1.140 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.933 ; 1.686 ; -; 1.142 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.997 ; 1.620 ; -; 1.143 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.927 ; 1.689 ; -; 1.143 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.998 ; 1.618 ; -; 1.148 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.004 ; 1.607 ; -; 1.149 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.002 ; 1.608 ; -; 1.150 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.995 ; 1.614 ; -; 1.150 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.985 ; 1.624 ; -; 1.151 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.941 ; 1.667 ; -; 1.152 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.948 ; 1.659 ; -; 1.154 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.940 ; 1.665 ; -; 1.159 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.991 ; 1.609 ; -; 1.163 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.938 ; 1.658 ; -; 1.164 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.938 ; 1.657 ; -; 1.172 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.806 ; 1.781 ; -; 1.174 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.806 ; 1.779 ; -; 1.174 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.932 ; 1.653 ; -; 1.178 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.932 ; 1.649 ; -; 1.180 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.941 ; 1.638 ; -; 1.182 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.796 ; 1.781 ; -; 1.194 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.941 ; 1.624 ; -; 1.194 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.940 ; 1.625 ; -; 1.197 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.796 ; 1.766 ; -; 1.211 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.938 ; 1.610 ; -; 1.212 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.807 ; 1.740 ; -; 1.213 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.806 ; 1.740 ; -; 1.213 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.816 ; 1.730 ; -; 1.218 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; cw_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.886 ; 1.888 ; -; 1.218 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.796 ; 1.745 ; -; 1.223 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.796 ; 1.740 ; -; 1.226 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.925 ; 1.608 ; -; 1.231 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.806 ; 1.722 ; -; 1.243 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.806 ; 1.710 ; -; 1.252 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.796 ; 1.711 ; -; 1.265 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.800 ; 1.694 ; -; 1.282 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; rx2_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.760 ; 1.950 ; -; 1.302 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.813 ; 1.644 ; -; 1.315 ; spi_slave:spi_slave_rx2_inst|rdata[44] ; cw_speed[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.886 ; 1.791 ; -; 1.327 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.813 ; 1.619 ; -; 1.331 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.813 ; 1.615 ; -; 1.333 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.813 ; 1.613 ; -; 1.335 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; rx2_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.890 ; 1.767 ; -; 1.346 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; cw_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.754 ; 1.892 ; -; 1.346 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.813 ; 1.600 ; -; 1.350 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.004 ; 1.405 ; -; 1.365 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.002 ; 1.392 ; -; 1.369 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.007 ; 1.383 ; -; 1.378 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.004 ; 1.377 ; -; 1.380 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.007 ; 1.372 ; -; 1.387 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.995 ; 1.377 ; -; 1.392 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.995 ; 1.372 ; -; 1.397 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.985 ; 1.377 ; -; 1.398 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.985 ; 1.376 ; -; 1.407 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.991 ; 1.361 ; -; 1.414 ; spi_slave:spi_slave_rx2_inst|rdata[39] ; keyer_revers ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.883 ; 1.695 ; -; 1.414 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.002 ; 1.343 ; -; 1.416 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.941 ; 1.402 ; -; 1.427 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.997 ; 1.335 ; -; 1.432 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.998 ; 1.329 ; -; 1.439 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.938 ; 1.382 ; -; 1.440 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.995 ; 1.324 ; -; 1.440 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.938 ; 1.381 ; -; 1.454 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.941 ; 1.364 ; -; 1.455 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.927 ; 1.377 ; +; 0.422 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.603 ; 2.734 ; +; 0.430 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.600 ; 2.729 ; +; 0.432 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.833 ; 2.494 ; +; 0.453 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.758 ; 2.548 ; +; 0.496 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.596 ; 2.667 ; +; 0.526 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.609 ; 2.624 ; +; 0.529 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.836 ; 2.394 ; +; 0.532 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.758 ; 2.469 ; +; 0.539 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.603 ; 2.617 ; +; 0.540 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.761 ; 2.458 ; +; 0.541 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.606 ; 2.612 ; +; 0.546 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.758 ; 2.455 ; +; 0.561 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; rx2_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.910 ; 2.521 ; +; 0.564 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.761 ; 2.434 ; +; 0.566 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.832 ; 2.361 ; +; 0.573 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.761 ; 2.425 ; +; 0.574 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.596 ; 2.589 ; +; 0.575 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.758 ; 2.426 ; +; 0.576 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.600 ; 2.583 ; +; 0.576 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.596 ; 2.587 ; +; 0.596 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.758 ; 2.405 ; +; 0.599 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.758 ; 2.402 ; +; 0.612 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.761 ; 2.386 ; +; 0.614 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.761 ; 2.384 ; +; 0.627 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.761 ; 2.371 ; +; 0.646 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.462 ; +; 0.660 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.676 ; 2.423 ; +; 0.680 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.673 ; 2.406 ; +; 0.706 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.402 ; +; 0.734 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.038 ; 1.987 ; +; 0.738 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.596 ; 2.425 ; +; 0.746 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.362 ; +; 0.751 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.357 ; +; 0.779 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.669 ; 2.311 ; +; 0.786 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.945 ; 2.028 ; +; 0.786 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.322 ; +; 0.789 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.596 ; 2.374 ; +; 0.800 ; spi_slave:spi_slave_rx2_inst|rdata[38] ; keyer_weight[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.022 ; 1.937 ; +; 0.812 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.757 ; 2.190 ; +; 0.814 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.829 ; 2.116 ; +; 0.820 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.754 ; 2.185 ; +; 0.823 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.761 ; 2.175 ; +; 0.826 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.754 ; 2.179 ; +; 0.827 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.757 ; 2.175 ; +; 0.827 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.599 ; 2.333 ; +; 0.830 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.880 ; 2.049 ; +; 0.832 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.648 ; 2.279 ; +; 0.833 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.880 ; 2.046 ; +; 0.845 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.761 ; 2.153 ; +; 0.855 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.880 ; 2.024 ; +; 0.856 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.648 ; 2.255 ; +; 0.862 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.672 ; 2.225 ; +; 0.878 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.754 ; 2.127 ; +; 0.883 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.761 ; 2.115 ; +; 0.885 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.648 ; 2.226 ; +; 0.889 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.758 ; 2.112 ; +; 0.897 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.211 ; +; 0.901 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.880 ; 1.978 ; +; 0.908 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.599 ; 2.252 ; +; 0.910 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.648 ; 2.201 ; +; 0.911 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.758 ; 2.090 ; +; 0.920 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.599 ; 2.240 ; +; 0.922 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.599 ; 2.238 ; +; 0.923 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.651 ; 2.185 ; +; 0.936 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.758 ; 2.065 ; +; 0.936 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.897 ; 1.926 ; +; 0.943 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.599 ; 2.217 ; +; 0.949 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.757 ; 2.053 ; +; 0.957 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.117 ; 1.685 ; +; 0.961 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.648 ; 2.150 ; +; 0.966 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.130 ; 1.663 ; +; 0.967 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.945 ; 1.847 ; +; 0.973 ; spi_slave:spi_slave_rx2_inst|rdata[32] ; keyer_weight[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.123 ; 1.663 ; +; 0.979 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.894 ; 1.886 ; +; 0.986 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.897 ; 1.876 ; +; 0.986 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.055 ; 1.718 ; +; 0.997 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.042 ; 1.720 ; +; 1.007 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.055 ; 1.697 ; +; 1.011 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.055 ; 1.693 ; +; 1.013 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.038 ; 1.708 ; +; 1.015 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.884 ; 1.860 ; +; 1.018 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.055 ; 1.686 ; +; 1.023 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.113 ; 1.623 ; +; 1.028 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.884 ; 1.847 ; +; 1.035 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.055 ; 1.669 ; +; 1.037 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.055 ; 1.667 ; +; 1.039 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.042 ; 1.678 ; +; 1.041 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.042 ; 1.676 ; +; 1.049 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.055 ; 1.655 ; +; 1.050 ; spi_slave:spi_slave_rx2_inst|rdata[34] ; keyer_weight[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.022 ; 1.687 ; +; 1.053 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.042 ; 1.664 ; +; 1.054 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.648 ; 2.057 ; +; 1.059 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.945 ; 1.755 ; +; 1.060 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.613 ; 2.086 ; +; 1.061 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.051 ; 1.647 ; +; 1.061 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.945 ; 1.753 ; +; 1.074 ; spi_slave:spi_slave_rx2_inst|rdata[33] ; keyer_weight[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.022 ; 1.663 ; +; 1.076 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.042 ; 1.641 ; +; 1.077 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.042 ; 1.640 ; +; 1.079 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -1.042 ; 1.638 ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 0C Model Setup: 'spi_ce0' ; ++----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.437 ; spi_slave:spi_slave_rx_inst|rdata[15] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.155 ; 1.747 ; +; 0.611 ; spi_slave:spi_slave_rx_inst|rdata[13] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.155 ; 1.573 ; +; 0.624 ; spi_slave:spi_slave_rx_inst|rdata[14] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.155 ; 1.560 ; +; 0.624 ; spi_slave:spi_slave_rx_inst|rdata[12] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.147 ; 1.552 ; +; 0.920 ; spi_slave:spi_slave_rx_inst|rdata[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.161 ; 1.270 ; +; 0.928 ; spi_slave:spi_slave_rx_inst|rdata[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.124 ; 1.225 ; +; 0.939 ; spi_slave:spi_slave_rx_inst|rdata[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.161 ; 1.251 ; +; 0.940 ; spi_slave:spi_slave_rx_inst|rdata[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.124 ; 1.213 ; +; 0.958 ; spi_slave:spi_slave_rx_inst|rdata[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.124 ; 1.195 ; +; 0.963 ; spi_slave:spi_slave_rx_inst|rdata[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.161 ; 1.227 ; +; 0.988 ; spi_slave:spi_slave_rx_inst|rdata[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.132 ; 1.173 ; +; 0.990 ; spi_slave:spi_slave_rx_inst|rdata[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.161 ; 1.200 ; +; 1.180 ; spi_slave:spi_slave_rx_inst|rdata[28] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; -0.042 ; 2.807 ; +; 2.062 ; spi_slave:spi_slave_rx_inst|rdata[20] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.169 ; 2.136 ; +; 2.213 ; spi_slave:spi_slave_rx_inst|rdata[25] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; -0.065 ; 1.751 ; +; 2.242 ; spi_slave:spi_slave_rx_inst|rdata[24] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; -0.065 ; 1.722 ; +; 2.338 ; spi_slave:spi_slave_rx_inst|rdata[16] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.235 ; 1.926 ; +; 2.349 ; spi_slave:spi_slave_rx_inst|rdata[29] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.262 ; 1.942 ; +; 2.350 ; spi_slave:spi_slave_rx_inst|rdata[30] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.262 ; 1.941 ; +; 2.351 ; spi_slave:spi_slave_rx_inst|rdata[27] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; -0.065 ; 1.613 ; +; 2.364 ; spi_slave:spi_slave_rx_inst|rdata[26] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; -0.065 ; 1.600 ; +; 2.417 ; spi_slave:spi_slave_rx_inst|rdata[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.129 ; 1.741 ; +; 2.454 ; spi_slave:spi_slave_rx_inst|rdata[31] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.275 ; 1.850 ; +; 2.472 ; spi_slave:spi_slave_rx_inst|rdata[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.150 ; 1.707 ; +; 2.510 ; spi_slave:spi_slave_rx_inst|rdata[23] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.169 ; 1.688 ; +; 2.527 ; spi_slave:spi_slave_rx_inst|rdata[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.129 ; 1.631 ; +; 2.549 ; spi_slave:spi_slave_rx_inst|rdata[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.129 ; 1.609 ; +; 2.551 ; spi_slave:spi_slave_rx_inst|rdata[19] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.235 ; 1.713 ; +; 2.560 ; spi_slave:spi_slave_rx_inst|rdata[21] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.169 ; 1.638 ; +; 2.597 ; spi_slave:spi_slave_rx_inst|rdata[22] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.169 ; 1.601 ; +; 2.670 ; spi_slave:spi_slave_rx_inst|rdata[18] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.235 ; 1.594 ; +; 2.674 ; spi_slave:spi_slave_rx_inst|rdata[17] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.235 ; 1.590 ; +; 2495.976 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.082 ; 4.128 ; +; 2496.024 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.117 ; 4.115 ; +; 2496.259 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.082 ; 3.845 ; +; 2496.265 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.204 ; 3.553 ; +; 2496.283 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.204 ; 3.535 ; +; 2496.307 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.117 ; 3.832 ; +; 2496.310 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.204 ; 3.508 ; +; 2496.318 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.204 ; 3.500 ; +; 2496.328 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.204 ; 3.490 ; +; 2496.363 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.204 ; 3.455 ; +; 2496.379 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.241 ; 3.402 ; +; 2496.397 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.241 ; 3.384 ; +; 2496.432 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.241 ; 3.349 ; +; 2496.472 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.082 ; 3.632 ; +; 2496.639 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.241 ; 3.142 ; +; 2496.642 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.082 ; 3.462 ; +; 2496.649 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.241 ; 3.132 ; +; 2496.657 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.241 ; 3.124 ; +; 2496.667 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.241 ; 3.114 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.669 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.118 ; 3.157 ; +; 2496.673 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.241 ; 3.108 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[11] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[4] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[7] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[10] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[0] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[9] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[8] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[6] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[2] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[1] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[25] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[24] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[22] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[21] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[18] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[17] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[16] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[15] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[14] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[13] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[12] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[3] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; +; 2496.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[5] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.113 ; 3.157 ; ++----------+-----------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ + + +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Setup: 'ad9866_clk' ; +-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ -; 1.199 ; ad9866_clk ; ad9866_txclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 4.811 ; -; 1.199 ; ad9866_clk ; ad9866_rxclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 4.811 ; -; 1.353 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.026 ; 7.141 ; -; 1.466 ; ad9866_adio[6] ; adcpipe[1][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.784 ; 4.340 ; -; 1.468 ; ad9866_adio[7] ; adcpipe[0][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.079 ; 4.633 ; -; 1.474 ; ad9866_adio[8] ; adcpipe[1][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.784 ; 4.332 ; -; 1.477 ; ad9866_adio[4] ; adcpipe[1][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.040 ; 4.585 ; -; 1.483 ; ad9866_adio[10] ; adcpipe[1][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.784 ; 4.323 ; -; 1.495 ; ad9866_adio[10] ; adcpipe[0][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.079 ; 4.606 ; -; 1.500 ; ad9866_adio[1] ; adcpipe[1][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.869 ; 4.391 ; -; 1.512 ; ad9866_adio[0] ; adcpipe[0][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.775 ; 4.285 ; -; 1.514 ; ad9866_adio[8] ; adcpipe[0][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.079 ; 4.587 ; -; 1.570 ; ad9866_adio[0] ; adcpipe[1][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.821 ; 4.273 ; -; 1.578 ; ad9866_adio[4] ; adcpipe[0][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.087 ; 4.531 ; -; 1.594 ; ad9866_adio[6] ; adcpipe[0][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.079 ; 4.507 ; -; 1.635 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.026 ; 6.859 ; -; 1.643 ; ad9866_adio[7] ; adcpipe[1][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.869 ; 4.248 ; -; 1.653 ; ad9866_adio[3] ; adcpipe[1][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.957 ; 4.326 ; -; 1.654 ; ad9866_adio[2] ; adcpipe[1][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.163 ; 4.531 ; -; 1.668 ; ad9866_adio[2] ; adcpipe[0][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.069 ; 4.423 ; -; 1.702 ; ad9866_adio[11] ; adcpipe[1][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.072 ; 4.392 ; -; 1.703 ; ad9866_adio[11] ; adcpipe[0][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.072 ; 4.391 ; -; 1.714 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.882 ; 6.924 ; -; 1.715 ; ad9866_adio[5] ; adcpipe[1][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.893 ; 4.200 ; -; 1.715 ; ad9866_adio[5] ; adcpipe[0][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.893 ; 4.200 ; -; 1.723 ; ad9866_adio[9] ; adcpipe[1][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.957 ; 4.256 ; -; 1.723 ; ad9866_adio[9] ; adcpipe[0][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.957 ; 4.256 ; -; 1.800 ; ad9866_adio[1] ; adcpipe[0][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.676 ; 3.898 ; -; 1.880 ; ad9866_adio[3] ; adcpipe[0][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.959 ; 4.101 ; -; 1.956 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.842 ; 6.722 ; -; 2.046 ; spi_slave:spi_slave_rx_inst|treg[47] ; spi_miso ; spi_sck ; ad9866_clk ; 11.000 ; -3.282 ; 5.142 ; -; 2.052 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.882 ; 6.586 ; -; 2.082 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.816 ; 6.622 ; -; 2.104 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.914 ; 6.502 ; -; 2.116 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.842 ; 6.562 ; -; 2.139 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.105 ; 6.276 ; -; 2.183 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.830 ; 6.507 ; -; 2.241 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.842 ; 6.437 ; -; 2.333 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.903 ; 6.284 ; -; 2.353 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.158 ; 6.009 ; -; 2.359 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.823 ; 6.338 ; -; 2.381 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.805 ; 6.334 ; -; 2.383 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.805 ; 6.332 ; -; 2.444 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.467 ; 6.609 ; -; 2.461 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.467 ; 6.592 ; -; 2.471 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.842 ; 6.207 ; -; 2.472 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.914 ; 6.134 ; -; 2.496 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.424 ; 6.600 ; -; 2.524 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.830 ; 6.166 ; -; 2.530 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -4.105 ; 5.885 ; -; 2.570 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.424 ; 6.526 ; -; 2.572 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.466 ; 6.482 ; -; 2.573 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.466 ; 6.481 ; -; 2.617 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.739 ; 6.164 ; -; 2.639 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.739 ; 6.142 ; -; 2.670 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.903 ; 5.947 ; -; 2.681 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.466 ; 6.373 ; -; 2.681 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.466 ; 6.373 ; -; 2.701 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.805 ; 6.014 ; -; 2.710 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.805 ; 6.005 ; -; 2.727 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.739 ; 6.054 ; -; 2.745 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.762 ; 6.013 ; -; 2.748 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.739 ; 6.033 ; -; 2.767 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.762 ; 5.991 ; -; 2.797 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.467 ; 6.256 ; -; 2.862 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.424 ; 6.234 ; -; 2.909 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.467 ; 6.144 ; -; 2.970 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.575 ; 9.955 ; -; 3.064 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.823 ; 5.633 ; -; 3.070 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.762 ; 5.688 ; -; 3.147 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.762 ; 5.611 ; -; 3.218 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.424 ; 5.878 ; -; 3.236 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.547 ; 9.717 ; -; 3.357 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.575 ; 9.568 ; -; 3.370 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[12] ; transmitter:transmitter_inst|out_data[12] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.780 ; 2.382 ; -; 3.490 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[4] ; transmitter:transmitter_inst|out_data[4] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.805 ; 2.237 ; -; 3.571 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[2] ; transmitter:transmitter_inst|out_data[2] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.780 ; 2.181 ; -; 3.599 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.464 ; 9.437 ; -; 3.628 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.547 ; 9.325 ; -; 3.724 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[5] ; transmitter:transmitter_inst|out_data[5] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.805 ; 2.003 ; -; 3.758 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[23] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.678 ; 8.606 ; -; 3.764 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][19] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.348 ; 9.626 ; -; 3.773 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][19] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.348 ; 9.617 ; -; 3.807 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[10] ; transmitter:transmitter_inst|out_data[10] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.805 ; 1.920 ; -; 3.808 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[11] ; transmitter:transmitter_inst|out_data[11] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.805 ; 1.919 ; -; 3.830 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[8] ; transmitter:transmitter_inst|out_data[8] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.805 ; 1.897 ; -; 3.851 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[3] ; transmitter:transmitter_inst|out_data[3] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.805 ; 1.876 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[23] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[22] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[21] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[20] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[19] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[18] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[17] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[16] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[15] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[14] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[13] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[12] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; -; 3.852 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:C|Iaccum[11] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.621 ; 8.569 ; +; 1.088 ; ad9866_clk ; ad9866_txclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 4.922 ; +; 1.088 ; ad9866_clk ; ad9866_rxclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 4.922 ; +; 1.446 ; ad9866_adio[8] ; adcpipe[0][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.454 ; 5.030 ; +; 1.462 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.794 ; 7.264 ; +; 1.506 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.751 ; 7.263 ; +; 1.509 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.805 ; 7.206 ; +; 1.518 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.867 ; 7.135 ; +; 1.523 ; ad9866_adio[7] ; adcpipe[0][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.502 ; 5.001 ; +; 1.536 ; ad9866_adio[6] ; adcpipe[1][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.932 ; 4.418 ; +; 1.538 ; ad9866_adio[5] ; adcpipe[0][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.734 ; 4.218 ; +; 1.539 ; ad9866_adio[5] ; adcpipe[1][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.734 ; 4.217 ; +; 1.549 ; ad9866_adio[10] ; adcpipe[0][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.454 ; 4.927 ; +; 1.551 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.762 ; 7.207 ; +; 1.562 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.823 ; 7.135 ; +; 1.563 ; ad9866_adio[2] ; adcpipe[0][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.502 ; 4.961 ; +; 1.571 ; ad9866_adio[8] ; adcpipe[1][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.968 ; 4.419 ; +; 1.581 ; ad9866_adio[9] ; adcpipe[0][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.773 ; 4.214 ; +; 1.582 ; ad9866_adio[9] ; adcpipe[1][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.773 ; 4.213 ; +; 1.590 ; ad9866_adio[0] ; adcpipe[0][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.502 ; 4.934 ; +; 1.604 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.867 ; 7.049 ; +; 1.609 ; ad9866_adio[4] ; adcpipe[0][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.118 ; 4.531 ; +; 1.633 ; ad9866_adio[1] ; adcpipe[0][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.212 ; 4.601 ; +; 1.644 ; ad9866_adio[3] ; adcpipe[0][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.502 ; 4.880 ; +; 1.649 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.823 ; 7.048 ; +; 1.656 ; ad9866_adio[7] ; adcpipe[1][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.932 ; 4.298 ; +; 1.657 ; ad9866_adio[2] ; adcpipe[1][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.127 ; 4.492 ; +; 1.664 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.831 ; 7.025 ; +; 1.668 ; ad9866_adio[4] ; adcpipe[1][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.932 ; 4.286 ; +; 1.674 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.787 ; 7.059 ; +; 1.714 ; ad9866_adio[11] ; adcpipe[0][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.058 ; 4.366 ; +; 1.729 ; ad9866_adio[6] ; adcpipe[0][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.454 ; 4.747 ; +; 1.735 ; ad9866_adio[1] ; adcpipe[1][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.932 ; 4.219 ; +; 1.776 ; ad9866_adio[11] ; adcpipe[1][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.968 ; 4.214 ; +; 1.781 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.794 ; 6.945 ; +; 1.790 ; ad9866_adio[10] ; adcpipe[1][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.909 ; 4.141 ; +; 1.823 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.772 ; 6.925 ; +; 1.826 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.805 ; 6.889 ; +; 1.830 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.338 ; 7.352 ; +; 1.835 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.867 ; 6.818 ; +; 1.845 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.751 ; 6.924 ; +; 1.853 ; spi_slave:spi_slave_rx_inst|treg[47] ; spi_miso ; spi_sck ; ad9866_clk ; 11.000 ; -3.072 ; 5.545 ; +; 1.859 ; ad9866_adio[0] ; adcpipe[1][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 3.086 ; 4.249 ; +; 1.867 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.485 ; 7.168 ; +; 1.891 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.762 ; 6.867 ; +; 1.901 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.823 ; 6.796 ; +; 1.925 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.867 ; 6.728 ; +; 1.948 ; ad9866_adio[3] ; adcpipe[1][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 2.968 ; 4.042 ; +; 1.970 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.860 ; 6.690 ; +; 1.972 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.860 ; 6.688 ; +; 1.978 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.717 ; 6.825 ; +; 1.978 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.679 ; 6.863 ; +; 1.989 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.823 ; 6.708 ; +; 2.001 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.831 ; 6.688 ; +; 2.040 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.351 ; 7.129 ; +; 2.049 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.710 ; 6.761 ; +; 2.168 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.745 ; 6.607 ; +; 2.186 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.338 ; 6.996 ; +; 2.192 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.485 ; 6.843 ; +; 2.284 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.485 ; 6.751 ; +; 2.317 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.717 ; 6.486 ; +; 2.333 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.817 ; 6.370 ; +; 2.345 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.817 ; 6.358 ; +; 2.348 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.817 ; 6.355 ; +; 2.355 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.817 ; 6.348 ; +; 2.429 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.351 ; 6.740 ; +; 2.507 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.745 ; 6.268 ; +; 2.516 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.389 ; 10.915 ; +; 2.532 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.479 ; 10.989 ; +; 2.536 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.479 ; 10.985 ; +; 2.539 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.479 ; 10.982 ; +; 2.600 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.469 ; 6.451 ; +; 2.640 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.860 ; 6.020 ; +; 2.641 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[38] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.479 ; 10.880 ; +; 2.673 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[37] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.479 ; 10.848 ; +; 2.703 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[5] ; transmitter:transmitter_inst|out_data[5] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.546 ; 3.283 ; +; 2.706 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.860 ; 5.954 ; +; 2.734 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.485 ; 6.301 ; +; 2.779 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[40] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.479 ; 10.742 ; +; 2.795 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[12] ; transmitter:transmitter_inst|out_data[12] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.720 ; 3.017 ; +; 2.811 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[39] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.479 ; 10.710 ; +; 2.900 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[41] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.479 ; 10.621 ; +; 2.911 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[2] ; transmitter:transmitter_inst|out_data[2] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.546 ; 3.075 ; +; 3.013 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[43] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.389 ; 10.418 ; +; 3.153 ; transmitter:transmitter_inst|CicInterpM5:in2|y5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.448 ; 10.337 ; +; 3.165 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.265 ; 10.142 ; +; 3.215 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.389 ; 10.216 ; +; 3.219 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.389 ; 10.212 ; +; 3.222 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.389 ; 10.209 ; +; 3.289 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[45] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.389 ; 10.142 ; +; 3.291 ; transmitter:transmitter_inst|CicInterpM5:in2|y5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.448 ; 10.199 ; +; 3.304 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -3.469 ; 5.747 ; +; 3.315 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.269 ; 9.996 ; +; 3.324 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[38] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.389 ; 10.107 ; +; 3.335 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rx2_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 17.000 ; -3.223 ; 9.942 ; +; 3.338 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[11] ; transmitter:transmitter_inst|out_data[11] ; ad9866_clk ; ad9866_clk ; 6.510 ; -0.500 ; 2.694 ; +; 3.356 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[37] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.389 ; 10.075 ; +; 3.380 ; transmitter:transmitter_inst|CicInterpM5:in2|y5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.448 ; 10.110 ; +; 3.383 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.411 ; 10.070 ; +; 3.387 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.411 ; 10.066 ; +; 3.390 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.411 ; 10.063 ; +-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ @@ -2883,106 +2883,106 @@ No paths to report. +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ -; 1.560 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 2.608 ; -; 1.605 ; spi_slave:spi_slave_rx_inst|rdata[34] ; rx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.749 ; 1.638 ; -; 1.607 ; spi_slave:spi_slave_rx_inst|rdata[33] ; rx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.749 ; 1.636 ; -; 1.608 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.598 ; 2.982 ; -; 1.698 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.636 ; 2.930 ; -; 1.712 ; spi_slave:spi_slave_rx_inst|rdata[35] ; tx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.748 ; 1.532 ; -; 1.712 ; spi_slave:spi_slave_rx_inst|rdata[34] ; tx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.748 ; 1.532 ; -; 1.724 ; spi_slave:spi_slave_rx_inst|rdata[37] ; tx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.748 ; 1.520 ; -; 1.729 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.625 ; 2.888 ; -; 1.730 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.618 ; 2.880 ; -; 1.764 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.579 ; 2.807 ; -; 1.780 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.417 ; 2.396 ; -; 1.781 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.598 ; 2.809 ; -; 1.782 ; spi_slave:spi_slave_rx_inst|rdata[32] ; rx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -1.374 ; 0.836 ; -; 1.802 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.636 ; 2.826 ; -; 1.828 ; spi_slave:spi_slave_rx_inst|rdata[37] ; rx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.378 ; 1.786 ; -; 1.877 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.466 ; 2.348 ; -; 1.884 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.466 ; 2.341 ; -; 1.885 ; spi_slave:spi_slave_rx_inst|rdata[36] ; tx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.738 ; 1.369 ; -; 1.892 ; spi_slave:spi_slave_rx_inst|rdata[35] ; rx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.749 ; 1.351 ; -; 1.895 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.417 ; 2.281 ; -; 1.898 ; spi_slave:spi_slave_rx_inst|rdata[33] ; tx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.748 ; 1.346 ; -; 1.912 ; spi_slave:spi_slave_rx_inst|rdata[32] ; tx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.709 ; 1.371 ; -; 1.957 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.636 ; 2.671 ; -; 1.959 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.479 ; 2.512 ; -; 1.989 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.580 ; 2.583 ; -; 1.999 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.479 ; 2.472 ; -; 2.010 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.302 ; 2.051 ; -; 2.013 ; spi_slave:spi_slave_rx_inst|rdata[36] ; rx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.368 ; 1.611 ; -; 2.019 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.614 ; 2.587 ; -; 2.040 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.579 ; 2.531 ; -; 2.041 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.472 ; 2.423 ; -; 2.078 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.598 ; 2.512 ; -; 2.079 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.466 ; 2.146 ; -; 2.089 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.614 ; 2.517 ; -; 2.092 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.417 ; 2.084 ; -; 2.110 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.579 ; 2.461 ; -; 2.129 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.614 ; 2.477 ; -; 2.135 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.444 ; 2.068 ; -; 2.137 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.466 ; 2.088 ; -; 2.156 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.417 ; 2.020 ; -; 2.159 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.598 ; 2.431 ; -; 2.164 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.444 ; 2.039 ; -; 2.187 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.478 ; 2.050 ; -; 2.189 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.472 ; 2.275 ; -; 2.194 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.444 ; 2.009 ; -; 2.199 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.417 ; 1.977 ; -; 2.203 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.466 ; 2.022 ; -; 2.207 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.428 ; 1.980 ; -; 2.217 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.618 ; 2.393 ; -; 2.236 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.932 ; -; 2.263 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.466 ; 1.962 ; -; 2.283 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.618 ; 2.327 ; -; 2.331 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.618 ; 2.279 ; -; 2.340 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.579 ; 2.231 ; -; 2.342 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.302 ; 1.719 ; -; 2.380 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.598 ; 2.210 ; -; 2.388 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.590 ; 2.194 ; -; 2.389 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.579 ; 2.182 ; -; 2.393 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.598 ; 2.197 ; -; 2.396 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.590 ; 2.186 ; -; 2.404 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.302 ; 1.657 ; -; 2.407 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.302 ; 1.654 ; -; 2.422 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.598 ; 2.168 ; -; 2.427 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.579 ; 2.144 ; -; 2.453 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.715 ; -; 2.466 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.417 ; 1.710 ; -; 2.468 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.700 ; -; 2.471 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.444 ; 1.732 ; -; 2.474 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.614 ; 2.132 ; -; 2.476 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.428 ; 1.711 ; -; 2.480 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.688 ; -; 2.481 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.687 ; -; 2.486 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.598 ; 2.104 ; -; 2.499 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.455 ; 1.715 ; -; 2.506 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.662 ; -; 2.510 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.455 ; 1.704 ; -; 2.511 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.428 ; 1.676 ; -; 2.513 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.467 ; 1.713 ; -; 2.516 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.444 ; 1.687 ; -; 2.520 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.455 ; 1.694 ; -; 2.525 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.455 ; 1.689 ; -; 2.525 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.428 ; 1.662 ; -; 2.526 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.642 ; -; 2.530 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.428 ; 1.657 ; -; 2.532 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.636 ; -; 2.533 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.444 ; 1.670 ; -; 2.534 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.634 ; -; 2.535 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.636 ; 2.093 ; -; 2.536 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.632 ; -; 2.541 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.455 ; 1.673 ; -; 2.542 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.455 ; 1.672 ; -; 2.544 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.624 ; -; 2.547 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.428 ; 1.640 ; -; 2.548 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.444 ; 1.655 ; -; 2.549 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.444 ; 1.654 ; -; 2.549 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.619 ; -; 2.549 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.619 ; -; 2.552 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.409 ; 1.616 ; -; 2.553 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.428 ; 1.634 ; +; 1.441 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.432 ; 2.983 ; +; 1.449 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.430 ; 2.973 ; +; 1.484 ; spi_slave:spi_slave_rx_inst|rdata[32] ; tx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.998 ; 1.510 ; +; 1.488 ; spi_slave:spi_slave_rx_inst|rdata[36] ; tx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.998 ; 1.506 ; +; 1.489 ; spi_slave:spi_slave_rx_inst|rdata[34] ; rx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.926 ; 1.577 ; +; 1.496 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.272 ; 2.535 ; +; 1.542 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.434 ; 2.884 ; +; 1.589 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.434 ; 2.837 ; +; 1.602 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.451 ; 2.841 ; +; 1.603 ; spi_slave:spi_slave_rx_inst|rdata[33] ; tx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.998 ; 1.391 ; +; 1.613 ; spi_slave:spi_slave_rx_inst|rdata[37] ; rx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.926 ; 1.453 ; +; 1.631 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.432 ; 2.793 ; +; 1.642 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.432 ; 2.782 ; +; 1.649 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.259 ; 2.369 ; +; 1.651 ; spi_slave:spi_slave_rx_inst|rdata[34] ; tx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.998 ; 1.343 ; +; 1.656 ; spi_slave:spi_slave_rx_inst|rdata[37] ; tx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.673 ; 1.663 ; +; 1.667 ; spi_slave:spi_slave_rx_inst|rdata[32] ; rx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.926 ; 1.399 ; +; 1.672 ; spi_slave:spi_slave_rx_inst|rdata[36] ; rx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.926 ; 1.394 ; +; 1.675 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.255 ; 2.339 ; +; 1.676 ; spi_slave:spi_slave_rx_inst|rdata[35] ; tx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.998 ; 1.318 ; +; 1.697 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.422 ; 2.717 ; +; 1.701 ; spi_slave:spi_slave_rx_inst|rdata[33] ; rx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.926 ; 1.365 ; +; 1.712 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.047 ; 2.000 ; +; 1.762 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.126 ; 2.356 ; +; 1.790 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.047 ; 1.922 ; +; 1.804 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.128 ; 2.316 ; +; 1.840 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.432 ; 2.584 ; +; 1.844 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.434 ; 2.582 ; +; 1.851 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.422 ; 2.563 ; +; 1.857 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.128 ; 2.263 ; +; 1.903 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.270 ; 2.126 ; +; 1.903 ; spi_slave:spi_slave_rx_inst|rdata[35] ; rx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.926 ; 1.163 ; +; 1.905 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.418 ; 2.505 ; +; 1.917 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.443 ; 2.518 ; +; 1.928 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.445 ; 2.509 ; +; 1.963 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.445 ; 2.474 ; +; 1.963 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.272 ; 2.068 ; +; 1.974 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.122 ; 2.140 ; +; 1.976 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.255 ; 2.038 ; +; 1.980 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.429 ; 2.441 ; +; 1.980 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.411 ; 2.423 ; +; 1.985 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.430 ; 2.437 ; +; 1.987 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.253 ; 2.025 ; +; 1.989 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.049 ; 1.721 ; +; 1.993 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.272 ; 2.038 ; +; 1.993 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.259 ; 2.025 ; +; 1.998 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.268 ; 2.029 ; +; 2.005 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.272 ; 2.026 ; +; 2.027 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.047 ; 1.685 ; +; 2.030 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.255 ; 1.984 ; +; 2.033 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.272 ; 1.998 ; +; 2.057 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.261 ; 1.963 ; +; 2.058 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.049 ; 1.652 ; +; 2.063 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.049 ; 1.647 ; +; 2.067 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.049 ; 1.643 ; +; 2.072 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.113 ; 2.033 ; +; 2.078 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.445 ; 2.359 ; +; 2.079 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.049 ; 1.631 ; +; 2.088 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.047 ; 1.624 ; +; 2.091 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.432 ; 2.333 ; +; 2.093 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.418 ; 2.317 ; +; 2.110 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.047 ; 1.602 ; +; 2.144 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.430 ; 2.278 ; +; 2.147 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.432 ; 2.277 ; +; 2.148 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.418 ; 2.262 ; +; 2.184 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.445 ; 2.253 ; +; 2.193 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.430 ; 2.229 ; +; 2.199 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.430 ; 2.223 ; +; 2.222 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.449 ; 2.219 ; +; 2.279 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.274 ; 1.754 ; +; 2.319 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.253 ; 1.693 ; +; 2.324 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.274 ; 1.709 ; +; 2.329 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.251 ; 1.681 ; +; 2.331 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.257 ; 1.685 ; +; 2.332 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.255 ; 1.682 ; +; 2.335 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.253 ; 1.677 ; +; 2.336 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.274 ; 1.697 ; +; 2.337 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.257 ; 1.679 ; +; 2.337 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.257 ; 1.679 ; +; 2.339 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.255 ; 1.675 ; +; 2.340 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.251 ; 1.670 ; +; 2.346 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.253 ; 1.666 ; +; 2.346 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.251 ; 1.664 ; +; 2.347 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.259 ; 1.671 ; +; 2.352 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.253 ; 1.660 ; +; 2.353 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.251 ; 1.657 ; +; 2.355 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.255 ; 1.659 ; +; 2.358 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.257 ; 1.658 ; +; 2.361 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.255 ; 1.653 ; +; 2.363 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.251 ; 1.647 ; +; 2.366 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.253 ; 1.646 ; +; 2.367 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.257 ; 1.649 ; +; 2.371 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.255 ; 1.643 ; +; 2.372 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.251 ; 1.638 ; +; 2.372 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.253 ; 1.640 ; +; 2.374 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.257 ; 1.642 ; +; 2.378 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.259 ; 1.640 ; +; 2.381 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.274 ; 1.652 ; +; 2.382 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.274 ; 1.651 ; +; 2.389 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.259 ; 1.629 ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ @@ -2991,32 +2991,32 @@ No paths to report. +-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -; 1.983 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.087 ; 6.423 ; -; 2.358 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.078 ; 6.039 ; -; 2.396 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.140 ; 6.072 ; -; 2.431 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.092 ; 6.154 ; -; 2.421 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.143 ; 6.052 ; -; 2.451 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.274 ; 6.327 ; -; 2.475 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.273 ; 6.298 ; -; 2.492 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.140 ; 5.975 ; -; 2.525 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.276 ; 6.255 ; -; 2.188 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.140 ; 6.271 ; -; 2.623 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.265 ; 6.146 ; -; 2.477 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.141 ; 5.993 ; -; 2.841 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.089 ; 5.734 ; -; 6.127 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.087 ; 7.279 ; -; 6.322 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.078 ; 7.075 ; -; 6.564 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.143 ; 6.909 ; -; 6.767 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.141 ; 6.703 ; -; 6.791 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.265 ; 6.978 ; -; 6.809 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.273 ; 6.964 ; -; 6.819 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.092 ; 6.766 ; -; 6.825 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.089 ; 6.750 ; -; 6.884 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.140 ; 6.584 ; -; 7.189 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.140 ; 6.278 ; -; 6.363 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.140 ; 7.096 ; -; 7.515 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.274 ; 6.263 ; -; 7.554 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.276 ; 6.226 ; +; 1.644 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.040 ; 6.891 ; +; 1.662 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.047 ; 6.870 ; +; 1.717 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.041 ; 6.818 ; +; 1.719 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.040 ; 6.816 ; +; 1.785 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.027 ; 6.727 ; +; 1.789 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.042 ; 6.580 ; +; 1.803 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.028 ; 6.545 ; +; 1.806 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.045 ; 6.558 ; +; 1.819 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.042 ; 6.714 ; +; 1.913 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.016 ; 6.588 ; +; 1.970 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.042 ; 6.567 ; +; 1.825 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.049 ; 6.710 ; +; 2.155 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 4.046 ; 6.376 ; +; 5.952 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.027 ; 7.560 ; +; 5.992 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.045 ; 7.372 ; +; 6.012 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.028 ; 7.336 ; +; 6.107 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.040 ; 7.428 ; +; 6.119 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.049 ; 7.416 ; +; 6.216 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.041 ; 7.319 ; +; 6.119 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.040 ; 7.416 ; +; 6.451 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.046 ; 7.080 ; +; 6.087 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.047 ; 7.445 ; +; 6.189 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.042 ; 7.344 ; +; 6.681 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.042 ; 6.856 ; +; 6.770 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.042 ; 6.599 ; +; 7.047 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 4.016 ; 6.454 ; +-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ @@ -3025,127 +3025,127 @@ No paths to report. +-------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ -; 2.561 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.002 ; 7.417 ; -; 2.667 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.028 ; 7.285 ; -; 2.852 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.145 ; 6.983 ; -; 3.178 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.028 ; 6.774 ; -; 4.417 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.537 ; 5.026 ; -; 4.696 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.145 ; 5.139 ; -; 4.700 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.145 ; 5.135 ; -; 4.712 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.002 ; 5.266 ; -; 5.121 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.002 ; 4.857 ; -; 5.243 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.002 ; 4.735 ; -; 5.493 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.002 ; 4.485 ; -; 5.500 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.002 ; 4.478 ; +; 1.915 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.309 ; 7.756 ; +; 2.919 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.918 ; 7.143 ; +; 2.960 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.737 ; 7.283 ; +; 3.061 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.918 ; 7.001 ; +; 3.624 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.309 ; 6.047 ; +; 3.675 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.567 ; 5.738 ; +; 4.804 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.918 ; 5.258 ; +; 4.886 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.918 ; 5.176 ; +; 4.943 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.918 ; 5.119 ; +; 5.000 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -3.307 ; 4.673 ; +; 5.041 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.918 ; 5.021 ; +; 5.207 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.966 ; 4.807 ; +-------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ -+-----------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 0C Model Setup: 'clk_10mhz' ; -+--------+-----------------+----------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+--------+-----------------+----------------------------------+--------------+-------------+--------------+------------+------------+ -; 92.340 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.590 ; 7.072 ; -; 92.418 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 7.002 ; -; 92.418 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 7.002 ; -; 92.418 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 7.002 ; -; 92.418 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 7.002 ; -; 92.418 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 7.002 ; -; 92.418 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 7.002 ; -; 92.418 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 7.002 ; -; 92.677 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.590 ; 6.735 ; -; 92.731 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.678 ; -; 92.731 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.678 ; -; 92.731 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.678 ; -; 92.731 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.678 ; -; 92.731 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.678 ; -; 92.731 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.678 ; -; 92.731 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.678 ; -; 92.731 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.678 ; -; 92.732 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.584 ; 6.686 ; -; 92.755 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 6.665 ; -; 92.755 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 6.665 ; -; 92.755 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 6.665 ; -; 92.755 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 6.665 ; -; 92.755 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 6.665 ; -; 92.755 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 6.665 ; -; 92.755 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.582 ; 6.665 ; -; 92.810 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.616 ; -; 92.810 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.616 ; -; 92.810 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.616 ; -; 92.810 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.616 ; -; 92.810 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.616 ; -; 92.810 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.616 ; -; 92.810 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.616 ; -; 92.981 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.584 ; 6.437 ; -; 93.002 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.584 ; 6.416 ; -; 93.059 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.367 ; -; 93.059 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.367 ; -; 93.059 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.367 ; -; 93.059 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.367 ; -; 93.059 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.367 ; -; 93.059 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.367 ; -; 93.059 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.367 ; -; 93.068 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.341 ; -; 93.068 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.341 ; -; 93.068 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.341 ; -; 93.068 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.341 ; -; 93.068 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.341 ; -; 93.068 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.341 ; -; 93.068 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.341 ; -; 93.068 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.593 ; 6.341 ; -; 93.080 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.346 ; -; 93.080 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.346 ; -; 93.080 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.346 ; -; 93.080 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.346 ; -; 93.080 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.346 ; -; 93.080 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.346 ; -; 93.080 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.346 ; -; 93.097 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.584 ; 6.321 ; -; 93.123 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.292 ; -; 93.123 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.292 ; -; 93.123 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.292 ; -; 93.123 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.292 ; -; 93.123 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.292 ; -; 93.123 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.292 ; -; 93.123 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.292 ; -; 93.123 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.292 ; -; 93.175 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.251 ; -; 93.175 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.251 ; -; 93.175 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.251 ; -; 93.175 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.251 ; -; 93.175 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.251 ; -; 93.175 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.251 ; -; 93.175 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.251 ; -; 93.246 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.584 ; 6.172 ; -; 93.267 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.116 ; 6.619 ; -; 93.268 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.584 ; 6.150 ; -; 93.324 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.102 ; -; 93.324 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.102 ; -; 93.324 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.102 ; -; 93.324 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.102 ; -; 93.324 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.102 ; -; 93.324 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.102 ; -; 93.324 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.102 ; -; 93.346 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.080 ; -; 93.346 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.080 ; -; 93.346 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.080 ; -; 93.346 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.080 ; -; 93.346 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.080 ; -; 93.346 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.080 ; -; 93.346 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.576 ; 6.080 ; -; 93.372 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.043 ; -; 93.372 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.043 ; -; 93.372 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.043 ; -; 93.372 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.043 ; -; 93.372 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.043 ; -; 93.372 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.043 ; -; 93.372 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.043 ; -; 93.372 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.043 ; -; 93.393 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.022 ; -; 93.393 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.022 ; -; 93.393 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.587 ; 6.022 ; -+--------+-----------------+----------------------------------+--------------+-------------+--------------+------------+------------+ ++-------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 0C Model Setup: 'clk_10mhz' ; ++--------+-------------------------------+----------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++--------+-------------------------------+----------------------------------+--------------+-------------+--------------+------------+------------+ +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.046 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.452 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.328 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.093 ; +; 93.338 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.503 ; 6.161 ; +; 93.338 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.503 ; 6.161 ; +; 93.338 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.503 ; 6.161 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.350 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 6.071 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.360 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.504 ; 6.138 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.433 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.988 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.456 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.581 ; 5.965 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.480 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.632 ; 5.890 ; +; 93.481 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.070 ; 6.451 ; +; 93.481 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.070 ; 6.451 ; +; 93.481 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.070 ; 6.451 ; +; 93.481 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.070 ; 6.451 ; +; 93.481 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.070 ; 6.451 ; +; 93.481 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.070 ; 6.451 ; ++--------+-------------------------------+----------------------------------+--------------+-------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -3153,44 +3153,59 @@ No paths to report. +----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 2496.630 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.021 ; 3.413 ; +; 2495.085 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.109 ; 4.828 ; +; 2495.086 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.109 ; 4.827 ; +; 2495.302 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.109 ; 4.611 ; +; 2495.303 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.109 ; 4.610 ; +; 2495.532 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.109 ; 4.381 ; +; 2495.636 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 4.329 ; +; 2495.637 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 4.328 ; +; 2495.749 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.109 ; 4.164 ; +; 2496.083 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 3.882 ; +; 2496.226 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.378 ; 3.418 ; +; 2496.227 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.378 ; 3.417 ; +; 2496.484 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.234 ; 3.772 ; +; 2496.650 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.945 ; +; 2496.652 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.943 ; +; 2496.658 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.937 ; +; 2496.659 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.936 ; +; 2496.673 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.378 ; 2.971 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; +; 2496.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.111 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; -; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; -; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; +; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; +; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[24] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[25] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; +; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[22] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[21] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; -; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; -; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; -; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; -; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; +; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; +; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[18] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[17] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[16] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; +; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[15] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[14] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[13] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; ; 2496.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[12] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.106 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.021 ; 3.361 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; -; 2496.682 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.105 ; 3.157 ; ; 2496.684 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[11] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.103 ; 3.157 ; ; 2496.684 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[10] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.103 ; 3.157 ; ; 2496.684 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[9] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.103 ; 3.157 ; @@ -3203,56 +3218,41 @@ No paths to report. ; 2496.684 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.103 ; 3.157 ; ; 2496.684 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.103 ; 3.157 ; ; 2496.684 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[0] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.103 ; 3.157 ; -; 2496.827 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.335 ; 2.860 ; -; 2496.987 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.202 ; 2.870 ; -; 2497.024 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.335 ; 2.663 ; -; 2497.052 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.148 ; 2.859 ; -; 2497.165 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 2.757 ; -; 2497.184 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.202 ; 2.673 ; -; 2497.187 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.145 ; 2.980 ; -; 2497.217 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 2.705 ; -; 2497.223 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.021 ; 2.820 ; -; 2497.239 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.145 ; 2.928 ; -; 2497.249 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.148 ; 2.662 ; -; 2497.249 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.021 ; 2.794 ; -; 2497.313 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.058 ; 2.767 ; -; 2497.353 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.081 ; 2.625 ; -; 2497.364 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.058 ; 2.716 ; -; 2497.411 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.141 ; 2.507 ; -; 2497.451 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.027 ; 2.581 ; -; 2497.473 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 2.449 ; -; 2497.525 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 2.397 ; -; 2497.608 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.141 ; 2.310 ; -; 2497.743 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.141 ; 2.175 ; -; 2497.758 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 2.164 ; -; 2497.768 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 2.154 ; -; 2497.780 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.145 ; 2.387 ; -; 2497.784 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 2.138 ; -; 2497.791 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.051 ; 2.180 ; -; 2497.806 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.145 ; 2.361 ; -; 2497.820 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 2.102 ; -; 2497.834 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.021 ; 2.209 ; -; 2497.845 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.020 ; 2.194 ; -; 2497.905 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.058 ; 2.175 ; -; 2497.934 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.058 ; 2.146 ; -; 2497.957 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.303 ; 1.762 ; -; 2497.963 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.252 ; 1.807 ; -; 2497.964 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.202 ; 1.893 ; -; 2497.968 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.021 ; 2.075 ; -; 2498.029 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.148 ; 1.882 ; -; 2498.031 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 1.891 ; -; 2498.036 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 1.886 ; -; 2498.036 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 1.886 ; -; 2498.059 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.148 ; 1.852 ; -; 2498.061 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.141 ; 1.857 ; -; 2498.066 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 1.856 ; -; 2498.078 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.194 ; 2.138 ; -; 2498.083 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 1.839 ; -; 2498.088 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 1.834 ; -; 2498.092 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.100 ; 1.830 ; -; 2498.131 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.303 ; 1.588 ; -; 2498.160 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.070 ; 1.932 ; -; 2498.186 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.303 ; 1.533 ; +; 2496.701 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.234 ; 3.555 ; +; 2496.840 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.234 ; 3.416 ; +; 2496.852 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.389 ; 2.781 ; +; 2496.930 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.665 ; +; 2496.931 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.664 ; +; 2497.032 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.389 ; 2.601 ; +; 2497.035 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.286 ; 3.273 ; +; 2497.043 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.234 ; 3.213 ; +; 2497.057 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.234 ; 3.199 ; +; 2497.089 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.234 ; 3.167 ; +; 2497.105 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.490 ; +; 2497.113 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.482 ; +; 2497.115 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.480 ; +; 2497.124 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.447 ; 3.382 ; +; 2497.260 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.234 ; 2.996 ; +; 2497.306 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.234 ; 2.950 ; +; 2497.377 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.218 ; +; 2497.391 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.286 ; 2.917 ; +; 2497.424 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.240 ; 2.875 ; +; 2497.440 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.485 ; 2.097 ; +; 2497.532 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.063 ; +; 2497.539 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.389 ; 2.094 ; +; 2497.565 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.427 ; 2.030 ; +; 2497.565 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.502 ; 1.955 ; +; 2497.569 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.035 ; 2.418 ; +; 2497.576 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.316 ; 2.799 ; +; 2497.594 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.286 ; 2.714 ; +; 2497.623 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.129 ; 2.565 ; +; 2497.640 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.286 ; 2.668 ; +; 2497.698 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.078 ; 2.283 ; +; 2497.702 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.485 ; 1.835 ; +; 2497.768 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.002 ; 2.289 ; +; 2497.822 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.368 ; 2.605 ; +; 2497.855 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.129 ; 2.333 ; +; 2497.869 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.389 ; 1.764 ; +----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ @@ -3261,539 +3261,431 @@ No paths to report. +----------+-------------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +----------+-------------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; 2599.732 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 4.218 ; -; 2599.732 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 4.218 ; -; 2599.732 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 4.218 ; -; 2599.732 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 4.218 ; -; 2599.732 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 4.218 ; -; 2599.732 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 4.218 ; -; 2599.732 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 4.218 ; -; 2599.732 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 4.218 ; -; 2599.732 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 4.218 ; -; 2600.354 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 3.608 ; -; 2600.354 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 3.608 ; -; 2600.354 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 3.608 ; -; 2600.354 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 3.608 ; -; 2600.354 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 3.608 ; -; 2600.354 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 3.608 ; -; 2600.354 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 3.608 ; -; 2600.354 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 3.608 ; -; 2600.354 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 3.608 ; -; 2602.291 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 1.659 ; -; 2602.915 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 1.035 ; -; 2602.916 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.218 ; 1.034 ; -; 5202.125 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.139 ; -; 5202.125 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.139 ; -; 5202.125 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.139 ; -; 5202.125 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.139 ; -; 5202.173 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.090 ; -; 5202.173 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.090 ; -; 5202.173 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.090 ; -; 5202.173 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.090 ; -; 5202.173 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.090 ; -; 5202.173 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.090 ; -; 5202.459 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.805 ; -; 5202.459 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.805 ; -; 5202.459 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.805 ; -; 5202.459 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.805 ; -; 5202.507 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.756 ; -; 5202.507 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.756 ; -; 5202.507 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.756 ; -; 5202.507 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.756 ; -; 5202.507 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.756 ; -; 5202.507 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.756 ; -; 5202.633 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.631 ; -; 5202.633 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.631 ; -; 5202.633 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.631 ; -; 5202.633 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.631 ; -; 5202.656 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.608 ; -; 5202.656 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.608 ; -; 5202.656 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.608 ; -; 5202.656 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.608 ; -; 5202.680 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.584 ; -; 5202.680 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.584 ; -; 5202.680 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.584 ; -; 5202.680 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.584 ; -; 5202.681 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.582 ; -; 5202.681 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.582 ; -; 5202.681 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.582 ; -; 5202.681 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.582 ; -; 5202.681 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.582 ; -; 5202.681 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.582 ; -; 5202.704 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.559 ; -; 5202.704 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.559 ; -; 5202.704 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.559 ; -; 5202.704 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.559 ; -; 5202.704 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.559 ; -; 5202.704 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.559 ; -; 5202.718 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.546 ; -; 5202.718 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.546 ; -; 5202.718 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.546 ; -; 5202.718 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.546 ; -; 5202.728 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.535 ; -; 5202.728 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.535 ; -; 5202.728 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.535 ; -; 5202.728 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.535 ; -; 5202.728 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.535 ; -; 5202.728 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.535 ; -; 5202.766 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.497 ; -; 5202.766 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.497 ; -; 5202.766 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.497 ; -; 5202.766 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.497 ; -; 5202.766 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.497 ; -; 5202.766 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.497 ; -; 5202.901 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.363 ; -; 5202.901 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.363 ; -; 5202.901 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.363 ; -; 5202.901 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.363 ; -; 5202.949 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.314 ; -; 5202.949 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.314 ; -; 5202.949 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.314 ; -; 5202.949 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.314 ; -; 5202.949 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.314 ; -; 5202.949 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.314 ; -; 5202.980 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.284 ; -; 5202.980 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.284 ; -; 5202.980 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.284 ; -; 5202.980 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.284 ; -; 5203.028 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.235 ; -; 5203.028 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.235 ; -; 5203.028 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.235 ; -; 5203.028 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.235 ; -; 5203.028 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.235 ; +; 2599.239 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.723 ; +; 2599.239 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.723 ; +; 2599.239 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.723 ; +; 2599.239 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.723 ; +; 2599.239 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.723 ; +; 2599.239 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.723 ; +; 2599.239 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.723 ; +; 2599.239 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.723 ; +; 2599.239 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.723 ; +; 2599.741 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.221 ; +; 2599.741 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.221 ; +; 2599.741 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.221 ; +; 2599.741 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.221 ; +; 2599.741 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.221 ; +; 2599.741 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.221 ; +; 2599.741 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.221 ; +; 2599.741 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.221 ; +; 2599.741 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 4.221 ; +; 2601.881 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 2.081 ; +; 2601.881 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 2.081 ; +; 2601.973 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.206 ; 1.989 ; +; 5201.006 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 7.258 ; +; 5201.006 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 7.258 ; +; 5201.006 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 7.258 ; +; 5201.006 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 7.258 ; +; 5201.217 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 7.046 ; +; 5201.217 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 7.046 ; +; 5201.217 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 7.046 ; +; 5201.217 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 7.046 ; +; 5201.217 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 7.046 ; +; 5201.217 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 7.046 ; +; 5201.292 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.972 ; +; 5201.292 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.972 ; +; 5201.292 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.972 ; +; 5201.292 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.972 ; +; 5201.441 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.823 ; +; 5201.441 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.823 ; +; 5201.441 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.823 ; +; 5201.441 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.823 ; +; 5201.503 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.760 ; +; 5201.503 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.760 ; +; 5201.503 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.760 ; +; 5201.503 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.760 ; +; 5201.503 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.760 ; +; 5201.503 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.760 ; +; 5201.510 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.754 ; +; 5201.510 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.754 ; +; 5201.510 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.754 ; +; 5201.510 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.754 ; +; 5201.652 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.611 ; +; 5201.652 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.611 ; +; 5201.652 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.611 ; +; 5201.652 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.611 ; +; 5201.652 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.611 ; +; 5201.652 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.611 ; +; 5201.721 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.542 ; +; 5201.721 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.542 ; +; 5201.721 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.542 ; +; 5201.721 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.542 ; +; 5201.721 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.542 ; +; 5201.721 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 6.542 ; +; 5202.066 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.083 ; 6.186 ; +; 5202.155 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.109 ; +; 5202.155 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.109 ; +; 5202.155 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.109 ; +; 5202.155 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.109 ; +; 5202.220 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.044 ; +; 5202.220 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.044 ; +; 5202.220 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.044 ; +; 5202.220 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.044 ; +; 5202.224 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.040 ; +; 5202.224 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.040 ; +; 5202.224 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.040 ; +; 5202.224 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 6.040 ; +; 5202.352 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.083 ; 5.900 ; +; 5202.366 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.897 ; +; 5202.366 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.897 ; +; 5202.366 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.897 ; +; 5202.366 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.897 ; +; 5202.366 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.897 ; +; 5202.366 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.897 ; +; 5202.392 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.872 ; +; 5202.392 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.872 ; +; 5202.392 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.872 ; +; 5202.392 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.872 ; +; 5202.431 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.832 ; +; 5202.431 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.832 ; +; 5202.431 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.832 ; +; 5202.431 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.832 ; +; 5202.431 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.832 ; +; 5202.431 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.832 ; +; 5202.435 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.828 ; +; 5202.435 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.828 ; +; 5202.435 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.828 ; +; 5202.435 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.828 ; +; 5202.435 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.828 ; +; 5202.435 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.072 ; 5.828 ; +; 5202.501 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.083 ; 5.751 ; +; 5202.545 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.719 ; +; 5202.545 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.071 ; 5.719 ; +----------+-------------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 0C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' ; -+-----------+------------------------------+------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-----------+------------------------------+------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.969 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.969 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.969 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.970 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.970 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.970 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.969 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.969 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.970 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.969 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.970 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.970 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.970 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.970 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.970 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.969 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.969 ; -; 33326.295 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.969 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.809 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.810 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.809 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.809 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.810 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.809 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.810 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.810 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.809 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.810 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.809 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.810 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.809 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.810 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.810 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.809 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.810 ; -; 33326.454 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.809 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.694 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.695 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.694 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.695 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.694 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.694 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.694 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.694 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.695 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.695 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.694 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.695 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.695 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.695 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.694 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.695 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.694 ; -; 33326.569 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.695 ; -; 33326.682 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|keyer_out ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.068 ; 6.585 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.566 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.567 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.566 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.566 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.566 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.567 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.566 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.567 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.567 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.567 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.567 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.566 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.566 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.567 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.567 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.566 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.566 ; -; 33326.698 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.567 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.535 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.534 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.534 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.534 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.535 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.534 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.535 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.534 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.535 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.535 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.534 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.535 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.534 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.534 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.535 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.535 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.070 ; 6.535 ; -; 33326.730 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.534 ; -; 33326.825 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.439 ; -; 33326.825 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.438 ; -; 33326.825 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.438 ; -; 33326.825 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.438 ; -; 33326.825 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.438 ; -; 33326.825 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.438 ; -; 33326.825 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.439 ; -; 33326.825 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.438 ; -; 33326.825 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.438 ; -+-----------+------------------------------+------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 0C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' ; ++-----------+------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-----------+------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; 33325.618 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.645 ; +; 33325.618 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.645 ; +; 33325.618 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.645 ; +; 33325.618 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.645 ; +; 33325.618 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.645 ; +; 33325.618 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.645 ; +; 33325.618 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.645 ; +; 33325.618 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.645 ; +; 33325.618 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.645 ; +; 33325.659 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.604 ; +; 33325.659 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.604 ; +; 33325.659 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.604 ; +; 33325.659 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.604 ; +; 33325.659 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.604 ; +; 33325.659 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.604 ; +; 33325.659 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.604 ; +; 33325.659 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.604 ; +; 33325.659 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.604 ; +; 33326.063 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.200 ; +; 33326.063 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.200 ; +; 33326.063 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.200 ; +; 33326.063 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.200 ; +; 33326.063 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.200 ; +; 33326.063 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.200 ; +; 33326.063 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.200 ; +; 33326.063 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.200 ; +; 33326.063 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.200 ; +; 33326.097 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.166 ; +; 33326.097 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.166 ; +; 33326.097 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.166 ; +; 33326.097 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.166 ; +; 33326.097 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.166 ; +; 33326.097 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.166 ; +; 33326.097 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.166 ; +; 33326.097 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.166 ; +; 33326.097 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.166 ; +; 33326.104 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.159 ; +; 33326.104 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.159 ; +; 33326.104 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.159 ; +; 33326.104 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.159 ; +; 33326.104 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.159 ; +; 33326.104 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.159 ; +; 33326.104 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.159 ; +; 33326.104 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.159 ; +; 33326.104 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.159 ; +; 33326.138 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.125 ; +; 33326.138 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.125 ; +; 33326.138 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.125 ; +; 33326.138 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.125 ; +; 33326.138 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.125 ; +; 33326.138 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.125 ; +; 33326.138 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.125 ; +; 33326.138 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.125 ; +; 33326.138 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 7.125 ; +; 33326.410 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.853 ; +; 33326.410 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.853 ; +; 33326.410 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.853 ; +; 33326.410 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.853 ; +; 33326.410 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.853 ; +; 33326.410 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.853 ; +; 33326.410 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.853 ; +; 33326.410 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.853 ; +; 33326.410 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.853 ; +; 33326.451 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.812 ; +; 33326.451 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.812 ; +; 33326.451 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.812 ; +; 33326.451 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.812 ; +; 33326.451 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.812 ; +; 33326.451 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.812 ; +; 33326.451 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.812 ; +; 33326.451 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.812 ; +; 33326.451 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.812 ; +; 33326.624 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.639 ; +; 33326.624 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.639 ; +; 33326.624 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.639 ; +; 33326.624 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.639 ; +; 33326.624 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.639 ; +; 33326.624 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.639 ; +; 33326.624 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.639 ; +; 33326.624 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.639 ; +; 33326.624 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.639 ; +; 33326.665 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.598 ; +; 33326.665 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.598 ; +; 33326.665 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.598 ; +; 33326.665 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.598 ; +; 33326.665 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.598 ; +; 33326.665 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.598 ; +; 33326.665 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.598 ; +; 33326.665 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.598 ; +; 33326.665 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.072 ; 6.598 ; +; 33326.706 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.558 ; +; 33326.706 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.558 ; +; 33326.706 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.558 ; +; 33326.706 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.558 ; +; 33326.706 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.558 ; +; 33326.706 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.558 ; +; 33326.706 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.558 ; +; 33326.706 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.558 ; +; 33326.706 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.071 ; 6.558 ; +; 33326.739 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|key_state.PREDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.077 ; 6.519 ; ++-----------+------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 0C Model Hold: 'spi_ce0' ; +; Slow 1200mV 0C Model Hold: 'spi_ce1' ; +-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.241 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.636 ; 1.107 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; -; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; -; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; -; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; -; 0.426 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.669 ; -; 0.428 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.669 ; -; 0.428 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.669 ; -; 0.428 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.669 ; -; 0.428 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.669 ; -; 0.428 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.669 ; -; 0.437 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.109 ; 0.741 ; -; 0.440 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.109 ; 0.744 ; -; 0.455 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.109 ; 0.759 ; -; 0.456 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.109 ; 0.760 ; -; 0.456 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.109 ; 0.760 ; -; 0.457 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[5] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.109 ; 0.761 ; -; 0.470 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.755 ; -; 0.470 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.716 ; -; 0.473 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.716 ; -; 0.492 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.738 ; -; 0.493 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.778 ; -; 0.494 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.740 ; -; 0.495 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.738 ; -; 0.499 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.745 ; -; 0.508 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.754 ; -; 0.519 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.022 ; 0.736 ; -; 0.521 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.008 ; 0.724 ; -; 0.540 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.008 ; 0.743 ; -; 0.559 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.008 ; 0.762 ; -; 0.561 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.009 ; 0.765 ; -; 0.574 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.605 ; 1.409 ; -; 0.578 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.467 ; 1.240 ; -; 0.581 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.363 ; 1.174 ; -; 0.581 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.593 ; 1.404 ; -; 0.581 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.467 ; 1.243 ; -; 0.584 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.546 ; 1.360 ; -; 0.587 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.320 ; 1.137 ; -; 0.592 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.546 ; 1.368 ; -; 0.598 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.883 ; -; 0.600 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.846 ; -; 0.628 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.416 ; 1.239 ; -; 0.630 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.109 ; 0.934 ; -; 0.631 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.416 ; 1.242 ; -; 0.631 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.563 ; 1.424 ; -; 0.632 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.416 ; 1.243 ; -; 0.635 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.546 ; 1.411 ; -; 0.639 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.566 ; 1.435 ; -; 0.641 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.320 ; 1.191 ; -; 0.642 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.247 ; 1.119 ; -; 0.644 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.247 ; 1.121 ; -; 0.644 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.890 ; -; 0.648 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.894 ; -; 0.651 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.008 ; 0.854 ; -; 0.651 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.320 ; 1.201 ; -; 0.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.247 ; 1.130 ; -; 0.666 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.561 ; 1.457 ; -; 0.672 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.566 ; 1.468 ; -; 0.673 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.009 ; 0.877 ; -; 0.676 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.563 ; 1.469 ; -; 0.680 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.965 ; -; 0.685 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.247 ; 1.162 ; -; 0.704 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.924 ; -; 0.704 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.320 ; 1.254 ; -; 0.709 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.955 ; -; 0.714 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.934 ; -; 0.720 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.008 ; 0.923 ; -; 0.741 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.009 ; 0.945 ; -; 0.743 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.989 ; -; 0.746 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.992 ; -; 0.751 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.997 ; -; 0.754 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.995 ; -; 0.755 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 1.001 ; -; 0.757 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.363 ; 1.350 ; -; 0.759 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 1.005 ; -; 0.759 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.636 ; 1.625 ; -; 0.760 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 1.001 ; -; 0.762 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 1.005 ; -; 0.774 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.008 ; 0.977 ; -; 0.779 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.009 ; 0.983 ; -; 0.784 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 1.025 ; -; 0.790 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.332 ; 1.352 ; -; 0.792 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.383 ; 1.370 ; -; 0.794 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 1.040 ; -; 0.800 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.332 ; 1.362 ; -; 0.805 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 1.049 ; -; 0.806 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.605 ; 1.641 ; -; 0.818 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.109 ; 1.122 ; +; 0.341 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.562 ; 1.133 ; +; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; +; 0.424 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.050 ; 0.669 ; +; 0.425 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.049 ; 0.669 ; +; 0.442 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.109 ; 0.746 ; +; 0.444 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.109 ; 0.748 ; +; 0.471 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.717 ; +; 0.477 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.698 ; 1.405 ; +; 0.490 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.698 ; 1.418 ; +; 0.585 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.109 ; 0.889 ; +; 0.601 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.847 ; +; 0.636 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.882 ; +; 0.639 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.109 ; 0.943 ; +; 0.639 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.885 ; +; 0.683 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.109 ; 0.987 ; +; 0.693 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.483 ; 1.406 ; +; 0.708 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.007 ; 0.910 ; +; 0.710 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.956 ; +; 0.731 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.977 ; +; 0.732 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.978 ; +; 0.732 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.483 ; 1.445 ; +; 0.743 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.698 ; 1.671 ; +; 0.748 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.049 ; 0.992 ; +; 0.755 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.049 ; 0.999 ; +; 0.782 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.109 ; 1.086 ; +; 0.806 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.052 ; +; 0.827 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.343 ; 1.400 ; +; 0.846 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.092 ; +; 0.861 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.007 ; 1.063 ; +; 0.868 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.562 ; 1.660 ; +; 0.876 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.254 ; 1.360 ; +; 0.905 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.140 ; 1.240 ; +; 0.907 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.140 ; 1.242 ; +; 0.973 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.175 ; 1.378 ; +; 0.990 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.207 ; 1.427 ; +; 1.006 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.399 ; 1.600 ; +; 1.009 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.698 ; 1.937 ; +; 1.024 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.483 ; 1.737 ; +; 1.048 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.109 ; 1.352 ; +; 1.064 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.390 ; 1.684 ; +; 1.127 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.373 ; +; 1.156 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.402 ; +; 1.172 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.562 ; 1.964 ; +; 1.186 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.026 ; 1.407 ; +; 1.211 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.207 ; 1.648 ; +; 1.212 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.178 ; 1.229 ; +; 1.290 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.483 ; 2.003 ; +; 1.307 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.207 ; 1.744 ; +; 1.308 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.128 ; 1.666 ; +; 1.313 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.282 ; 1.226 ; +; 1.331 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.349 ; 1.875 ; +; 1.365 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.128 ; 1.723 ; +; 1.389 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.128 ; 1.747 ; +; 1.404 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.349 ; 1.948 ; +; 1.414 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.343 ; 1.987 ; +; 1.437 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.683 ; +; 1.438 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.562 ; 2.230 ; +; 1.473 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.343 ; 2.046 ; +; 1.516 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.234 ; 1.477 ; +; 1.552 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.234 ; 1.513 ; +; 1.578 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.207 ; 2.015 ; +; 1.583 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.140 ; 1.918 ; +; 1.615 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.343 ; 2.188 ; +; 1.653 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.128 ; 2.011 ; +; 1.718 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.315 ; 1.598 ; +; 1.810 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.439 ; 2.444 ; +; 1.823 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.140 ; 2.158 ; +; 1.826 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.234 ; 1.787 ; +; 1.850 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.286 ; 1.759 ; +; 1.882 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.439 ; 2.516 ; +; 1.896 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.329 ; 1.762 ; +; 1.912 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.286 ; 1.821 ; +; 1.921 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.315 ; 1.801 ; +; 1.942 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.512 ; 2.684 ; +; 1.954 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.286 ; 1.863 ; +; 2.066 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.439 ; 2.700 ; +; 2.103 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.433 ; 2.766 ; +; 2.107 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.389 ; 2.691 ; +; 2.179 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.389 ; 2.763 ; +; 2.180 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.389 ; 2.764 ; +; 2.240 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.389 ; 2.824 ; +; 2.264 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.286 ; 2.173 ; +; 2.291 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.286 ; 2.200 ; +; 2.293 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.286 ; 2.202 ; +; 2.302 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.234 ; 2.263 ; +; 2.303 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.286 ; 2.212 ; +; 2.305 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.286 ; 2.214 ; +; 2.308 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.234 ; 2.269 ; +; 2.345 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.648 ; 3.223 ; +; 2.345 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.439 ; 2.979 ; +; 2.363 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.389 ; 2.947 ; +; 2.436 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.389 ; 3.020 ; +; 2.613 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.286 ; 2.522 ; +-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 0C Model Hold: 'ad9866_clk' ; -+-------+------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.329 ; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[12] ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0~porta_datain_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.752 ; 1.311 ; -; 0.389 ; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[9] ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0~porta_datain_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.752 ; 1.371 ; -; 0.422 ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; transmitter:transmitter_inst|FirInterp8_1024:fi|req ; transmitter:transmitter_inst|FirInterp8_1024:fi|req ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.422 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; -; 0.423 ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; -; 0.424 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; -; 0.424 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; -; 0.424 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; -; 0.424 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; -; 0.424 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; -; 0.424 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; -; 0.424 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; -; 0.425 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.669 ; -; 0.425 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.669 ; -; 0.425 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.669 ; -; 0.426 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.426 ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; -; 0.427 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.047 ; 0.669 ; -; 0.427 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.047 ; 0.669 ; -; 0.427 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.047 ; 0.669 ; -; 0.427 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.047 ; 0.669 ; -; 0.427 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.047 ; 0.669 ; -; 0.427 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.047 ; 0.669 ; -; 0.431 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][22] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][22] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.311 ; 0.937 ; -; 0.453 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.101 ; 0.749 ; -; 0.462 ; transmitter:transmitter_inst|CicInterpM5:in2|x2[8] ; transmitter:transmitter_inst|CicInterpM5:in2|dx2[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.244 ; 0.901 ; -; 0.471 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[12][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.716 ; -; 0.472 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.716 ; -; 0.476 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.096 ; 0.767 ; -; 0.476 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.101 ; 0.772 ; -; 0.481 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.101 ; 0.777 ; -; 0.483 ; transmitter:transmitter_inst|CicInterpM5:in2|x2[6] ; transmitter:transmitter_inst|CicInterpM5:in2|dx2[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.244 ; 0.922 ; -; 0.483 ; transmitter:transmitter_inst|CicInterpM5:in2|x2[5] ; transmitter:transmitter_inst|CicInterpM5:in2|dx2[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.244 ; 0.922 ; -; 0.483 ; transmitter:transmitter_inst|CicInterpM5:in2|x2[3] ; transmitter:transmitter_inst|CicInterpM5:in2|dx2[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.244 ; 0.922 ; -; 0.484 ; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[30] ; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[30] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.221 ; 0.900 ; -; 0.490 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][17] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][17] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.240 ; 0.925 ; -; 0.490 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; -; 0.490 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; -; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; -; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; -; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; -; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; -; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.737 ; -; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.737 ; -; 0.491 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][1] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.736 ; -; 0.491 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][0] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[10][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.737 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.739 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.739 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[9] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.737 ; -; 0.492 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.737 ; -; 0.492 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|parity5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.230 ; 0.917 ; -; 0.492 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[10] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.737 ; -; 0.492 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][0] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[9][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; -; 0.492 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][0] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.737 ; -; 0.493 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.737 ; -; 0.493 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.738 ; -; 0.493 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.738 ; -; 0.493 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.740 ; -; 0.493 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.740 ; -; 0.493 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.739 ; -; 0.493 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.739 ; -; 0.493 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.739 ; -+-------+------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ - - -+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' ; -+-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; 0.403 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0001 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ; -; 0.403 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0011 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ; -; 0.403 ; profile:profile_CW|enable_hang ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ; -; 0.403 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ; -; 0.403 ; profile:profile_CW|char_PTT ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ; -; 0.403 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.669 ; -; 0.406 ; profile:profile_CW|hang_PTT ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.669 ; -; 0.406 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.669 ; -; 0.501 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.767 ; -; 0.508 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.774 ; -; 0.694 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.960 ; -; 0.694 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.960 ; -; 0.694 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.960 ; -; 0.695 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; -; 0.695 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; -; 0.695 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; -; 0.695 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; -; 0.695 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; -; 0.696 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.960 ; -; 0.696 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.960 ; -; 0.696 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.962 ; -; 0.697 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.961 ; -; 0.697 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.961 ; -; 0.697 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.960 ; -; 0.697 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.960 ; -; 0.697 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.960 ; -; 0.697 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.963 ; -; 0.697 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.963 ; -; 0.698 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.962 ; -; 0.699 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.965 ; -; 0.699 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.962 ; -; 0.700 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.964 ; -; 0.700 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.963 ; -; 0.701 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.964 ; -; 0.706 ; profile:profile_CW|timer[17] ; profile:profile_CW|timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.972 ; -; 0.708 ; profile:profile_CW|timer[8] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.974 ; -; 0.708 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.974 ; -; 0.709 ; profile:profile_CW|hang_timer[17] ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.973 ; -; 0.709 ; profile:profile_CW|timer[16] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.975 ; -; 0.710 ; profile:profile_CW|timer[1] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.976 ; -; 0.711 ; profile:profile_CW|hang_timer[16] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.975 ; -; 0.712 ; profile:profile_CW|hang_timer[14] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.976 ; -; 0.713 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.976 ; -; 0.723 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.989 ; -; 0.726 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.989 ; -; 0.728 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.991 ; -; 0.766 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.032 ; -; 0.766 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.032 ; -; 0.777 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.043 ; -; 0.784 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.050 ; -; 0.820 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.086 ; -; 0.831 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 1.098 ; -; 0.850 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.404 ; 1.484 ; -; 0.855 ; profile:profile_CW|hang_timer[8] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.118 ; -; 0.871 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.418 ; 1.519 ; -; 0.881 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.405 ; 1.516 ; -; 0.882 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|prof_state.0001 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.148 ; -; 0.946 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.072 ; 1.213 ; -; 0.971 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.418 ; 1.619 ; -; 1.013 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.279 ; -; 1.014 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.280 ; -; 1.014 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.280 ; -; 1.015 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.279 ; -; 1.015 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.405 ; 1.650 ; -; 1.016 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.282 ; -; 1.016 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.282 ; -; 1.016 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.279 ; -; 1.018 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.284 ; -; 1.018 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.284 ; -; 1.018 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.281 ; -; 1.018 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.284 ; -; 1.018 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.284 ; -; 1.019 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.285 ; -; 1.019 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.285 ; -; 1.019 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.283 ; -; 1.019 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.283 ; -; 1.019 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.285 ; -; 1.020 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.283 ; -; 1.020 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.286 ; -; 1.020 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.284 ; -; 1.021 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.284 ; -; 1.021 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.284 ; -; 1.021 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.285 ; -; 1.021 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.284 ; -; 1.022 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.286 ; -; 1.024 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.287 ; -; 1.027 ; profile:profile_CW|timer[8] ; profile:profile_CW|timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.293 ; -; 1.028 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.294 ; -; 1.028 ; profile:profile_CW|timer[16] ; profile:profile_CW|timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.294 ; -; 1.029 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.295 ; -; 1.029 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.295 ; -; 1.030 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.294 ; -; 1.030 ; profile:profile_CW|hang_timer[16] ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.294 ; -; 1.030 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.296 ; -; 1.031 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.297 ; -; 1.031 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.294 ; -; 1.031 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.297 ; -; 1.031 ; profile:profile_CW|hang_timer[14] ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.295 ; -; 1.033 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.299 ; -; 1.033 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.296 ; -+-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 0C Model Hold: 'ad9866_clk' ; ++-------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.387 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.465 ; 1.082 ; +; 0.396 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.491 ; 1.117 ; +; 0.415 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.480 ; 1.090 ; +; 0.422 ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.669 ; +; 0.423 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.669 ; +; 0.424 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; +; 0.424 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; +; 0.424 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; +; 0.424 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; +; 0.424 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; +; 0.424 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; +; 0.424 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.669 ; +; 0.425 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.669 ; +; 0.426 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; +; 0.426 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; +; 0.426 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; +; 0.426 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; +; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; +; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; +; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; +; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; +; 0.426 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.048 ; 0.669 ; +; 0.427 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.047 ; 0.669 ; +; 0.427 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.047 ; 0.669 ; +; 0.432 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.112 ; 0.739 ; +; 0.436 ; transmitter:transmitter_inst|counter[0] ; transmitter:transmitter_inst|counter[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.684 ; +; 0.442 ; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[42] ; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|out_data[42] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.462 ; 1.099 ; +; 0.449 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.103 ; 0.747 ; +; 0.464 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.112 ; 0.771 ; +; 0.470 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[12][1] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.715 ; +; 0.470 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|parity5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.716 ; +; 0.470 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.715 ; +; 0.473 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.112 ; 0.780 ; +; 0.478 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.722 ; +; 0.487 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[4] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.404 ; 1.086 ; +; 0.487 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_integrator:cic_stages[4].cic_integrator_inst|out_data[38] ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|prev_data[38] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.085 ; 0.767 ; +; 0.489 ; receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|prev_data[10] ; receiver:receiver_rx2_inst|cic:cic_inst_I2|cic_comb:cic_stages[0].cic_comb_inst|out_data[10] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.479 ; 1.163 ; +; 0.489 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.053 ; 0.737 ; +; 0.489 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[6] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.736 ; +; 0.490 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; +; 0.490 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; +; 0.490 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; +; 0.490 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; +; 0.490 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[9] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; +; 0.490 ; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|prev_data[42] ; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[42] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.203 ; 0.888 ; +; 0.490 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; +; 0.490 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; +; 0.490 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][1] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.737 ; +; 0.491 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rEnd3 ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.737 ; +; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[3] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.737 ; +; 0.491 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[7] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.737 ; +; 0.491 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[6] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[6] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[6][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.491 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.735 ; +; 0.491 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.738 ; +; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.739 ; +; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.739 ; +; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.739 ; +; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.052 ; 0.739 ; +; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.737 ; +; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.737 ; +; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.049 ; 0.736 ; +; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[9] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.737 ; +; 0.492 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.050 ; 0.737 ; +; 0.492 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; +; 0.492 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.051 ; 0.738 ; ++-------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -3802,105 +3694,105 @@ No paths to report. ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------+----------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ; 0.403 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.669 ; -; 0.403 ; iambic:iambic_inst|dot_memory ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.669 ; -; 0.403 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.669 ; ; 0.403 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.669 ; -; 0.403 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.669 ; ; 0.403 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|key_state.SENDDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.669 ; -; 0.668 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.PREDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.934 ; -; 0.669 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 0.934 ; -; 0.696 ; iambic:iambic_inst|key_state.PREDOT ; iambic:iambic_inst|key_state.SENDDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.962 ; -; 0.702 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.968 ; -; 0.702 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.968 ; +; 0.403 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.669 ; +; 0.403 ; iambic:iambic_inst|dot_memory ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.669 ; +; 0.404 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 0.669 ; +; 0.471 ; iambic:iambic_inst|dot_memory ; iambic:iambic_inst|key_state.DASHHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.737 ; +; 0.624 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.PREDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 0.889 ; +; 0.655 ; iambic:iambic_inst|key_state.DOTHELD ; iambic:iambic_inst|key_state.PREDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.921 ; +; 0.659 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.925 ; +; 0.670 ; iambic:iambic_inst|key_state.PREDOT ; iambic:iambic_inst|key_state.SENDDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.936 ; +; 0.701 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 0.968 ; +; 0.702 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 0.969 ; ; 0.703 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.969 ; -; 0.703 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.969 ; -; 0.704 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.970 ; -; 0.705 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.971 ; -; 0.707 ; iambic:iambic_inst|delay[17] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.973 ; -; 0.708 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.974 ; -; 0.708 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.974 ; +; 0.707 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 0.974 ; +; 0.707 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 0.974 ; ; 0.709 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.975 ; -; 0.709 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.975 ; -; 0.710 ; iambic:iambic_inst|key_state.PREDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.976 ; -; 0.710 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.976 ; -; 0.710 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.976 ; -; 0.715 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.981 ; +; 0.715 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.981 ; +; 0.715 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 0.982 ; +; 0.715 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 0.982 ; +; 0.715 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 0.982 ; ; 0.716 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.982 ; -; 0.716 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.982 ; +; 0.716 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 0.983 ; +; 0.717 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.983 ; ; 0.717 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.983 ; -; 0.737 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.003 ; -; 0.789 ; iambic:iambic_inst|key_state.DOTHELD ; iambic:iambic_inst|key_state.PREDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.055 ; -; 0.808 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.074 ; -; 0.854 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.00000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.120 ; -; 0.950 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.217 ; -; 1.008 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.274 ; -; 1.021 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.287 ; -; 1.022 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.288 ; -; 1.024 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.290 ; -; 1.026 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.292 ; +; 0.717 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.983 ; +; 0.718 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.984 ; +; 0.720 ; iambic:iambic_inst|delay[17] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.986 ; +; 0.729 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 0.995 ; +; 0.744 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.011 ; +; 0.772 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|key_state.DASHHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.038 ; +; 0.866 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.132 ; +; 0.873 ; iambic:iambic_inst|key_state.PREDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.139 ; +; 0.954 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.219 ; +; 0.968 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.233 ; +; 1.014 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.PREDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.279 ; +; 1.021 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.288 ; +; 1.025 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.292 ; +; 1.026 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.293 ; +; 1.027 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.293 ; ; 1.027 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.293 ; -; 1.028 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.293 ; -; 1.028 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.294 ; ; 1.028 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.294 ; -; 1.030 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.296 ; -; 1.031 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.297 ; -; 1.033 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.299 ; -; 1.034 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.300 ; -; 1.034 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.300 ; -; 1.034 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.300 ; +; 1.034 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.301 ; ; 1.035 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.301 ; -; 1.036 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.302 ; ; 1.036 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.302 ; -; 1.037 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.303 ; -; 1.039 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.305 ; -; 1.040 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.306 ; -; 1.043 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.308 ; -; 1.047 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.313 ; -; 1.049 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.315 ; +; 1.036 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.303 ; +; 1.037 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.303 ; +; 1.039 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.306 ; +; 1.039 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.306 ; +; 1.039 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.305 ; +; 1.039 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.306 ; +; 1.039 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.305 ; +; 1.040 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.307 ; +; 1.041 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.308 ; +; 1.041 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.307 ; +; 1.042 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.308 ; +; 1.049 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.316 ; ; 1.050 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.316 ; ; 1.051 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.317 ; -; 1.068 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.334 ; -; 1.124 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.390 ; -; 1.125 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.391 ; -; 1.126 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.392 ; -; 1.127 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.393 ; -; 1.128 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.394 ; -; 1.129 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.395 ; -; 1.129 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.395 ; -; 1.138 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.403 ; -; 1.143 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.409 ; -; 1.144 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.410 ; -; 1.146 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.412 ; -; 1.148 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.414 ; +; 1.052 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.318 ; +; 1.054 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.321 ; +; 1.124 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.391 ; +; 1.125 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.391 ; +; 1.136 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.402 ; +; 1.136 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.402 ; +; 1.137 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.404 ; +; 1.137 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.404 ; +; 1.137 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.403 ; +; 1.138 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.404 ; +; 1.143 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.410 ; +; 1.147 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.414 ; +; 1.148 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.415 ; ; 1.149 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.415 ; -; 1.150 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.416 ; -; 1.150 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.415 ; -; 1.153 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.419 ; -; 1.155 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.421 ; -; 1.156 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.422 ; -; 1.156 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.422 ; +; 1.149 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.415 ; +; 1.157 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.423 ; ; 1.157 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.423 ; -; 1.157 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.422 ; -; 1.158 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.424 ; ; 1.158 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.424 ; -; 1.159 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.425 ; -; 1.161 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.427 ; -; 1.163 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.428 ; -; 1.165 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.430 ; -; 1.169 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.435 ; -; 1.172 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.437 ; +; 1.158 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.425 ; +; 1.159 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.425 ; +; 1.161 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.428 ; +; 1.161 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.427 ; +; 1.161 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.428 ; +; 1.162 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.429 ; +; 1.162 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.428 ; +; 1.163 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.430 ; +; 1.163 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.429 ; +; 1.164 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.430 ; +; 1.172 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.438 ; ; 1.173 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.439 ; -; 1.248 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.513 ; -; 1.248 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.514 ; -; 1.248 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.515 ; -; 1.249 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.515 ; -; 1.250 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.516 ; -; 1.251 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.517 ; -; 1.251 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.517 ; -; 1.260 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.525 ; -; 1.266 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.070 ; 1.531 ; -; 1.266 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.532 ; -; 1.268 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.534 ; +; 1.174 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.440 ; +; 1.176 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.443 ; +; 1.246 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.513 ; +; 1.247 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.513 ; +; 1.258 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.524 ; +; 1.259 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.525 ; +; 1.259 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.072 ; 1.526 ; +; 1.260 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.526 ; +; 1.260 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.526 ; +; 1.263 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.529 ; +; 1.266 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.071 ; 1.532 ; +-------+----------------------------------------+----------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ @@ -3909,214 +3801,322 @@ No paths to report. +-------+----------------------------------------------------+----------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------------------+----------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.403 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.669 ; +; 0.403 ; ad9866:ad9866_inst|dut2_bitcount[3] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.669 ; ; 0.403 ; reset_handler:reset_handler_inst|reset_counter[0] ; reset_handler:reset_handler_inst|reset_counter[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.669 ; -; 0.404 ; ad9866:ad9866_inst|dut2_bitcount[3] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 0.669 ; -; 0.404 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 0.669 ; -; 0.419 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 0.684 ; -; 0.600 ; ad9866:ad9866_inst|dut2_data[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.866 ; -; 0.600 ; ad9866:ad9866_inst|dut2_data[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.866 ; -; 0.600 ; ad9866:ad9866_inst|dut2_data[6] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.866 ; -; 0.600 ; ad9866:ad9866_inst|dut2_data[7] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.866 ; -; 0.600 ; ad9866:ad9866_inst|dut2_data[12] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.866 ; -; 0.600 ; ad9866:ad9866_inst|dut2_data[14] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.866 ; -; 0.601 ; ad9866:ad9866_inst|dut2_data[9] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.867 ; -; 0.601 ; ad9866:ad9866_inst|dut2_data[13] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.867 ; -; 0.602 ; ad9866:ad9866_inst|dut2_data[1] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.868 ; -; 0.602 ; ad9866:ad9866_inst|dut2_data[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.868 ; -; 0.603 ; ad9866:ad9866_inst|dut2_data[11] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.869 ; -; 0.636 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 0.901 ; -; 0.685 ; counter[11] ; counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.951 ; +; 0.418 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.684 ; +; 0.472 ; ad9866:ad9866_inst|dut2_data[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.738 ; +; 0.472 ; ad9866:ad9866_inst|dut2_data[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.738 ; +; 0.473 ; ad9866:ad9866_inst|dut2_data[1] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.739 ; +; 0.474 ; ad9866:ad9866_inst|dut2_data[0] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.740 ; +; 0.624 ; ad9866:ad9866_inst|dut2_data[6] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.891 ; +; 0.629 ; ad9866:ad9866_inst|dut2_data[9] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 0.894 ; ; 0.685 ; counter[9] ; counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.951 ; +; 0.685 ; counter[11] ; counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.951 ; ; 0.685 ; counter[1] ; counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.951 ; -; 0.685 ; counter[17] ; counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.952 ; -; 0.685 ; counter[15] ; counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.952 ; -; 0.686 ; counter[13] ; counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.953 ; ; 0.686 ; counter[7] ; counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.952 ; -; 0.688 ; counter[5] ; counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.954 ; -; 0.688 ; counter[3] ; counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.954 ; +; 0.686 ; counter[17] ; counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.952 ; +; 0.686 ; counter[15] ; counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.952 ; +; 0.687 ; counter[13] ; counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.953 ; ; 0.688 ; counter[2] ; counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.954 ; -; 0.688 ; counter[18] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.955 ; -; 0.689 ; counter[12] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.956 ; -; 0.689 ; ad9866:ad9866_inst|dut2_data[10] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.955 ; -; 0.689 ; counter[21] ; counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.956 ; -; 0.689 ; counter[19] ; counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.956 ; +; 0.688 ; counter[3] ; counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.954 ; +; 0.688 ; counter[5] ; counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.954 ; +; 0.689 ; ad9866:ad9866_inst|dut2_data[8] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.955 ; +; 0.689 ; counter[18] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.955 ; ; 0.690 ; counter[10] ; counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.956 ; -; 0.690 ; ad9866:ad9866_inst|dut2_data[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.956 ; -; 0.690 ; counter[14] ; counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.957 ; -; 0.691 ; counter[8] ; counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.957 ; +; 0.690 ; counter[12] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.956 ; +; 0.690 ; counter[21] ; counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.956 ; +; 0.690 ; counter[19] ; counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.956 ; ; 0.691 ; counter[6] ; counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.957 ; -; 0.691 ; counter[16] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.958 ; +; 0.691 ; counter[8] ; counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.957 ; +; 0.691 ; ad9866:ad9866_inst|dut2_data[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.957 ; +; 0.691 ; counter[14] ; counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.957 ; ; 0.692 ; counter[4] ; counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.958 ; -; 0.692 ; counter[22] ; counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.959 ; -; 0.692 ; counter[20] ; counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.959 ; -; 0.693 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.959 ; +; 0.692 ; ad9866:ad9866_inst|dut2_data[11] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.958 ; +; 0.692 ; counter[16] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.958 ; ; 0.693 ; reset_handler:reset_handler_inst|reset_counter[10] ; reset_handler:reset_handler_inst|reset_counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.959 ; -; 0.694 ; reset_handler:reset_handler_inst|reset_counter[9] ; reset_handler:reset_handler_inst|reset_counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.960 ; +; 0.693 ; reset_handler:reset_handler_inst|reset_counter[9] ; reset_handler:reset_handler_inst|reset_counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.959 ; +; 0.693 ; ad9866:ad9866_inst|dut2_data[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.959 ; +; 0.693 ; reset_handler:reset_handler_inst|reset_counter[18] ; reset_handler:reset_handler_inst|reset_counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.959 ; +; 0.693 ; counter[22] ; counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.959 ; +; 0.693 ; counter[20] ; counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.959 ; +; 0.694 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.960 ; +; 0.694 ; reset_handler:reset_handler_inst|reset_counter[2] ; reset_handler:reset_handler_inst|reset_counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.960 ; +; 0.694 ; ad9866:ad9866_inst|dut2_data[10] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.960 ; ; 0.694 ; reset_handler:reset_handler_inst|reset_counter[7] ; reset_handler:reset_handler_inst|reset_counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.960 ; ; 0.694 ; reset_handler:reset_handler_inst|reset_counter[11] ; reset_handler:reset_handler_inst|reset_counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.960 ; -; 0.695 ; reset_handler:reset_handler_inst|reset_counter[17] ; reset_handler:reset_handler_inst|reset_counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; -; 0.695 ; reset_handler:reset_handler_inst|reset_counter[8] ; reset_handler:reset_handler_inst|reset_counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; reset_handler:reset_handler_inst|reset_counter[6] ; reset_handler:reset_handler_inst|reset_counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; reset_handler:reset_handler_inst|reset_counter[15] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; ; 0.695 ; reset_handler:reset_handler_inst|reset_counter[14] ; reset_handler:reset_handler_inst|reset_counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; -; 0.695 ; reset_handler:reset_handler_inst|reset_counter[2] ; reset_handler:reset_handler_inst|reset_counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; -; 0.695 ; reset_handler:reset_handler_inst|reset_counter[18] ; reset_handler:reset_handler_inst|reset_counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; ad9866:ad9866_inst|dut2_data[7] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; ad9866:ad9866_inst|dut2_data[12] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; reset_handler:reset_handler_inst|reset_counter[8] ; reset_handler:reset_handler_inst|reset_counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; ad9866:ad9866_inst|dut2_data[13] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.961 ; ; 0.696 ; reset_handler:reset_handler_inst|reset_counter[16] ; reset_handler:reset_handler_inst|reset_counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.962 ; -; 0.696 ; reset_handler:reset_handler_inst|reset_counter[15] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.962 ; -; 0.696 ; reset_handler:reset_handler_inst|reset_counter[6] ; reset_handler:reset_handler_inst|reset_counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.962 ; -; 0.698 ; reset_handler:reset_handler_inst|reset_counter[5] ; reset_handler:reset_handler_inst|reset_counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.964 ; -; 0.698 ; reset_handler:reset_handler_inst|reset_counter[20] ; reset_handler:reset_handler_inst|reset_counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.964 ; +; 0.696 ; reset_handler:reset_handler_inst|reset_counter[13] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.962 ; +; 0.697 ; reset_handler:reset_handler_inst|reset_counter[17] ; reset_handler:reset_handler_inst|reset_counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.963 ; +; 0.697 ; reset_handler:reset_handler_inst|reset_counter[4] ; reset_handler:reset_handler_inst|reset_counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.963 ; ; 0.699 ; reset_handler:reset_handler_inst|reset_counter[23] ; reset_handler:reset_handler_inst|reset_counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.965 ; -; 0.700 ; reset_handler:reset_handler_inst|reset_counter[21] ; reset_handler:reset_handler_inst|reset_counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.966 ; -; 0.700 ; reset_handler:reset_handler_inst|reset_counter[3] ; reset_handler:reset_handler_inst|reset_counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.966 ; -; 0.700 ; reset_handler:reset_handler_inst|reset_counter[19] ; reset_handler:reset_handler_inst|reset_counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.966 ; -; 0.709 ; counter[23] ; counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 0.976 ; -; 0.710 ; reset_handler:reset_handler_inst|reset_counter[4] ; reset_handler:reset_handler_inst|reset_counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.976 ; -; 0.711 ; reset_handler:reset_handler_inst|reset_counter[22] ; reset_handler:reset_handler_inst|reset_counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.977 ; +; 0.699 ; reset_handler:reset_handler_inst|reset_counter[3] ; reset_handler:reset_handler_inst|reset_counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.965 ; +; 0.701 ; reset_handler:reset_handler_inst|reset_counter[19] ; reset_handler:reset_handler_inst|reset_counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.967 ; +; 0.710 ; counter[23] ; counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.976 ; ; 0.715 ; counter[0] ; counter[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.981 ; +; 0.717 ; reset_handler:reset_handler_inst|reset_counter[1] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.983 ; ; 0.718 ; reset_handler:reset_handler_inst|reset_counter[0] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.984 ; -; 0.718 ; reset_handler:reset_handler_inst|reset_counter[1] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 0.984 ; -; 0.740 ; ad9866:ad9866_inst|dut1_pc[5] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.048 ; 0.983 ; -; 0.754 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 1.019 ; -; 0.755 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 1.020 ; -; 0.786 ; ad9866:ad9866_inst|dut2_bitcount[1] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 1.051 ; -; 0.802 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.048 ; 1.045 ; -; 0.804 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 1.069 ; -; 0.853 ; reset_handler:reset_handler_inst|reset_counter[13] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.119 ; -; 0.870 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.274 ; 1.339 ; -; 0.885 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.274 ; 1.354 ; -; 0.931 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.048 ; 1.174 ; -; 0.939 ; ad9866:ad9866_inst|dut2_bitcount[1] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 1.204 ; -; 0.981 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.274 ; 1.450 ; -; 0.992 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.274 ; 1.461 ; -; 0.996 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.274 ; 1.465 ; -; 0.997 ; counter[11] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.081 ; 1.273 ; -; 1.006 ; counter[12] ; counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.273 ; -; 1.007 ; counter[18] ; counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.274 ; -; 1.007 ; counter[15] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.274 ; -; 1.007 ; counter[17] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.274 ; -; 1.007 ; counter[10] ; counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.273 ; -; 1.007 ; counter[14] ; counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.274 ; -; 1.007 ; counter[2] ; counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.273 ; +; 0.734 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.505 ; 1.434 ; +; 0.739 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.005 ; +; 0.751 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.505 ; 1.451 ; +; 0.763 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.049 ; 1.007 ; +; 0.764 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.049 ; 1.008 ; +; 0.771 ; ad9866:ad9866_inst|dut1_pc[5] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.049 ; 1.015 ; +; 0.776 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.505 ; 1.476 ; +; 0.832 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.505 ; 1.532 ; +; 0.856 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.505 ; 1.556 ; +; 0.865 ; reset_handler:reset_handler_inst|reset_counter[5] ; reset_handler:reset_handler_inst|reset_counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.131 ; +; 0.866 ; reset_handler:reset_handler_inst|reset_counter[21] ; reset_handler:reset_handler_inst|reset_counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.132 ; +; 0.877 ; reset_handler:reset_handler_inst|reset_counter[20] ; reset_handler:reset_handler_inst|reset_counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.143 ; +; 0.878 ; reset_handler:reset_handler_inst|reset_counter[22] ; reset_handler:reset_handler_inst|reset_counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.144 ; +; 0.879 ; ad9866:ad9866_inst|dut2_bitcount[1] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.145 ; +; 0.889 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.156 ; +; 0.898 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.505 ; 1.598 ; +; 0.900 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.167 ; +; 0.906 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.172 ; +; 0.922 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|sen_n ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.579 ; 1.696 ; +; 0.923 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|dut2_bitcount[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.189 ; +; 0.924 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.190 ; +; 0.929 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.070 ; 1.194 ; ; 1.007 ; counter[1] ; counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.273 ; +; 1.007 ; counter[10] ; counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.273 ; +; 1.007 ; counter[12] ; counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.273 ; ; 1.007 ; counter[9] ; counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.273 ; -; 1.008 ; counter[0] ; counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; -; 1.008 ; counter[6] ; counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; -; 1.008 ; counter[16] ; counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.275 ; -; 1.008 ; counter[8] ; counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; +; 1.007 ; counter[2] ; counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.273 ; ; 1.008 ; counter[7] ; counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; +; 1.008 ; counter[17] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; +; 1.008 ; counter[8] ; counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; +; 1.008 ; counter[15] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; +; 1.008 ; counter[14] ; counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; +; 1.008 ; counter[0] ; counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; +; 1.008 ; counter[18] ; counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; +; 1.008 ; counter[6] ; counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.274 ; +; 1.009 ; counter[16] ; counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.275 ; +; 1.009 ; counter[11] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.069 ; 1.273 ; ; 1.009 ; counter[4] ; counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.275 ; -; 1.009 ; counter[22] ; counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.276 ; -; 1.009 ; counter[20] ; counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.276 ; -; 1.010 ; counter[13] ; counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.072 ; 1.277 ; -; 1.012 ; counter[5] ; counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.278 ; -; 1.012 ; counter[3] ; counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.071 ; 1.278 ; +-------+----------------------------------------------------+----------------------------------------------------+--------------+-------------+--------------+------------+------------+ ++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' ; ++-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; 0.404 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0011 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 0.669 ; +; 0.404 ; profile:profile_CW|enable_hang ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 0.669 ; +; 0.404 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 0.669 ; +; 0.404 ; profile:profile_CW|char_PTT ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 0.669 ; +; 0.404 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 0.669 ; +; 0.404 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0001 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 0.669 ; +; 0.405 ; profile:profile_CW|hang_PTT ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.669 ; +; 0.405 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.669 ; +; 0.458 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.722 ; +; 0.468 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 0.733 ; +; 0.485 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 0.750 ; +; 0.669 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.308 ; +; 0.680 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.319 ; +; 0.691 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.408 ; 1.329 ; +; 0.692 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 0.957 ; +; 0.693 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.959 ; +; 0.694 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.960 ; +; 0.695 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; +; 0.695 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.961 ; +; 0.696 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.962 ; +; 0.696 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.962 ; +; 0.696 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.962 ; +; 0.696 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.960 ; +; 0.696 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.960 ; +; 0.697 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.963 ; +; 0.697 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.961 ; +; 0.697 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.961 ; +; 0.698 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.961 ; +; 0.698 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.964 ; +; 0.698 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.961 ; +; 0.698 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.961 ; +; 0.698 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.962 ; +; 0.698 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.962 ; +; 0.699 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.962 ; +; 0.699 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.962 ; +; 0.700 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.963 ; +; 0.707 ; profile:profile_CW|timer[17] ; profile:profile_CW|timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.973 ; +; 0.708 ; profile:profile_CW|timer[8] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.974 ; +; 0.709 ; profile:profile_CW|timer[16] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.975 ; +; 0.710 ; profile:profile_CW|hang_timer[8] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.974 ; +; 0.711 ; profile:profile_CW|hang_timer[17] ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.974 ; +; 0.712 ; profile:profile_CW|hang_timer[16] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.975 ; +; 0.713 ; profile:profile_CW|hang_timer[14] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 0.976 ; +; 0.714 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.408 ; 1.352 ; +; 0.723 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 0.989 ; +; 0.725 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 0.989 ; +; 0.735 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.408 ; 1.373 ; +; 0.735 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.374 ; +; 0.741 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.380 ; +; 0.745 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.384 ; +; 0.751 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.408 ; 1.389 ; +; 0.758 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.397 ; +; 0.762 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 1.027 ; +; 0.771 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.408 ; 1.409 ; +; 0.779 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 1.044 ; +; 0.781 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 1.046 ; +; 0.853 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.119 ; +; 0.866 ; profile:profile_CW|timer[1] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.132 ; +; 0.907 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.171 ; +; 0.920 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.559 ; +; 0.983 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.408 ; 1.621 ; +; 0.986 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.070 ; 1.251 ; +; 0.986 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.625 ; +; 0.987 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.408 ; 1.625 ; +; 1.014 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.280 ; +; 1.014 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.280 ; +; 1.014 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.653 ; +; 1.015 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.281 ; +; 1.016 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.280 ; +; 1.016 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.282 ; +; 1.016 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.280 ; +; 1.016 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.282 ; +; 1.017 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.283 ; +; 1.017 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.280 ; +; 1.017 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.283 ; +; 1.017 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.409 ; 1.656 ; +; 1.018 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.284 ; +; 1.019 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.285 ; +; 1.019 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.285 ; +; 1.019 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.285 ; +; 1.019 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.282 ; +; 1.020 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.286 ; +; 1.020 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.286 ; +; 1.020 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.284 ; +; 1.020 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.284 ; +; 1.020 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.284 ; +; 1.021 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.284 ; +; 1.022 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.286 ; +; 1.022 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.286 ; +; 1.022 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.285 ; +; 1.022 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.285 ; +; 1.023 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.068 ; 1.286 ; +; 1.028 ; profile:profile_CW|timer[16] ; profile:profile_CW|timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.294 ; +; 1.029 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.295 ; +; 1.029 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.295 ; +; 1.029 ; profile:profile_CW|timer[8] ; profile:profile_CW|timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.069 ; 1.293 ; +; 1.030 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.071 ; 1.296 ; ++-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ + + +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 0C Model Hold: 'spi_ce1' ; +; Slow 1200mV 0C Model Hold: 'spi_ce0' ; +-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; -; 0.423 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.669 ; -; 0.424 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.050 ; 0.669 ; -; 0.425 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.049 ; 0.669 ; -; 0.472 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.048 ; 0.715 ; -; 0.510 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.756 ; -; 0.510 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.050 ; 0.755 ; -; 0.514 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.760 ; -; 0.517 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.763 ; -; 0.603 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.048 ; 0.846 ; -; 0.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.927 ; -; 0.684 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 0.930 ; -; 0.711 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.145 ; 0.761 ; -; 0.714 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.252 ; 1.161 ; -; 0.715 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.048 ; 0.958 ; -; 0.742 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.021 ; 0.916 ; -; 0.759 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.005 ; -; 0.759 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.161 ; 1.150 ; -; 0.767 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.335 ; 1.297 ; -; 0.768 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.021 ; 0.942 ; -; 0.777 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.214 ; 1.186 ; -; 0.821 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.067 ; -; 0.881 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.145 ; 0.931 ; -; 0.883 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.122 ; -; 0.889 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.128 ; -; 0.904 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.143 ; -; 0.919 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.158 ; -; 0.933 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.172 ; -; 0.940 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.145 ; 0.990 ; -; 0.946 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.218 ; 1.394 ; -; 0.954 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.145 ; 1.004 ; -; 0.973 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.224 ; 1.427 ; -; 0.994 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.021 ; 1.168 ; -; 0.996 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.252 ; 1.443 ; -; 1.005 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.335 ; 1.535 ; -; 1.023 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.029 ; 1.189 ; -; 1.069 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.252 ; 1.516 ; -; 1.071 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.317 ; -; 1.084 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.145 ; 1.134 ; -; 1.085 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.381 ; -; 1.095 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.145 ; 1.145 ; -; 1.097 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.072 ; 1.399 ; -; 1.098 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.112 ; 1.181 ; -; 1.106 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.072 ; 1.408 ; -; 1.112 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.072 ; 1.414 ; -; 1.114 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.335 ; 1.644 ; -; 1.120 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.366 ; -; 1.121 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.367 ; -; 1.124 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.370 ; -; 1.126 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.422 ; -; 1.130 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.072 ; 1.432 ; -; 1.131 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.427 ; -; 1.138 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.434 ; -; 1.148 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.007 ; 1.350 ; -; 1.180 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.426 ; -; 1.198 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.024 ; 1.417 ; -; 1.227 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.216 ; 1.638 ; -; 1.227 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.007 ; 1.429 ; -; 1.259 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.177 ; 1.631 ; -; 1.288 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.145 ; 1.338 ; -; 1.304 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.072 ; 1.606 ; -; 1.306 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.602 ; -; 1.311 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.112 ; 1.394 ; -; 1.354 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.216 ; 1.765 ; -; 1.355 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.112 ; 1.438 ; -; 1.359 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.605 ; -; 1.368 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.664 ; -; 1.374 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.620 ; -; 1.381 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.335 ; 1.911 ; -; 1.401 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.112 ; 1.484 ; -; 1.417 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.663 ; -; 1.432 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.678 ; -; 1.436 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.682 ; -; 1.438 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.009 ; 1.677 ; -; 1.440 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.686 ; -; 1.453 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.699 ; -; 1.456 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.058 ; 1.593 ; -; 1.461 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.216 ; 1.872 ; -; 1.518 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.252 ; 1.965 ; -; 1.524 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.072 ; 1.826 ; -; 1.537 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.252 ; 1.984 ; -; 1.549 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.188 ; 1.967 ; -; 1.570 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.216 ; 1.981 ; -; 1.633 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.879 ; -; 1.691 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.937 ; -; 1.691 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 1.937 ; -; 1.692 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.335 ; 2.222 ; -; 1.696 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.335 ; 2.226 ; -; 1.728 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.072 ; 2.030 ; -; 1.757 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 2.003 ; -; 1.758 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 2.004 ; -; 1.817 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.072 ; 2.119 ; -; 1.901 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.182 ; 2.313 ; -; 1.949 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.051 ; 2.195 ; -; 2.003 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.125 ; 2.358 ; +; 0.407 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.136 ; 0.738 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; +; 0.423 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 0.669 ; +; 0.425 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.425 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.669 ; +; 0.426 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.669 ; +; 0.426 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.669 ; +; 0.428 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.669 ; +; 0.428 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.669 ; +; 0.428 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.669 ; +; 0.428 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.669 ; +; 0.441 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.726 ; +; 0.457 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.742 ; +; 0.473 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.716 ; +; 0.481 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.766 ; +; 0.484 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.080 ; 0.759 ; +; 0.484 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.080 ; 0.759 ; +; 0.485 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.080 ; 0.760 ; +; 0.495 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.738 ; +; 0.503 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.747 ; +; 0.514 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.065 ; 0.774 ; +; 0.519 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.022 ; 0.736 ; +; 0.536 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.366 ; 1.132 ; +; 0.546 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.366 ; 1.142 ; +; 0.553 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.366 ; 1.149 ; +; 0.561 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.366 ; 1.157 ; +; 0.561 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.369 ; 1.160 ; +; 0.571 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.856 ; +; 0.579 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.370 ; 1.179 ; +; 0.591 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.136 ; 0.922 ; +; 0.603 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.136 ; 0.934 ; +; 0.603 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.846 ; +; 0.606 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.136 ; 0.937 ; +; 0.610 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.065 ; 0.870 ; +; 0.612 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.284 ; 1.126 ; +; 0.625 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.290 ; 1.145 ; +; 0.632 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.875 ; +; 0.634 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.877 ; +; 0.636 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.921 ; +; 0.642 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.302 ; 1.174 ; +; 0.644 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.929 ; +; 0.646 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.931 ; +; 0.647 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.890 ; +; 0.651 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.024 ; 0.870 ; +; 0.652 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.895 ; +; 0.661 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[5] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.080 ; 0.936 ; +; 0.662 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.905 ; +; 0.672 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.290 ; 1.192 ; +; 0.676 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.920 ; +; 0.677 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.921 ; +; 0.678 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.065 ; 0.938 ; +; 0.682 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.495 ; 1.407 ; +; 0.696 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.981 ; +; 0.701 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.495 ; 1.426 ; +; 0.706 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 0.991 ; +; 0.712 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.955 ; +; 0.717 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.024 ; 0.936 ; +; 0.717 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.097 ; 1.009 ; +; 0.721 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.003 ; 0.919 ; +; 0.729 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.065 ; 0.989 ; +; 0.732 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.194 ; 1.121 ; +; 0.733 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.090 ; 1.018 ; +; 0.735 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.097 ; 1.027 ; +; 0.736 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.024 ; 0.955 ; +; 0.739 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.003 ; 0.937 ; +; 0.740 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.048 ; 0.983 ; +; 0.745 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.495 ; 1.470 ; +; 0.748 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 0.992 ; +; 0.766 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 1.010 ; +; 0.768 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 1.012 ; +; 0.768 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 1.009 ; +; 0.772 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.024 ; 0.991 ; +; 0.773 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 1.017 ; +; 0.774 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 1.018 ; +; 0.774 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 1.015 ; +; 0.777 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 1.023 ; +; 0.777 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 1.018 ; +; 0.785 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.267 ; 1.282 ; +; 0.790 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.051 ; 1.036 ; +; 0.793 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; -0.243 ; 0.745 ; +; 0.795 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; -0.243 ; 0.747 ; +; 0.796 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.024 ; 1.015 ; +; 0.800 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.395 ; 1.425 ; +; 0.802 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.049 ; 1.046 ; +; 0.818 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.267 ; 1.315 ; +; 0.819 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.262 ; 1.311 ; +; 0.831 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.398 ; 1.459 ; +; 0.839 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.343 ; 1.412 ; +-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ @@ -4125,106 +4125,106 @@ No paths to report. +-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.437 ; spi_slave:spi_slave_rx2_inst|rreg[32] ; spi_slave:spi_slave_rx2_inst|rdata[33] ; spi_sck ; spi_sck ; 0.000 ; 0.114 ; 0.746 ; -; 0.437 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_sck ; spi_sck ; 0.000 ; 0.114 ; 0.746 ; -; 0.448 ; spi_slave:spi_slave_rx2_inst|rreg[0] ; spi_slave:spi_slave_rx2_inst|rdata[1] ; spi_sck ; spi_sck ; 0.000 ; 0.102 ; 0.745 ; -; 0.448 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; 0.102 ; 0.745 ; -; 0.450 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_sck ; spi_sck ; 0.000 ; 0.102 ; 0.747 ; -; 0.450 ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_sck ; spi_sck ; 0.000 ; 0.114 ; 0.759 ; -; 0.460 ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.759 ; -; 0.462 ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.761 ; -; 0.463 ; spi_slave:spi_slave_rx_inst|rreg[13] ; spi_slave:spi_slave_rx_inst|rdata[14] ; spi_sck ; spi_sck ; 0.000 ; 0.103 ; 0.761 ; -; 0.464 ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_slave:spi_slave_rx_inst|rdata[16] ; spi_sck ; spi_sck ; 0.000 ; 0.103 ; 0.762 ; -; 0.472 ; spi_slave:spi_slave_rx_inst|treg[7] ; spi_slave:spi_slave_rx_inst|treg[8] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.716 ; -; 0.472 ; spi_slave:spi_slave_rx2_inst|treg[7] ; spi_slave:spi_slave_rx2_inst|treg[8] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.716 ; -; 0.494 ; spi_slave:spi_slave_rx_inst|treg[5] ; spi_slave:spi_slave_rx_inst|treg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.738 ; -; 0.494 ; spi_slave:spi_slave_rx_inst|rreg[37] ; spi_slave:spi_slave_rx_inst|rreg[38] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.739 ; -; 0.494 ; spi_slave:spi_slave_rx2_inst|treg[0] ; spi_slave:spi_slave_rx2_inst|treg[1] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.738 ; -; 0.494 ; spi_slave:spi_slave_rx2_inst|treg[3] ; spi_slave:spi_slave_rx2_inst|treg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.738 ; -; 0.497 ; spi_slave:spi_slave_rx_inst|rreg[21] ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.743 ; -; 0.498 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.744 ; -; 0.498 ; spi_slave:spi_slave_rx2_inst|rreg[5] ; spi_slave:spi_slave_rx2_inst|rreg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.743 ; -; 0.498 ; spi_slave:spi_slave_rx2_inst|rreg[3] ; spi_slave:spi_slave_rx2_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.743 ; -; 0.499 ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.744 ; -; 0.499 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.745 ; -; 0.499 ; spi_slave:spi_slave_rx2_inst|rreg[32] ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.745 ; -; 0.499 ; spi_slave:spi_slave_rx2_inst|rreg[6] ; spi_slave:spi_slave_rx2_inst|rreg[7] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.744 ; -; 0.499 ; spi_slave:spi_slave_rx_inst|rreg[18] ; spi_slave:spi_slave_rx_inst|rreg[19] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.745 ; -; 0.500 ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.746 ; -; 0.500 ; spi_slave:spi_slave_rx_inst|rreg[39] ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.745 ; -; 0.500 ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_slave:spi_slave_rx_inst|rreg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.745 ; -; 0.501 ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.746 ; -; 0.502 ; spi_slave:spi_slave_rx_inst|rreg[5] ; spi_slave:spi_slave_rx_inst|rreg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.744 ; -; 0.502 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.744 ; -; 0.504 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.046 ; 0.745 ; -; 0.504 ; spi_slave:spi_slave_rx2_inst|rreg[0] ; spi_slave:spi_slave_rx2_inst|rreg[1] ; spi_sck ; spi_sck ; 0.000 ; 0.046 ; 0.745 ; -; 0.505 ; spi_slave:spi_slave_rx_inst|rreg[6] ; spi_slave:spi_slave_rx_inst|rreg[7] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.747 ; -; 0.505 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.046 ; 0.746 ; -; 0.514 ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.759 ; -; 0.515 ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_slave:spi_slave_rx_inst|rreg[37] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.760 ; -; 0.515 ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.760 ; -; 0.516 ; spi_slave:spi_slave_rx_inst|rreg[28] ; spi_slave:spi_slave_rx_inst|rreg[29] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.761 ; -; 0.517 ; spi_slave:spi_slave_rx_inst|rreg[29] ; spi_slave:spi_slave_rx_inst|rreg[30] ; spi_sck ; spi_sck ; 0.000 ; 0.182 ; 0.894 ; -; 0.540 ; spi_slave:spi_slave_rx_inst|rreg[6] ; spi_slave:spi_slave_rx_inst|rdata[7] ; spi_sck ; spi_sck ; 0.000 ; 0.010 ; 0.745 ; -; 0.540 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_sck ; spi_sck ; 0.000 ; 0.010 ; 0.745 ; -; 0.541 ; spi_slave:spi_slave_rx_inst|rreg[5] ; spi_slave:spi_slave_rx_inst|rdata[6] ; spi_sck ; spi_sck ; 0.000 ; 0.010 ; 0.746 ; -; 0.556 ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_sck ; spi_sck ; 0.000 ; 0.010 ; 0.761 ; -; 0.564 ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_sck ; spi_sck ; 0.000 ; -0.020 ; 0.739 ; -; 0.569 ; spi_slave:spi_slave_rx_inst|rreg[39] ; spi_slave:spi_slave_rx_inst|rdata[40] ; spi_sck ; spi_sck ; 0.000 ; -0.020 ; 0.744 ; -; 0.570 ; spi_slave:spi_slave_rx_inst|rreg[14] ; spi_slave:spi_slave_rx_inst|rdata[15] ; spi_sck ; spi_sck ; 0.000 ; 0.119 ; 0.884 ; -; 0.584 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rdata[24] ; spi_sck ; spi_sck ; 0.000 ; -0.035 ; 0.744 ; -; 0.585 ; spi_slave:spi_slave_rx_inst|rreg[18] ; spi_slave:spi_slave_rx_inst|rdata[19] ; spi_sck ; spi_sck ; 0.000 ; -0.035 ; 0.745 ; -; 0.586 ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_slave:spi_slave_rx_inst|rdata[23] ; spi_sck ; spi_sck ; 0.000 ; -0.035 ; 0.746 ; -; 0.588 ; spi_slave:spi_slave_rx_inst|rreg[21] ; spi_slave:spi_slave_rx_inst|rdata[22] ; spi_sck ; spi_sck ; 0.000 ; -0.035 ; 0.748 ; -; 0.600 ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_slave:spi_slave_rx_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; -0.035 ; 0.760 ; -; 0.609 ; spi_slave:spi_slave_rx2_inst|rreg[5] ; spi_slave:spi_slave_rx2_inst|rdata[6] ; spi_sck ; spi_sck ; 0.000 ; -0.059 ; 0.745 ; -; 0.610 ; spi_slave:spi_slave_rx2_inst|rreg[3] ; spi_slave:spi_slave_rx2_inst|rdata[4] ; spi_sck ; spi_sck ; 0.000 ; -0.059 ; 0.746 ; -; 0.611 ; spi_slave:spi_slave_rx2_inst|rreg[11] ; spi_slave:spi_slave_rx2_inst|rdata[12] ; spi_sck ; spi_sck ; 0.000 ; 0.114 ; 0.920 ; -; 0.611 ; spi_slave:spi_slave_rx2_inst|rreg[6] ; spi_slave:spi_slave_rx2_inst|rdata[7] ; spi_sck ; spi_sck ; 0.000 ; -0.059 ; 0.747 ; -; 0.612 ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_sck ; spi_sck ; 0.000 ; 0.114 ; 0.921 ; -; 0.613 ; spi_slave:spi_slave_rx2_inst|rreg[10] ; spi_slave:spi_slave_rx2_inst|rdata[11] ; spi_sck ; spi_sck ; 0.000 ; 0.114 ; 0.922 ; -; 0.614 ; spi_slave:spi_slave_rx2_inst|rreg[12] ; spi_slave:spi_slave_rx2_inst|rdata[13] ; spi_sck ; spi_sck ; 0.000 ; 0.114 ; 0.923 ; -; 0.614 ; spi_slave:spi_slave_rx_inst|rreg[14] ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.076 ; 0.885 ; -; 0.621 ; spi_slave:spi_slave_rx_inst|treg[14] ; spi_slave:spi_slave_rx_inst|treg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.865 ; -; 0.621 ; spi_slave:spi_slave_rx_inst|treg[12] ; spi_slave:spi_slave_rx_inst|treg[13] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.865 ; -; 0.621 ; spi_slave:spi_slave_rx_inst|rreg[0] ; spi_slave:spi_slave_rx_inst|rdata[1] ; spi_sck ; spi_sck ; 0.000 ; 0.103 ; 0.919 ; -; 0.621 ; spi_slave:spi_slave_rx_inst|rreg[11] ; spi_slave:spi_slave_rx_inst|rdata[12] ; spi_sck ; spi_sck ; 0.000 ; 0.103 ; 0.919 ; -; 0.621 ; spi_slave:spi_slave_rx2_inst|treg[10] ; spi_slave:spi_slave_rx2_inst|treg[11] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.865 ; -; 0.622 ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_slave:spi_slave_rx2_inst|rdata[44] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.921 ; -; 0.622 ; spi_slave:spi_slave_rx_inst|treg[11] ; spi_slave:spi_slave_rx_inst|treg[12] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.866 ; -; 0.622 ; spi_slave:spi_slave_rx_inst|treg[8] ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.866 ; -; 0.622 ; spi_slave:spi_slave_rx_inst|treg[40] ; spi_slave:spi_slave_rx_inst|treg[41] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.865 ; -; 0.622 ; spi_slave:spi_slave_rx_inst|rreg[1] ; spi_slave:spi_slave_rx_inst|rdata[2] ; spi_sck ; spi_sck ; 0.000 ; 0.103 ; 0.920 ; -; 0.622 ; spi_slave:spi_slave_rx2_inst|treg[12] ; spi_slave:spi_slave_rx2_inst|treg[13] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.866 ; -; 0.622 ; spi_slave:spi_slave_rx2_inst|treg[14] ; spi_slave:spi_slave_rx2_inst|treg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.866 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_slave:spi_slave_rx2_inst|rdata[43] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.922 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[8] ; spi_slave:spi_slave_rx2_inst|treg[9] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[23] ; spi_slave:spi_slave_rx2_inst|treg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[11] ; spi_slave:spi_slave_rx2_inst|treg[12] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[13] ; spi_slave:spi_slave_rx2_inst|treg[14] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_slave:spi_slave_rx_inst|treg[10] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[45] ; spi_slave:spi_slave_rx2_inst|treg[46] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[42] ; spi_slave:spi_slave_rx2_inst|treg[43] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[25] ; spi_slave:spi_slave_rx2_inst|treg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[24] ; spi_slave:spi_slave_rx2_inst|treg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.623 ; spi_slave:spi_slave_rx_inst|treg[33] ; spi_slave:spi_slave_rx_inst|treg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.866 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[19] ; spi_slave:spi_slave_rx2_inst|treg[20] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; -; 0.624 ; spi_slave:spi_slave_rx_inst|treg[25] ; spi_slave:spi_slave_rx_inst|treg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.866 ; -; 0.624 ; spi_slave:spi_slave_rx_inst|treg[13] ; spi_slave:spi_slave_rx_inst|treg[14] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.868 ; -; 0.624 ; spi_slave:spi_slave_rx2_inst|treg[16] ; spi_slave:spi_slave_rx2_inst|treg[17] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.868 ; -; 0.624 ; spi_slave:spi_slave_rx2_inst|treg[43] ; spi_slave:spi_slave_rx2_inst|treg[44] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.868 ; -; 0.624 ; spi_slave:spi_slave_rx_inst|treg[32] ; spi_slave:spi_slave_rx_inst|treg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.867 ; -; 0.624 ; spi_slave:spi_slave_rx2_inst|rreg[23] ; spi_slave:spi_slave_rx2_inst|rdata[24] ; spi_sck ; spi_sck ; 0.000 ; -0.059 ; 0.760 ; -; 0.624 ; spi_slave:spi_slave_rx2_inst|treg[22] ; spi_slave:spi_slave_rx2_inst|treg[23] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.868 ; -; 0.624 ; spi_slave:spi_slave_rx_inst|rreg[12] ; spi_slave:spi_slave_rx_inst|rdata[13] ; spi_sck ; spi_sck ; 0.000 ; 0.103 ; 0.922 ; -; 0.625 ; spi_slave:spi_slave_rx_inst|treg[26] ; spi_slave:spi_slave_rx_inst|treg[27] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.867 ; -; 0.625 ; spi_slave:spi_slave_rx2_inst|rreg[1] ; spi_slave:spi_slave_rx2_inst|rdata[2] ; spi_sck ; spi_sck ; 0.000 ; 0.102 ; 0.922 ; -; 0.625 ; spi_slave:spi_slave_rx_inst|treg[39] ; spi_slave:spi_slave_rx_inst|treg[40] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.868 ; -; 0.625 ; spi_slave:spi_slave_rx_inst|treg[36] ; spi_slave:spi_slave_rx_inst|treg[37] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.868 ; -; 0.626 ; spi_slave:spi_slave_rx_inst|treg[41] ; spi_slave:spi_slave_rx_inst|treg[42] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.869 ; +; 0.410 ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_slave:spi_slave_rx_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; 0.138 ; 0.743 ; +; 0.411 ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_slave:spi_slave_rx_inst|rdata[26] ; spi_sck ; spi_sck ; 0.000 ; 0.138 ; 0.744 ; +; 0.412 ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_slave:spi_slave_rx_inst|rdata[28] ; spi_sck ; spi_sck ; 0.000 ; 0.138 ; 0.745 ; +; 0.413 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rdata[24] ; spi_sck ; spi_sck ; 0.000 ; 0.138 ; 0.746 ; +; 0.413 ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_slave:spi_slave_rx_inst|rdata[27] ; spi_sck ; spi_sck ; 0.000 ; 0.138 ; 0.746 ; +; 0.432 ; spi_slave:spi_slave_rx2_inst|rreg[28] ; spi_slave:spi_slave_rx2_inst|rdata[29] ; spi_sck ; spi_sck ; 0.000 ; 0.116 ; 0.743 ; +; 0.433 ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_slave:spi_slave_rx_inst|rdata[35] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 0.743 ; +; 0.437 ; spi_slave:spi_slave_rx_inst|rreg[33] ; spi_slave:spi_slave_rx_inst|rdata[34] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 0.747 ; +; 0.438 ; spi_slave:spi_slave_rx2_inst|rreg[46] ; spi_slave:spi_slave_rx2_inst|rdata[47] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.737 ; +; 0.442 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.745 ; +; 0.442 ; spi_slave:spi_slave_rx_inst|rreg[2] ; spi_slave:spi_slave_rx_inst|rdata[3] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.745 ; +; 0.444 ; spi_slave:spi_slave_rx_inst|rreg[1] ; spi_slave:spi_slave_rx_inst|rdata[2] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.747 ; +; 0.445 ; spi_slave:spi_slave_rx2_inst|rreg[40] ; spi_slave:spi_slave_rx2_inst|rdata[41] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.744 ; +; 0.446 ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_slave:spi_slave_rx2_inst|rdata[43] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.745 ; +; 0.447 ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.746 ; +; 0.447 ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_slave:spi_slave_rx2_inst|rdata[44] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.746 ; +; 0.448 ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.747 ; +; 0.448 ; spi_slave:spi_slave_rx2_inst|rreg[41] ; spi_slave:spi_slave_rx2_inst|rdata[42] ; spi_sck ; spi_sck ; 0.000 ; 0.104 ; 0.747 ; +; 0.494 ; spi_slave:spi_slave_rx_inst|treg[12] ; spi_slave:spi_slave_rx_inst|treg[13] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.737 ; +; 0.494 ; spi_slave:spi_slave_rx2_inst|treg[41] ; spi_slave:spi_slave_rx2_inst|treg[42] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.738 ; +; 0.495 ; spi_slave:spi_slave_rx_inst|treg[20] ; spi_slave:spi_slave_rx_inst|treg[21] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.738 ; +; 0.495 ; spi_slave:spi_slave_rx2_inst|treg[31] ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.739 ; +; 0.495 ; spi_slave:spi_slave_rx_inst|treg[29] ; spi_slave:spi_slave_rx_inst|treg[30] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.738 ; +; 0.495 ; spi_slave:spi_slave_rx2_inst|treg[3] ; spi_slave:spi_slave_rx2_inst|treg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.738 ; +; 0.495 ; spi_slave:spi_slave_rx2_inst|treg[5] ; spi_slave:spi_slave_rx2_inst|treg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.738 ; +; 0.496 ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_slave:spi_slave_rx_inst|treg[10] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.738 ; +; 0.496 ; spi_slave:spi_slave_rx_inst|treg[2] ; spi_slave:spi_slave_rx_inst|treg[3] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.738 ; +; 0.497 ; spi_slave:spi_slave_rx_inst|treg[24] ; spi_slave:spi_slave_rx_inst|treg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.740 ; +; 0.497 ; spi_slave:spi_slave_rx_inst|treg[8] ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.739 ; +; 0.497 ; spi_slave:spi_slave_rx_inst|treg[4] ; spi_slave:spi_slave_rx_inst|treg[5] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.739 ; +; 0.497 ; spi_slave:spi_slave_rx_inst|treg[3] ; spi_slave:spi_slave_rx_inst|treg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.739 ; +; 0.497 ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_slave:spi_slave_rx2_inst|rreg[46] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.743 ; +; 0.499 ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.744 ; +; 0.499 ; spi_slave:spi_slave_rx2_inst|rreg[37] ; spi_slave:spi_slave_rx2_inst|rreg[38] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.744 ; +; 0.499 ; spi_slave:spi_slave_rx2_inst|rreg[36] ; spi_slave:spi_slave_rx2_inst|rreg[37] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.744 ; +; 0.499 ; spi_slave:spi_slave_rx_inst|rreg[33] ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.052 ; 0.746 ; +; 0.499 ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.745 ; +; 0.499 ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.745 ; +; 0.499 ; spi_slave:spi_slave_rx2_inst|rreg[40] ; spi_slave:spi_slave_rx2_inst|rreg[41] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.745 ; +; 0.499 ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_slave:spi_slave_rx_inst|rreg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.744 ; +; 0.500 ; spi_slave:spi_slave_rx2_inst|rreg[35] ; spi_slave:spi_slave_rx2_inst|rreg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.745 ; +; 0.500 ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_slave:spi_slave_rx2_inst|rreg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.745 ; +; 0.500 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.745 ; +; 0.500 ; spi_slave:spi_slave_rx2_inst|rreg[28] ; spi_slave:spi_slave_rx2_inst|rreg[29] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.746 ; +; 0.500 ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.746 ; +; 0.500 ; spi_slave:spi_slave_rx2_inst|rreg[41] ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.746 ; +; 0.500 ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.052 ; 0.747 ; +; 0.501 ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.746 ; +; 0.501 ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.746 ; +; 0.501 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.745 ; +; 0.502 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.747 ; +; 0.502 ; spi_slave:spi_slave_rx_inst|rreg[2] ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.746 ; +; 0.502 ; spi_slave:spi_slave_rx_inst|rreg[1] ; spi_slave:spi_slave_rx_inst|rreg[2] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.746 ; +; 0.505 ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_slave:spi_slave_rx2_inst|rreg[32] ; spi_sck ; spi_sck ; 0.000 ; 0.196 ; 0.896 ; +; 0.512 ; spi_slave:spi_slave_rx_inst|rreg[14] ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.758 ; +; 0.513 ; spi_slave:spi_slave_rx2_inst|rreg[27] ; spi_slave:spi_slave_rx2_inst|rreg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.759 ; +; 0.513 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.759 ; +; 0.513 ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_slave:spi_slave_rx_inst|rreg[16] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.759 ; +; 0.513 ; spi_slave:spi_slave_rx2_inst|rreg[1] ; spi_slave:spi_slave_rx2_inst|rreg[2] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.759 ; +; 0.514 ; spi_slave:spi_slave_rx2_inst|rreg[29] ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.760 ; +; 0.514 ; spi_slave:spi_slave_rx2_inst|rreg[23] ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.760 ; +; 0.514 ; spi_slave:spi_slave_rx_inst|rreg[21] ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.759 ; +; 0.515 ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.761 ; +; 0.515 ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.760 ; +; 0.515 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.051 ; 0.761 ; +; 0.515 ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.052 ; 0.762 ; +; 0.517 ; spi_slave:spi_slave_rx_inst|rreg[39] ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.761 ; +; 0.517 ; spi_slave:spi_slave_rx_inst|rreg[18] ; spi_slave:spi_slave_rx_inst|rreg[19] ; spi_sck ; spi_sck ; 0.000 ; 0.050 ; 0.762 ; +; 0.519 ; spi_slave:spi_slave_rx_inst|rreg[10] ; spi_slave:spi_slave_rx_inst|rreg[11] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.761 ; +; 0.522 ; spi_slave:spi_slave_rx2_inst|rreg[14] ; spi_slave:spi_slave_rx2_inst|rdata[15] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.760 ; +; 0.568 ; spi_slave:spi_slave_rx2_inst|rreg[21] ; spi_slave:spi_slave_rx2_inst|rreg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.171 ; 0.934 ; +; 0.572 ; spi_slave:spi_slave_rx2_inst|rreg[37] ; spi_slave:spi_slave_rx2_inst|rdata[38] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.744 ; +; 0.573 ; spi_slave:spi_slave_rx2_inst|rreg[35] ; spi_slave:spi_slave_rx2_inst|rdata[36] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.745 ; +; 0.573 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.745 ; +; 0.574 ; spi_slave:spi_slave_rx2_inst|rreg[36] ; spi_slave:spi_slave_rx2_inst|rdata[37] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.746 ; +; 0.574 ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_sck ; spi_sck ; 0.000 ; -0.023 ; 0.746 ; +; 0.576 ; spi_slave:spi_slave_rx2_inst|rreg[29] ; spi_slave:spi_slave_rx2_inst|rdata[30] ; spi_sck ; spi_sck ; 0.000 ; 0.122 ; 0.893 ; +; 0.576 ; spi_slave:spi_slave_rx2_inst|rreg[22] ; spi_slave:spi_slave_rx2_inst|rdata[23] ; spi_sck ; spi_sck ; 0.000 ; 0.122 ; 0.893 ; +; 0.577 ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_sck ; spi_sck ; 0.000 ; 0.116 ; 0.888 ; +; 0.580 ; spi_slave:spi_slave_rx2_inst|rreg[2] ; spi_slave:spi_slave_rx2_inst|rdata[3] ; spi_sck ; spi_sck ; 0.000 ; 0.122 ; 0.897 ; +; 0.594 ; spi_slave:spi_slave_rx2_inst|rreg[3] ; spi_slave:spi_slave_rx2_inst|rdata[4] ; spi_sck ; spi_sck ; 0.000 ; 0.122 ; 0.911 ; +; 0.595 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; 0.122 ; 0.912 ; +; 0.595 ; spi_slave:spi_slave_rx2_inst|rreg[20] ; spi_slave:spi_slave_rx2_inst|rdata[21] ; spi_sck ; spi_sck ; 0.000 ; 0.132 ; 0.922 ; +; 0.599 ; spi_slave:spi_slave_rx2_inst|rreg[1] ; spi_slave:spi_slave_rx2_inst|rdata[2] ; spi_sck ; spi_sck ; 0.000 ; 0.122 ; 0.916 ; +; 0.600 ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_sck ; spi_sck ; 0.000 ; 0.122 ; 0.917 ; +; 0.600 ; spi_slave:spi_slave_rx2_inst|rreg[3] ; spi_slave:spi_slave_rx2_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 0.910 ; +; 0.604 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_sck ; spi_sck ; 0.000 ; 0.122 ; 0.921 ; +; 0.609 ; spi_slave:spi_slave_rx2_inst|rreg[21] ; spi_slave:spi_slave_rx2_inst|rdata[22] ; spi_sck ; spi_sck ; 0.000 ; 0.132 ; 0.936 ; +; 0.610 ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.913 ; +; 0.612 ; spi_slave:spi_slave_rx_inst|treg[27] ; spi_slave:spi_slave_rx_inst|treg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.071 ; 0.878 ; +; 0.614 ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_slave:spi_slave_rx_inst|rdata[37] ; spi_sck ; spi_sck ; 0.000 ; 0.115 ; 0.924 ; +; 0.618 ; spi_slave:spi_slave_rx_inst|rreg[0] ; spi_slave:spi_slave_rx_inst|rdata[1] ; spi_sck ; spi_sck ; 0.000 ; 0.108 ; 0.921 ; +; 0.622 ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_slave:spi_slave_rx2_inst|treg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.866 ; +; 0.622 ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.866 ; +; 0.622 ; spi_slave:spi_slave_rx2_inst|treg[10] ; spi_slave:spi_slave_rx2_inst|treg[11] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.865 ; +; 0.623 ; spi_slave:spi_slave_rx2_inst|treg[37] ; spi_slave:spi_slave_rx2_inst|treg[38] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.867 ; +; 0.623 ; spi_slave:spi_slave_rx_inst|treg[44] ; spi_slave:spi_slave_rx_inst|treg[45] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.865 ; +; 0.623 ; spi_slave:spi_slave_rx_inst|treg[34] ; spi_slave:spi_slave_rx_inst|treg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.866 ; +; 0.623 ; spi_slave:spi_slave_rx_inst|treg[32] ; spi_slave:spi_slave_rx_inst|treg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.866 ; +; 0.624 ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.049 ; 0.868 ; +-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ @@ -4233,268 +4233,268 @@ No paths to report. +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ -; 0.574 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.759 ; 1.162 ; -; 0.655 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.939 ; 1.819 ; -; 0.731 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.918 ; 1.874 ; -; 0.742 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.904 ; 1.871 ; -; 0.784 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.922 ; 1.931 ; -; 0.801 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.896 ; 1.922 ; -; 0.806 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.904 ; 1.935 ; -; 0.809 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.885 ; 1.919 ; -; 0.810 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.752 ; 1.391 ; -; 0.811 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.904 ; 1.940 ; -; 0.812 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.885 ; 1.922 ; -; 0.821 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.896 ; 1.942 ; -; 0.823 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.785 ; 1.437 ; -; 0.823 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.922 ; 1.970 ; -; 0.826 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.751 ; 1.406 ; -; 0.835 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.752 ; 1.416 ; -; 0.835 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.797 ; 1.461 ; -; 0.836 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.759 ; 1.424 ; -; 0.836 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.751 ; 1.416 ; -; 0.837 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.797 ; 1.463 ; -; 0.839 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.904 ; 1.968 ; -; 0.840 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.752 ; 1.421 ; -; 0.842 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.771 ; 1.442 ; -; 0.842 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.797 ; 1.468 ; -; 0.843 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.752 ; 1.424 ; -; 0.846 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.797 ; 1.472 ; -; 0.847 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.771 ; 1.447 ; -; 0.847 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.785 ; 1.461 ; -; 0.848 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.751 ; 1.428 ; -; 0.851 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.751 ; 1.431 ; -; 0.853 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.885 ; 1.963 ; -; 0.854 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.797 ; 1.480 ; -; 0.854 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.797 ; 1.480 ; -; 0.856 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.771 ; 1.456 ; -; 0.856 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.785 ; 1.470 ; -; 0.857 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.771 ; 1.457 ; -; 0.858 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.785 ; 1.472 ; -; 0.860 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.751 ; 1.440 ; -; 0.860 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.807 ; 1.496 ; -; 0.861 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.752 ; 1.442 ; -; 0.864 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.751 ; 1.444 ; -; 0.865 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.797 ; 1.491 ; -; 0.866 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.797 ; 1.492 ; -; 0.866 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.751 ; 1.446 ; -; 0.871 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.785 ; 1.485 ; -; 0.871 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.771 ; 1.471 ; -; 0.873 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.797 ; 1.499 ; -; 0.878 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.771 ; 1.478 ; -; 0.878 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.752 ; 1.459 ; -; 0.879 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.751 ; 1.459 ; -; 0.893 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.751 ; 1.473 ; -; 0.895 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.771 ; 1.495 ; -; 0.901 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.759 ; 1.489 ; -; 0.901 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.785 ; 1.515 ; -; 0.916 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.752 ; 1.497 ; -; 0.950 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.922 ; 2.097 ; -; 0.976 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.649 ; 1.454 ; -; 0.977 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.904 ; 2.106 ; -; 0.986 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.648 ; 1.463 ; -; 0.998 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.884 ; 2.107 ; -; 1.004 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.781 ; 2.010 ; -; 1.014 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.918 ; 2.157 ; -; 1.035 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.918 ; 2.178 ; -; 1.047 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.904 ; 2.176 ; -; 1.050 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.649 ; 1.528 ; -; 1.066 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.885 ; 2.176 ; -; 1.068 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.807 ; 1.704 ; -; 1.084 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.752 ; 1.665 ; -; 1.121 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.918 ; 2.264 ; -; 1.122 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.771 ; 1.722 ; -; 1.124 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.806 ; 1.759 ; -; 1.132 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.885 ; 2.242 ; -; 1.133 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.789 ; 2.147 ; -; 1.136 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.819 ; 1.784 ; -; 1.137 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.759 ; 1.725 ; -; 1.142 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.785 ; 1.756 ; -; 1.144 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.789 ; 2.158 ; -; 1.162 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.939 ; 2.326 ; -; 1.168 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.785 ; 1.782 ; -; 1.174 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.785 ; 1.788 ; -; 1.177 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.807 ; 1.813 ; -; 1.179 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.759 ; 1.767 ; -; 1.200 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.781 ; 2.206 ; -; 1.220 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.759 ; 1.808 ; -; 1.221 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.806 ; 1.856 ; -; 1.232 ; spi_slave:spi_slave_rx_inst|rdata[36] ; rx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.080 ; 1.377 ; -; 1.290 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.648 ; 1.767 ; -; 1.337 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.904 ; 2.466 ; -; 1.353 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.930 ; 2.508 ; -; 1.355 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.939 ; 2.519 ; -; 1.360 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.807 ; 1.996 ; -; 1.365 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.759 ; 1.953 ; -; 1.371 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.940 ; 2.536 ; -; 1.379 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.922 ; 2.526 ; -; 1.388 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.806 ; 2.023 ; -; 1.409 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.884 ; 2.518 ; -; 1.446 ; spi_slave:spi_slave_rx_inst|rdata[32] ; tx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.437 ; 1.234 ; -; 1.450 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.904 ; 2.579 ; -; 1.458 ; spi_slave:spi_slave_rx_inst|rdata[37] ; rx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.090 ; 1.593 ; -; 1.475 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.759 ; 2.063 ; +; 0.703 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.593 ; 1.125 ; +; 0.713 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.593 ; 1.135 ; +; 0.718 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.593 ; 1.140 ; +; 0.728 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.593 ; 1.150 ; +; 0.732 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.593 ; 1.154 ; +; 0.879 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.739 ; 1.843 ; +; 0.914 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.864 ; +; 0.941 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.739 ; 1.905 ; +; 0.955 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.743 ; 1.923 ; +; 0.963 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.714 ; 1.902 ; +; 0.996 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 1.948 ; +; 0.998 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.948 ; +; 0.998 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.591 ; 1.418 ; +; 1.005 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.591 ; 1.425 ; +; 1.006 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.714 ; 1.945 ; +; 1.009 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.424 ; +; 1.012 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.589 ; 1.430 ; +; 1.012 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.589 ; 1.430 ; +; 1.018 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.584 ; 1.431 ; +; 1.021 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.591 ; 1.441 ; +; 1.024 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.439 ; +; 1.024 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.605 ; 1.458 ; +; 1.025 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.589 ; 1.443 ; +; 1.027 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.605 ; 1.461 ; +; 1.027 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.591 ; 1.447 ; +; 1.032 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.447 ; +; 1.033 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.584 ; 1.446 ; +; 1.034 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.589 ; 1.452 ; +; 1.036 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.451 ; +; 1.036 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.451 ; +; 1.039 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.584 ; 1.452 ; +; 1.040 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.455 ; +; 1.040 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 1.990 ; +; 1.041 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.584 ; 1.454 ; +; 1.043 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.589 ; 1.461 ; +; 1.044 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.589 ; 1.462 ; +; 1.051 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.584 ; 1.464 ; +; 1.052 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.467 ; +; 1.054 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 2.006 ; +; 1.055 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.584 ; 1.468 ; +; 1.056 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.471 ; +; 1.058 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 2.008 ; +; 1.059 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.474 ; +; 1.059 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.589 ; 1.477 ; +; 1.060 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.605 ; 1.494 ; +; 1.060 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.584 ; 1.473 ; +; 1.060 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.589 ; 1.478 ; +; 1.063 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.478 ; +; 1.066 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.605 ; 1.500 ; +; 1.081 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.496 ; +; 1.082 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.419 ; 1.726 ; +; 1.103 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.605 ; 1.537 ; +; 1.137 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.724 ; 2.086 ; +; 1.144 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.739 ; 2.108 ; +; 1.152 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.739 ; 2.116 ; +; 1.156 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 2.108 ; +; 1.181 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.714 ; 2.120 ; +; 1.219 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.706 ; 2.150 ; +; 1.221 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.737 ; 2.183 ; +; 1.222 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.429 ; 1.876 ; +; 1.256 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.725 ; 2.206 ; +; 1.266 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.593 ; 1.688 ; +; 1.286 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.297 ; 1.412 ; +; 1.290 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.705 ; +; 1.306 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.294 ; 1.429 ; +; 1.306 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.718 ; 2.249 ; +; 1.307 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.297 ; 1.433 ; +; 1.308 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.603 ; 1.740 ; +; 1.321 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.435 ; 1.981 ; +; 1.322 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.591 ; 1.742 ; +; 1.330 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.294 ; 1.453 ; +; 1.331 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.294 ; 1.454 ; +; 1.333 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.603 ; 1.765 ; +; 1.334 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.294 ; 1.457 ; +; 1.337 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.729 ; 2.291 ; +; 1.339 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.603 ; 1.771 ; +; 1.339 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.754 ; +; 1.340 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.598 ; 1.767 ; +; 1.346 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.761 ; +; 1.360 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.297 ; 1.486 ; +; 1.360 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.603 ; 1.792 ; +; 1.381 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.294 ; 1.504 ; +; 1.396 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 2.348 ; +; 1.403 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.601 ; 1.833 ; +; 1.405 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.435 ; 2.065 ; +; 1.415 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 2.367 ; +; 1.429 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.745 ; 2.399 ; +; 1.446 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.433 ; 2.104 ; +; 1.446 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.729 ; 2.400 ; +; 1.465 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.718 ; 2.408 ; +; 1.488 ; spi_slave:spi_slave_rx_inst|rdata[35] ; rx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.652 ; 1.061 ; +; 1.528 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.729 ; 2.482 ; +; 1.544 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.297 ; 1.670 ; +; 1.576 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.586 ; 1.991 ; +; 1.610 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.297 ; 1.736 ; +; 1.613 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.591 ; 2.033 ; +; 1.614 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.727 ; 2.566 ; +; 1.636 ; spi_slave:spi_slave_rx_inst|rdata[37] ; tx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.388 ; 1.473 ; +; 1.657 ; spi_slave:spi_slave_rx_inst|rdata[35] ; tx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.727 ; 1.155 ; +; 1.690 ; spi_slave:spi_slave_rx_inst|rdata[33] ; rx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.652 ; 1.263 ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ -+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Slow 1200mV 0C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' ; -+-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -; 1.219 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.453 ; 5.912 ; -; 1.265 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.452 ; 5.957 ; -; 1.465 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.312 ; 6.017 ; -; 1.485 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.313 ; 6.038 ; -; 1.557 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.313 ; 6.110 ; -; 1.675 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.262 ; 6.177 ; -; 1.479 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.314 ; 6.033 ; -; 1.502 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.442 ; 6.184 ; -; 1.939 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.451 ; 6.630 ; -; 1.968 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.259 ; 6.467 ; -; 1.513 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.315 ; 6.068 ; -; 1.339 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.248 ; 5.827 ; -; 1.840 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.257 ; 6.337 ; -; 5.922 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.313 ; 5.495 ; -; 5.968 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.259 ; 5.487 ; -; 6.016 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.314 ; 5.590 ; -; 6.045 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.442 ; 5.747 ; -; 6.094 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.315 ; 5.669 ; -; 6.128 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.312 ; 5.700 ; -; 6.160 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.262 ; 5.682 ; -; 6.174 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.313 ; 5.747 ; -; 6.072 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.248 ; 5.580 ; -; 6.235 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.453 ; 5.948 ; -; 6.270 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.451 ; 5.981 ; -; 6.308 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.452 ; 6.020 ; -; 6.439 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.257 ; 5.956 ; -+-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ - - +------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx2_inst|done' ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ -; 1.599 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.510 ; 0.918 ; -; 1.600 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.510 ; 0.919 ; -; 1.610 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.510 ; 0.929 ; -; 1.637 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.510 ; 0.956 ; -; 1.640 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.510 ; 0.959 ; -; 1.729 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 0.940 ; -; 1.733 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 0.928 ; -; 1.741 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 0.936 ; -; 1.745 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 0.956 ; -; 1.749 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 0.960 ; -; 1.757 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.647 ; 0.939 ; -; 1.758 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 0.969 ; -; 1.758 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 0.953 ; -; 1.763 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 0.958 ; -; 1.767 ; spi_slave:spi_slave_rx2_inst|rdata[32] ; keyer_weight[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.689 ; 0.907 ; -; 1.768 ; spi_slave:spi_slave_rx2_inst|rdata[35] ; keyer_weight[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.689 ; 0.908 ; -; 1.769 ; spi_slave:spi_slave_rx2_inst|rdata[34] ; keyer_weight[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.689 ; 0.909 ; -; 1.787 ; spi_slave:spi_slave_rx2_inst|rdata[37] ; keyer_weight[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.691 ; 0.925 ; -; 1.799 ; spi_slave:spi_slave_rx2_inst|rdata[36] ; keyer_weight[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.691 ; 0.937 ; -; 1.800 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.510 ; 1.119 ; -; 1.807 ; spi_slave:spi_slave_rx2_inst|rdata[45] ; cw_speed[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.611 ; 1.421 ; -; 1.817 ; spi_slave:spi_slave_rx2_inst|rdata[39] ; keyer_revers ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.609 ; 1.433 ; -; 1.821 ; spi_slave:spi_slave_rx2_inst|rdata[33] ; keyer_weight[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.689 ; 0.961 ; -; 1.829 ; spi_slave:spi_slave_rx2_inst|rdata[43] ; cw_speed[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.611 ; 1.443 ; -; 1.836 ; spi_slave:spi_slave_rx2_inst|rdata[42] ; cw_speed[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.611 ; 1.450 ; -; 1.861 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.510 ; 1.180 ; -; 1.896 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; rx2_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.491 ; 1.630 ; -; 1.910 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.514 ; 1.225 ; -; 1.919 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.236 ; -; 1.924 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.241 ; -; 1.931 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 1.142 ; -; 1.936 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.632 ; 1.133 ; -; 1.936 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 1.147 ; -; 1.941 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.258 ; -; 1.947 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 1.142 ; -; 1.951 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.268 ; -; 1.954 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; rx2_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.615 ; 1.564 ; -; 1.960 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.498 ; 1.291 ; -; 1.969 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; cw_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.484 ; 1.710 ; -; 1.980 ; spi_slave:spi_slave_rx2_inst|rdata[38] ; keyer_weight[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.691 ; 1.118 ; -; 1.986 ; spi_slave:spi_slave_rx2_inst|rdata[44] ; cw_speed[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.611 ; 1.600 ; -; 2.000 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.632 ; 1.197 ; -; 2.007 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.626 ; 1.210 ; -; 2.018 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.633 ; 1.214 ; -; 2.027 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.632 ; 1.224 ; -; 2.031 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.636 ; 1.224 ; -; 2.033 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 1.228 ; -; 2.036 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.620 ; 1.245 ; -; 2.039 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.632 ; 1.236 ; -; 2.040 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.678 ; 1.191 ; -; 2.040 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.626 ; 1.243 ; -; 2.041 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.636 ; 1.234 ; -; 2.042 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 1.237 ; -; 2.049 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.626 ; 1.252 ; -; 2.057 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.632 ; 1.254 ; -; 2.062 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.689 ; 1.202 ; -; 2.066 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; cw_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.611 ; 1.680 ; -; 2.067 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.685 ; 1.211 ; -; 2.071 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.687 ; 1.213 ; -; 2.073 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 1.268 ; -; 2.074 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.681 ; 1.222 ; -; 2.094 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.411 ; -; 2.095 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.676 ; 1.248 ; -; 2.095 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.412 ; -; 2.096 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.697 ; 1.228 ; -; 2.097 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.693 ; 1.233 ; -; 2.103 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.676 ; 1.256 ; -; 2.103 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.420 ; -; 2.106 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.685 ; 1.250 ; -; 2.106 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.423 ; -; 2.107 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.685 ; 1.251 ; -; 2.109 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.695 ; 1.243 ; -; 2.119 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.512 ; 1.436 ; -; 2.129 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.693 ; 1.265 ; -; 2.131 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.697 ; 1.263 ; -; 2.142 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.695 ; 1.276 ; -; 2.161 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.498 ; 1.492 ; -; 2.184 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.618 ; 1.395 ; -; 2.194 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.514 ; 1.509 ; -; 2.205 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.495 ; 1.539 ; -; 2.214 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.504 ; 1.539 ; -; 2.220 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.495 ; 1.554 ; -; 2.225 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.632 ; 1.422 ; -; 2.226 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.504 ; 1.551 ; -; 2.227 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.506 ; 1.550 ; -; 2.229 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.504 ; 1.554 ; -; 2.229 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 1.424 ; -; 2.237 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.495 ; 1.571 ; -; 2.239 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 1.434 ; -; 2.242 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.634 ; 1.437 ; -; 2.243 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.632 ; 1.440 ; -; 2.248 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.626 ; 1.451 ; -; 2.249 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.495 ; 1.583 ; -; 2.254 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.626 ; 1.457 ; -; 2.261 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.689 ; 1.401 ; -; 2.263 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.495 ; 1.597 ; -; 2.268 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.632 ; 1.465 ; -; 2.271 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.632 ; 1.468 ; -; 2.272 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.620 ; 1.481 ; -; 2.272 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.504 ; 1.597 ; +; 1.541 ; spi_slave:spi_slave_rx2_inst|rdata[39] ; keyer_revers ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.635 ; 1.131 ; +; 1.683 ; spi_slave:spi_slave_rx2_inst|rdata[42] ; cw_speed[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.278 ; +; 1.734 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; cw_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.613 ; 1.346 ; +; 1.734 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; rx2_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.613 ; 1.346 ; +; 1.767 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.664 ; 0.932 ; +; 1.802 ; spi_slave:spi_slave_rx2_inst|rdata[45] ; cw_speed[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.397 ; +; 1.809 ; spi_slave:spi_slave_rx2_inst|rdata[47] ; iambic_mode[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.635 ; 1.399 ; +; 1.844 ; spi_slave:spi_slave_rx2_inst|rdata[43] ; cw_speed[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.439 ; +; 1.847 ; spi_slave:spi_slave_rx2_inst|rdata[44] ; cw_speed[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.442 ; +; 1.850 ; spi_slave:spi_slave_rx2_inst|rdata[46] ; iambic_mode[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.635 ; 1.440 ; +; 1.897 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.594 ; 1.132 ; +; 1.904 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.594 ; 1.139 ; +; 1.936 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.631 ; 1.134 ; +; 1.942 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.631 ; 1.140 ; +; 1.951 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.631 ; 1.149 ; +; 1.963 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.631 ; 1.161 ; +; 1.996 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.608 ; 1.217 ; +; 1.997 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.631 ; 1.195 ; +; 2.019 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.594 ; 1.254 ; +; 2.022 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.631 ; 1.220 ; +; 2.025 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; cw_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.630 ; 1.620 ; +; 2.042 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.631 ; 1.240 ; +; 2.050 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.746 ; 1.133 ; +; 2.056 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.668 ; 1.217 ; +; 2.064 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.594 ; 1.299 ; +; 2.068 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.746 ; 1.151 ; +; 2.072 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.736 ; 1.165 ; +; 2.078 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.732 ; 1.175 ; +; 2.122 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.818 ; 1.133 ; +; 2.222 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.604 ; 1.447 ; +; 2.224 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.650 ; 1.403 ; +; 2.227 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.590 ; 1.466 ; +; 2.234 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.594 ; 1.469 ; +; 2.262 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.654 ; 1.437 ; +; 2.269 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.336 ; 1.762 ; +; 2.271 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.645 ; 1.455 ; +; 2.277 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.645 ; 1.461 ; +; 2.277 ; spi_slave:spi_slave_rx2_inst|rdata[37] ; keyer_weight[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.717 ; 1.389 ; +; 2.281 ; spi_slave:spi_slave_rx2_inst|rdata[35] ; keyer_weight[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.717 ; 1.393 ; +; 2.285 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.299 ; 1.815 ; +; 2.312 ; spi_slave:spi_slave_rx2_inst|rdata[36] ; keyer_weight[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.717 ; 1.424 ; +; 2.324 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.580 ; 1.573 ; +; 2.324 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.736 ; 1.417 ; +; 2.333 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.336 ; 1.826 ; +; 2.333 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.736 ; 1.426 ; +; 2.335 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.736 ; 1.428 ; +; 2.340 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.750 ; 1.419 ; +; 2.341 ; spi_slave:spi_slave_rx2_inst|rdata[33] ; keyer_weight[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.717 ; 1.453 ; +; 2.342 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.736 ; 1.435 ; +; 2.347 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.750 ; 1.426 ; +; 2.351 ; spi_slave:spi_slave_rx2_inst|rdata[34] ; keyer_weight[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.717 ; 1.463 ; +; 2.352 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.645 ; 1.536 ; +; 2.352 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.645 ; 1.536 ; +; 2.354 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.301 ; 1.882 ; +; 2.354 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.287 ; 1.896 ; +; 2.358 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.645 ; 1.542 ; +; 2.362 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.287 ; 1.904 ; +; 2.363 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.287 ; 1.905 ; +; 2.366 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.750 ; 1.445 ; +; 2.369 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.746 ; 1.452 ; +; 2.371 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.736 ; 1.464 ; +; 2.376 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.336 ; 1.869 ; +; 2.376 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.736 ; 1.469 ; +; 2.376 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.736 ; 1.469 ; +; 2.380 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.750 ; 1.459 ; +; 2.381 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.750 ; 1.460 ; +; 2.389 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.338 ; 1.880 ; +; 2.391 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.732 ; 1.488 ; +; 2.395 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.750 ; 1.474 ; +; 2.401 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.287 ; 1.943 ; +; 2.402 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.736 ; 1.495 ; +; 2.403 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.750 ; 1.482 ; +; 2.406 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.804 ; 1.431 ; +; 2.409 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.336 ; 1.902 ; +; 2.414 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.750 ; 1.493 ; +; 2.418 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.336 ; 1.911 ; +; 2.426 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.750 ; 1.505 ; +; 2.434 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.287 ; 1.976 ; +; 2.435 ; spi_slave:spi_slave_rx2_inst|rdata[32] ; keyer_weight[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.814 ; 1.450 ; +; 2.436 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.357 ; 1.908 ; +; 2.439 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.336 ; 1.932 ; +; 2.446 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.439 ; 1.836 ; +; 2.451 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.336 ; 1.944 ; +; 2.453 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.584 ; 1.698 ; +; 2.456 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.584 ; 1.701 ; +; 2.461 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.808 ; 1.482 ; +; 2.466 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.822 ; 1.473 ; +; 2.473 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.580 ; 1.722 ; +; 2.475 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.441 ; 1.863 ; +; 2.481 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.338 ; 1.972 ; +; 2.487 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.598 ; 1.718 ; +; 2.496 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.594 ; 1.731 ; +; 2.505 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.441 ; 1.893 ; +; 2.507 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.645 ; 1.691 ; +; 2.512 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.437 ; 1.904 ; +; 2.515 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.443 ; 1.901 ; +; 2.519 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.441 ; 1.907 ; +; 2.520 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.285 ; 2.064 ; +; 2.522 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.580 ; 1.771 ; +; 2.525 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.355 ; 1.999 ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 0C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' ; ++-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ +; 1.754 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.184 ; 6.178 ; +; 1.866 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.210 ; 6.316 ; +; 2.112 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.210 ; 6.562 ; +; 2.313 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.216 ; 6.769 ; +; 2.313 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.210 ; 6.763 ; +; 2.324 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.215 ; 6.779 ; +; 2.361 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.209 ; 6.810 ; +; 2.368 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.209 ; 6.817 ; +; 2.425 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.209 ; 6.874 ; +; 2.053 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.196 ; 6.489 ; +; 2.523 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.214 ; 6.977 ; +; 2.166 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.218 ; 6.624 ; +; 2.149 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 4.195 ; 6.584 ; +; 6.628 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.215 ; 6.103 ; +; 6.703 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.209 ; 6.172 ; +; 6.710 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.196 ; 6.166 ; +; 6.720 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.218 ; 6.198 ; +; 6.732 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.214 ; 6.206 ; +; 6.803 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.209 ; 6.272 ; +; 6.817 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.210 ; 6.287 ; +; 6.829 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.210 ; 6.299 ; +; 6.863 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.184 ; 6.307 ; +; 6.853 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.195 ; 6.308 ; +; 6.802 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.210 ; 6.272 ; +; 6.688 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.216 ; 6.164 ; +; 6.813 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 4.209 ; 6.282 ; ++-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ + + +--------------------------------------------------------------------------------------------------------------------------------------------------+ ; Slow 1200mV 0C Model Hold: 'virt_ad9866_rxclk' ; +--------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ -; 14.058 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.891 ; 4.177 ; -; 14.065 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.891 ; 4.184 ; -; 14.227 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.891 ; 4.346 ; -; 14.372 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.891 ; 4.491 ; -; 14.697 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.891 ; 4.816 ; -; 14.715 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.028 ; 4.697 ; -; 14.721 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.028 ; 4.703 ; -; 14.988 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.404 ; 4.594 ; -; 16.421 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.916 ; 6.515 ; -; 16.775 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.028 ; 6.757 ; -; 16.917 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.916 ; 7.011 ; -; 17.083 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.891 ; 7.202 ; +; 14.280 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.856 ; 4.434 ; +; 14.355 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.810 ; 4.555 ; +; 14.475 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.810 ; 4.675 ; +; 14.477 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.183 ; 4.304 ; +; 14.509 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.810 ; 4.709 ; +; 14.603 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.810 ; 4.803 ; +; 15.711 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.433 ; 5.288 ; +; 15.939 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.185 ; 5.764 ; +; 16.575 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.810 ; 6.775 ; +; 16.653 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.636 ; 7.027 ; +; 16.713 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.810 ; 6.913 ; +; 17.706 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -3.185 ; 7.531 ; +--------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ @@ -4506,7 +4506,7 @@ Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds. Number of Synchronizer Chains Found: 64 Shortest Synchronizer Chain: 2 Registers Fraction of Chains for which MTBFs Could Not be Calculated: 0.500 -Worst Case Available Settling Time: 14.562 ns +Worst Case Available Settling Time: 13.704 ns Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions. - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 10.8 @@ -4518,17 +4518,17 @@ Typical MTBF values are calculated based on the nominal silicon characteristics, +-------------------------------------------------------------+-----------+---------------+ ; Clock ; Slack ; End Point TNS ; +-------------------------------------------------------------+-----------+---------------+ -; spi_sck ; 0.471 ; 0.000 ; -; ad9866_clk ; 1.373 ; 0.000 ; -; spi_ce0 ; 1.794 ; 0.000 ; -; spi_slave:spi_slave_rx2_inst|done ; 2.633 ; 0.000 ; -; spi_slave:spi_slave_rx_inst|done ; 2.854 ; 0.000 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 3.284 ; 0.000 ; -; virt_ad9866_rxclk ; 5.943 ; 0.000 ; -; clk_10mhz ; 96.266 ; 0.000 ; -; spi_ce1 ; 2498.420 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2602.186 ; 0.000 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33330.158 ; 0.000 ; +; spi_sck ; 0.564 ; 0.000 ; +; ad9866_clk ; 1.346 ; 0.000 ; +; spi_ce0 ; 1.890 ; 0.000 ; +; spi_slave:spi_slave_rx2_inst|done ; 2.443 ; 0.000 ; +; spi_slave:spi_slave_rx_inst|done ; 2.815 ; 0.000 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 3.213 ; 0.000 ; +; virt_ad9866_rxclk ; 5.586 ; 0.000 ; +; clk_10mhz ; 96.870 ; 0.000 ; +; spi_ce1 ; 2497.734 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2601.894 ; 0.000 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33329.832 ; 0.000 ; +-------------------------------------------------------------+-----------+---------------+ @@ -4537,17 +4537,17 @@ Typical MTBF values are calculated based on the nominal silicon characteristics, +-------------------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +-------------------------------------------------------------+--------+---------------+ -; spi_ce0 ; 0.048 ; 0.000 ; -; ad9866_clk ; 0.099 ; 0.000 ; -; spi_slave:spi_slave_rx_inst|done ; 0.101 ; 0.000 ; +; ad9866_clk ; 0.066 ; 0.000 ; +; spi_ce1 ; 0.120 ; 0.000 ; +; spi_ce0 ; 0.146 ; 0.000 ; +; spi_slave:spi_slave_rx_inst|done ; 0.173 ; 0.000 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.185 ; 0.000 ; +; spi_sck ; 0.185 ; 0.000 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.187 ; 0.000 ; -; clk_10mhz ; 0.187 ; 0.000 ; -; spi_sck ; 0.188 ; 0.000 ; -; spi_ce1 ; 0.194 ; 0.000 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 0.319 ; 0.000 ; -; spi_slave:spi_slave_rx2_inst|done ; 0.513 ; 0.000 ; -; virt_ad9866_rxclk ; 11.346 ; 0.000 ; +; clk_10mhz ; 0.188 ; 0.000 ; +; spi_slave:spi_slave_rx2_inst|done ; 0.484 ; 0.000 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 0.632 ; 0.000 ; +; virt_ad9866_rxclk ; 11.456 ; 0.000 ; +-------------------------------------------------------------+--------+---------------+ @@ -4570,14 +4570,14 @@ No paths to report. +-------------------------------------------------------------+-----------+---------------+ ; ad9866_rxclk ; 2.563 ; 0.000 ; ; ad9866_txclk ; 2.563 ; 0.000 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 4.842 ; 0.000 ; -; ad9866_clk ; 5.460 ; 0.000 ; -; spi_sck ; 30.987 ; 0.000 ; -; clk_10mhz ; 49.189 ; 0.000 ; -; spi_ce0 ; 1248.849 ; 0.000 ; -; spi_ce1 ; 1248.970 ; 0.000 ; -; spi_slave:spi_slave_rx_inst|done ; 1249.572 ; 0.000 ; -; spi_slave:spi_slave_rx2_inst|done ; 1249.668 ; 0.000 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 4.809 ; 0.000 ; +; ad9866_clk ; 5.465 ; 0.000 ; +; spi_sck ; 31.017 ; 0.000 ; +; clk_10mhz ; 49.225 ; 0.000 ; +; spi_ce0 ; 1248.810 ; 0.000 ; +; spi_ce1 ; 1248.907 ; 0.000 ; +; spi_slave:spi_slave_rx_inst|done ; 1249.596 ; 0.000 ; +; spi_slave:spi_slave_rx2_inst|done ; 1249.675 ; 0.000 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2603.671 ; 0.000 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 16666.212 ; 0.000 ; +-------------------------------------------------------------+-----------+---------------+ @@ -4588,106 +4588,106 @@ No paths to report. +-------+-----------+----------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-----------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.471 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[3] ; spi_ce0 ; spi_sck ; 2.000 ; 1.491 ; 2.997 ; -; 0.471 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[6] ; spi_ce0 ; spi_sck ; 2.000 ; 1.491 ; 2.997 ; -; 0.471 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[5] ; spi_ce0 ; spi_sck ; 2.000 ; 1.491 ; 2.997 ; -; 0.471 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[0] ; spi_ce0 ; spi_sck ; 2.000 ; 1.491 ; 2.997 ; -; 0.471 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[2] ; spi_ce0 ; spi_sck ; 2.000 ; 1.491 ; 2.997 ; -; 0.471 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[4] ; spi_ce0 ; spi_sck ; 2.000 ; 1.491 ; 2.997 ; -; 0.471 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[1] ; spi_ce0 ; spi_sck ; 2.000 ; 1.491 ; 2.997 ; -; 0.471 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|done ; spi_ce0 ; spi_sck ; 2.000 ; 1.491 ; 2.997 ; -; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[3] ; spi_ce1 ; spi_sck ; 2.000 ; 1.348 ; 2.659 ; -; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[4] ; spi_ce1 ; spi_sck ; 2.000 ; 1.348 ; 2.659 ; -; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[5] ; spi_ce1 ; spi_sck ; 2.000 ; 1.348 ; 2.659 ; -; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[6] ; spi_ce1 ; spi_sck ; 2.000 ; 1.348 ; 2.659 ; -; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[0] ; spi_ce1 ; spi_sck ; 2.000 ; 1.348 ; 2.659 ; -; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[1] ; spi_ce1 ; spi_sck ; 2.000 ; 1.348 ; 2.659 ; -; 0.666 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[2] ; spi_ce1 ; spi_sck ; 2.000 ; 1.348 ; 2.659 ; -; 0.675 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[4] ; spi_ce1 ; spi_sck ; 2.000 ; 1.405 ; 2.707 ; -; 0.675 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; spi_ce1 ; spi_sck ; 2.000 ; 1.405 ; 2.707 ; -; 0.675 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[8] ; spi_ce1 ; spi_sck ; 2.000 ; 1.405 ; 2.707 ; -; 0.675 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[7] ; spi_ce1 ; spi_sck ; 2.000 ; 1.405 ; 2.707 ; -; 0.675 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[6] ; spi_ce1 ; spi_sck ; 2.000 ; 1.405 ; 2.707 ; -; 0.675 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[5] ; spi_ce1 ; spi_sck ; 2.000 ; 1.405 ; 2.707 ; -; 0.675 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[3] ; spi_ce1 ; spi_sck ; 2.000 ; 1.405 ; 2.707 ; -; 0.675 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[29] ; spi_ce1 ; spi_sck ; 2.000 ; 1.405 ; 2.707 ; -; 0.675 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[24] ; spi_ce1 ; spi_sck ; 2.000 ; 1.405 ; 2.707 ; -; 0.686 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[32] ; spi_ce0 ; spi_sck ; 2.000 ; 1.501 ; 2.792 ; -; 0.705 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[23] ; spi_ce1 ; spi_sck ; 2.000 ; 1.452 ; 2.724 ; -; 0.710 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_ce0 ; spi_sck ; 2.000 ; 1.400 ; 2.667 ; -; 0.710 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[40] ; spi_ce0 ; spi_sck ; 2.000 ; 1.400 ; 2.667 ; -; 0.710 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[31] ; spi_ce0 ; spi_sck ; 2.000 ; 1.400 ; 2.667 ; -; 0.710 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[30] ; spi_ce0 ; spi_sck ; 2.000 ; 1.400 ; 2.667 ; -; 0.722 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[20] ; spi_ce1 ; spi_sck ; 2.000 ; 1.487 ; 2.742 ; -; 0.722 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_ce1 ; spi_sck ; 2.000 ; 1.487 ; 2.742 ; -; 0.722 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[30] ; spi_ce1 ; spi_sck ; 2.000 ; 1.487 ; 2.742 ; -; 0.722 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[28] ; spi_ce1 ; spi_sck ; 2.000 ; 1.487 ; 2.742 ; -; 0.722 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[27] ; spi_ce1 ; spi_sck ; 2.000 ; 1.487 ; 2.742 ; -; 0.722 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[21] ; spi_ce1 ; spi_sck ; 2.000 ; 1.487 ; 2.742 ; -; 0.722 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[22] ; spi_ce1 ; spi_sck ; 2.000 ; 1.487 ; 2.742 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[10] ; spi_ce1 ; spi_sck ; 2.000 ; 1.513 ; 2.757 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_ce1 ; spi_sck ; 2.000 ; 1.513 ; 2.757 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_ce1 ; spi_sck ; 2.000 ; 1.467 ; 2.711 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[11] ; spi_ce1 ; spi_sck ; 2.000 ; 1.513 ; 2.757 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[2] ; spi_ce1 ; spi_sck ; 2.000 ; 1.467 ; 2.711 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[1] ; spi_ce1 ; spi_sck ; 2.000 ; 1.467 ; 2.711 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[0] ; spi_ce1 ; spi_sck ; 2.000 ; 1.467 ; 2.711 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[33] ; spi_ce1 ; spi_sck ; 2.000 ; 1.513 ; 2.757 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[14] ; spi_ce1 ; spi_sck ; 2.000 ; 1.467 ; 2.711 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_ce1 ; spi_sck ; 2.000 ; 1.513 ; 2.757 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[13] ; spi_ce1 ; spi_sck ; 2.000 ; 1.513 ; 2.757 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[15] ; spi_ce1 ; spi_sck ; 2.000 ; 1.467 ; 2.711 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_ce1 ; spi_sck ; 2.000 ; 1.467 ; 2.711 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[12] ; spi_ce1 ; spi_sck ; 2.000 ; 1.513 ; 2.757 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; spi_ce1 ; spi_sck ; 2.000 ; 1.467 ; 2.711 ; -; 0.733 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_ce1 ; spi_sck ; 2.000 ; 1.513 ; 2.757 ; -; 0.746 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[36] ; spi_ce0 ; spi_sck ; 2.000 ; 1.509 ; 2.740 ; -; 0.751 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[17] ; spi_ce1 ; spi_sck ; 2.000 ; 1.515 ; 2.741 ; -; 0.751 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[16] ; spi_ce1 ; spi_sck ; 2.000 ; 1.515 ; 2.741 ; -; 0.751 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[18] ; spi_ce1 ; spi_sck ; 2.000 ; 1.515 ; 2.741 ; -; 0.751 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[38] ; spi_ce1 ; spi_sck ; 2.000 ; 1.515 ; 2.741 ; -; 0.751 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[37] ; spi_ce1 ; spi_sck ; 2.000 ; 1.515 ; 2.741 ; -; 0.751 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[19] ; spi_ce1 ; spi_sck ; 2.000 ; 1.515 ; 2.741 ; -; 0.751 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[36] ; spi_ce1 ; spi_sck ; 2.000 ; 1.515 ; 2.741 ; -; 0.754 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[28] ; spi_ce0 ; spi_sck ; 2.000 ; 1.366 ; 2.589 ; -; 0.754 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[27] ; spi_ce0 ; spi_sck ; 2.000 ; 1.366 ; 2.589 ; -; 0.754 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[26] ; spi_ce0 ; spi_sck ; 2.000 ; 1.366 ; 2.589 ; -; 0.754 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[17] ; spi_ce0 ; spi_sck ; 2.000 ; 1.366 ; 2.589 ; -; 0.771 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[34] ; spi_ce0 ; spi_sck ; 2.000 ; 1.522 ; 2.728 ; -; 0.771 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[33] ; spi_ce0 ; spi_sck ; 2.000 ; 1.522 ; 2.728 ; -; 0.771 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[37] ; spi_ce0 ; spi_sck ; 2.000 ; 1.522 ; 2.728 ; -; 0.771 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[35] ; spi_ce0 ; spi_sck ; 2.000 ; 1.522 ; 2.728 ; -; 0.792 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_ce1 ; spi_sck ; 2.000 ; 1.543 ; 2.728 ; -; 0.792 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[43] ; spi_ce1 ; spi_sck ; 2.000 ; 1.543 ; 2.728 ; -; 0.792 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[42] ; spi_ce1 ; spi_sck ; 2.000 ; 1.543 ; 2.728 ; -; 0.792 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[44] ; spi_ce1 ; spi_sck ; 2.000 ; 1.543 ; 2.728 ; -; 0.792 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[39] ; spi_ce1 ; spi_sck ; 2.000 ; 1.543 ; 2.728 ; -; 0.792 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_ce1 ; spi_sck ; 2.000 ; 1.543 ; 2.728 ; -; 0.792 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[47] ; spi_ce1 ; spi_sck ; 2.000 ; 1.543 ; 2.728 ; -; 0.792 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[41] ; spi_ce1 ; spi_sck ; 2.000 ; 1.543 ; 2.728 ; -; 0.794 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|done ; spi_ce1 ; spi_sck ; 2.000 ; 1.334 ; 2.517 ; -; 0.850 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.507 ; -; 0.850 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[8] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.507 ; -; 0.850 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[11] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.507 ; -; 0.850 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[5] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.507 ; -; 0.850 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[10] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.507 ; -; 0.850 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[9] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.507 ; -; 0.850 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[6] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.507 ; -; 0.850 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[7] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.507 ; -; 0.855 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[14] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.502 ; -; 0.855 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[12] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.502 ; -; 0.855 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[13] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.502 ; -; 0.855 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[3] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.502 ; -; 0.855 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[2] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.502 ; -; 0.855 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[1] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.502 ; -; 0.855 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[16] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.502 ; -; 0.855 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[15] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.502 ; -; 0.855 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[0] ; spi_ce0 ; spi_sck ; 2.000 ; 1.380 ; 2.502 ; -; 0.857 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[23] ; spi_ce0 ; spi_sck ; 2.000 ; 1.382 ; 2.502 ; -; 0.857 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[22] ; spi_ce0 ; spi_sck ; 2.000 ; 1.382 ; 2.502 ; -; 0.857 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[21] ; spi_ce0 ; spi_sck ; 2.000 ; 1.382 ; 2.502 ; -; 0.857 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[20] ; spi_ce0 ; spi_sck ; 2.000 ; 1.382 ; 2.502 ; -; 0.857 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[19] ; spi_ce0 ; spi_sck ; 2.000 ; 1.382 ; 2.502 ; +; 0.564 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[6] ; spi_ce1 ; spi_sck ; 2.000 ; 1.338 ; 2.751 ; +; 0.564 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[3] ; spi_ce1 ; spi_sck ; 2.000 ; 1.338 ; 2.751 ; +; 0.564 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[1] ; spi_ce1 ; spi_sck ; 2.000 ; 1.338 ; 2.751 ; +; 0.564 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[0] ; spi_ce1 ; spi_sck ; 2.000 ; 1.338 ; 2.751 ; +; 0.564 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[4] ; spi_ce1 ; spi_sck ; 2.000 ; 1.338 ; 2.751 ; +; 0.564 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[5] ; spi_ce1 ; spi_sck ; 2.000 ; 1.338 ; 2.751 ; +; 0.564 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|nb[2] ; spi_ce1 ; spi_sck ; 2.000 ; 1.338 ; 2.751 ; +; 0.579 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[36] ; spi_ce1 ; spi_sck ; 2.000 ; 1.501 ; 2.899 ; +; 0.579 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[37] ; spi_ce1 ; spi_sck ; 2.000 ; 1.501 ; 2.899 ; +; 0.579 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_ce1 ; spi_sck ; 2.000 ; 1.501 ; 2.899 ; +; 0.579 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_ce1 ; spi_sck ; 2.000 ; 1.501 ; 2.899 ; +; 0.579 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[33] ; spi_ce1 ; spi_sck ; 2.000 ; 1.501 ; 2.899 ; +; 0.579 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[38] ; spi_ce1 ; spi_sck ; 2.000 ; 1.501 ; 2.899 ; +; 0.590 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[3] ; spi_ce0 ; spi_sck ; 2.000 ; 1.542 ; 2.929 ; +; 0.590 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[5] ; spi_ce0 ; spi_sck ; 2.000 ; 1.542 ; 2.929 ; +; 0.590 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[0] ; spi_ce0 ; spi_sck ; 2.000 ; 1.542 ; 2.929 ; +; 0.590 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[6] ; spi_ce0 ; spi_sck ; 2.000 ; 1.542 ; 2.929 ; +; 0.590 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[2] ; spi_ce0 ; spi_sck ; 2.000 ; 1.542 ; 2.929 ; +; 0.590 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[1] ; spi_ce0 ; spi_sck ; 2.000 ; 1.542 ; 2.929 ; +; 0.590 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|nb[4] ; spi_ce0 ; spi_sck ; 2.000 ; 1.542 ; 2.929 ; +; 0.590 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rreg[30] ; spi_ce0 ; spi_sck ; 2.000 ; 1.542 ; 2.929 ; +; 0.590 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|done ; spi_ce0 ; spi_sck ; 2.000 ; 1.542 ; 2.929 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[27] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[22] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[21] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[4] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[3] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[2] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[40] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[24] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[30] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.598 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[23] ; spi_ce1 ; spi_sck ; 2.000 ; 1.500 ; 2.879 ; +; 0.623 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|done ; spi_ce1 ; spi_sck ; 2.000 ; 1.337 ; 2.691 ; +; 0.625 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_ce1 ; spi_sck ; 2.000 ; 1.535 ; 2.887 ; +; 0.625 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[1] ; spi_ce1 ; spi_sck ; 2.000 ; 1.535 ; 2.887 ; +; 0.625 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[29] ; spi_ce1 ; spi_sck ; 2.000 ; 1.535 ; 2.887 ; +; 0.631 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[7] ; spi_ce1 ; spi_sck ; 2.000 ; 1.456 ; 2.802 ; +; 0.631 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[28] ; spi_ce1 ; spi_sck ; 2.000 ; 1.456 ; 2.802 ; +; 0.699 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[0] ; spi_ce1 ; spi_sck ; 2.000 ; 1.417 ; 2.695 ; +; 0.699 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[18] ; spi_ce1 ; spi_sck ; 2.000 ; 1.417 ; 2.695 ; +; 0.727 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[47] ; spi_ce1 ; spi_sck ; 2.000 ; 1.534 ; 2.784 ; +; 0.727 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[41] ; spi_ce1 ; spi_sck ; 2.000 ; 1.534 ; 2.784 ; +; 0.727 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_ce1 ; spi_sck ; 2.000 ; 1.534 ; 2.784 ; +; 0.727 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[43] ; spi_ce1 ; spi_sck ; 2.000 ; 1.534 ; 2.784 ; +; 0.727 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_ce1 ; spi_sck ; 2.000 ; 1.534 ; 2.784 ; +; 0.727 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[42] ; spi_ce1 ; spi_sck ; 2.000 ; 1.534 ; 2.784 ; +; 0.727 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[44] ; spi_ce1 ; spi_sck ; 2.000 ; 1.534 ; 2.784 ; +; 0.727 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[39] ; spi_ce1 ; spi_sck ; 2.000 ; 1.534 ; 2.784 ; +; 0.730 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_ce0 ; spi_sck ; 2.000 ; 1.363 ; 2.610 ; +; 0.730 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[3] ; spi_ce0 ; spi_sck ; 2.000 ; 1.363 ; 2.610 ; +; 0.730 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[2] ; spi_ce0 ; spi_sck ; 2.000 ; 1.363 ; 2.610 ; +; 0.730 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[1] ; spi_ce0 ; spi_sck ; 2.000 ; 1.363 ; 2.610 ; +; 0.730 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[0] ; spi_ce0 ; spi_sck ; 2.000 ; 1.363 ; 2.610 ; +; 0.730 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[41] ; spi_ce0 ; spi_sck ; 2.000 ; 1.363 ; 2.610 ; +; 0.730 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[31] ; spi_ce0 ; spi_sck ; 2.000 ; 1.363 ; 2.610 ; +; 0.743 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[17] ; spi_ce1 ; spi_sck ; 2.000 ; 1.431 ; 2.665 ; +; 0.743 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[9] ; spi_ce1 ; spi_sck ; 2.000 ; 1.431 ; 2.665 ; +; 0.743 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[8] ; spi_ce1 ; spi_sck ; 2.000 ; 1.431 ; 2.665 ; +; 0.743 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[6] ; spi_ce1 ; spi_sck ; 2.000 ; 1.431 ; 2.665 ; +; 0.743 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[5] ; spi_ce1 ; spi_sck ; 2.000 ; 1.431 ; 2.665 ; +; 0.743 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[19] ; spi_ce1 ; spi_sck ; 2.000 ; 1.431 ; 2.665 ; +; 0.743 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[20] ; spi_ce1 ; spi_sck ; 2.000 ; 1.431 ; 2.665 ; +; 0.757 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[15] ; spi_ce1 ; spi_sck ; 2.000 ; 1.463 ; 2.683 ; +; 0.757 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[16] ; spi_ce1 ; spi_sck ; 2.000 ; 1.463 ; 2.683 ; +; 0.757 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[14] ; spi_ce1 ; spi_sck ; 2.000 ; 1.463 ; 2.683 ; +; 0.757 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[13] ; spi_ce1 ; spi_sck ; 2.000 ; 1.463 ; 2.683 ; +; 0.757 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[12] ; spi_ce1 ; spi_sck ; 2.000 ; 1.463 ; 2.683 ; +; 0.757 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[11] ; spi_ce1 ; spi_sck ; 2.000 ; 1.463 ; 2.683 ; +; 0.757 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|rdata[10] ; spi_ce1 ; spi_sck ; 2.000 ; 1.463 ; 2.683 ; +; 0.760 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[6] ; spi_ce0 ; spi_sck ; 2.000 ; 1.364 ; 2.581 ; +; 0.760 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[8] ; spi_ce0 ; spi_sck ; 2.000 ; 1.364 ; 2.581 ; +; 0.760 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[7] ; spi_ce0 ; spi_sck ; 2.000 ; 1.364 ; 2.581 ; +; 0.760 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[5] ; spi_ce0 ; spi_sck ; 2.000 ; 1.364 ; 2.581 ; +; 0.760 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[12] ; spi_ce0 ; spi_sck ; 2.000 ; 1.364 ; 2.581 ; +; 0.760 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[9] ; spi_ce0 ; spi_sck ; 2.000 ; 1.364 ; 2.581 ; +; 0.760 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[10] ; spi_ce0 ; spi_sck ; 2.000 ; 1.364 ; 2.581 ; +; 0.774 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[25] ; spi_ce0 ; spi_sck ; 2.000 ; 1.466 ; 2.669 ; +; 0.774 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[24] ; spi_ce0 ; spi_sck ; 2.000 ; 1.466 ; 2.669 ; +; 0.774 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[26] ; spi_ce0 ; spi_sck ; 2.000 ; 1.466 ; 2.669 ; +; 0.774 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[28] ; spi_ce0 ; spi_sck ; 2.000 ; 1.466 ; 2.669 ; +; 0.774 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[27] ; spi_ce0 ; spi_sck ; 2.000 ; 1.466 ; 2.669 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[11] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[23] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[29] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[17] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[19] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[18] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[16] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[22] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[20] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[40] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[13] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[21] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[15] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[30] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.788 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[14] ; spi_ce0 ; spi_sck ; 2.000 ; 1.361 ; 2.550 ; +; 0.793 ; spi_ce[0] ; spi_slave:spi_slave_rx_inst|rdata[35] ; spi_ce0 ; spi_sck ; 2.000 ; 1.581 ; 2.765 ; +-------+-----------+----------------------------------------+--------------+-------------+--------------+------------+------------+ @@ -4696,215 +4696,215 @@ No paths to report. +-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ -; 1.373 ; ad9866_adio[7] ; adcpipe[0][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.293 ; 2.927 ; -; 1.380 ; ad9866_adio[8] ; adcpipe[0][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.293 ; 2.920 ; -; 1.389 ; ad9866_adio[6] ; adcpipe[0][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.293 ; 2.911 ; -; 1.401 ; ad9866_adio[4] ; adcpipe[1][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.299 ; 2.905 ; -; 1.415 ; ad9866_adio[10] ; adcpipe[0][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.293 ; 2.885 ; -; 1.439 ; ad9866_adio[2] ; adcpipe[0][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.302 ; 2.870 ; -; 1.454 ; ad9866_adio[4] ; adcpipe[0][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.318 ; 2.871 ; -; 1.462 ; ad9866_adio[6] ; adcpipe[1][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.222 ; 2.767 ; -; 1.463 ; ad9866_adio[2] ; adcpipe[1][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.360 ; 2.904 ; -; 1.464 ; ad9866_adio[8] ; adcpipe[1][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.222 ; 2.765 ; -; 1.480 ; ad9866_adio[11] ; adcpipe[1][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.298 ; 2.825 ; -; 1.480 ; ad9866_adio[11] ; adcpipe[0][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.298 ; 2.825 ; -; 1.489 ; ad9866_adio[0] ; adcpipe[0][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.182 ; 2.700 ; -; 1.508 ; ad9866_adio[3] ; adcpipe[1][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.233 ; 2.732 ; -; 1.526 ; ad9866_adio[9] ; adcpipe[1][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.233 ; 2.714 ; -; 1.527 ; ad9866_adio[9] ; adcpipe[0][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.233 ; 2.713 ; -; 1.532 ; ad9866_adio[10] ; adcpipe[1][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.222 ; 2.697 ; -; 1.534 ; ad9866_adio[1] ; adcpipe[1][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.248 ; 2.721 ; -; 1.546 ; ad9866_adio[0] ; adcpipe[1][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.229 ; 2.690 ; -; 1.563 ; ad9866_adio[7] ; adcpipe[1][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.248 ; 2.692 ; -; 1.576 ; ad9866_adio[5] ; adcpipe[1][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.251 ; 2.682 ; -; 1.576 ; ad9866_adio[5] ; adcpipe[0][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.251 ; 2.682 ; -; 1.629 ; ad9866_adio[3] ; adcpipe[0][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.223 ; 2.601 ; -; 1.632 ; ad9866_adio[1] ; adcpipe[0][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.108 ; 2.483 ; -; 2.865 ; ad9866_clk ; ad9866_txclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 3.145 ; -; 2.865 ; ad9866_clk ; ad9866_rxclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 3.145 ; -; 5.479 ; spi_slave:spi_slave_rx_inst|treg[47] ; spi_miso ; spi_sck ; ad9866_clk ; 11.000 ; -2.169 ; 2.822 ; -; 5.764 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[12] ; transmitter:transmitter_inst|out_data[12] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.343 ; 1.096 ; -; 5.817 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[4] ; transmitter:transmitter_inst|out_data[4] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.326 ; 1.026 ; -; 5.856 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[2] ; transmitter:transmitter_inst|out_data[2] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.343 ; 1.004 ; -; 5.906 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[5] ; transmitter:transmitter_inst|out_data[5] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.326 ; 0.937 ; -; 5.951 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[11] ; transmitter:transmitter_inst|out_data[11] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.326 ; 0.892 ; -; 5.952 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[10] ; transmitter:transmitter_inst|out_data[10] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.326 ; 0.891 ; -; 5.954 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[8] ; transmitter:transmitter_inst|out_data[8] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.326 ; 0.889 ; -; 5.966 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[3] ; transmitter:transmitter_inst|out_data[3] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.326 ; 0.877 ; -; 6.143 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[9] ; transmitter:transmitter_inst|out_data[9] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.410 ; 0.784 ; -; 6.160 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[13] ; transmitter:transmitter_inst|out_data[13] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.410 ; 0.767 ; -; 6.166 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[6] ; transmitter:transmitter_inst|out_data[6] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.410 ; 0.761 ; -; 6.504 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[7] ; transmitter:transmitter_inst|out_data[7] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.654 ; 0.667 ; -; 7.083 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.788 ; 3.649 ; -; 7.218 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.729 ; 3.573 ; -; 7.220 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.788 ; 3.512 ; -; 7.298 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.717 ; 3.505 ; -; 7.316 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.767 ; 3.437 ; -; 7.366 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.814 ; 3.340 ; -; 7.381 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.717 ; 3.422 ; -; 7.387 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.729 ; 3.404 ; -; 7.389 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.710 ; 3.421 ; -; 7.414 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.683 ; 3.423 ; -; 7.445 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.717 ; 3.358 ; -; 7.464 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.734 ; 3.322 ; -; 7.484 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.767 ; 3.269 ; -; 7.507 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.704 ; 3.309 ; -; 7.519 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.837 ; 3.164 ; -; 7.528 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.699 ; 3.293 ; -; 7.538 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.814 ; 3.168 ; -; 7.539 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.699 ; 3.282 ; -; 7.539 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.717 ; 3.264 ; -; 7.550 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.543 ; 3.427 ; -; 7.557 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.710 ; 3.253 ; -; 7.567 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.528 ; 3.425 ; -; 7.568 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.543 ; 3.409 ; -; 7.598 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.528 ; 3.394 ; -; 7.610 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.546 ; 3.364 ; -; 7.612 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.546 ; 3.362 ; -; 7.634 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.734 ; 3.152 ; -; 7.642 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.660 ; 3.218 ; -; 7.655 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.660 ; 3.205 ; -; 7.656 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.546 ; 3.318 ; -; 7.656 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.699 ; 3.165 ; -; 7.667 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.546 ; 3.307 ; -; 7.683 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.699 ; 3.138 ; -; 7.703 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.683 ; 3.134 ; -; 7.706 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.660 ; 3.154 ; -; 7.716 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.683 ; 3.121 ; -; 7.720 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.543 ; 3.257 ; -; 7.723 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.660 ; 3.137 ; -; 7.747 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.528 ; 3.245 ; -; 7.762 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.543 ; 3.215 ; -; 7.829 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.683 ; 3.008 ; -; 7.833 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.704 ; 2.983 ; -; 7.849 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.683 ; 2.988 ; -; 7.920 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.528 ; 3.072 ; -; 8.572 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[23] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.321 ; 4.134 ; -; 8.576 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[22] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.321 ; 4.130 ; -; 8.640 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[21] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.321 ; 4.066 ; -; 8.644 ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|Iaccum[1] ; receiver:receiver_rx_inst|firX8R8:fir2|Iacc[20] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.321 ; 4.062 ; -; 8.645 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][19] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.184 ; 4.566 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[11] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[12] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[13] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[14] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[15] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[16] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[17] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[18] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[19] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[20] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[23] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; -; 8.664 ; receiver:receiver_rx_inst|varcic:varcic_inst_I1|out_strobe ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:B|Raccum[22] ; ad9866_clk ; ad9866_clk ; 13.020 ; -0.154 ; 4.209 ; +; 1.346 ; ad9866_adio[2] ; adcpipe[0][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.528 ; 3.189 ; +; 1.371 ; ad9866_adio[8] ; adcpipe[0][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.511 ; 3.147 ; +; 1.406 ; ad9866_adio[8] ; adcpipe[1][8] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.222 ; 2.823 ; +; 1.413 ; ad9866_adio[4] ; adcpipe[0][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.335 ; 2.929 ; +; 1.416 ; ad9866_adio[7] ; adcpipe[0][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.528 ; 3.119 ; +; 1.418 ; ad9866_adio[10] ; adcpipe[0][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.511 ; 3.100 ; +; 1.424 ; ad9866_adio[0] ; adcpipe[0][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.528 ; 3.111 ; +; 1.433 ; ad9866_adio[2] ; adcpipe[1][2] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.336 ; 2.910 ; +; 1.443 ; ad9866_adio[1] ; adcpipe[0][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.412 ; 2.976 ; +; 1.446 ; ad9866_adio[3] ; adcpipe[0][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.528 ; 3.089 ; +; 1.450 ; ad9866_adio[6] ; adcpipe[1][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.225 ; 2.782 ; +; 1.464 ; ad9866_adio[7] ; adcpipe[1][7] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.225 ; 2.768 ; +; 1.485 ; ad9866_adio[6] ; adcpipe[0][6] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.511 ; 3.033 ; +; 1.493 ; ad9866_adio[5] ; adcpipe[0][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.152 ; 2.666 ; +; 1.494 ; ad9866_adio[5] ; adcpipe[1][5] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.152 ; 2.665 ; +; 1.509 ; ad9866_adio[11] ; adcpipe[0][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.282 ; 2.780 ; +; 1.510 ; ad9866_adio[4] ; adcpipe[1][4] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.225 ; 2.722 ; +; 1.525 ; ad9866_adio[9] ; adcpipe[0][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.208 ; 2.690 ; +; 1.526 ; ad9866_adio[9] ; adcpipe[1][9] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.208 ; 2.689 ; +; 1.546 ; ad9866_adio[11] ; adcpipe[1][11] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.222 ; 2.683 ; +; 1.557 ; ad9866_adio[1] ; adcpipe[1][1] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.225 ; 2.675 ; +; 1.587 ; ad9866_adio[0] ; adcpipe[1][0] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.294 ; 2.714 ; +; 1.595 ; ad9866_adio[3] ; adcpipe[1][3] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.222 ; 2.634 ; +; 1.605 ; ad9866_adio[10] ; adcpipe[1][10] ; virt_ad9866_clk ; ad9866_clk ; 13.020 ; 1.222 ; 2.624 ; +; 2.801 ; ad9866_clk ; ad9866_txclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 3.209 ; +; 2.801 ; ad9866_clk ; ad9866_rxclk ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.000 ; 3.209 ; +; 5.293 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[5] ; transmitter:transmitter_inst|out_data[5] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.403 ; 1.627 ; +; 5.387 ; spi_slave:spi_slave_rx_inst|treg[47] ; spi_miso ; spi_sck ; ad9866_clk ; 11.000 ; -2.038 ; 3.045 ; +; 5.453 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[12] ; transmitter:transmitter_inst|out_data[12] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.328 ; 1.392 ; +; 5.463 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[2] ; transmitter:transmitter_inst|out_data[2] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.403 ; 1.457 ; +; 5.656 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[11] ; transmitter:transmitter_inst|out_data[11] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.426 ; 1.287 ; +; 5.847 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[8] ; transmitter:transmitter_inst|out_data[8] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.403 ; 1.073 ; +; 5.935 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[9] ; transmitter:transmitter_inst|out_data[9] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.403 ; 0.985 ; +; 5.986 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[10] ; transmitter:transmitter_inst|out_data[10] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.403 ; 0.934 ; +; 6.044 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[7] ; transmitter:transmitter_inst|out_data[7] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.403 ; 0.876 ; +; 6.227 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[13] ; transmitter:transmitter_inst|out_data[13] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.778 ; 1.068 ; +; 6.239 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[6] ; transmitter:transmitter_inst|out_data[6] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.624 ; 0.902 ; +; 6.708 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[4] ; transmitter:transmitter_inst|out_data[4] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.640 ; 0.449 ; +; 6.782 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|rounded_I[3] ; transmitter:transmitter_inst|out_data[3] ; ad9866_clk ; ad9866_clk ; 6.510 ; 0.640 ; 0.375 ; +; 7.073 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.686 ; 3.761 ; +; 7.088 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.671 ; 3.761 ; +; 7.112 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.717 ; 3.691 ; +; 7.125 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.702 ; 3.693 ; +; 7.132 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.686 ; 3.702 ; +; 7.138 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.689 ; 3.693 ; +; 7.142 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.670 ; 3.708 ; +; 7.145 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.674 ; 3.701 ; +; 7.155 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.717 ; 3.648 ; +; 7.163 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.702 ; 3.655 ; +; 7.216 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.465 ; 3.839 ; +; 7.218 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[7] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.686 ; 3.616 ; +; 7.240 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.662 ; 3.618 ; +; 7.242 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.545 ; 3.733 ; +; 7.245 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[6] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.671 ; 3.604 ; +; 7.247 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.638 ; 3.635 ; +; 7.249 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[3] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.717 ; 3.554 ; +; 7.251 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.651 ; 3.618 ; +; 7.276 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[9] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.686 ; 3.558 ; +; 7.277 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[2] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.702 ; 3.541 ; +; 7.298 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.480 ; 3.742 ; +; 7.305 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[8] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.670 ; 3.545 ; +; 7.307 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[7] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.689 ; 3.524 ; +; 7.308 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[5] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.717 ; 3.495 ; +; 7.319 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[2] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.637 ; 3.564 ; +; 7.334 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[4] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.702 ; 3.484 ; +; 7.345 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.716 ; 3.459 ; +; 7.351 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.716 ; 3.453 ; +; 7.369 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.641 ; 3.510 ; +; 7.377 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.465 ; 3.678 ; +; 7.405 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[4] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.545 ; 3.570 ; +; 7.417 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[3] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.651 ; 3.452 ; +; 7.428 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.545 ; 3.547 ; +; 7.468 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[1] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.480 ; 3.572 ; +; 7.482 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.700 ; 3.338 ; +; 7.505 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.700 ; 3.315 ; +; 7.524 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[1] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.700 ; 3.296 ; +; 7.539 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[0] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.700 ; 3.281 ; +; 7.541 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[5] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.641 ; 3.338 ; +; 7.548 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[9] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.542 ; 3.430 ; +; 7.618 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.545 ; 3.357 ; +; 7.632 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[11] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.716 ; 3.172 ; +; 7.644 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|rdptr_g[10] ; txFIFOFull ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.716 ; 3.160 ; +; 7.873 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[8] ; rx1_FIFOEmpty ; ad9866_clk ; ad9866_clk ; 13.020 ; -1.542 ; 3.105 ; +; 8.185 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.264 ; 5.106 ; +; 8.186 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.219 ; 5.060 ; +; 8.219 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.264 ; 5.072 ; +; 8.240 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[35] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.264 ; 5.051 ; +; 8.244 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[38] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.264 ; 5.047 ; +; 8.295 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[37] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.264 ; 4.996 ; +; 8.322 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[40] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.264 ; 4.969 ; +; 8.373 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[39] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.264 ; 4.918 ; +; 8.430 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[41] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.264 ; 4.861 ; +; 8.454 ; transmitter:transmitter_inst|CicInterpM5:in2|y5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.256 ; 4.829 ; +; 8.476 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.147 ; 4.698 ; +; 8.485 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[43] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.219 ; 4.761 ; +; 8.493 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][16] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.210 ; 4.744 ; +; 8.503 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.133 ; 4.657 ; +; 8.507 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[42] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][17] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.147 ; 4.667 ; +; 8.524 ; transmitter:transmitter_inst|CicInterpM5:in2|y5[34] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[0][18] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.256 ; 4.759 ; +; 8.524 ; transmitter:transmitter_inst|CicInterpM5:in2|s5[36] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Y[0][17] ; ad9866_clk ; ad9866_clk ; 13.020 ; 0.210 ; 4.713 ; +-------+------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------+-----------------+-------------+--------------+------------+------------+ -+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Fast 1200mV 0C Model Setup: 'spi_ce0' ; -+----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 1.794 ; spi_slave:spi_slave_rx_inst|rdata[15] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.604 ; 0.809 ; -; 1.798 ; spi_slave:spi_slave_rx_inst|rdata[13] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.604 ; 0.805 ; -; 1.818 ; spi_slave:spi_slave_rx_inst|rdata[12] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.604 ; 0.785 ; -; 1.824 ; spi_slave:spi_slave_rx_inst|rdata[14] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.604 ; 0.779 ; -; 1.858 ; spi_slave:spi_slave_rx_inst|rdata[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.733 ; 0.874 ; -; 1.906 ; spi_slave:spi_slave_rx_inst|rdata[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.733 ; 0.826 ; -; 1.932 ; spi_slave:spi_slave_rx_inst|rdata[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.733 ; 0.800 ; -; 1.947 ; spi_slave:spi_slave_rx_inst|rdata[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.751 ; 0.803 ; -; 1.952 ; spi_slave:spi_slave_rx_inst|rdata[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.733 ; 0.780 ; -; 1.962 ; spi_slave:spi_slave_rx_inst|rdata[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.751 ; 0.788 ; -; 1.968 ; spi_slave:spi_slave_rx_inst|rdata[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.751 ; 0.782 ; -; 1.989 ; spi_slave:spi_slave_rx_inst|rdata[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.751 ; 0.761 ; -; 3.719 ; spi_slave:spi_slave_rx_inst|rdata[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.749 ; 1.029 ; -; 3.869 ; spi_slave:spi_slave_rx_inst|rdata[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.749 ; 0.879 ; -; 3.891 ; spi_slave:spi_slave_rx_inst|rdata[20] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.787 ; 0.895 ; -; 3.924 ; spi_slave:spi_slave_rx_inst|rdata[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.749 ; 0.824 ; -; 3.938 ; spi_slave:spi_slave_rx_inst|rdata[19] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.803 ; 0.864 ; -; 3.939 ; spi_slave:spi_slave_rx_inst|rdata[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.749 ; 0.809 ; -; 3.940 ; spi_slave:spi_slave_rx_inst|rdata[26] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.752 ; 0.811 ; -; 3.956 ; spi_slave:spi_slave_rx_inst|rdata[27] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.752 ; 0.795 ; -; 3.962 ; spi_slave:spi_slave_rx_inst|rdata[25] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.735 ; 0.772 ; -; 3.964 ; spi_slave:spi_slave_rx_inst|rdata[24] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.735 ; 0.770 ; -; 3.965 ; spi_slave:spi_slave_rx_inst|rdata[30] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.756 ; 0.790 ; -; 3.974 ; spi_slave:spi_slave_rx_inst|rdata[31] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.756 ; 0.781 ; -; 3.998 ; spi_slave:spi_slave_rx_inst|rdata[22] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.787 ; 0.788 ; -; 4.018 ; spi_slave:spi_slave_rx_inst|rdata[17] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.820 ; 0.801 ; -; 4.019 ; spi_slave:spi_slave_rx_inst|rdata[23] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.787 ; 0.767 ; -; 4.032 ; spi_slave:spi_slave_rx_inst|rdata[21] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.787 ; 0.754 ; -; 4.062 ; spi_slave:spi_slave_rx_inst|rdata[18] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.803 ; 0.740 ; -; 4.194 ; spi_slave:spi_slave_rx_inst|rdata[29] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.775 ; 0.580 ; -; 4.195 ; spi_slave:spi_slave_rx_inst|rdata[28] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.792 ; 0.596 ; -; 4.227 ; spi_slave:spi_slave_rx_inst|rdata[16] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.804 ; 0.576 ; -; 2497.795 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.022 ; 2.190 ; -; 2497.825 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.022 ; 2.160 ; -; 2497.949 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.022 ; 2.036 ; -; 2497.976 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 2.030 ; -; 2498.006 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 2.000 ; -; 2498.022 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.022 ; 1.963 ; -; 2498.052 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.022 ; 1.933 ; -; 2498.105 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.901 ; -; 2498.113 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.893 ; -; 2498.130 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.876 ; -; 2498.135 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.871 ; -; 2498.143 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.863 ; -; 2498.157 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.849 ; -; 2498.176 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.022 ; 1.809 ; -; 2498.187 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.819 ; -; 2498.259 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.747 ; -; 2498.267 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.739 ; -; 2498.306 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.593 ; -; 2498.307 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.592 ; -; 2498.311 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.695 ; -; 2498.371 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.528 ; -; 2498.372 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.527 ; -; 2498.421 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.478 ; -; 2498.438 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.461 ; -; 2498.469 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.430 ; -; 2498.487 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.412 ; -; 2498.491 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.191 ; 1.729 ; -; 2498.506 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.203 ; 1.298 ; -; 2498.509 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.191 ; 1.711 ; -; 2498.530 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.066 ; 1.433 ; -; 2498.531 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.007 ; 1.505 ; -; 2498.535 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.036 ; 1.458 ; -; 2498.536 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.203 ; 1.268 ; -; 2498.536 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.117 ; 1.588 ; -; 2498.549 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.007 ; 1.487 ; -; 2498.562 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.140 ; 1.327 ; -; 2498.584 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.315 ; -; 2498.604 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.203 ; 1.200 ; -; 2498.612 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.108 ; 1.287 ; -; 2498.613 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.393 ; -; 2498.617 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.066 ; 1.346 ; -; 2498.622 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.036 ; 1.371 ; -; 2498.626 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.136 ; 1.539 ; -; 2498.634 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.203 ; 1.170 ; -; 2498.643 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.001 ; 1.363 ; -; 2498.644 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.136 ; 1.521 ; -; 2498.649 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.139 ; 1.519 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.649 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.078 ; 1.248 ; -; 2498.650 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.077 ; 1.248 ; -; 2498.650 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.077 ; 1.248 ; -; 2498.650 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.077 ; 1.248 ; -+----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Fast 1200mV 0C Model Setup: 'spi_ce0' ; ++----------+-----------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++----------+-----------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; 1.890 ; spi_slave:spi_slave_rx_inst|rdata[15] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.793 ; 0.902 ; +; 2.014 ; spi_slave:spi_slave_rx_inst|rdata[14] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.793 ; 0.778 ; +; 2.015 ; spi_slave:spi_slave_rx_inst|rdata[13] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.793 ; 0.777 ; +; 2.016 ; spi_slave:spi_slave_rx_inst|rdata[12] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.789 ; 0.772 ; +; 2.156 ; spi_slave:spi_slave_rx_inst|rdata[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.784 ; 0.627 ; +; 2.164 ; spi_slave:spi_slave_rx_inst|rdata[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.784 ; 0.619 ; +; 2.178 ; spi_slave:spi_slave_rx_inst|rdata[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.775 ; 0.596 ; +; 2.187 ; spi_slave:spi_slave_rx_inst|rdata[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.775 ; 0.587 ; +; 2.188 ; spi_slave:spi_slave_rx_inst|rdata[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.784 ; 0.595 ; +; 2.189 ; spi_slave:spi_slave_rx_inst|rdata[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.775 ; 0.585 ; +; 2.190 ; spi_slave:spi_slave_rx_inst|rdata[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.784 ; 0.593 ; +; 2.207 ; spi_slave:spi_slave_rx_inst|rdata[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 2.000 ; 0.779 ; 0.571 ; +; 3.352 ; spi_slave:spi_slave_rx_inst|rdata[28] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.752 ; 1.399 ; +; 3.767 ; spi_slave:spi_slave_rx_inst|rdata[20] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.803 ; 1.035 ; +; 3.830 ; spi_slave:spi_slave_rx_inst|rdata[25] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.737 ; 0.906 ; +; 3.853 ; spi_slave:spi_slave_rx_inst|rdata[24] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.737 ; 0.883 ; +; 3.887 ; spi_slave:spi_slave_rx_inst|rdata[30] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.862 ; 0.974 ; +; 3.895 ; spi_slave:spi_slave_rx_inst|rdata[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.779 ; 0.883 ; +; 3.901 ; spi_slave:spi_slave_rx_inst|rdata[29] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.862 ; 0.960 ; +; 3.909 ; spi_slave:spi_slave_rx_inst|rdata[16] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.846 ; 0.936 ; +; 3.931 ; spi_slave:spi_slave_rx_inst|rdata[23] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.803 ; 0.871 ; +; 3.938 ; spi_slave:spi_slave_rx_inst|rdata[27] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.737 ; 0.798 ; +; 3.939 ; spi_slave:spi_slave_rx_inst|rdata[26] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.737 ; 0.797 ; +; 3.948 ; spi_slave:spi_slave_rx_inst|rdata[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.780 ; 0.831 ; +; 3.957 ; spi_slave:spi_slave_rx_inst|rdata[19] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.846 ; 0.888 ; +; 3.973 ; spi_slave:spi_slave_rx_inst|rdata[31] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.859 ; 0.885 ; +; 3.975 ; spi_slave:spi_slave_rx_inst|rdata[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.779 ; 0.803 ; +; 3.979 ; spi_slave:spi_slave_rx_inst|rdata[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.779 ; 0.799 ; +; 3.986 ; spi_slave:spi_slave_rx_inst|rdata[21] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.803 ; 0.816 ; +; 4.015 ; spi_slave:spi_slave_rx_inst|rdata[22] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.803 ; 0.787 ; +; 4.048 ; spi_slave:spi_slave_rx_inst|rdata[18] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.846 ; 0.797 ; +; 4.058 ; spi_slave:spi_slave_rx_inst|rdata[17] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_datain_reg0 ; spi_sck ; spi_ce0 ; 4.000 ; 0.846 ; 0.787 ; +; 2498.131 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.043 ; 1.919 ; +; 2498.197 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.064 ; 1.874 ; +; 2498.253 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.130 ; 1.624 ; +; 2498.266 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.130 ; 1.611 ; +; 2498.269 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.043 ; 1.781 ; +; 2498.282 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.130 ; 1.595 ; +; 2498.309 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.130 ; 1.568 ; +; 2498.322 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.130 ; 1.555 ; +; 2498.335 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.064 ; 1.736 ; +; 2498.338 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.130 ; 1.539 ; +; 2498.351 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.504 ; +; 2498.364 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.491 ; +; 2498.380 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.475 ; +; 2498.411 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.043 ; 1.639 ; +; 2498.439 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.043 ; 1.611 ; +; 2498.463 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.392 ; +; 2498.463 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.024 ; 1.542 ; +; 2498.468 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.043 ; 1.582 ; +; 2498.470 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.240 ; 1.297 ; +; 2498.473 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.382 ; +; 2498.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.379 ; +; 2498.476 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.379 ; +; 2498.486 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.369 ; +; 2498.489 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.366 ; +; 2498.492 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.363 ; +; 2498.502 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.353 ; +; 2498.505 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.152 ; 1.350 ; +; 2498.505 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.064 ; 1.566 ; +; 2498.508 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.064 ; 1.563 ; +; 2498.524 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.031 ; 1.474 ; +; 2498.534 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.064 ; 1.537 ; +; 2498.549 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.043 ; 1.501 ; +; 2498.564 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a12~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.093 ; 1.372 ; +; 2498.593 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.019 ; 1.417 ; +; 2498.604 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.157 ; 1.246 ; +; 2498.608 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.043 ; 1.442 ; +; 2498.611 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.099 ; 1.319 ; +; 2498.618 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[0] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.240 ; 1.149 ; +; 2498.630 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.037 ; 1.362 ; +; 2498.636 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 2500.000 ; 0.064 ; 1.435 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.653 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.074 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[11] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[7] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[8] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[10] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[1] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[9] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[0] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[4] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[3] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; +; 2498.655 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[5] ; spi_ce0 ; spi_ce0 ; 2500.000 ; -0.072 ; 1.248 ; ++----------+-----------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -4912,106 +4912,106 @@ No paths to report. +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ -; 2.633 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.249 ; 0.980 ; -; 2.641 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.254 ; 0.967 ; -; 2.678 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.227 ; 0.957 ; -; 2.692 ; spi_slave:spi_slave_rx2_inst|rdata[46] ; iambic_mode[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.239 ; 1.046 ; -; 2.693 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.227 ; 0.942 ; -; 2.696 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.220 ; 0.946 ; -; 2.706 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.163 ; 0.993 ; -; 2.707 ; spi_slave:spi_slave_rx2_inst|rdata[47] ; iambic_mode[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.239 ; 1.031 ; -; 2.719 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.162 ; 0.981 ; -; 2.720 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.279 ; 0.863 ; -; 2.721 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.162 ; 0.979 ; -; 2.723 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.155 ; 0.984 ; -; 2.741 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.155 ; 0.966 ; -; 2.750 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.279 ; 0.833 ; -; 2.756 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.279 ; 0.827 ; -; 2.757 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.281 ; 0.824 ; -; 2.765 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.279 ; 0.818 ; -; 2.765 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.219 ; 0.878 ; -; 2.765 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.281 ; 0.816 ; -; 2.780 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.227 ; 0.855 ; -; 2.786 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.220 ; 0.856 ; -; 2.792 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.283 ; 0.787 ; -; 2.794 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.220 ; 0.848 ; -; 2.800 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.270 ; 0.792 ; -; 2.804 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.220 ; 0.838 ; -; 2.805 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.256 ; 0.801 ; -; 2.806 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.227 ; 0.829 ; -; 2.809 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.281 ; 0.772 ; -; 2.811 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.228 ; 0.823 ; -; 2.812 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.220 ; 0.830 ; -; 2.816 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.249 ; 0.797 ; -; 2.817 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.268 ; 0.777 ; -; 2.818 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.227 ; 0.817 ; -; 2.821 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.256 ; 0.785 ; -; 2.821 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.228 ; 0.813 ; -; 2.823 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.231 ; 0.808 ; -; 2.826 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.254 ; 0.782 ; -; 2.827 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.283 ; 0.752 ; -; 2.828 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.281 ; 0.753 ; -; 2.829 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.277 ; 0.756 ; -; 2.831 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.254 ; 0.777 ; -; 2.832 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.275 ; 0.755 ; -; 2.832 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.254 ; 0.776 ; -; 2.833 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.268 ; 0.761 ; -; 2.834 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.162 ; 0.866 ; -; 2.837 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.275 ; 0.750 ; -; 2.837 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.162 ; 0.863 ; -; 2.840 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.249 ; 0.773 ; -; 2.842 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.249 ; 0.771 ; -; 2.843 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.155 ; 0.864 ; -; 2.846 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.155 ; 0.861 ; -; 2.847 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.233 ; 0.782 ; -; 2.847 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.254 ; 0.761 ; -; 2.848 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.256 ; 0.758 ; -; 2.850 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.225 ; 0.787 ; -; 2.854 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.256 ; 0.752 ; -; 2.856 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.155 ; 0.851 ; -; 2.856 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.278 ; 0.728 ; -; 2.859 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.162 ; 0.841 ; -; 2.859 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.254 ; 0.749 ; -; 2.860 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.162 ; 0.840 ; -; 2.862 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.163 ; 0.837 ; -; 2.867 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.162 ; 0.833 ; -; 2.867 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.155 ; 0.840 ; -; 2.868 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.212 ; 0.782 ; -; 2.868 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; cw_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.246 ; 0.863 ; -; 2.872 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.233 ; 0.757 ; -; 2.874 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.155 ; 0.833 ; -; 2.885 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.246 ; 0.731 ; -; 2.893 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.170 ; 0.799 ; -; 2.907 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.160 ; 0.795 ; -; 2.908 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.283 ; 0.671 ; -; 2.913 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.281 ; 0.668 ; -; 2.913 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.285 ; 0.664 ; -; 2.913 ; spi_slave:spi_slave_rx2_inst|rdata[44] ; cw_speed[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.246 ; 0.818 ; -; 2.914 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; rx2_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.169 ; 0.894 ; -; 2.920 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; cw_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.166 ; 0.891 ; -; 2.930 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.283 ; 0.649 ; -; 2.931 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.285 ; 0.646 ; -; 2.935 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.275 ; 0.652 ; -; 2.935 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.275 ; 0.652 ; -; 2.935 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.281 ; 0.646 ; -; 2.937 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.268 ; 0.657 ; -; 2.939 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; rx2_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.247 ; 0.791 ; -; 2.940 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.168 ; 0.754 ; -; 2.942 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.168 ; 0.752 ; -; 2.943 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.168 ; 0.751 ; -; 2.944 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.268 ; 0.650 ; -; 2.945 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.256 ; 0.661 ; -; 2.945 ; spi_slave:spi_slave_rx2_inst|rdata[39] ; keyer_revers ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.244 ; 0.788 ; -; 2.946 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.168 ; 0.748 ; -; 2.950 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.168 ; 0.744 ; -; 2.954 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.275 ; 0.633 ; -; 2.955 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.277 ; 0.630 ; -; 2.958 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.275 ; 0.629 ; -; 2.961 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.249 ; 0.652 ; -; 2.963 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.256 ; 0.643 ; -; 2.964 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.278 ; 0.620 ; -; 2.968 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.249 ; 0.645 ; -; 2.968 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.256 ; 0.638 ; +; 2.443 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.192 ; 1.227 ; +; 2.459 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.156 ; 1.247 ; +; 2.465 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.085 ; 1.312 ; +; 2.472 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; rx2_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.263 ; 1.242 ; +; 2.473 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.083 ; 1.306 ; +; 2.489 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.158 ; 1.215 ; +; 2.495 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.156 ; 1.211 ; +; 2.497 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.156 ; 1.209 ; +; 2.504 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.194 ; 1.164 ; +; 2.506 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.158 ; 1.198 ; +; 2.512 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.158 ; 1.192 ; +; 2.515 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.085 ; 1.262 ; +; 2.521 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.158 ; 1.183 ; +; 2.526 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.258 ; +; 2.538 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.156 ; 1.168 ; +; 2.539 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.211 ; +; 2.540 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.187 ; 1.135 ; +; 2.542 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.083 ; 1.237 ; +; 2.544 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.156 ; 1.162 ; +; 2.549 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.156 ; 1.157 ; +; 2.557 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.158 ; 1.147 ; +; 2.558 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.064 ; 1.240 ; +; 2.559 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.191 ; +; 2.559 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.158 ; 1.145 ; +; 2.562 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.222 ; +; 2.562 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.222 ; +; 2.564 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; tx_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.064 ; 1.234 ; +; 2.568 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.110 ; 1.184 ; +; 2.580 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.204 ; +; 2.600 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.151 ; 1.111 ; +; 2.603 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.147 ; +; 2.604 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.146 ; +; 2.607 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.143 ; +; 2.612 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.151 ; 1.099 ; +; 2.613 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.158 ; 1.091 ; +; 2.635 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; tx_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.187 ; 1.040 ; +; 2.640 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.151 ; 1.071 ; +; 2.643 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.141 ; +; 2.645 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.105 ; +; 2.646 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.223 ; 0.993 ; +; 2.646 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.158 ; 1.058 ; +; 2.649 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.156 ; 1.057 ; +; 2.651 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.253 ; 0.958 ; +; 2.655 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.151 ; 1.056 ; +; 2.655 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.158 ; 1.049 ; +; 2.656 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.156 ; 1.050 ; +; 2.658 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.105 ; 1.099 ; +; 2.658 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.092 ; +; 2.674 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.151 ; 1.037 ; +; 2.676 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.253 ; 0.933 ; +; 2.676 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.074 ; +; 2.678 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.223 ; 0.961 ; +; 2.679 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.284 ; 0.899 ; +; 2.681 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.211 ; 0.970 ; +; 2.682 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.156 ; 1.024 ; +; 2.683 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.067 ; +; 2.683 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.101 ; +; 2.687 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.211 ; 0.964 ; +; 2.689 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.211 ; 0.962 ; +; 2.691 ; spi_slave:spi_slave_rx2_inst|rdata[38] ; keyer_weight[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.291 ; 0.880 ; +; 2.697 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.053 ; +; 2.700 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.200 ; 0.962 ; +; 2.702 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.048 ; +; 2.703 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.214 ; 0.945 ; +; 2.706 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.105 ; 1.051 ; +; 2.710 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.214 ; 0.938 ; +; 2.710 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.151 ; 1.001 ; +; 2.710 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.074 ; +; 2.713 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.211 ; 0.938 ; +; 2.716 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.034 ; +; 2.722 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 1.028 ; +; 2.734 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.050 ; +; 2.736 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.048 ; +; 2.740 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.078 ; 1.044 ; +; 2.749 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.332 ; 0.781 ; +; 2.753 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 0.997 ; +; 2.755 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.323 ; 0.784 ; +; 2.764 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.071 ; 1.027 ; +; 2.769 ; spi_slave:spi_slave_rx2_inst|rdata[32] ; keyer_weight[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.326 ; 0.767 ; +; 2.769 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.296 ; 0.797 ; +; 2.771 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.296 ; 0.795 ; +; 2.778 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.296 ; 0.788 ; +; 2.779 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.253 ; 0.830 ; +; 2.783 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.253 ; 0.826 ; +; 2.786 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.296 ; 0.780 ; +; 2.786 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.320 ; 0.756 ; +; 2.786 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.287 ; 0.789 ; +; 2.789 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.296 ; 0.777 ; +; 2.790 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.284 ; 0.788 ; +; 2.794 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.112 ; 0.956 ; +; 2.796 ; spi_slave:spi_slave_rx2_inst|rdata[34] ; keyer_weight[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.291 ; 0.775 ; +; 2.796 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.253 ; 0.813 ; +; 2.796 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.287 ; 0.779 ; +; 2.799 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.211 ; 0.852 ; +; 2.801 ; spi_slave:spi_slave_rx2_inst|rdata[33] ; keyer_weight[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.291 ; 0.770 ; +; 2.803 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.287 ; 0.772 ; +; 2.806 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.296 ; 0.760 ; +; 2.806 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.292 ; 0.764 ; +; 2.806 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.296 ; 0.760 ; +; 2.807 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 4.000 ; -0.069 ; 0.986 ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ @@ -5020,106 +5020,106 @@ No paths to report. +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ -; 2.854 ; spi_slave:spi_slave_rx_inst|rdata[34] ; rx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.359 ; 0.764 ; -; 2.855 ; spi_slave:spi_slave_rx_inst|rdata[33] ; rx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.359 ; 0.763 ; -; 2.901 ; spi_slave:spi_slave_rx_inst|rdata[35] ; tx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.359 ; 0.717 ; -; 2.902 ; spi_slave:spi_slave_rx_inst|rdata[37] ; rx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.216 ; 0.859 ; -; 2.902 ; spi_slave:spi_slave_rx_inst|rdata[34] ; tx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.359 ; 0.716 ; -; 2.917 ; spi_slave:spi_slave_rx_inst|rdata[37] ; tx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.359 ; 0.701 ; -; 2.934 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.407 ; 1.450 ; -; 2.965 ; spi_slave:spi_slave_rx_inst|rdata[35] ; rx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.359 ; 0.653 ; -; 2.968 ; spi_slave:spi_slave_rx_inst|rdata[33] ; tx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.359 ; 0.650 ; -; 2.973 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.414 ; 1.418 ; -; 2.974 ; spi_slave:spi_slave_rx_inst|rdata[32] ; rx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.623 ; 0.380 ; -; 2.981 ; spi_slave:spi_slave_rx_inst|rdata[36] ; tx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.346 ; 0.650 ; -; 2.982 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.405 ; 1.400 ; -; 3.000 ; spi_slave:spi_slave_rx_inst|rdata[32] ; tx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.337 ; 0.640 ; -; 3.008 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.346 ; 1.200 ; -; 3.017 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.422 ; 1.382 ; -; 3.025 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.422 ; 1.374 ; -; 3.031 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.413 ; 1.359 ; -; 3.042 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.414 ; 1.349 ; -; 3.048 ; spi_slave:spi_slave_rx_inst|rdata[36] ; rx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.203 ; 0.726 ; -; 3.084 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.348 ; 1.126 ; -; 3.106 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.362 ; 1.118 ; -; 3.122 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.363 ; 1.103 ; -; 3.140 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.422 ; 1.259 ; -; 3.144 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.348 ; 1.066 ; -; 3.146 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.385 ; 1.216 ; -; 3.167 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.406 ; 1.216 ; -; 3.174 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.385 ; 1.188 ; -; 3.177 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.386 ; 1.186 ; -; 3.185 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.405 ; 1.197 ; -; 3.200 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.362 ; 1.024 ; -; 3.218 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.348 ; 0.992 ; -; 3.218 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.326 ; 0.970 ; -; 3.226 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.363 ; 0.999 ; -; 3.227 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.347 ; 0.982 ; -; 3.230 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.406 ; 1.153 ; -; 3.233 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.405 ; 1.149 ; -; 3.236 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.347 ; 0.973 ; -; 3.246 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.347 ; 0.963 ; -; 3.246 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.414 ; 1.145 ; -; 3.248 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.406 ; 1.135 ; -; 3.248 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.348 ; 0.962 ; -; 3.250 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.370 ; 0.982 ; -; 3.251 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.362 ; 0.973 ; -; 3.256 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.405 ; 1.126 ; -; 3.272 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.407 ; 1.112 ; -; 3.278 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.348 ; 0.932 ; -; 3.285 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.407 ; 1.099 ; -; 3.287 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.414 ; 1.104 ; -; 3.293 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.355 ; 0.924 ; -; 3.294 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.363 ; 0.931 ; -; 3.297 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.386 ; 1.066 ; -; 3.299 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.407 ; 1.085 ; -; 3.313 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.346 ; 0.895 ; -; 3.348 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.405 ; 1.034 ; -; 3.351 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.414 ; 1.040 ; -; 3.360 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.327 ; 0.829 ; -; 3.372 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.411 ; 1.016 ; -; 3.373 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.405 ; 1.009 ; -; 3.376 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.414 ; 1.015 ; -; 3.377 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.414 ; 1.014 ; -; 3.382 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.405 ; 1.000 ; -; 3.396 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.411 ; 0.992 ; -; 3.402 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.326 ; 0.786 ; -; 3.405 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.327 ; 0.784 ; -; 3.409 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.347 ; 0.800 ; -; 3.413 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.354 ; 0.803 ; -; 3.414 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.406 ; 0.969 ; -; 3.415 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.346 ; 0.793 ; -; 3.415 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.355 ; 0.802 ; -; 3.416 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.363 ; 0.809 ; -; 3.419 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.354 ; 0.797 ; -; 3.420 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.354 ; 0.796 ; -; 3.421 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.348 ; 0.789 ; -; 3.421 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.354 ; 0.795 ; -; 3.422 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.414 ; 0.969 ; -; 3.422 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.354 ; 0.794 ; -; 3.423 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.345 ; 0.784 ; -; 3.423 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.347 ; 0.786 ; -; 3.424 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.355 ; 0.793 ; -; 3.427 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.345 ; 0.780 ; -; 3.431 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.347 ; 0.778 ; -; 3.431 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.354 ; 0.785 ; -; 3.431 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.347 ; 0.778 ; -; 3.431 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.355 ; 0.786 ; -; 3.432 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.347 ; 0.777 ; -; 3.432 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.354 ; 0.784 ; -; 3.433 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.354 ; 0.783 ; -; 3.437 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.346 ; 0.771 ; -; 3.437 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.345 ; 0.770 ; -; 3.439 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.345 ; 0.768 ; -; 3.439 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.354 ; 0.777 ; -; 3.440 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.355 ; 0.777 ; -; 3.440 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.355 ; 0.777 ; -; 3.441 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.345 ; 0.766 ; -; 3.444 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.346 ; 0.764 ; -; 3.445 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.355 ; 0.772 ; -; 3.445 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.345 ; 0.762 ; -; 3.446 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.355 ; 0.771 ; -; 3.446 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.345 ; 0.761 ; +; 2.815 ; spi_slave:spi_slave_rx_inst|rdata[34] ; rx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.433 ; 0.729 ; +; 2.824 ; spi_slave:spi_slave_rx_inst|rdata[32] ; tx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.460 ; 0.693 ; +; 2.828 ; spi_slave:spi_slave_rx_inst|rdata[36] ; tx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.460 ; 0.689 ; +; 2.852 ; spi_slave:spi_slave_rx_inst|rdata[33] ; tx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.460 ; 0.665 ; +; 2.858 ; spi_slave:spi_slave_rx_inst|rdata[37] ; rx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.433 ; 0.686 ; +; 2.869 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.325 ; 1.433 ; +; 2.879 ; spi_slave:spi_slave_rx_inst|rdata[34] ; tx_gain[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.460 ; 0.638 ; +; 2.880 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.323 ; 1.420 ; +; 2.882 ; spi_slave:spi_slave_rx_inst|rdata[32] ; rx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.433 ; 0.662 ; +; 2.887 ; spi_slave:spi_slave_rx_inst|rdata[36] ; rx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.433 ; 0.657 ; +; 2.892 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.262 ; 1.232 ; +; 2.892 ; spi_slave:spi_slave_rx_inst|rdata[33] ; rx_gain[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.433 ; 0.652 ; +; 2.928 ; spi_slave:spi_slave_rx_inst|rdata[35] ; tx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.460 ; 0.589 ; +; 2.952 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.326 ; 1.351 ; +; 2.966 ; spi_slave:spi_slave_rx_inst|rdata[37] ; tx_gain[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.313 ; 0.698 ; +; 2.982 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.317 ; 1.312 ; +; 2.992 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.265 ; 1.135 ; +; 3.005 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.326 ; 1.298 ; +; 3.023 ; spi_slave:spi_slave_rx_inst|rdata[35] ; rx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; -0.433 ; 0.521 ; +; 3.029 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.323 ; 1.271 ; +; 3.031 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.323 ; 1.269 ; +; 3.031 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.260 ; 1.091 ; +; 3.033 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.326 ; 1.270 ; +; 3.048 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.211 ; 1.140 ; +; 3.076 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.326 ; 1.227 ; +; 3.078 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.213 ; 1.112 ; +; 3.088 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.314 ; 1.203 ; +; 3.089 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.317 ; 1.205 ; +; 3.092 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.153 ; 0.923 ; +; 3.096 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.321 ; 1.202 ; +; 3.104 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.320 ; 1.193 ; +; 3.107 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.323 ; 1.193 ; +; 3.110 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.260 ; 1.012 ; +; 3.122 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.153 ; 0.893 ; +; 3.125 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.317 ; 1.169 ; +; 3.126 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.323 ; 1.174 ; +; 3.140 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.213 ; 1.050 ; +; 3.142 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.257 ; 0.977 ; +; 3.147 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.318 ; 1.148 ; +; 3.149 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.262 ; 0.975 ; +; 3.154 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.262 ; 0.970 ; +; 3.158 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.262 ; 0.966 ; +; 3.169 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.323 ; 1.131 ; +; 3.173 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.952 ; +; 3.173 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.260 ; 0.949 ; +; 3.177 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.265 ; 0.950 ; +; 3.185 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.262 ; 0.939 ; +; 3.185 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.320 ; 1.112 ; +; 3.186 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.317 ; 1.108 ; +; 3.200 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.206 ; 0.983 ; +; 3.206 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.260 ; 0.916 ; +; 3.208 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.320 ; 1.089 ; +; 3.210 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.211 ; 0.978 ; +; 3.210 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.150 ; 0.802 ; +; 3.211 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.317 ; 1.083 ; +; 3.225 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.153 ; 0.790 ; +; 3.228 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.323 ; 1.072 ; +; 3.232 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.267 ; 0.897 ; +; 3.232 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.321 ; 1.066 ; +; 3.236 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.320 ; 1.061 ; +; 3.236 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.150 ; 0.776 ; +; 3.238 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.150 ; 0.774 ; +; 3.238 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.150 ; 0.774 ; +; 3.241 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.321 ; 1.057 ; +; 3.256 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.150 ; 0.756 ; +; 3.264 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.153 ; 0.751 ; +; 3.270 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.153 ; 0.745 ; +; 3.272 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.321 ; 1.026 ; +; 3.300 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.264 ; 0.826 ; +; 3.303 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.321 ; 0.995 ; +; 3.320 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.324 ; 0.981 ; +; 3.321 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.264 ; 0.805 ; +; 3.321 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.264 ; 0.805 ; +; 3.328 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.260 ; 0.794 ; +; 3.332 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.793 ; +; 3.336 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.260 ; 0.786 ; +; 3.336 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.789 ; +; 3.338 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.787 ; +; 3.339 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.261 ; 0.784 ; +; 3.340 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.264 ; 0.786 ; +; 3.341 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.261 ; 0.782 ; +; 3.342 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.260 ; 0.780 ; +; 3.342 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.261 ; 0.781 ; +; 3.343 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.264 ; 0.783 ; +; 3.343 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.782 ; +; 3.343 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.782 ; +; 3.344 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.781 ; +; 3.346 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.260 ; 0.776 ; +; 3.350 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.260 ; 0.772 ; +; 3.351 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.261 ; 0.772 ; +; 3.352 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.773 ; +; 3.354 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.771 ; +; 3.354 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.261 ; 0.769 ; +; 3.354 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.261 ; 0.769 ; +; 3.355 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.770 ; +; 3.361 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.764 ; +; 3.362 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.265 ; 0.765 ; +; 3.362 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.261 ; 0.761 ; +; 3.363 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.762 ; +; 3.363 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 4.000 ; 0.263 ; 0.762 ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ @@ -5128,32 +5128,32 @@ No paths to report. +-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -; 3.284 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.090 ; 3.469 ; -; 3.426 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.175 ; 3.519 ; -; 3.479 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.085 ; 3.269 ; -; 3.534 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.121 ; 3.256 ; -; 3.618 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.093 ; 3.237 ; -; 3.635 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.119 ; 3.152 ; -; 3.656 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.167 ; 3.282 ; -; 3.661 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.118 ; 3.125 ; -; 3.728 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.092 ; 3.122 ; -; 3.778 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.118 ; 3.008 ; -; 3.416 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.118 ; 3.365 ; -; 3.843 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.177 ; 3.106 ; -; 3.876 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.178 ; 3.074 ; -; 8.675 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.090 ; 3.078 ; -; 8.829 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.085 ; 2.919 ; -; 8.859 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.175 ; 3.086 ; -; 8.892 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.118 ; 2.894 ; -; 8.904 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.093 ; 2.951 ; -; 8.908 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.121 ; 2.882 ; -; 8.919 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.177 ; 3.030 ; -; 8.947 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.178 ; 3.003 ; -; 8.959 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.118 ; 2.827 ; -; 8.800 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.118 ; 2.981 ; -; 8.955 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.119 ; 2.832 ; -; 9.025 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.167 ; 2.913 ; -; 9.077 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.092 ; 2.773 ; +; 3.213 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.134 ; 3.584 ; +; 3.227 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.124 ; 3.655 ; +; 3.257 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.125 ; 3.531 ; +; 3.262 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.137 ; 3.633 ; +; 3.281 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.131 ; 3.613 ; +; 3.323 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.135 ; 3.571 ; +; 3.379 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.131 ; 3.515 ; +; 3.321 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.130 ; 3.572 ; +; 3.346 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.132 ; 3.548 ; +; 3.381 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.136 ; 3.513 ; +; 3.553 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.132 ; 3.342 ; +; 3.576 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.132 ; 3.223 ; +; 3.704 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 5.000 ; 2.117 ; 3.172 ; +; 8.572 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.130 ; 3.321 ; +; 8.579 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.132 ; 3.220 ; +; 8.605 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.131 ; 3.289 ; +; 8.642 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.124 ; 3.240 ; +; 8.642 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.131 ; 3.252 ; +; 8.643 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.136 ; 3.251 ; +; 8.646 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.134 ; 3.151 ; +; 8.674 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.132 ; 3.220 ; +; 8.674 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.125 ; 3.114 ; +; 8.586 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.137 ; 3.309 ; +; 8.748 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.117 ; 3.128 ; +; 8.752 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.135 ; 3.142 ; +; 8.754 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 10.000 ; 2.132 ; 3.141 ; +-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ @@ -5162,127 +5162,127 @@ No paths to report. +-------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ -; 5.943 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.992 ; 5.045 ; -; 6.007 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.010 ; 4.963 ; -; 6.116 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.080 ; 4.784 ; -; 6.313 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.010 ; 4.657 ; -; 7.814 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.334 ; 2.832 ; -; 8.005 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.080 ; 2.895 ; -; 8.010 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.080 ; 2.890 ; -; 8.033 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.992 ; 2.955 ; -; 8.205 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.992 ; 2.783 ; -; 8.308 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.992 ; 2.680 ; -; 8.397 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.992 ; 2.591 ; -; 8.403 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.992 ; 2.585 ; +; 5.586 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.189 ; 5.205 ; +; 6.147 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.864 ; 4.969 ; +; 6.171 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.942 ; 4.867 ; +; 6.259 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.942 ; 4.779 ; +; 7.185 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.189 ; 3.606 ; +; 7.396 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.333 ; 3.251 ; +; 8.077 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.942 ; 2.961 ; +; 8.134 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.942 ; 2.904 ; +; 8.155 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -2.172 ; 2.653 ; +; 8.156 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.942 ; 2.882 ; +; 8.244 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.942 ; 2.794 ; +; 8.273 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; 18.000 ; -1.966 ; 2.741 ; +-------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ -+-----------------------------------------------------------------------------------------------------------------------------------+ -; Fast 1200mV 0C Model Setup: 'clk_10mhz' ; -+--------+-----------------+----------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+--------+-----------------+----------------------------------+--------------+-------------+--------------+------------+------------+ -; 96.266 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.359 ; 3.362 ; -; 96.338 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.296 ; -; 96.338 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.296 ; -; 96.338 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.296 ; -; 96.338 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.296 ; -; 96.338 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.296 ; -; 96.338 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.296 ; -; 96.338 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.296 ; -; 96.434 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.359 ; 3.194 ; -; 96.495 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 3.131 ; -; 96.495 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 3.131 ; -; 96.495 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 3.131 ; -; 96.495 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 3.131 ; -; 96.495 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 3.131 ; -; 96.495 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 3.131 ; -; 96.495 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 3.131 ; -; 96.495 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 3.131 ; -; 96.506 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.128 ; -; 96.506 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.128 ; -; 96.506 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.128 ; -; 96.506 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.128 ; -; 96.506 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.128 ; -; 96.506 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.128 ; -; 96.506 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.353 ; 3.128 ; -; 96.524 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.341 ; 3.122 ; -; 96.596 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 3.056 ; -; 96.596 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 3.056 ; -; 96.596 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 3.056 ; -; 96.596 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 3.056 ; -; 96.596 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 3.056 ; -; 96.596 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 3.056 ; -; 96.596 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 3.056 ; -; 96.619 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.341 ; 3.027 ; -; 96.648 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.341 ; 2.998 ; -; 96.663 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 2.963 ; -; 96.663 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 2.963 ; -; 96.663 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 2.963 ; -; 96.663 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 2.963 ; -; 96.663 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 2.963 ; -; 96.663 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 2.963 ; -; 96.663 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 2.963 ; -; 96.663 ; prev_rx_gain[5] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.361 ; 2.963 ; -; 96.691 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.961 ; -; 96.691 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.961 ; -; 96.691 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.961 ; -; 96.691 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.961 ; -; 96.691 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.961 ; -; 96.691 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.961 ; -; 96.691 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.961 ; -; 96.700 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.341 ; 2.946 ; -; 96.720 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.932 ; -; 96.720 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.932 ; -; 96.720 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.932 ; -; 96.720 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.932 ; -; 96.720 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.932 ; -; 96.720 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.932 ; -; 96.720 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.932 ; -; 96.727 ; prev_rx_gain[4] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.162 ; 3.098 ; -; 96.731 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.341 ; 2.915 ; -; 96.753 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.891 ; -; 96.753 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.891 ; -; 96.753 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.891 ; -; 96.753 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.891 ; -; 96.753 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.891 ; -; 96.753 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.891 ; -; 96.753 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.891 ; -; 96.753 ; prev_tx_gain[3] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.891 ; -; 96.761 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_state.1 ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.341 ; 2.885 ; -; 96.772 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.880 ; -; 96.772 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.880 ; -; 96.772 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.880 ; -; 96.772 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.880 ; -; 96.772 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.880 ; -; 96.772 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.880 ; -; 96.772 ; prev_tx_gain[2] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.880 ; -; 96.803 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.849 ; -; 96.803 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.849 ; -; 96.803 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.849 ; -; 96.803 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.849 ; -; 96.803 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.849 ; -; 96.803 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.849 ; -; 96.803 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.849 ; -; 96.833 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.819 ; -; 96.833 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.819 ; -; 96.833 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.819 ; -; 96.833 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.819 ; -; 96.833 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.819 ; -; 96.833 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.819 ; -; 96.833 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.335 ; 2.819 ; -; 96.848 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.796 ; -; 96.848 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.796 ; -; 96.848 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.796 ; -; 96.848 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.796 ; -; 96.848 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.796 ; -; 96.848 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.796 ; -; 96.848 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.796 ; -; 96.848 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.796 ; -; 96.877 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.767 ; -; 96.877 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.767 ; -; 96.877 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.343 ; 2.767 ; -+--------+-----------------+----------------------------------+--------------+-------------+--------------+------------+------------+ ++-------------------------------------------------------------------------------------------------------------------------------------------------+ +; Fast 1200mV 0C Model Setup: 'clk_10mhz' ; ++--------+-------------------------------+----------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++--------+-------------------------------+----------------------------------+--------------+-------------+--------------+------------+------------+ +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.870 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.824 ; +; 96.976 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.718 ; +; 96.976 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.718 ; +; 96.976 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.718 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 96.983 ; prev_tx_gain[1] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.655 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.013 ; prev_tx_gain[0] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.625 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.021 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.293 ; 2.673 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.032 ; prev_tx_gain[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.606 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.034 ; prev_rx_gain[0] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.584 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[0] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.040 ; prev_rx_gain[2] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.369 ; 2.578 ; +; 97.063 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.575 ; +; 97.063 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.575 ; +; 97.063 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.575 ; +; 97.063 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.575 ; +; 97.063 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.575 ; +; 97.063 ; prev_tx_gain[4] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 100.000 ; -0.349 ; 2.575 ; ++--------+-------------------------------+----------------------------------+--------------+-------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -5290,106 +5290,106 @@ No paths to report. +----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 2498.420 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.012 ; 1.599 ; -; 2498.447 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.012 ; 1.572 ; -; 2498.484 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.166 ; 1.379 ; -; 2498.493 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.204 ; 1.310 ; -; 2498.532 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.129 ; 1.368 ; -; 2498.585 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.166 ; 1.278 ; -; 2498.594 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.204 ; 1.209 ; -; 2498.633 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.129 ; 1.267 ; -; 2498.636 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 1.314 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[25] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[21] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[24] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[22] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[18] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[17] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[16] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[15] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[14] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[13] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.661 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[12] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.066 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[11] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[10] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[9] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[8] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[7] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[6] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[5] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[4] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[3] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[0] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.065 ; 1.248 ; -; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 1.287 ; -; 2498.698 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.012 ; 1.321 ; -; 2498.702 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.131 ; 1.196 ; -; 2498.706 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.097 ; 1.226 ; -; 2498.716 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.012 ; 1.303 ; -; 2498.735 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.096 ; 1.368 ; -; 2498.762 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.096 ; 1.341 ; -; 2498.774 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.060 ; 1.195 ; -; 2498.803 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.034 ; 1.238 ; -; 2498.803 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.131 ; 1.095 ; -; 2498.826 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.034 ; 1.215 ; -; 2498.837 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 1.113 ; -; 2498.864 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 1.086 ; -; 2498.883 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.131 ; 1.015 ; -; 2498.914 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 1.036 ; -; 2498.923 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.166 ; 0.940 ; -; 2498.932 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 1.018 ; -; 2498.968 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.062 ; 0.999 ; -; 2498.972 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.129 ; 0.928 ; -; 2498.981 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 0.969 ; -; 2499.006 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.012 ; 1.013 ; -; 2499.008 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 0.942 ; -; 2499.009 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.131 ; 0.889 ; -; 2499.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.096 ; 1.090 ; -; 2499.016 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.129 ; 0.884 ; -; 2499.022 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.028 ; 0.957 ; -; 2499.031 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.096 ; 1.072 ; -; 2499.040 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.179 ; 0.788 ; -; 2499.041 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.145 ; 0.821 ; -; 2499.050 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.034 ; 0.991 ; -; 2499.064 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.012 ; 0.955 ; -; 2499.071 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.034 ; 0.970 ; -; 2499.080 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 0.870 ; -; 2499.081 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 0.869 ; -; 2499.082 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 0.868 ; -; 2499.088 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 0.862 ; -; 2499.103 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 0.847 ; -; 2499.104 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 0.846 ; -; 2499.108 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.131 ; 0.790 ; -; 2499.109 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.057 ; 0.841 ; -; 2499.110 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.204 ; 0.693 ; -; 2499.111 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.129 ; 0.789 ; -; 2499.112 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.179 ; 0.716 ; +; 2497.734 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.060 ; 2.213 ; +; 2497.736 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.060 ; 2.211 ; +; 2497.849 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.060 ; 2.098 ; +; 2497.851 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.060 ; 2.096 ; +; 2497.945 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.060 ; 2.002 ; +; 2498.012 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.031 ; 1.964 ; +; 2498.014 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.031 ; 1.962 ; +; 2498.060 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.060 ; 1.887 ; +; 2498.223 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.031 ; 1.753 ; +; 2498.230 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.210 ; 1.567 ; +; 2498.232 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.210 ; 1.565 ; +; 2498.396 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 1.367 ; +; 2498.398 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 1.365 ; +; 2498.402 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.136 ; 1.741 ; +; 2498.420 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.210 ; 1.377 ; +; 2498.451 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 1.312 ; +; 2498.453 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 1.310 ; +; 2498.474 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.224 ; 1.309 ; +; 2498.515 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.136 ; 1.628 ; +; 2498.568 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 1.195 ; +; 2498.570 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 1.193 ; +; 2498.573 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.224 ; 1.210 ; +; 2498.578 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.136 ; 1.565 ; +; 2498.581 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 1.182 ; +; 2498.583 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 1.180 ; +; 2498.605 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.218 ; 1.642 ; +; 2498.656 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.136 ; 1.487 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[32] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[44] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[40] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[31] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[34] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[30] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.657 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.070 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[29] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[28] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[25] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[24] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[23] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[22] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[26] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[21] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[20] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[19] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[18] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[17] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[16] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[15] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[14] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[13] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[12] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.660 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[27] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.067 ; 1.248 ; +; 2498.662 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 1.101 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[11] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[10] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[9] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[8] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[7] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[6] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[5] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[4] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[3] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[2] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[0] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.064 ; 1.248 ; +; 2498.676 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.136 ; 1.467 ; +; 2498.680 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.165 ; 1.492 ; +; 2498.681 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.136 ; 1.462 ; +; 2498.731 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.283 ; 0.993 ; +; 2498.748 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.136 ; 1.395 ; +; 2498.765 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.136 ; 1.378 ; +; 2498.765 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.088 ; 1.352 ; +; 2498.766 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.224 ; 1.017 ; +; 2498.767 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 0.996 ; +; 2498.792 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 0.971 ; +; 2498.792 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.244 ; 0.971 ; +; 2498.802 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.292 ; 0.913 ; +; 2498.806 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.096 ; 1.127 ; +; 2498.837 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.283 ; 0.887 ; +; 2498.839 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.034 ; 1.224 ; +; 2498.847 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.014 ; 1.146 ; +; 2498.848 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.165 ; 1.324 ; +; 2498.854 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.041 ; 1.134 ; +; 2498.868 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.143 ; 1.304 ; +; 2498.912 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.034 ; 1.151 ; +; 2498.920 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.165 ; 1.252 ; +; 2498.933 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.172 ; 1.268 ; +; 2498.937 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 2500.000 ; 0.165 ; 1.235 ; +; 2498.946 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 2500.000 ; -0.224 ; 0.837 ; +----------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ @@ -5398,323 +5398,215 @@ No paths to report. +----------+-------------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +----------+-------------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; 2602.186 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 1.896 ; -; 2602.186 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 1.896 ; -; 2602.186 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 1.896 ; -; 2602.186 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 1.896 ; -; 2602.186 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 1.896 ; -; 2602.186 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 1.896 ; -; 2602.186 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 1.896 ; -; 2602.186 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 1.896 ; -; 2602.186 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 1.896 ; -; 2602.456 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 1.634 ; -; 2602.456 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 1.634 ; -; 2602.456 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 1.634 ; -; 2602.456 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 1.634 ; -; 2602.456 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 1.634 ; -; 2602.456 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 1.634 ; -; 2602.456 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 1.634 ; -; 2602.456 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 1.634 ; -; 2602.456 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 1.634 ; -; 2603.309 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.071 ; 0.773 ; -; 2603.607 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.072 ; 0.474 ; -; 2603.607 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.072 ; 0.474 ; -; 5205.505 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.779 ; -; 5205.505 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.779 ; -; 5205.505 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.779 ; -; 5205.505 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.779 ; -; 5205.524 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.760 ; -; 5205.524 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.760 ; -; 5205.524 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.760 ; -; 5205.524 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.760 ; -; 5205.524 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.760 ; -; 5205.524 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.760 ; -; 5205.630 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.654 ; -; 5205.630 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.654 ; -; 5205.630 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.654 ; -; 5205.630 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.654 ; -; 5205.649 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.635 ; -; 5205.649 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.635 ; -; 5205.649 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.635 ; -; 5205.649 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.635 ; -; 5205.649 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.635 ; -; 5205.649 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.635 ; -; 5205.708 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.576 ; -; 5205.708 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.576 ; -; 5205.708 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.576 ; -; 5205.708 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.576 ; -; 5205.716 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.568 ; -; 5205.716 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.568 ; -; 5205.716 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.568 ; -; 5205.716 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.568 ; -; 5205.727 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.557 ; -; 5205.727 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.557 ; -; 5205.727 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.557 ; -; 5205.727 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.557 ; -; 5205.727 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.557 ; -; 5205.727 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.557 ; -; 5205.735 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.549 ; -; 5205.735 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.549 ; -; 5205.735 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.549 ; -; 5205.735 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.549 ; -; 5205.735 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.549 ; -; 5205.735 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.549 ; -; 5205.759 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.525 ; -; 5205.759 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.525 ; -; 5205.759 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.525 ; -; 5205.759 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.525 ; -; 5205.761 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.523 ; -; 5205.761 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.523 ; -; 5205.761 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.523 ; -; 5205.761 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.523 ; -; 5205.778 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.506 ; -; 5205.778 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.506 ; -; 5205.778 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.506 ; -; 5205.778 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.506 ; -; 5205.778 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.506 ; -; 5205.778 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.506 ; -; 5205.780 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.504 ; -; 5205.780 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.504 ; -; 5205.780 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.504 ; -; 5205.780 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.504 ; -; 5205.780 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.504 ; -; 5205.780 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.504 ; -; 5205.856 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.428 ; -; 5205.856 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.428 ; -; 5205.856 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.428 ; -; 5205.856 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.428 ; -; 5205.867 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.417 ; -; 5205.867 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.417 ; -; 5205.867 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.417 ; -; 5205.867 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.417 ; -; 5205.875 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.409 ; -; 5205.875 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.409 ; -; 5205.875 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.409 ; -; 5205.875 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.409 ; -; 5205.875 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.409 ; -; 5205.875 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.409 ; -; 5205.886 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.398 ; -; 5205.886 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.398 ; -; 5205.886 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.398 ; -; 5205.886 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.398 ; -; 5205.886 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.398 ; +; 2601.894 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 2.196 ; +; 2601.894 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 2.196 ; +; 2601.894 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 2.196 ; +; 2601.894 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 2.196 ; +; 2601.894 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 2.196 ; +; 2601.894 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 2.196 ; +; 2601.894 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 2.196 ; +; 2601.894 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 2.196 ; +; 2601.894 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 2.196 ; +; 2602.096 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.064 ; 1.993 ; +; 2602.096 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.064 ; 1.993 ; +; 2602.096 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.064 ; 1.993 ; +; 2602.096 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.064 ; 1.993 ; +; 2602.096 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.064 ; 1.993 ; +; 2602.096 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.064 ; 1.993 ; +; 2602.096 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.064 ; 1.993 ; +; 2602.096 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.064 ; 1.993 ; +; 2602.096 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.064 ; 1.993 ; +; 2603.107 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 0.983 ; +; 2603.107 ; profile:profile_CW|enable_hang ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 0.983 ; +; 2603.146 ; profile:profile_CW|char_PTT ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2604.166 ; -0.063 ; 0.944 ; +; 5204.987 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.298 ; +; 5204.987 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.298 ; +; 5204.987 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.298 ; +; 5204.987 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.298 ; +; 5205.067 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.217 ; +; 5205.067 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.217 ; +; 5205.067 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.217 ; +; 5205.067 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.217 ; +; 5205.067 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.217 ; +; 5205.067 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.217 ; +; 5205.142 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.143 ; +; 5205.142 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.143 ; +; 5205.142 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.143 ; +; 5205.142 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.143 ; +; 5205.222 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.062 ; +; 5205.222 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.063 ; +; 5205.222 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.063 ; +; 5205.222 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.062 ; +; 5205.222 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.062 ; +; 5205.222 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.062 ; +; 5205.222 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.062 ; +; 5205.222 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.063 ; +; 5205.222 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.063 ; +; 5205.222 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 3.062 ; +; 5205.258 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.027 ; +; 5205.258 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.027 ; +; 5205.258 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.027 ; +; 5205.258 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 3.027 ; +; 5205.302 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.982 ; +; 5205.302 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.982 ; +; 5205.302 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.982 ; +; 5205.302 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.982 ; +; 5205.302 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.982 ; +; 5205.302 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.982 ; +; 5205.338 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.946 ; +; 5205.338 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.946 ; +; 5205.338 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.946 ; +; 5205.338 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.946 ; +; 5205.338 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.946 ; +; 5205.338 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.946 ; +; 5205.409 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.044 ; 2.867 ; +; 5205.540 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.745 ; +; 5205.540 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.745 ; +; 5205.540 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.745 ; +; 5205.540 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.745 ; +; 5205.553 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.732 ; +; 5205.553 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.732 ; +; 5205.553 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.732 ; +; 5205.553 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.732 ; +; 5205.564 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.044 ; 2.712 ; +; 5205.602 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.683 ; +; 5205.602 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.683 ; +; 5205.602 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.683 ; +; 5205.602 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.683 ; +; 5205.620 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.664 ; +; 5205.620 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.664 ; +; 5205.620 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.664 ; +; 5205.620 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.664 ; +; 5205.620 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.664 ; +; 5205.620 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.664 ; +; 5205.633 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.651 ; +; 5205.633 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.651 ; +; 5205.633 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.651 ; +; 5205.633 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.651 ; +; 5205.633 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.651 ; +; 5205.633 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.651 ; +; 5205.635 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.650 ; +; 5205.635 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.650 ; +; 5205.635 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.650 ; +; 5205.635 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.650 ; +; 5205.644 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.044 ; 2.632 ; +; 5205.680 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.044 ; 2.596 ; +; 5205.682 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.602 ; +; 5205.682 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.602 ; +; 5205.682 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.602 ; +; 5205.682 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.602 ; +; 5205.682 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.602 ; +; 5205.682 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.036 ; 2.602 ; +; 5205.714 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 5208.333 ; -0.035 ; 2.571 ; +----------+-------------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Fast 1200mV 0C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' ; -+-----------+------------------------------+------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-----------+------------------------------+------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ -; 33330.158 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.127 ; -; 33330.158 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.127 ; -; 33330.158 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.127 ; -; 33330.158 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.127 ; -; 33330.158 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.127 ; -; 33330.158 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.127 ; -; 33330.158 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.127 ; -; 33330.158 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.127 ; -; 33330.158 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.127 ; -; 33330.162 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 3.124 ; -; 33330.162 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 3.124 ; -; 33330.162 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 3.124 ; -; 33330.162 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 3.124 ; -; 33330.162 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 3.124 ; -; 33330.162 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 3.124 ; -; 33330.162 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 3.124 ; -; 33330.162 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 3.124 ; -; 33330.162 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 3.124 ; -; 33330.233 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.051 ; -; 33330.233 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.051 ; -; 33330.233 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.051 ; -; 33330.233 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.051 ; -; 33330.233 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.051 ; -; 33330.233 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.051 ; -; 33330.233 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.051 ; -; 33330.233 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.051 ; -; 33330.233 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.051 ; -; 33330.237 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.048 ; -; 33330.237 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.048 ; -; 33330.237 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.048 ; -; 33330.237 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.048 ; -; 33330.237 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.048 ; -; 33330.237 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.048 ; -; 33330.237 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.048 ; -; 33330.237 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.048 ; -; 33330.237 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.048 ; -; 33330.241 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.043 ; -; 33330.241 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.043 ; -; 33330.241 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.043 ; -; 33330.241 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.043 ; -; 33330.241 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.043 ; -; 33330.241 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.043 ; -; 33330.241 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.043 ; -; 33330.241 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.043 ; -; 33330.241 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.043 ; -; 33330.245 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.040 ; -; 33330.245 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.040 ; -; 33330.245 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.040 ; -; 33330.245 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.040 ; -; 33330.245 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.040 ; -; 33330.245 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.040 ; -; 33330.245 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.040 ; -; 33330.245 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.040 ; -; 33330.245 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 3.040 ; -; 33330.303 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|keyer_out ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.032 ; 2.985 ; -; 33330.315 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.970 ; -; 33330.315 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.970 ; -; 33330.315 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.970 ; -; 33330.315 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.970 ; -; 33330.315 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.970 ; -; 33330.315 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.970 ; -; 33330.315 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.970 ; -; 33330.315 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.970 ; -; 33330.315 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.970 ; -; 33330.319 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.967 ; -; 33330.319 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.967 ; -; 33330.319 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.967 ; -; 33330.319 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.967 ; -; 33330.319 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.967 ; -; 33330.319 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.967 ; -; 33330.319 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.967 ; -; 33330.319 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.967 ; -; 33330.319 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.967 ; -; 33330.372 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.913 ; -; 33330.372 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.913 ; -; 33330.372 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.913 ; -; 33330.372 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.913 ; -; 33330.372 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.913 ; -; 33330.372 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.913 ; -; 33330.372 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.913 ; -; 33330.372 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.913 ; -; 33330.372 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.913 ; -; 33330.376 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.910 ; -; 33330.376 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.910 ; -; 33330.376 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.910 ; -; 33330.376 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.910 ; -; 33330.376 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.910 ; -; 33330.376 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.910 ; -; 33330.376 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.910 ; -; 33330.376 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.910 ; -; 33330.376 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.034 ; 2.910 ; -; 33330.393 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|keyer_out ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.033 ; 2.894 ; -; 33330.401 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 2.883 ; -; 33330.401 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 2.883 ; -; 33330.401 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 2.883 ; -; 33330.401 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 2.883 ; -; 33330.401 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 2.883 ; -; 33330.401 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 2.883 ; -; 33330.401 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 2.883 ; -; 33330.401 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 2.883 ; -+-----------+------------------------------+------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ - - -+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Fast 1200mV 0C Model Hold: 'spi_ce0' ; -+-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.048 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.349 ; 0.501 ; -; 0.173 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.060 ; 0.317 ; -; 0.174 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.060 ; 0.318 ; -; 0.180 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.061 ; 0.325 ; -; 0.181 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.061 ; 0.326 ; -; 0.182 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.061 ; 0.327 ; -; 0.182 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[5] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.061 ; 0.327 ; -; 0.194 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.029 ; 0.307 ; -; 0.195 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; -; 0.196 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; -; 0.196 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; -; 0.196 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; -; 0.197 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.307 ; -; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.307 ; -; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.307 ; -; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.307 ; -; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.307 ; -; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.307 ; -; 0.200 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.332 ; 0.636 ; -; 0.201 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.050 ; 0.335 ; -; 0.201 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.029 ; 0.314 ; -; 0.203 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.050 ; 0.337 ; -; 0.204 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.314 ; -; 0.209 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.320 ; 0.633 ; -; 0.215 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.326 ; -; 0.216 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.327 ; -; 0.217 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.029 ; 0.330 ; -; 0.217 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.327 ; -; 0.221 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.333 ; -; 0.226 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.203 ; 0.533 ; -; 0.227 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.257 ; 0.568 ; -; 0.230 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.257 ; 0.571 ; -; 0.230 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.003 ; 0.317 ; -; 0.232 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.009 ; 0.325 ; -; 0.232 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.003 ; 0.319 ; -; 0.241 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.005 ; 0.330 ; -; 0.241 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.174 ; 0.519 ; -; 0.241 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.003 ; 0.328 ; -; 0.244 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.286 ; 0.634 ; -; 0.255 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.228 ; 0.567 ; -; 0.255 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.060 ; 0.399 ; -; 0.258 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.286 ; 0.648 ; -; 0.259 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.050 ; 0.393 ; -; 0.259 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.228 ; 0.571 ; -; 0.260 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.029 ; 0.373 ; -; 0.261 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.228 ; 0.573 ; -; 0.262 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.174 ; 0.540 ; -; 0.266 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.278 ; 0.648 ; -; 0.268 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.286 ; 0.658 ; -; 0.269 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.174 ; 0.547 ; -; 0.272 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a8~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.293 ; 0.669 ; -; 0.273 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.290 ; 0.667 ; -; 0.282 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a4~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.290 ; 0.676 ; -; 0.283 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.050 ; 0.417 ; -; 0.284 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.029 ; 0.397 ; -; 0.286 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a0~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.275 ; 0.665 ; -; 0.287 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.029 ; 0.400 ; -; 0.289 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.174 ; 0.567 ; -; 0.290 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.003 ; 0.377 ; -; 0.291 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.115 ; 0.510 ; -; 0.292 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.115 ; 0.511 ; -; 0.299 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.115 ; 0.518 ; -; 0.299 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.395 ; -; 0.300 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.005 ; 0.389 ; -; 0.301 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.029 ; 0.414 ; -; 0.302 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.398 ; -; 0.306 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.349 ; 0.759 ; -; 0.307 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.203 ; 0.614 ; -; 0.307 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.003 ; 0.394 ; -; 0.310 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.115 ; 0.529 ; -; 0.316 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.005 ; 0.405 ; -; 0.317 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.060 ; 0.461 ; -; 0.321 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.433 ; -; 0.323 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.435 ; -; 0.324 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.436 ; -; 0.327 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.439 ; -; 0.328 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.437 ; -; 0.330 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.442 ; -; 0.331 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.440 ; -; 0.331 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.186 ; 0.621 ; -; 0.332 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.442 ; -; 0.335 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.208 ; 0.627 ; -; 0.336 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.332 ; 0.772 ; -; 0.337 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.186 ; 0.627 ; -; 0.339 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.003 ; 0.426 ; -; 0.341 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.025 ; 0.450 ; -; 0.342 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.005 ; 0.431 ; -; 0.344 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.456 ; -; 0.352 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[4] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.203 ; 0.659 ; -+-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Fast 1200mV 0C Model Setup: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' ; ++-----------+------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-----------+------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; 33329.832 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.452 ; +; 33329.832 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.452 ; +; 33329.832 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.452 ; +; 33329.832 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.452 ; +; 33329.832 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.452 ; +; 33329.832 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.452 ; +; 33329.832 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.452 ; +; 33329.832 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.452 ; +; 33329.832 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.452 ; +; 33329.848 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.436 ; +; 33329.848 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.436 ; +; 33329.848 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.436 ; +; 33329.848 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.436 ; +; 33329.848 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.436 ; +; 33329.848 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.436 ; +; 33329.848 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.436 ; +; 33329.848 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.436 ; +; 33329.848 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.436 ; +; 33330.026 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.258 ; +; 33330.026 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.258 ; +; 33330.026 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.258 ; +; 33330.026 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.258 ; +; 33330.026 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.258 ; +; 33330.026 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.258 ; +; 33330.026 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.258 ; +; 33330.026 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.258 ; +; 33330.026 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.258 ; +; 33330.042 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.242 ; +; 33330.042 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.242 ; +; 33330.042 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.242 ; +; 33330.042 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.242 ; +; 33330.042 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.242 ; +; 33330.042 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.242 ; +; 33330.042 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.242 ; +; 33330.042 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.242 ; +; 33330.042 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.242 ; +; 33330.048 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.236 ; +; 33330.048 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.236 ; +; 33330.048 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.236 ; +; 33330.048 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.236 ; +; 33330.048 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.236 ; +; 33330.048 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.236 ; +; 33330.048 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.236 ; +; 33330.048 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.236 ; +; 33330.048 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.236 ; +; 33330.064 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.220 ; +; 33330.064 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.220 ; +; 33330.064 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.220 ; +; 33330.064 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.220 ; +; 33330.064 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.220 ; +; 33330.064 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.220 ; +; 33330.064 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.220 ; +; 33330.064 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.220 ; +; 33330.064 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.220 ; +; 33330.187 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.097 ; +; 33330.187 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.097 ; +; 33330.187 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.097 ; +; 33330.187 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.097 ; +; 33330.187 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.097 ; +; 33330.187 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.097 ; +; 33330.187 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.097 ; +; 33330.187 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.097 ; +; 33330.187 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.097 ; +; 33330.203 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.081 ; +; 33330.203 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.081 ; +; 33330.203 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.081 ; +; 33330.203 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.081 ; +; 33330.203 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.081 ; +; 33330.203 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.081 ; +; 33330.203 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.081 ; +; 33330.203 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.081 ; +; 33330.203 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.081 ; +; 33330.268 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.016 ; +; 33330.268 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.016 ; +; 33330.268 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.016 ; +; 33330.268 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.016 ; +; 33330.268 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.016 ; +; 33330.268 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.016 ; +; 33330.268 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.016 ; +; 33330.268 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.016 ; +; 33330.268 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.016 ; +; 33330.284 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.000 ; +; 33330.284 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.000 ; +; 33330.284 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.000 ; +; 33330.284 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.000 ; +; 33330.284 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.000 ; +; 33330.284 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.000 ; +; 33330.284 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.000 ; +; 33330.284 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.000 ; +; 33330.284 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.036 ; 3.000 ; +; 33330.296 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|key_state.PREDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.041 ; 2.983 ; +; 33330.337 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.948 ; +; 33330.337 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.948 ; +; 33330.337 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.948 ; +; 33330.337 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.948 ; +; 33330.337 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.948 ; +; 33330.337 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.948 ; +; 33330.337 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.948 ; +; 33330.337 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.948 ; +; 33330.337 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33333.333 ; -0.035 ; 2.948 ; ++-----------+------------------------------+-------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -5722,214 +5614,430 @@ No paths to report. +-------+------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.099 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][22] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][22] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.229 ; 0.412 ; -; 0.101 ; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[12] ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0~porta_datain_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.397 ; 0.602 ; -; 0.125 ; receiver:receiver_rx2_inst|varcic:varcic_inst_Q1|out_data[9] ; receiver:receiver_rx2_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0~porta_datain_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.397 ; 0.626 ; -; 0.176 ; transmitter:transmitter_inst|CicInterpM5:in2|x2[8] ; transmitter:transmitter_inst|CicInterpM5:in2|dx2[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.129 ; 0.389 ; -; 0.178 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][10] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][10] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.216 ; 0.478 ; -; 0.179 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][2] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.216 ; 0.479 ; -; 0.181 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][6] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.216 ; 0.481 ; -; 0.181 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][4] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.216 ; 0.481 ; -; 0.184 ; transmitter:transmitter_inst|CicInterpM5:in2|x2[5] ; transmitter:transmitter_inst|CicInterpM5:in2|dx2[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.129 ; 0.397 ; -; 0.184 ; transmitter:transmitter_inst|CicInterpM5:in2|x2[3] ; transmitter:transmitter_inst|CicInterpM5:in2|dx2[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.129 ; 0.397 ; -; 0.185 ; transmitter:transmitter_inst|CicInterpM5:in2|x2[6] ; transmitter:transmitter_inst|CicInterpM5:in2|dx2[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.129 ; 0.398 ; -; 0.189 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Y[13][17] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Y[14][17] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.125 ; 0.398 ; -; 0.191 ; transmitter:transmitter_inst|tx_IQ_data[27] ; transmitter:transmitter_inst|fir_i[11] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.038 ; 0.313 ; -; 0.192 ; transmitter:transmitter_inst|tx_IQ_data[31] ; transmitter:transmitter_inst|fir_i[15] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.038 ; 0.314 ; -; 0.193 ; transmitter:transmitter_inst|tx_IQ_data[23] ; transmitter:transmitter_inst|fir_i[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.038 ; 0.315 ; -; 0.196 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][1] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.216 ; 0.496 ; -; 0.196 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][0] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.216 ; 0.496 ; -; 0.197 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][9] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.216 ; 0.497 ; -; 0.197 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[13][7] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.216 ; 0.497 ; -; 0.197 ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.026 ; 0.307 ; -; 0.198 ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; -; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; -; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; -; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; -; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; -; 0.198 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|parity5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.113 ; 0.395 ; -; 0.198 ; transmitter:transmitter_inst|FirInterp8_1024:fi|req ; transmitter:transmitter_inst|FirInterp8_1024:fi|req ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; -; 0.199 ; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[3].cic_comb_inst|out_data[30] ; receiver:receiver_rx_inst|varcic:varcic_inst_Q1|cic_comb:cic_stages[4].cic_comb_inst|prev_data[30] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.105 ; 0.388 ; -; 0.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.199 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; -; 0.200 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.200 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.066 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.315 ; 0.485 ; +; 0.109 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.288 ; 0.501 ; +; 0.144 ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:F|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.282 ; 0.530 ; +; 0.181 ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx_inst|firX8R8:fir2|fir256:G|firram36:ram|altsyncram:altsyncram_component|altsyncram_pin1:auto_generated|ram_block1a0~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.238 ; 0.523 ; +; 0.181 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~porta_address_reg0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.333 ; 0.618 ; +; 0.192 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.044 ; 0.320 ; +; 0.192 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.041 ; 0.317 ; +; 0.193 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.041 ; 0.318 ; +; 0.194 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.211 ; 0.489 ; +; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.105 ; 0.387 ; +; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.046 ; 0.328 ; +; 0.198 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.041 ; 0.323 ; +; 0.198 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a11 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a10 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.198 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.307 ; +; 0.199 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; +; 0.199 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; +; 0.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; +; 0.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; +; 0.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; +; 0.199 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.307 ; ; 0.200 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.200 ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.200 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.200 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][18] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][18] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.229 ; 0.513 ; -; 0.200 ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.200 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.200 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.200 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.200 ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; transmitter:transmitter_inst|FirInterp8_1024:fi|phase[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.200 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; -; 0.201 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a4 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; -; 0.201 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][15] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][15] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.229 ; 0.514 ; -; 0.205 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; -; 0.205 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; -; 0.205 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[12][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; -; 0.205 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[3][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; -; 0.205 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; -; 0.205 ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[0].cic_comb_inst|out_data[32] ; receiver:receiver_rx2_inst|varcic:varcic_inst_I1|cic_comb:cic_stages[1].cic_comb_inst|prev_data[32] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.101 ; 0.390 ; -; 0.205 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rAddrA ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rAddrB ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; -; 0.205 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[14][0] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[15][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; -; 0.206 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[4] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[4] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.313 ; -; 0.206 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.313 ; -; 0.206 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.313 ; -; 0.206 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.313 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[3] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[5] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[6] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.313 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[9] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][1] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.313 ; -; 0.206 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[1][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[2][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.315 ; -; 0.206 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.042 ; 0.332 ; -; 0.206 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[14][11] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|X[15][11] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.229 ; 0.519 ; -; 0.206 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; -; 0.206 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[10] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.313 ; -; 0.206 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe11a[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|alt_synch_pipe_apl:rs_dgwp|dffpipe_re9:dffpipe10|dffe12a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.313 ; -; 0.207 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.314 ; -; 0.207 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.313 ; +; 0.200 ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.200 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a9 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.200 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.200 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a7 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.200 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a8 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.200 ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; receiver:receiver_rx2_inst|firX8R8:fir2|wstate[1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.200 ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; receiver:receiver_rx2_inst|firX8R8:fir2|waddr[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.200 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a1 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.200 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a2 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.200 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_077:rdptr_g1p|counter3a0 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.023 ; 0.307 ; +; 0.201 ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; transmitter:transmitter_inst|FirInterp8_1024:fi|we ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; +; 0.201 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rWait ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; +; 0.201 ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; transmitter:transmitter_inst|FirInterp8_1024:fi|rstate.rRun ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.022 ; 0.307 ; +; 0.202 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.041 ; 0.327 ; +; 0.203 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|counter4a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|wrptr_g[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.046 ; 0.333 ; +; 0.204 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.313 ; +; 0.204 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.313 ; +; 0.204 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.313 ; +; 0.204 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.313 ; +; 0.204 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[9] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.313 ; +; 0.204 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.313 ; +; 0.204 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.313 ; +; 0.204 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[12][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[13][2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.313 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|ws_dgrp_reg[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[5] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[5] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[7] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[7] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[6] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[9] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; +; 0.205 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe9a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[8] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[8] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[6] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[6] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; +; 0.205 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[9] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[9] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe10a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe11a[0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; +; 0.205 ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[4][0] ; receiver:receiver_rx2_inst|cordic:cordic_inst|Z[5][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; +; 0.205 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|sub_parity6a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_qkc:wrptr_g1p|parity5 ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[0][1] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.313 ; +; 0.205 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[1][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[2][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[3][0] ; receiver:receiver_rx_inst|cordic:cordic_inst|Z[4][0] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.205 ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[7][1] ; transmitter:transmitter_inst|cpl_cordic:cordic_inst|Z[8][1] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.314 ; +; 0.206 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe12a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe13a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; +; 0.206 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; +; 0.206 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[3] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe16a[3] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.024 ; 0.314 ; +; 0.206 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe14a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|alt_synch_pipe_epl:ws_dgrp|dffpipe_ve9:dffpipe8|dffe15a[2] ; ad9866_clk ; ad9866_clk ; 0.000 ; 0.025 ; 0.315 ; +-------+------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ ++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Fast 1200mV 0C Model Hold: 'spi_ce1' ; ++-------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.120 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.292 ; 0.516 ; +; 0.162 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.370 ; 0.636 ; +; 0.168 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.370 ; 0.642 ; +; 0.176 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.060 ; 0.320 ; +; 0.177 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.060 ; 0.321 ; +; 0.194 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.307 ; +; 0.194 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.307 ; +; 0.194 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.307 ; +; 0.194 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.307 ; +; 0.194 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.307 ; +; 0.195 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.307 ; +; 0.197 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.026 ; 0.307 ; +; 0.197 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.026 ; 0.307 ; +; 0.197 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.026 ; 0.307 ; +; 0.197 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.026 ; 0.307 ; +; 0.203 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.315 ; +; 0.253 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.060 ; 0.397 ; +; 0.260 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.060 ; 0.404 ; +; 0.261 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.373 ; +; 0.280 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.392 ; +; 0.283 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.395 ; +; 0.289 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.060 ; 0.433 ; +; 0.295 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.370 ; 0.769 ; +; 0.301 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.234 ; 0.639 ; +; 0.304 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.416 ; +; 0.308 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.004 ; 0.396 ; +; 0.313 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.426 ; +; 0.315 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.427 ; +; 0.320 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.234 ; 0.658 ; +; 0.326 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.026 ; 0.436 ; +; 0.331 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.026 ; 0.441 ; +; 0.338 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.060 ; 0.482 ; +; 0.354 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.467 ; +; 0.376 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.167 ; 0.647 ; +; 0.378 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.004 ; 0.466 ; +; 0.385 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.122 ; 0.611 ; +; 0.390 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.503 ; +; 0.392 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.087 ; 0.563 ; +; 0.394 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.087 ; 0.565 ; +; 0.400 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.292 ; 0.796 ; +; 0.411 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.223 ; 0.718 ; +; 0.417 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.370 ; 0.891 ; +; 0.458 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.064 ; 0.626 ; +; 0.460 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.060 ; 0.604 ; +; 0.465 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.089 ; 0.658 ; +; 0.467 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.234 ; 0.805 ; +; 0.469 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.200 ; 0.773 ; +; 0.499 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.612 ; +; 0.531 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.644 ; +; 0.541 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.010 ; 0.635 ; +; 0.552 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.292 ; 0.948 ; +; 0.563 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.097 ; 0.550 ; +; 0.565 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.196 ; 0.845 ; +; 0.578 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.089 ; 0.771 ; +; 0.589 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.234 ; 0.927 ; +; 0.595 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.196 ; 0.875 ; +; 0.631 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.160 ; 0.555 ; +; 0.633 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.089 ; 0.826 ; +; 0.651 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.031 ; 0.786 ; +; 0.656 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.769 ; +; 0.664 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.167 ; 0.935 ; +; 0.669 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.031 ; 0.804 ; +; 0.674 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.292 ; 1.070 ; +; 0.696 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.031 ; 0.831 ; +; 0.699 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.167 ; 0.970 ; +; 0.707 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.087 ; 0.878 ; +; 0.720 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.136 ; 0.668 ; +; 0.745 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.136 ; 0.693 ; +; 0.763 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.167 ; 1.034 ; +; 0.764 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.089 ; 0.957 ; +; 0.809 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.251 ; 1.144 ; +; 0.821 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.031 ; 0.956 ; +; 0.830 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.087 ; 1.001 ; +; 0.841 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.251 ; 1.176 ; +; 0.846 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.185 ; 0.745 ; +; 0.872 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.136 ; 0.820 ; +; 0.885 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.265 ; 1.254 ; +; 0.897 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.193 ; 0.788 ; +; 0.901 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.165 ; 0.820 ; +; 0.906 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.165 ; 0.825 ; +; 0.922 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.224 ; 1.230 ; +; 0.923 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.251 ; 1.258 ; +; 0.943 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.185 ; 0.842 ; +; 0.946 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.224 ; 1.254 ; +; 0.964 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.224 ; 1.272 ; +; 0.976 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.207 ; 1.287 ; +; 0.988 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.165 ; 0.907 ; +; 0.997 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.224 ; 1.305 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[46] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[45] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[33] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[47] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[42] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[38] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[39] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[41] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[35] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[36] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[37] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; +; 1.013 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|q_b[43] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.066 ; 1.169 ; ++-------+-----------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ + + ++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Fast 1200mV 0C Model Hold: 'spi_ce0' ; ++-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.146 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.084 ; 0.314 ; +; 0.186 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.316 ; +; 0.191 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.050 ; 0.325 ; +; 0.191 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.050 ; 0.325 ; +; 0.191 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.321 ; +; 0.192 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.050 ; 0.326 ; +; 0.192 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.031 ; 0.307 ; +; 0.192 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.031 ; 0.307 ; +; 0.192 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.031 ; 0.307 ; +; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; +; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; +; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; +; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; +; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; +; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; +; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; +; 0.195 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.307 ; +; 0.196 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; +; 0.196 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; +; 0.196 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; +; 0.196 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; +; 0.196 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; +; 0.196 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; +; 0.196 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.307 ; +; 0.197 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.307 ; +; 0.197 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.307 ; +; 0.197 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.307 ; +; 0.197 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.307 ; +; 0.200 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.330 ; +; 0.203 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.314 ; +; 0.216 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.327 ; +; 0.216 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.033 ; 0.333 ; +; 0.221 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.332 ; +; 0.224 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.196 ; 0.524 ; +; 0.225 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.187 ; 0.516 ; +; 0.225 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[11] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[11] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.084 ; 0.393 ; +; 0.229 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.187 ; 0.520 ; +; 0.230 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.011 ; 0.325 ; +; 0.231 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.084 ; 0.399 ; +; 0.232 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[6] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.187 ; 0.523 ; +; 0.233 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.084 ; 0.401 ; +; 0.235 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.187 ; 0.526 ; +; 0.239 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a16~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.190 ; 0.533 ; +; 0.249 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.379 ; +; 0.252 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.150 ; 0.506 ; +; 0.261 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.372 ; +; 0.262 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[10] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.392 ; +; 0.263 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.052 ; 0.399 ; +; 0.265 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.052 ; 0.401 ; +; 0.266 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[5] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[5] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.050 ; 0.400 ; +; 0.268 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.268 ; 0.640 ; +; 0.268 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.128 ; 0.480 ; +; 0.268 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.033 ; 0.385 ; +; 0.273 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.268 ; 0.645 ; +; 0.274 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.385 ; +; 0.278 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.389 ; +; 0.279 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.390 ; +; 0.283 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.394 ; +; 0.284 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[9] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a20~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.145 ; 0.533 ; +; 0.285 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[7] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.033 ; 0.402 ; +; 0.288 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.399 ; +; 0.290 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.386 ; +; 0.292 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.403 ; +; 0.292 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.403 ; +; 0.292 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.268 ; 0.664 ; +; 0.293 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.127 ; 0.524 ; +; 0.297 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.052 ; 0.433 ; +; 0.299 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 0.438 ; +; 0.300 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.046 ; 0.430 ; +; 0.303 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.414 ; +; 0.304 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.400 ; +; 0.307 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[0] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.127 ; 0.538 ; +; 0.309 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a1 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 0.448 ; +; 0.314 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.052 ; 0.450 ; +; 0.316 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.412 ; +; 0.317 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.033 ; 0.434 ; +; 0.319 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.430 ; +; 0.324 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.435 ; +; 0.324 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.212 ; 0.640 ; +; 0.327 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.437 ; +; 0.327 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[1] ; spi_ce0 ; spi_ce0 ; 0.000 ; -0.015 ; 0.396 ; +; 0.329 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a6 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.441 ; +; 0.331 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[3] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|delayed_wrptr_g[3] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.055 ; 0.470 ; +; 0.332 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.444 ; +; 0.335 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.447 ; +; 0.336 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a11 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.031 ; 0.451 ; +; 0.336 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[2] ; spi_ce0 ; spi_ce0 ; 0.000 ; -0.015 ; 0.405 ; +; 0.337 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.447 ; +; 0.338 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.028 ; 0.450 ; +; 0.339 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.026 ; 0.449 ; +; 0.341 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a3 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.437 ; +; 0.342 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a9 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a10 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.031 ; 0.457 ; +; 0.351 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.027 ; 0.462 ; +; 0.352 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a2 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[0] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.448 ; +; 0.365 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|sub_parity8a[2] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|parity7 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.148 ; 0.597 ; +; 0.366 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|a_graycounter_skc:wrptr_g1p|counter6a4 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[4] ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.012 ; 0.462 ; +; 0.366 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[1] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a24~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.111 ; 0.581 ; +; 0.369 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce0 ; spi_ce0 ; 0.000 ; -0.134 ; 0.319 ; +; 0.370 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx1_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce0 ; spi_ce0 ; 0.000 ; -0.134 ; 0.320 ; +; 0.372 ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|wrptr_g[8] ; txFIFO:txFIFO_inst|dcfifo:dcfifo_component|dcfifo_ngk1:auto_generated|altsyncram_v171:fifo_ram|ram_block9a28~porta_address_reg0 ; spi_ce0 ; spi_ce0 ; 0.000 ; 0.207 ; 0.683 ; ++-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ + + +----------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx_inst|done' ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ -; 0.101 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.521 ; -; 0.144 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.566 ; 0.824 ; -; 0.172 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.560 ; 0.846 ; -; 0.179 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.553 ; 0.846 ; -; 0.189 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.557 ; 0.860 ; -; 0.204 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.560 ; 0.878 ; -; 0.205 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.550 ; 0.869 ; -; 0.207 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.560 ; 0.881 ; -; 0.209 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.550 ; 0.873 ; -; 0.214 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.557 ; 0.885 ; -; 0.224 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.641 ; -; 0.225 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.560 ; 0.899 ; -; 0.233 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.653 ; -; 0.234 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.651 ; -; 0.235 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.550 ; 0.899 ; -; 0.236 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.653 ; -; 0.240 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.657 ; -; 0.242 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.659 ; -; 0.244 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.671 ; -; 0.244 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.664 ; -; 0.244 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.661 ; -; 0.244 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.661 ; -; 0.245 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.672 ; -; 0.245 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.662 ; -; 0.247 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.674 ; -; 0.247 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.664 ; -; 0.248 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.665 ; -; 0.250 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.670 ; -; 0.250 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.677 ; -; 0.250 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.667 ; -; 0.251 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.678 ; -; 0.251 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.678 ; -; 0.251 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.678 ; -; 0.252 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.672 ; -; 0.254 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.674 ; -; 0.254 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.681 ; -; 0.255 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.682 ; -; 0.255 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.682 ; -; 0.258 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.675 ; -; 0.260 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.677 ; -; 0.261 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.681 ; -; 0.261 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.681 ; -; 0.261 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.688 ; -; 0.263 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.690 ; -; 0.263 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.553 ; 0.930 ; -; 0.264 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.681 ; -; 0.265 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.692 ; -; 0.267 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.684 ; -; 0.268 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.532 ; 0.914 ; -; 0.270 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.697 ; -; 0.271 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.698 ; -; 0.271 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.688 ; -; 0.271 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.698 ; -; 0.272 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.527 ; 0.706 ; -; 0.273 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.693 ; -; 0.282 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.553 ; 0.949 ; -; 0.286 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.492 ; 0.685 ; -; 0.288 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.560 ; 0.962 ; -; 0.291 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.492 ; 0.690 ; -; 0.296 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.553 ; 0.963 ; -; 0.315 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.552 ; 0.981 ; -; 0.317 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.492 ; 0.716 ; -; 0.319 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.550 ; 0.983 ; -; 0.319 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.560 ; 0.993 ; -; 0.330 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.550 ; 0.994 ; -; 0.335 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.552 ; 1.001 ; -; 0.356 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.531 ; 1.001 ; -; 0.361 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 0.778 ; -; 0.366 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.551 ; 1.031 ; -; 0.368 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.532 ; 1.014 ; -; 0.370 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.520 ; 0.797 ; -; 0.376 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.552 ; 1.042 ; -; 0.377 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.531 ; 1.022 ; -; 0.383 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.526 ; 0.816 ; -; 0.386 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.806 ; -; 0.402 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.566 ; 1.082 ; -; 0.407 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.827 ; -; 0.408 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.526 ; 0.841 ; -; 0.409 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.534 ; 0.850 ; -; 0.411 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.831 ; -; 0.419 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.839 ; -; 0.425 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.526 ; 0.858 ; -; 0.431 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.851 ; -; 0.438 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.858 ; -; 0.445 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.492 ; 0.844 ; -; 0.447 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.526 ; 0.880 ; -; 0.467 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.560 ; 1.141 ; -; 0.494 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.560 ; 1.168 ; -; 0.502 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.566 ; 1.182 ; -; 0.504 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.566 ; 1.184 ; -; 0.505 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.925 ; -; 0.516 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.526 ; 0.949 ; -; 0.530 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.553 ; 1.197 ; -; 0.531 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.550 ; 1.195 ; -; 0.535 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.526 ; 0.968 ; -; 0.544 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.513 ; 0.964 ; -; 0.548 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.560 ; 1.222 ; -; 0.580 ; spi_slave:spi_slave_rx_inst|rdata[36] ; rx_gain[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.072 ; 0.622 ; -; 0.630 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.510 ; 1.047 ; -; 0.646 ; spi_slave:spi_slave_rx_inst|rdata[32] ; tx_gain[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.212 ; 0.548 ; +; 0.173 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.426 ; 0.506 ; +; 0.177 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.426 ; 0.510 ; +; 0.178 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.426 ; 0.511 ; +; 0.186 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.426 ; 0.519 ; +; 0.186 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.426 ; 0.519 ; +; 0.272 ; spi_slave:spi_slave_rx_inst|rdata[41] ; rx1_speed[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.465 ; 0.851 ; +; 0.274 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.462 ; 0.850 ; +; 0.283 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.461 ; 0.858 ; +; 0.309 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.458 ; 0.881 ; +; 0.313 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.461 ; 0.888 ; +; 0.316 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.462 ; 0.892 ; +; 0.319 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.351 ; 0.784 ; +; 0.322 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.653 ; +; 0.326 ; spi_slave:spi_slave_rx_inst|rdata[11] ; rx1_freq[11] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.657 ; +; 0.331 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.423 ; 0.661 ; +; 0.331 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.660 ; +; 0.332 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.423 ; 0.662 ; +; 0.332 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.663 ; +; 0.332 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.663 ; +; 0.333 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.458 ; 0.905 ; +; 0.334 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.464 ; 0.912 ; +; 0.335 ; spi_slave:spi_slave_rx_inst|rdata[14] ; rx1_freq[14]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.462 ; 0.911 ; +; 0.335 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.421 ; 0.663 ; +; 0.335 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.664 ; +; 0.338 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.667 ; +; 0.339 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.462 ; 0.915 ; +; 0.340 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.423 ; 0.670 ; +; 0.342 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.464 ; 0.920 ; +; 0.342 ; spi_slave:spi_slave_rx_inst|rdata[8] ; rx1_freq[8] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.421 ; 0.670 ; +; 0.343 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.423 ; 0.673 ; +; 0.343 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.672 ; +; 0.345 ; spi_slave:spi_slave_rx_inst|rdata[7] ; rx1_freq[7] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.421 ; 0.673 ; +; 0.346 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.421 ; 0.674 ; +; 0.347 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.423 ; 0.677 ; +; 0.348 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.419 ; 0.674 ; +; 0.348 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.677 ; +; 0.349 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.419 ; 0.675 ; +; 0.349 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.421 ; 0.677 ; +; 0.350 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.421 ; 0.678 ; +; 0.350 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.419 ; 0.676 ; +; 0.350 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.679 ; +; 0.351 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.680 ; +; 0.352 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.683 ; +; 0.355 ; spi_slave:spi_slave_rx_inst|rdata[23] ; rx1_freq[23] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.419 ; 0.681 ; +; 0.356 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.423 ; 0.686 ; +; 0.357 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.686 ; +; 0.359 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.421 ; 0.687 ; +; 0.360 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.691 ; +; 0.362 ; spi_slave:spi_slave_rx_inst|rdata[30] ; rx1_freq[30] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.419 ; 0.688 ; +; 0.367 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.698 ; +; 0.373 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.704 ; +; 0.383 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.356 ; 0.853 ; +; 0.391 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.722 ; +; 0.393 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.461 ; 0.968 ; +; 0.416 ; spi_slave:spi_slave_rx_inst|rdata[40] ; rx1_speed[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.464 ; 0.994 ; +; 0.420 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.460 ; 0.994 ; +; 0.420 ; spi_slave:spi_slave_rx_inst|rdata[9] ; rx1_freq[9]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.458 ; 0.992 ; +; 0.424 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.317 ; 0.648 ; +; 0.426 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.359 ; 0.899 ; +; 0.431 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.317 ; 0.655 ; +; 0.433 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.461 ; 1.008 ; +; 0.433 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.455 ; 1.002 ; +; 0.437 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.463 ; 1.014 ; +; 0.441 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.314 ; 0.662 ; +; 0.447 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.426 ; 0.780 ; +; 0.449 ; spi_slave:spi_slave_rx_inst|rdata[18] ; rx1_freq[18]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.462 ; 1.025 ; +; 0.450 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.314 ; 0.671 ; +; 0.451 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.314 ; 0.672 ; +; 0.452 ; spi_slave:spi_slave_rx_inst|rdata[28] ; rx1_freq[28] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.314 ; 0.673 ; +; 0.458 ; spi_slave:spi_slave_rx_inst|rdata[25] ; rx1_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.317 ; 0.682 ; +; 0.471 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.314 ; 0.692 ; +; 0.472 ; spi_slave:spi_slave_rx_inst|rdata[10] ; rx1_freq[10]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.459 ; 1.045 ; +; 0.472 ; spi_slave:spi_slave_rx_inst|rdata[19] ; rx1_freq[19] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.419 ; 0.798 ; +; 0.477 ; spi_slave:spi_slave_rx_inst|rdata[20] ; rx1_freq[20]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.466 ; 1.057 ; +; 0.481 ; spi_slave:spi_slave_rx_inst|rdata[27] ; rx1_freq[27]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.359 ; 0.954 ; +; 0.489 ; spi_slave:spi_slave_rx_inst|rdata[6] ; rx1_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.423 ; 0.819 ; +; 0.489 ; spi_slave:spi_slave_rx_inst|rdata[29] ; rx1_freq[29] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.419 ; 0.815 ; +; 0.494 ; spi_slave:spi_slave_rx_inst|rdata[13] ; rx1_freq[13] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.825 ; +; 0.499 ; spi_slave:spi_slave_rx_inst|rdata[1] ; rx1_freq[1] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.828 ; +; 0.506 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.357 ; 0.977 ; +; 0.510 ; spi_slave:spi_slave_rx_inst|rdata[2] ; rx1_freq[2] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.839 ; +; 0.511 ; spi_slave:spi_slave_rx_inst|rdata[3] ; rx1_freq[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.840 ; +; 0.512 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.468 ; 1.094 ; +; 0.517 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.464 ; 1.095 ; +; 0.523 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.417 ; 0.847 ; +; 0.525 ; spi_slave:spi_slave_rx_inst|rdata[4] ; rx1_freq[4] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 0.854 ; +; 0.526 ; spi_slave:spi_slave_rx_inst|rdata[17] ; rx1_freq[17]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.464 ; 1.104 ; +; 0.541 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.466 ; 1.121 ; +; 0.545 ; spi_slave:spi_slave_rx_inst|rdata[12] ; rx1_freq[12]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.459 ; 1.118 ; +; 0.545 ; spi_slave:spi_slave_rx_inst|rdata[31] ; rx1_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.420 ; 0.872 ; +; 0.554 ; spi_slave:spi_slave_rx_inst|rdata[24] ; rx1_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.317 ; 0.778 ; +; 0.568 ; spi_slave:spi_slave_rx_inst|rdata[26] ; rx1_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.317 ; 0.792 ; +; 0.574 ; spi_slave:spi_slave_rx_inst|rdata[22] ; rx1_freq[22]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.466 ; 1.154 ; +; 0.618 ; spi_slave:spi_slave_rx_inst|rdata[21] ; rx1_freq[21] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.419 ; 0.944 ; +; 0.642 ; spi_slave:spi_slave_rx_inst|rdata[15] ; rx1_freq[15]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.464 ; 1.220 ; +; 0.645 ; spi_slave:spi_slave_rx_inst|rdata[16] ; rx1_freq[16] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.424 ; 0.976 ; +; 0.646 ; spi_slave:spi_slave_rx_inst|rdata[5] ; rx1_freq[5]~_Duplicate_2 ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.467 ; 1.227 ; +; 0.648 ; spi_slave:spi_slave_rx_inst|rdata[35] ; rx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.305 ; 0.457 ; +; 0.725 ; spi_slave:spi_slave_rx_inst|rdata[35] ; tx_gain[3] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; -0.333 ; 0.506 ; +; 0.727 ; spi_slave:spi_slave_rx_inst|rdata[0] ; rx1_freq[0] ; spi_sck ; spi_slave:spi_slave_rx_inst|done ; 0.000 ; 0.422 ; 1.056 ; +-------+---------------------------------------+---------------------------+--------------+----------------------------------+--------------+------------+------------+ @@ -5940,212 +6048,320 @@ No paths to report. +-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ; 0.185 ; profile:profile_CW|hang_PTT ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.307 ; ; 0.185 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_state ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.307 ; -; 0.187 ; profile:profile_CW|enable_hang ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ; -; 0.187 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0011 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ; -; 0.187 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0001 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ; -; 0.187 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ; -; 0.187 ; profile:profile_CW|char_PTT ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ; -; 0.187 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.307 ; -; 0.213 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.333 ; -; 0.227 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.347 ; -; 0.295 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.417 ; -; 0.296 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.418 ; +; 0.188 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0011 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.307 ; +; 0.188 ; profile:profile_CW|enable_hang ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.307 ; +; 0.188 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.307 ; +; 0.188 ; profile:profile_CW|char_PTT ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.307 ; +; 0.188 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0001 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.307 ; +; 0.188 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.307 ; +; 0.195 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.317 ; +; 0.201 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.320 ; +; 0.209 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.328 ; +; 0.275 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.214 ; 0.593 ; +; 0.296 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.215 ; 0.615 ; +; 0.296 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.418 ; +; 0.296 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.418 ; ; 0.296 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.418 ; ; 0.296 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.418 ; ; 0.296 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.418 ; +; 0.296 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.418 ; +; 0.297 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.419 ; ; 0.297 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.419 ; ; 0.297 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.419 ; -; 0.297 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.419 ; +; 0.297 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.417 ; ; 0.297 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.419 ; -; 0.297 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.419 ; -; 0.297 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.419 ; -; 0.298 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.418 ; +; 0.297 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.419 ; +; 0.298 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.417 ; ; 0.298 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.420 ; -; 0.298 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.418 ; -; 0.299 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.418 ; -; 0.299 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.418 ; -; 0.299 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.418 ; -; 0.299 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.419 ; -; 0.299 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.419 ; -; 0.300 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.419 ; -; 0.300 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.419 ; -; 0.300 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.420 ; -; 0.300 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.420 ; -; 0.301 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.420 ; +; 0.298 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.418 ; +; 0.299 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.419 ; +; 0.299 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.418 ; +; 0.299 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.418 ; +; 0.299 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.419 ; +; 0.299 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.419 ; +; 0.300 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.419 ; +; 0.300 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.419 ; +; 0.300 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.420 ; +; 0.300 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.419 ; +; 0.301 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.420 ; ; 0.302 ; profile:profile_CW|hang_timer[17] ; profile:profile_CW|hang_timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.424 ; -; 0.303 ; profile:profile_CW|timer[17] ; profile:profile_CW|timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.423 ; +; 0.303 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.214 ; 0.621 ; +; 0.303 ; profile:profile_CW|hang_timer[8] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.425 ; ; 0.303 ; profile:profile_CW|hang_timer[16] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.425 ; ; 0.304 ; profile:profile_CW|hang_timer[14] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.426 ; -; 0.304 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.426 ; -; 0.305 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.425 ; -; 0.305 ; profile:profile_CW|timer[16] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.425 ; -; 0.306 ; profile:profile_CW|timer[8] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.425 ; -; 0.307 ; profile:profile_CW|timer[1] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.426 ; -; 0.308 ; profile:profile_CW|hang_state ; profile:profile_CW|hang_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.430 ; +; 0.305 ; profile:profile_CW|timer[8] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.425 ; +; 0.305 ; profile:profile_CW|timer[17] ; profile:profile_CW|timer[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.424 ; +; 0.306 ; profile:profile_CW|timer[16] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.425 ; ; 0.309 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.431 ; -; 0.312 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.431 ; -; 0.332 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0100 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.452 ; -; 0.333 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.453 ; -; 0.333 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.453 ; -; 0.338 ; profile:profile_CW|prof_state.0011 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.458 ; -; 0.364 ; profile:profile_CW|hang_timer[8] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.486 ; -; 0.367 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_count[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.487 ; -; 0.372 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.491 ; -; 0.380 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|prof_state.0001 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.500 ; -; 0.381 ; profile:profile_CW|profile_count[0] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.211 ; 0.696 ; -; 0.387 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.218 ; 0.709 ; -; 0.398 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.211 ; 0.713 ; -; 0.424 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|profile_count[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.544 ; -; 0.444 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.566 ; -; 0.445 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.567 ; +; 0.310 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.214 ; 0.628 ; +; 0.311 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.431 ; +; 0.317 ; profile:profile_CW|profile_count[7] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.215 ; 0.636 ; +; 0.322 ; profile:profile_CW|profile_count[1] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.215 ; 0.641 ; +; 0.323 ; profile:profile_CW|profile_count[2] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.214 ; 0.641 ; +; 0.328 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.215 ; 0.647 ; +; 0.329 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.214 ; 0.647 ; +; 0.331 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|char_PTT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.450 ; +; 0.332 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.213 ; 0.649 ; +; 0.335 ; profile:profile_CW|prof_state.0001 ; profile:profile_CW|prof_state.0010 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.454 ; +; 0.338 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.214 ; 0.656 ; +; 0.345 ; profile:profile_CW|prof_state.0000 ; profile:profile_CW|enable_hang ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.464 ; +; 0.366 ; profile:profile_CW|timer[1] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.486 ; +; 0.370 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.489 ; +; 0.386 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.508 ; +; 0.421 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.215 ; 0.740 ; +; 0.430 ; profile:profile_CW|prof_state.0100 ; profile:profile_CW|prof_state.0000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.549 ; ; 0.445 ; profile:profile_CW|hang_timer[5] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.567 ; +; 0.445 ; profile:profile_CW|hang_timer[7] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.567 ; +; 0.445 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.567 ; +; 0.445 ; profile:profile_CW|hang_timer[9] ; profile:profile_CW|hang_timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.567 ; +; 0.446 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.568 ; ; 0.446 ; profile:profile_CW|hang_timer[11] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.568 ; +; 0.446 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.566 ; ; 0.446 ; profile:profile_CW|hang_timer[15] ; profile:profile_CW|hang_timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.568 ; -; 0.446 ; profile:profile_CW|hang_timer[1] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.568 ; -; 0.447 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.567 ; ; 0.447 ; profile:profile_CW|hang_timer[13] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.569 ; -; 0.448 ; profile:profile_CW|timer[7] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.567 ; -; 0.448 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.568 ; -; 0.448 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.567 ; -; 0.449 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.569 ; -; 0.449 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.568 ; -; 0.450 ; profile:profile_CW|profile_count[9] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a0~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.218 ; 0.772 ; -; 0.453 ; profile:profile_CW|hang_timer[3] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.575 ; -; 0.454 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.576 ; +; 0.448 ; profile:profile_CW|timer[5] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.568 ; +; 0.448 ; profile:profile_CW|timer[9] ; profile:profile_CW|timer[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.567 ; +; 0.448 ; profile:profile_CW|timer[3] ; profile:profile_CW|timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.568 ; +; 0.448 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.567 ; +; 0.449 ; profile:profile_CW|timer[11] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.568 ; +; 0.450 ; profile:profile_CW|timer[13] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.569 ; +; 0.451 ; profile:profile_CW|profile_count[6] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.213 ; 0.768 ; +; 0.452 ; profile:profile_CW|profile_count[5] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.213 ; 0.769 ; +; 0.452 ; profile:profile_CW|profile_count[4] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.214 ; 0.770 ; ; 0.454 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.576 ; -; 0.454 ; profile:profile_CW|timer[15] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.574 ; +; 0.454 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.576 ; ; 0.455 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.577 ; -; 0.455 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.577 ; -; 0.455 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.577 ; +; 0.455 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.577 ; ; 0.456 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.578 ; -; 0.456 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.576 ; -; 0.456 ; profile:profile_CW|timer[1] ; profile:profile_CW|timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.575 ; +; 0.456 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.576 ; ; 0.457 ; profile:profile_CW|hang_timer[6] ; profile:profile_CW|hang_timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.579 ; -; 0.457 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.579 ; -; 0.457 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.576 ; -; 0.457 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.577 ; -; 0.458 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.580 ; +; 0.457 ; profile:profile_CW|hang_timer[10] ; profile:profile_CW|hang_timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.579 ; +; 0.457 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.577 ; +; 0.458 ; profile:profile_CW|hang_timer[12] ; profile:profile_CW|hang_timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.580 ; ; 0.458 ; profile:profile_CW|hang_timer[4] ; profile:profile_CW|hang_timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.580 ; -; 0.458 ; profile:profile_CW|hang_timer[2] ; profile:profile_CW|hang_timer[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.580 ; -; 0.458 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.578 ; -; 0.458 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.577 ; +; 0.458 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.577 ; +; 0.458 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.577 ; +; 0.458 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.578 ; +; 0.458 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.578 ; ; 0.459 ; profile:profile_CW|hang_timer[0] ; profile:profile_CW|hang_timer[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.038 ; 0.581 ; -; 0.459 ; profile:profile_CW|timer[12] ; profile:profile_CW|timer[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.579 ; -; 0.459 ; profile:profile_CW|timer[0] ; profile:profile_CW|timer[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.578 ; -; 0.459 ; profile:profile_CW|timer[2] ; profile:profile_CW|timer[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.578 ; -; 0.459 ; profile:profile_CW|profile_count[3] ; profile:profile_CW|profile_count[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.579 ; -; 0.460 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.579 ; -; 0.460 ; profile:profile_CW|timer[10] ; profile:profile_CW|timer[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.580 ; -; 0.461 ; profile:profile_CW|timer[4] ; profile:profile_CW|timer[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.035 ; 0.580 ; -; 0.461 ; profile:profile_CW|timer[14] ; profile:profile_CW|timer[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.581 ; +; 0.459 ; profile:profile_CW|timer[6] ; profile:profile_CW|timer[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.036 ; 0.579 ; +; 0.459 ; profile:profile_CW|profile_count[8] ; profile:profile_CW|profile_ROM:profile_ROM_inst|altsyncram:altsyncram_component|altsyncram_6f91:auto_generated|ram_block1a7~porta_address_reg0 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.214 ; 0.777 ; +-------+-------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ++--------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Fast 1200mV 0C Model Hold: 'spi_sck' ; ++-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ +; 0.185 ; spi_slave:spi_slave_rx2_inst|rreg[28] ; spi_slave:spi_slave_rx2_inst|rdata[29] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.316 ; +; 0.185 ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_slave:spi_slave_rx_inst|rdata[35] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.316 ; +; 0.186 ; spi_slave:spi_slave_rx2_inst|rreg[46] ; spi_slave:spi_slave_rx2_inst|rdata[47] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.313 ; +; 0.189 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_sck ; spi_sck ; 0.000 ; 0.045 ; 0.318 ; +; 0.189 ; spi_slave:spi_slave_rx_inst|rreg[2] ; spi_slave:spi_slave_rx_inst|rdata[3] ; spi_sck ; spi_sck ; 0.000 ; 0.045 ; 0.318 ; +; 0.189 ; spi_slave:spi_slave_rx_inst|rreg[33] ; spi_slave:spi_slave_rx_inst|rdata[34] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.320 ; +; 0.191 ; spi_slave:spi_slave_rx_inst|rreg[1] ; spi_slave:spi_slave_rx_inst|rdata[2] ; spi_sck ; spi_sck ; 0.000 ; 0.045 ; 0.320 ; +; 0.191 ; spi_slave:spi_slave_rx2_inst|rreg[40] ; spi_slave:spi_slave_rx2_inst|rdata[41] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.318 ; +; 0.191 ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_slave:spi_slave_rx2_inst|rdata[43] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.318 ; +; 0.191 ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.318 ; +; 0.192 ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_slave:spi_slave_rx2_inst|rdata[44] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.319 ; +; 0.193 ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.320 ; +; 0.193 ; spi_slave:spi_slave_rx2_inst|rreg[41] ; spi_slave:spi_slave_rx2_inst|rdata[42] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.320 ; +; 0.201 ; spi_slave:spi_slave_rx_inst|treg[12] ; spi_slave:spi_slave_rx_inst|treg[13] ; spi_sck ; spi_sck ; 0.000 ; 0.028 ; 0.313 ; +; 0.202 ; spi_slave:spi_slave_rx_inst|treg[20] ; spi_slave:spi_slave_rx_inst|treg[21] ; spi_sck ; spi_sck ; 0.000 ; 0.028 ; 0.314 ; +; 0.202 ; spi_slave:spi_slave_rx_inst|treg[29] ; spi_slave:spi_slave_rx_inst|treg[30] ; spi_sck ; spi_sck ; 0.000 ; 0.028 ; 0.314 ; +; 0.203 ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_slave:spi_slave_rx_inst|treg[10] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.314 ; +; 0.203 ; spi_slave:spi_slave_rx2_inst|treg[41] ; spi_slave:spi_slave_rx2_inst|treg[42] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.314 ; +; 0.204 ; spi_slave:spi_slave_rx_inst|treg[8] ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.315 ; +; 0.204 ; spi_slave:spi_slave_rx_inst|treg[24] ; spi_slave:spi_slave_rx_inst|treg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.028 ; 0.316 ; +; 0.204 ; spi_slave:spi_slave_rx_inst|treg[4] ; spi_slave:spi_slave_rx_inst|treg[5] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.315 ; +; 0.204 ; spi_slave:spi_slave_rx_inst|treg[3] ; spi_slave:spi_slave_rx_inst|treg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.315 ; +; 0.204 ; spi_slave:spi_slave_rx_inst|treg[2] ; spi_slave:spi_slave_rx_inst|treg[3] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.315 ; +; 0.204 ; spi_slave:spi_slave_rx2_inst|treg[31] ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.315 ; +; 0.204 ; spi_slave:spi_slave_rx2_inst|treg[3] ; spi_slave:spi_slave_rx2_inst|treg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.026 ; 0.314 ; +; 0.204 ; spi_slave:spi_slave_rx2_inst|treg[5] ; spi_slave:spi_slave_rx2_inst|treg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.026 ; 0.314 ; +; 0.206 ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_slave:spi_slave_rx_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.317 ; +; 0.206 ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_slave:spi_slave_rx_inst|rdata[26] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.317 ; +; 0.207 ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_slave:spi_slave_rx_inst|rdata[28] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.318 ; +; 0.208 ; spi_slave:spi_slave_rx2_inst|rreg[14] ; spi_slave:spi_slave_rx2_inst|rdata[15] ; spi_sck ; spi_sck ; 0.000 ; 0.034 ; 0.326 ; +; 0.208 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rdata[24] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.319 ; +; 0.209 ; spi_slave:spi_slave_rx2_inst|rreg[36] ; spi_slave:spi_slave_rx2_inst|rreg[37] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.317 ; +; 0.209 ; spi_slave:spi_slave_rx2_inst|rreg[35] ; spi_slave:spi_slave_rx2_inst|rreg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.317 ; +; 0.209 ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_slave:spi_slave_rx2_inst|rreg[46] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.317 ; +; 0.209 ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_slave:spi_slave_rx_inst|rreg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.317 ; +; 0.209 ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_slave:spi_slave_rx_inst|rdata[27] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.320 ; +; 0.210 ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; +; 0.210 ; spi_slave:spi_slave_rx2_inst|rreg[37] ; spi_slave:spi_slave_rx2_inst|rreg[38] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; +; 0.210 ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_slave:spi_slave_rx2_inst|rreg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; +; 0.210 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; +; 0.210 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; +; 0.210 ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; +; 0.210 ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_slave:spi_slave_rx2_inst|rreg[43] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; +; 0.210 ; spi_slave:spi_slave_rx2_inst|rreg[41] ; spi_slave:spi_slave_rx2_inst|rreg[42] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; +; 0.210 ; spi_slave:spi_slave_rx2_inst|rreg[40] ; spi_slave:spi_slave_rx2_inst|rreg[41] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[28] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_slave:spi_slave_rx_inst|rreg[2] ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.319 ; +; 0.211 ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.319 ; +; 0.211 ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.319 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[25] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[24] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[15] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[17] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_slave:spi_slave_rx_inst|rreg[33] ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.319 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[27] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[16] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[26] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_slave:spi_slave_rx2_inst|rreg[28] ; spi_slave:spi_slave_rx2_inst|rreg[29] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.320 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[29] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_slave:spi_slave_rx_inst|rreg[1] ; spi_slave:spi_slave_rx_inst|rreg[2] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.319 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[18] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[19] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[20] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[21] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[22] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.211 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[23] ; spi_ce1 ; spi_sck ; 0.000 ; 1.971 ; 2.296 ; +; 0.212 ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.320 ; +; 0.212 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[47] ; spi_ce1 ; spi_sck ; 0.000 ; 2.039 ; 2.365 ; +; 0.212 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[46] ; spi_ce1 ; spi_sck ; 0.000 ; 2.039 ; 2.365 ; +; 0.212 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.320 ; +; 0.212 ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.320 ; +; 0.216 ; spi_slave:spi_slave_rx2_inst|rreg[29] ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.325 ; +; 0.216 ; spi_slave:spi_slave_rx2_inst|rreg[27] ; spi_slave:spi_slave_rx2_inst|rreg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.325 ; +; 0.216 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.325 ; +; 0.216 ; spi_slave:spi_slave_rx2_inst|rreg[1] ; spi_slave:spi_slave_rx2_inst|rreg[2] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.325 ; +; 0.217 ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.325 ; +; 0.217 ; spi_slave:spi_slave_rx2_inst|rreg[23] ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.326 ; +; 0.217 ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_slave:spi_slave_rx_inst|rreg[16] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.325 ; +; 0.217 ; spi_slave:spi_slave_rx_inst|rreg[14] ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.325 ; +; 0.218 ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.327 ; +; 0.218 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.327 ; +; 0.218 ; spi_slave:spi_slave_rx_inst|rreg[21] ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.326 ; +; 0.219 ; spi_slave:spi_slave_rx_inst|rreg[39] ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.327 ; +; 0.220 ; spi_slave:spi_slave_rx_inst|rreg[10] ; spi_slave:spi_slave_rx_inst|rreg[11] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.327 ; +; 0.220 ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_slave:spi_slave_rx2_inst|rreg[32] ; spi_sck ; spi_sck ; 0.000 ; 0.082 ; 0.386 ; +; 0.220 ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.328 ; +; 0.220 ; spi_slave:spi_slave_rx_inst|rreg[18] ; spi_slave:spi_slave_rx_inst|rreg[19] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.328 ; +; 0.229 ; spi_slave:spi_slave_rx2_inst|rreg[37] ; spi_slave:spi_slave_rx2_inst|rdata[38] ; spi_sck ; spi_sck ; 0.000 ; 0.004 ; 0.317 ; +; 0.230 ; spi_slave:spi_slave_rx2_inst|rreg[35] ; spi_slave:spi_slave_rx2_inst|rdata[36] ; spi_sck ; spi_sck ; 0.000 ; 0.004 ; 0.318 ; +; 0.230 ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_sck ; spi_sck ; 0.000 ; 0.004 ; 0.318 ; +; 0.230 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_sck ; spi_sck ; 0.000 ; 0.004 ; 0.318 ; +; 0.231 ; spi_slave:spi_slave_rx2_inst|rreg[36] ; spi_slave:spi_slave_rx2_inst|rdata[37] ; spi_sck ; spi_sck ; 0.000 ; 0.004 ; 0.319 ; +; 0.245 ; spi_slave:spi_slave_rx2_inst|rreg[3] ; spi_slave:spi_slave_rx2_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.066 ; 0.395 ; +; 0.248 ; spi_slave:spi_slave_rx2_inst|rreg[21] ; spi_slave:spi_slave_rx2_inst|rreg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.072 ; 0.404 ; +; 0.249 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_ce1 ; spi_sck ; 0.000 ; 2.007 ; 2.370 ; +; 0.249 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[38] ; spi_ce1 ; spi_sck ; 0.000 ; 2.007 ; 2.370 ; +; 0.249 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[42] ; spi_ce1 ; spi_sck ; 0.000 ; 2.007 ; 2.370 ; +; 0.249 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[31] ; spi_ce1 ; spi_sck ; 0.000 ; 2.007 ; 2.370 ; +; 0.249 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_ce1 ; spi_sck ; 0.000 ; 2.007 ; 2.370 ; +; 0.249 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_ce1 ; spi_sck ; 0.000 ; 2.007 ; 2.370 ; ++-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ + + +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' ; +-------+----------------------------------------+----------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------+----------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ +; 0.187 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.307 ; +; 0.187 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.307 ; ; 0.187 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.307 ; ; 0.187 ; iambic:iambic_inst|dot_memory ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.307 ; -; 0.188 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.307 ; -; 0.188 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.307 ; -; 0.188 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.307 ; ; 0.188 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|key_state.SENDDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.307 ; -; 0.285 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.PREDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.404 ; -; 0.288 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.407 ; -; 0.299 ; iambic:iambic_inst|key_state.PREDOT ; iambic:iambic_inst|key_state.SENDDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.418 ; -; 0.303 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.422 ; +; 0.188 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.307 ; +; 0.209 ; iambic:iambic_inst|dot_memory ; iambic:iambic_inst|key_state.DASHHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.329 ; +; 0.267 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.PREDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.386 ; +; 0.279 ; iambic:iambic_inst|key_state.DOTHELD ; iambic:iambic_inst|key_state.PREDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.399 ; +; 0.284 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|key_state.DOTDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.403 ; +; 0.286 ; iambic:iambic_inst|key_state.PREDOT ; iambic:iambic_inst|key_state.SENDDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.406 ; +; 0.303 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.423 ; ; 0.304 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.423 ; -; 0.304 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.423 ; -; 0.304 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.423 ; -; 0.305 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.424 ; -; 0.305 ; iambic:iambic_inst|delay[17] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.424 ; -; 0.305 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.424 ; -; 0.306 ; iambic:iambic_inst|key_state.PREDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.425 ; +; 0.304 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.424 ; +; 0.305 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.425 ; +; 0.305 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.425 ; ; 0.306 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.425 ; -; 0.306 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.425 ; -; 0.306 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.425 ; -; 0.306 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.425 ; -; 0.307 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.426 ; -; 0.308 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.427 ; -; 0.310 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.429 ; -; 0.310 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.429 ; +; 0.309 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.429 ; +; 0.309 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.428 ; +; 0.309 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.429 ; +; 0.310 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.430 ; +; 0.310 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.430 ; +; 0.311 ; iambic:iambic_inst|delay[17] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.430 ; +; 0.311 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.430 ; ; 0.311 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.430 ; +; 0.311 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.430 ; +; 0.312 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.431 ; ; 0.312 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.431 ; -; 0.319 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.438 ; -; 0.341 ; iambic:iambic_inst|key_state.DOTHELD ; iambic:iambic_inst|key_state.PREDOT ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.460 ; -; 0.355 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.474 ; -; 0.364 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.00000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.484 ; -; 0.414 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.534 ; -; 0.424 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.543 ; -; 0.453 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.572 ; +; 0.316 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.436 ; +; 0.322 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[0] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.442 ; +; 0.336 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|key_state.DASHHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.456 ; +; 0.366 ; iambic:iambic_inst|key_state.DASHDELAY ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.486 ; +; 0.370 ; iambic:iambic_inst|key_state.PREDASH ; iambic:iambic_inst|key_state.SENDDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.490 ; +; 0.421 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.540 ; +; 0.423 ; iambic:iambic_inst|dash_memory ; iambic:iambic_inst|key_state.DOTHELD ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.542 ; +; 0.444 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.PREDASH ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.563 ; +; 0.452 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.572 ; ; 0.453 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.572 ; -; 0.454 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.573 ; -; 0.455 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.574 ; -; 0.455 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.574 ; -; 0.456 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.575 ; -; 0.457 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.576 ; -; 0.459 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.578 ; -; 0.461 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.580 ; -; 0.462 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.581 ; -; 0.463 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.582 ; -; 0.464 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.583 ; +; 0.458 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.578 ; +; 0.458 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.578 ; +; 0.458 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.577 ; +; 0.459 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.579 ; +; 0.460 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.579 ; +; 0.461 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.580 ; +; 0.462 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.582 ; +; 0.463 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.583 ; ; 0.464 ; iambic:iambic_inst|delay[16] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.583 ; -; 0.465 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.584 ; -; 0.465 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.583 ; -; 0.466 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.585 ; -; 0.466 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.585 ; -; 0.468 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.586 ; -; 0.468 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.587 ; -; 0.469 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.588 ; +; 0.464 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.583 ; +; 0.465 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.585 ; +; 0.466 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.586 ; +; 0.467 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.586 ; +; 0.468 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.588 ; +; 0.469 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.589 ; ; 0.469 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.588 ; +; 0.469 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.588 ; ; 0.470 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.589 ; -; 0.471 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.590 ; +; 0.471 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.591 ; ; 0.472 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.591 ; +; 0.472 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[2] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.592 ; +; 0.472 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.591 ; ; 0.473 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.592 ; -; 0.475 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|key_state.DASHDELAY ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.594 ; -; 0.516 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.635 ; +; 0.515 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.635 ; ; 0.516 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.635 ; -; 0.517 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.636 ; -; 0.518 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.637 ; -; 0.518 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.637 ; -; 0.519 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.638 ; +; 0.518 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.638 ; ; 0.519 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.638 ; -; 0.519 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.638 ; -; 0.520 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.639 ; -; 0.520 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.639 ; -; 0.521 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.640 ; -; 0.522 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.641 ; -; 0.523 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.642 ; -; 0.523 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.641 ; -; 0.526 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.644 ; -; 0.527 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.646 ; -; 0.528 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.647 ; -; 0.529 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.648 ; -; 0.530 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.649 ; -; 0.531 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.650 ; -; 0.531 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.649 ; -; 0.532 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.651 ; -; 0.532 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.651 ; -; 0.534 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.652 ; -; 0.535 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.654 ; +; 0.521 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.641 ; +; 0.521 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.640 ; +; 0.522 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.642 ; +; 0.522 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.641 ; +; 0.523 ; iambic:iambic_inst|delay[15] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.642 ; +; 0.524 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.644 ; +; 0.524 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.643 ; +; 0.524 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.643 ; +; 0.525 ; iambic:iambic_inst|delay[7] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.644 ; +; 0.525 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.645 ; +; 0.527 ; iambic:iambic_inst|delay[13] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.646 ; +; 0.528 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.648 ; +; 0.529 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.649 ; +; 0.530 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[11] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.649 ; +; 0.531 ; iambic:iambic_inst|delay[4] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.651 ; +; 0.532 ; iambic:iambic_inst|delay[2] ; iambic:iambic_inst|delay[6] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.652 ; +; 0.533 ; iambic:iambic_inst|delay[8] ; iambic:iambic_inst|delay[12] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.652 ; +; 0.535 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[3] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.655 ; ; 0.535 ; iambic:iambic_inst|delay[14] ; iambic:iambic_inst|delay[17] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.654 ; -; 0.535 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.653 ; +; 0.535 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.654 ; +; 0.535 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.654 ; +; 0.535 ; iambic:iambic_inst|key_state.SENDDOT ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.654 ; ; 0.536 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.655 ; -; 0.538 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.656 ; +; 0.538 ; iambic:iambic_inst|delay[6] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.657 ; +; 0.538 ; iambic:iambic_inst|delay[10] ; iambic:iambic_inst|delay[14] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.657 ; +; 0.538 ; iambic:iambic_inst|delay[0] ; iambic:iambic_inst|delay[4] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.658 ; ; 0.539 ; iambic:iambic_inst|delay[12] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.658 ; -; 0.542 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|dash_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.662 ; -; 0.557 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|keyer_out ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.676 ; -; 0.569 ; iambic:iambic_inst|key_state.DASHHELD ; iambic:iambic_inst|key_state.00000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.688 ; +; 0.557 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|dot_memory ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.677 ; +; 0.558 ; iambic:iambic_inst|key_state.DOTDELAY ; iambic:iambic_inst|key_state.00000 ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.677 ; +; 0.570 ; iambic:iambic_inst|key_state.SENDDASH ; iambic:iambic_inst|keyer_out ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.038 ; 0.692 ; +; 0.581 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.701 ; ; 0.582 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[15] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.701 ; -; 0.583 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[7] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.702 ; -; 0.583 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[9] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.701 ; -; 0.584 ; iambic:iambic_inst|delay[9] ; iambic:iambic_inst|delay[13] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.703 ; +; 0.584 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.704 ; ; 0.585 ; iambic:iambic_inst|delay[11] ; iambic:iambic_inst|delay[16] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.704 ; -; 0.585 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.704 ; -; 0.586 ; iambic:iambic_inst|delay[5] ; iambic:iambic_inst|delay[10] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.034 ; 0.704 ; -; 0.586 ; iambic:iambic_inst|delay[3] ; iambic:iambic_inst|delay[8] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.035 ; 0.705 ; +; 0.587 ; iambic:iambic_inst|delay[1] ; iambic:iambic_inst|delay[5] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.036 ; 0.707 ; +-------+----------------------------------------+----------------------------------------+-------------------------------------------------------------+-------------------------------------------------------------+--------------+------------+------------+ @@ -6154,484 +6370,268 @@ No paths to report. +-------+----------------------------------------------------+----------------------------------------------------+--------------+-------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------------------+----------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.187 ; reset_handler:reset_handler_inst|reset_counter[0] ; reset_handler:reset_handler_inst|reset_counter[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.307 ; -; 0.188 ; ad9866:ad9866_inst|dut2_bitcount[3] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.307 ; ; 0.188 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.307 ; +; 0.188 ; ad9866:ad9866_inst|dut2_bitcount[3] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.307 ; +; 0.188 ; reset_handler:reset_handler_inst|reset_counter[0] ; reset_handler:reset_handler_inst|reset_counter[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.307 ; ; 0.195 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.314 ; -; 0.253 ; ad9866:ad9866_inst|dut2_data[12] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.373 ; -; 0.253 ; ad9866:ad9866_inst|dut2_data[14] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.373 ; -; 0.254 ; ad9866:ad9866_inst|dut2_data[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.373 ; -; 0.254 ; ad9866:ad9866_inst|dut2_data[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.373 ; -; 0.254 ; ad9866:ad9866_inst|dut2_data[6] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.373 ; -; 0.254 ; ad9866:ad9866_inst|dut2_data[7] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.373 ; -; 0.254 ; ad9866:ad9866_inst|dut2_data[13] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.374 ; -; 0.255 ; ad9866:ad9866_inst|dut2_data[9] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.375 ; -; 0.256 ; ad9866:ad9866_inst|dut2_data[1] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.375 ; -; 0.256 ; ad9866:ad9866_inst|dut2_data[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.375 ; -; 0.256 ; ad9866:ad9866_inst|dut2_data[11] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.376 ; -; 0.272 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.391 ; +; 0.195 ; ad9866:ad9866_inst|dut2_data[2] ; ad9866:ad9866_inst|dut2_data[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.314 ; +; 0.195 ; ad9866:ad9866_inst|dut2_data[4] ; ad9866:ad9866_inst|dut2_data[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.314 ; +; 0.196 ; ad9866:ad9866_inst|dut2_data[1] ; ad9866:ad9866_inst|dut2_data[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.315 ; +; 0.198 ; ad9866:ad9866_inst|dut2_data[0] ; ad9866:ad9866_inst|dut2_data[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.317 ; +; 0.265 ; ad9866:ad9866_inst|dut2_data[6] ; ad9866:ad9866_inst|dut2_data[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.385 ; +; 0.268 ; ad9866:ad9866_inst|dut2_data[9] ; ad9866:ad9866_inst|dut2_data[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.387 ; +; 0.276 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.294 ; 0.654 ; +; 0.279 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.294 ; 0.657 ; +; 0.286 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.294 ; 0.664 ; +; 0.289 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.294 ; 0.667 ; ; 0.293 ; counter[11] ; counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.412 ; -; 0.294 ; counter[13] ; counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.414 ; -; 0.294 ; counter[9] ; counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.413 ; ; 0.294 ; counter[7] ; counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.413 ; +; 0.294 ; counter[9] ; counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.413 ; ; 0.294 ; counter[1] ; counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.413 ; -; 0.294 ; ad9866:ad9866_inst|dut2_data[10] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.414 ; -; 0.294 ; counter[17] ; counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.414 ; -; 0.294 ; counter[15] ; counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.414 ; -; 0.295 ; counter[12] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.415 ; -; 0.295 ; counter[3] ; counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.414 ; +; 0.294 ; ad9866:ad9866_inst|dut2_data[8] ; ad9866:ad9866_inst|dut2_data[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.414 ; +; 0.295 ; counter[13] ; counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.414 ; ; 0.295 ; counter[2] ; counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.414 ; -; 0.295 ; counter[21] ; counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.415 ; -; 0.295 ; counter[19] ; counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.415 ; -; 0.295 ; counter[18] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.415 ; +; 0.295 ; counter[3] ; counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.414 ; +; 0.295 ; counter[17] ; counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.414 ; +; 0.295 ; counter[15] ; counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.414 ; ; 0.296 ; counter[10] ; counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.415 ; -; 0.296 ; counter[5] ; counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.415 ; +; 0.296 ; counter[12] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.415 ; ; 0.296 ; counter[4] ; counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.415 ; +; 0.296 ; counter[5] ; counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.415 ; ; 0.296 ; ad9866:ad9866_inst|dut2_data[3] ; ad9866:ad9866_inst|dut2_data[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.415 ; -; 0.296 ; counter[22] ; counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.416 ; -; 0.296 ; counter[20] ; counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.416 ; -; 0.296 ; counter[16] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.416 ; -; 0.296 ; counter[14] ; counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.416 ; -; 0.297 ; counter[8] ; counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.416 ; +; 0.296 ; counter[21] ; counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.415 ; +; 0.296 ; counter[19] ; counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.415 ; +; 0.296 ; counter[18] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.415 ; ; 0.297 ; counter[6] ; counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.416 ; -; 0.297 ; reset_handler:reset_handler_inst|reset_counter[11] ; reset_handler:reset_handler_inst|reset_counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.417 ; -; 0.297 ; reset_handler:reset_handler_inst|reset_counter[10] ; reset_handler:reset_handler_inst|reset_counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.417 ; -; 0.298 ; reset_handler:reset_handler_inst|reset_counter[9] ; reset_handler:reset_handler_inst|reset_counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.418 ; -; 0.298 ; reset_handler:reset_handler_inst|reset_counter[2] ; reset_handler:reset_handler_inst|reset_counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.418 ; -; 0.298 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.417 ; -; 0.299 ; reset_handler:reset_handler_inst|reset_counter[8] ; reset_handler:reset_handler_inst|reset_counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.419 ; -; 0.299 ; reset_handler:reset_handler_inst|reset_counter[7] ; reset_handler:reset_handler_inst|reset_counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.419 ; -; 0.299 ; reset_handler:reset_handler_inst|reset_counter[5] ; reset_handler:reset_handler_inst|reset_counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.419 ; -; 0.299 ; reset_handler:reset_handler_inst|reset_counter[6] ; reset_handler:reset_handler_inst|reset_counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.419 ; -; 0.300 ; reset_handler:reset_handler_inst|reset_counter[17] ; reset_handler:reset_handler_inst|reset_counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.419 ; -; 0.300 ; reset_handler:reset_handler_inst|reset_counter[16] ; reset_handler:reset_handler_inst|reset_counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.419 ; -; 0.300 ; reset_handler:reset_handler_inst|reset_counter[15] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.419 ; -; 0.300 ; reset_handler:reset_handler_inst|reset_counter[14] ; reset_handler:reset_handler_inst|reset_counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.419 ; -; 0.300 ; reset_handler:reset_handler_inst|reset_counter[3] ; reset_handler:reset_handler_inst|reset_counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.420 ; -; 0.300 ; reset_handler:reset_handler_inst|reset_counter[18] ; reset_handler:reset_handler_inst|reset_counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.419 ; -; 0.301 ; reset_handler:reset_handler_inst|reset_counter[21] ; reset_handler:reset_handler_inst|reset_counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.420 ; -; 0.301 ; reset_handler:reset_handler_inst|reset_counter[23] ; reset_handler:reset_handler_inst|reset_counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.420 ; -; 0.301 ; reset_handler:reset_handler_inst|reset_counter[20] ; reset_handler:reset_handler_inst|reset_counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.420 ; -; 0.301 ; reset_handler:reset_handler_inst|reset_counter[19] ; reset_handler:reset_handler_inst|reset_counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.420 ; -; 0.305 ; reset_handler:reset_handler_inst|reset_counter[1] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.425 ; -; 0.305 ; counter[23] ; counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.425 ; -; 0.306 ; reset_handler:reset_handler_inst|reset_counter[0] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.426 ; -; 0.306 ; reset_handler:reset_handler_inst|reset_counter[4] ; reset_handler:reset_handler_inst|reset_counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.426 ; +; 0.297 ; counter[8] ; counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.416 ; +; 0.297 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.417 ; +; 0.297 ; ad9866:ad9866_inst|dut2_data[10] ; ad9866:ad9866_inst|dut2_data[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.416 ; +; 0.297 ; counter[22] ; counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.416 ; +; 0.297 ; ad9866:ad9866_inst|dut2_data[11] ; ad9866:ad9866_inst|dut2_data[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.416 ; +; 0.297 ; counter[20] ; counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.416 ; +; 0.297 ; counter[16] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.416 ; +; 0.297 ; counter[14] ; counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.416 ; +; 0.298 ; reset_handler:reset_handler_inst|reset_counter[10] ; reset_handler:reset_handler_inst|reset_counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.417 ; +; 0.298 ; reset_handler:reset_handler_inst|reset_counter[14] ; reset_handler:reset_handler_inst|reset_counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.418 ; +; 0.298 ; ad9866:ad9866_inst|dut2_data[5] ; ad9866:ad9866_inst|dut2_data[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.417 ; +; 0.298 ; reset_handler:reset_handler_inst|reset_counter[13] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.418 ; +; 0.298 ; ad9866:ad9866_inst|dut2_data[7] ; ad9866:ad9866_inst|dut2_data[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.418 ; +; 0.298 ; reset_handler:reset_handler_inst|reset_counter[18] ; reset_handler:reset_handler_inst|reset_counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.418 ; +; 0.298 ; reset_handler:reset_handler_inst|reset_counter[11] ; reset_handler:reset_handler_inst|reset_counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.417 ; +; 0.298 ; ad9866:ad9866_inst|dut2_data[12] ; ad9866:ad9866_inst|dut2_data[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.417 ; +; 0.298 ; ad9866:ad9866_inst|dut2_data[13] ; ad9866:ad9866_inst|dut2_data[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.417 ; +; 0.299 ; reset_handler:reset_handler_inst|reset_counter[6] ; reset_handler:reset_handler_inst|reset_counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.418 ; +; 0.299 ; reset_handler:reset_handler_inst|reset_counter[9] ; reset_handler:reset_handler_inst|reset_counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.418 ; +; 0.299 ; reset_handler:reset_handler_inst|reset_counter[15] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.419 ; +; 0.299 ; reset_handler:reset_handler_inst|reset_counter[16] ; reset_handler:reset_handler_inst|reset_counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.419 ; +; 0.299 ; reset_handler:reset_handler_inst|reset_counter[2] ; reset_handler:reset_handler_inst|reset_counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.418 ; +; 0.300 ; reset_handler:reset_handler_inst|reset_counter[17] ; reset_handler:reset_handler_inst|reset_counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.420 ; +; 0.300 ; reset_handler:reset_handler_inst|reset_counter[4] ; reset_handler:reset_handler_inst|reset_counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.419 ; +; 0.300 ; reset_handler:reset_handler_inst|reset_counter[23] ; reset_handler:reset_handler_inst|reset_counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.420 ; +; 0.300 ; reset_handler:reset_handler_inst|reset_counter[19] ; reset_handler:reset_handler_inst|reset_counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.420 ; +; 0.300 ; reset_handler:reset_handler_inst|reset_counter[7] ; reset_handler:reset_handler_inst|reset_counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.419 ; +; 0.300 ; reset_handler:reset_handler_inst|reset_counter[8] ; reset_handler:reset_handler_inst|reset_counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.419 ; +; 0.301 ; reset_handler:reset_handler_inst|reset_counter[3] ; reset_handler:reset_handler_inst|reset_counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.420 ; +; 0.305 ; reset_handler:reset_handler_inst|reset_counter[1] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.424 ; +; 0.306 ; counter[23] ; counter[23] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.425 ; +; 0.307 ; reset_handler:reset_handler_inst|reset_counter[0] ; reset_handler:reset_handler_inst|reset_counter[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.426 ; ; 0.307 ; counter[0] ; counter[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.426 ; -; 0.308 ; reset_handler:reset_handler_inst|reset_counter[22] ; reset_handler:reset_handler_inst|reset_counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.427 ; -; 0.321 ; ad9866:ad9866_inst|dut1_pc[5] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.024 ; 0.429 ; -; 0.332 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.451 ; -; 0.332 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.451 ; -; 0.350 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.175 ; 0.609 ; -; 0.353 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.175 ; 0.612 ; -; 0.354 ; ad9866:ad9866_inst|dut2_bitcount[1] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.473 ; -; 0.357 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.024 ; 0.465 ; -; 0.369 ; reset_handler:reset_handler_inst|reset_counter[13] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.488 ; -; 0.374 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.493 ; -; 0.390 ; ad9866:ad9866_inst|dut2_bitcount[1] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.509 ; -; 0.400 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.024 ; 0.508 ; -; 0.404 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.175 ; 0.663 ; -; 0.407 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.175 ; 0.666 ; -; 0.416 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.175 ; 0.675 ; -; 0.437 ; counter[11] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.040 ; 0.561 ; +; 0.307 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|sen_n ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.338 ; 0.729 ; +; 0.323 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[1] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.442 ; +; 0.335 ; ad9866:ad9866_inst|dut1_pc[3] ; ad9866:ad9866_inst|dut1_pc[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.025 ; 0.444 ; +; 0.336 ; ad9866:ad9866_inst|dut1_pc[4] ; ad9866:ad9866_inst|dut1_pc[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.025 ; 0.445 ; +; 0.338 ; ad9866:ad9866_inst|dut1_pc[5] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.025 ; 0.447 ; +; 0.342 ; ad9866:ad9866_inst|dut1_pc[1] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.294 ; 0.720 ; +; 0.352 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.294 ; 0.730 ; +; 0.368 ; reset_handler:reset_handler_inst|reset_counter[5] ; reset_handler:reset_handler_inst|reset_counter[5] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.487 ; +; 0.368 ; reset_handler:reset_handler_inst|reset_counter[21] ; reset_handler:reset_handler_inst|reset_counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.488 ; +; 0.373 ; reset_handler:reset_handler_inst|reset_counter[22] ; reset_handler:reset_handler_inst|reset_counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.493 ; +; 0.373 ; reset_handler:reset_handler_inst|reset_counter[20] ; reset_handler:reset_handler_inst|reset_counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.493 ; +; 0.383 ; ad9866:ad9866_inst|dut2_bitcount[1] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.502 ; +; 0.386 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.506 ; +; 0.387 ; ad9866:ad9866_inst|dut1_pc[2] ; ad9866:ad9866_inst|dut1_pc[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.506 ; +; 0.396 ; ad9866:ad9866_inst|dut2_bitcount[0] ; ad9866:ad9866_inst|dut2_bitcount[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.516 ; +; 0.402 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|dut2_bitcount[0] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.521 ; +; 0.403 ; ad9866:ad9866_inst|dut2_state.1 ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.522 ; +; 0.423 ; ad9866:ad9866_inst|dut2_data[14] ; ad9866:ad9866_inst|dut2_data[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.542 ; +; 0.443 ; counter[11] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.034 ; 0.561 ; +; 0.443 ; counter[9] ; counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.562 ; ; 0.443 ; counter[7] ; counter[8] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.562 ; ; 0.443 ; counter[1] ; counter[2] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.562 ; -; 0.443 ; counter[15] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.563 ; -; 0.443 ; counter[17] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.563 ; -; 0.443 ; counter[9] ; counter[10] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.562 ; -; 0.443 ; counter[13] ; counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.563 ; -; 0.444 ; counter[21] ; counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.564 ; +; 0.444 ; counter[15] ; counter[16] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.563 ; +; 0.444 ; counter[13] ; counter[14] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.563 ; ; 0.444 ; counter[3] ; counter[4] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.563 ; -; 0.444 ; counter[19] ; counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.564 ; +; 0.444 ; counter[17] ; counter[18] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.563 ; ; 0.445 ; counter[5] ; counter[6] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.564 ; -; 0.446 ; reset_handler:reset_handler_inst|reset_counter[10] ; reset_handler:reset_handler_inst|reset_counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.566 ; -; 0.447 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.566 ; -; 0.447 ; reset_handler:reset_handler_inst|reset_counter[2] ; reset_handler:reset_handler_inst|reset_counter[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.567 ; -; 0.448 ; reset_handler:reset_handler_inst|reset_counter[6] ; reset_handler:reset_handler_inst|reset_counter[7] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.568 ; -; 0.448 ; reset_handler:reset_handler_inst|reset_counter[8] ; reset_handler:reset_handler_inst|reset_counter[9] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.568 ; -; 0.449 ; reset_handler:reset_handler_inst|reset_counter[16] ; reset_handler:reset_handler_inst|reset_counter[17] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.568 ; -; 0.449 ; reset_handler:reset_handler_inst|reset_counter[18] ; reset_handler:reset_handler_inst|reset_counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.568 ; -; 0.449 ; reset_handler:reset_handler_inst|reset_counter[14] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.568 ; -; 0.450 ; reset_handler:reset_handler_inst|reset_counter[20] ; reset_handler:reset_handler_inst|reset_counter[21] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.569 ; -; 0.452 ; counter[10] ; counter[12] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.040 ; 0.576 ; +; 0.445 ; counter[19] ; counter[20] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.564 ; +; 0.445 ; counter[21] ; counter[22] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.564 ; +; 0.446 ; ad9866:ad9866_inst|dut2_bitcount[2] ; ad9866:ad9866_inst|dut2_bitcount[3] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.034 ; 0.564 ; +; 0.446 ; reset_handler:reset_handler_inst|reset_counter[12] ; reset_handler:reset_handler_inst|reset_counter[13] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.566 ; +; 0.447 ; reset_handler:reset_handler_inst|reset_counter[18] ; reset_handler:reset_handler_inst|reset_counter[19] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.567 ; +; 0.447 ; reset_handler:reset_handler_inst|reset_counter[10] ; reset_handler:reset_handler_inst|reset_counter[11] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.035 ; 0.566 ; +; 0.447 ; reset_handler:reset_handler_inst|reset_counter[14] ; reset_handler:reset_handler_inst|reset_counter[15] ; clk_10mhz ; clk_10mhz ; 0.000 ; 0.036 ; 0.567 ; +-------+----------------------------------------------------+----------------------------------------------------+--------------+-------------+--------------+------------+------------+ -+--------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Fast 1200mV 0C Model Hold: 'spi_sck' ; -+-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.188 ; spi_slave:spi_slave_rx2_inst|rreg[32] ; spi_slave:spi_slave_rx2_inst|rdata[33] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.319 ; -; 0.188 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rdata[34] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.319 ; -; 0.189 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rdata[4] ; spi_sck ; spi_sck ; 0.000 ; 0.045 ; 0.318 ; -; 0.190 ; spi_slave:spi_slave_rx_inst|rreg[6] ; spi_slave:spi_slave_rx_inst|rdata[7] ; spi_sck ; spi_sck ; 0.000 ; 0.045 ; 0.319 ; -; 0.190 ; spi_slave:spi_slave_rx_inst|rreg[5] ; spi_slave:spi_slave_rx_inst|rdata[6] ; spi_sck ; spi_sck ; 0.000 ; 0.045 ; 0.319 ; -; 0.191 ; spi_slave:spi_slave_rx2_inst|rreg[0] ; spi_slave:spi_slave_rx2_inst|rdata[1] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.318 ; -; 0.191 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.318 ; -; 0.193 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rdata[26] ; spi_sck ; spi_sck ; 0.000 ; 0.043 ; 0.320 ; -; 0.194 ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_slave:spi_slave_rx2_inst|rdata[35] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.325 ; -; 0.197 ; spi_slave:spi_slave_rx2_inst|rreg[44] ; spi_slave:spi_slave_rx2_inst|rdata[45] ; spi_sck ; spi_sck ; 0.000 ; 0.044 ; 0.325 ; -; 0.199 ; spi_slave:spi_slave_rx2_inst|rreg[45] ; spi_slave:spi_slave_rx2_inst|rdata[46] ; spi_sck ; spi_sck ; 0.000 ; 0.044 ; 0.327 ; -; 0.199 ; spi_slave:spi_slave_rx_inst|rreg[13] ; spi_slave:spi_slave_rx_inst|rdata[14] ; spi_sck ; spi_sck ; 0.000 ; 0.044 ; 0.327 ; -; 0.200 ; spi_slave:spi_slave_rx_inst|rreg[15] ; spi_slave:spi_slave_rx_inst|rdata[16] ; spi_sck ; spi_sck ; 0.000 ; 0.044 ; 0.328 ; -; 0.201 ; spi_slave:spi_slave_rx_inst|treg[5] ; spi_slave:spi_slave_rx_inst|treg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.314 ; -; 0.203 ; spi_slave:spi_slave_rx2_inst|treg[0] ; spi_slave:spi_slave_rx2_inst|treg[1] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.314 ; -; 0.203 ; spi_slave:spi_slave_rx2_inst|treg[3] ; spi_slave:spi_slave_rx2_inst|treg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.314 ; -; 0.205 ; spi_slave:spi_slave_rx_inst|treg[7] ; spi_slave:spi_slave_rx_inst|treg[8] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.318 ; -; 0.207 ; spi_slave:spi_slave_rx_inst|rreg[3] ; spi_slave:spi_slave_rx_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.026 ; 0.317 ; -; 0.207 ; spi_slave:spi_slave_rx_inst|rreg[37] ; spi_slave:spi_slave_rx_inst|rreg[38] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.314 ; -; 0.207 ; spi_slave:spi_slave_rx_inst|rreg[29] ; spi_slave:spi_slave_rx_inst|rreg[30] ; spi_sck ; spi_sck ; 0.000 ; 0.098 ; 0.389 ; -; 0.207 ; spi_slave:spi_slave_rx2_inst|treg[7] ; spi_slave:spi_slave_rx2_inst|treg[8] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.318 ; -; 0.208 ; spi_slave:spi_slave_rx_inst|rreg[25] ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.317 ; -; 0.208 ; spi_slave:spi_slave_rx_inst|rreg[5] ; spi_slave:spi_slave_rx_inst|rreg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.026 ; 0.318 ; -; 0.208 ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_slave:spi_slave_rx2_inst|rreg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.317 ; -; 0.208 ; spi_slave:spi_slave_rx2_inst|rreg[32] ; spi_slave:spi_slave_rx2_inst|rreg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.317 ; -; 0.209 ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_slave:spi_slave_rx_inst|rreg[28] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.318 ; -; 0.209 ; spi_slave:spi_slave_rx_inst|rreg[26] ; spi_slave:spi_slave_rx_inst|rreg[27] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.318 ; -; 0.209 ; spi_slave:spi_slave_rx2_inst|rreg[5] ; spi_slave:spi_slave_rx2_inst|rreg[6] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.317 ; -; 0.209 ; spi_slave:spi_slave_rx2_inst|rreg[3] ; spi_slave:spi_slave_rx2_inst|rreg[4] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.317 ; -; 0.210 ; spi_slave:spi_slave_rx_inst|rreg[6] ; spi_slave:spi_slave_rx_inst|rreg[7] ; spi_sck ; spi_sck ; 0.000 ; 0.026 ; 0.320 ; -; 0.210 ; spi_slave:spi_slave_rx_inst|rreg[21] ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.317 ; -; 0.210 ; spi_slave:spi_slave_rx2_inst|rreg[0] ; spi_slave:spi_slave_rx2_inst|rreg[1] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.317 ; -; 0.210 ; spi_slave:spi_slave_rx2_inst|rreg[6] ; spi_slave:spi_slave_rx2_inst|rreg[7] ; spi_sck ; spi_sck ; 0.000 ; 0.024 ; 0.318 ; -; 0.211 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.318 ; -; 0.211 ; spi_slave:spi_slave_rx2_inst|rreg[24] ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.318 ; -; 0.211 ; spi_slave:spi_slave_rx_inst|rreg[18] ; spi_slave:spi_slave_rx_inst|rreg[19] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.318 ; -; 0.212 ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.319 ; -; 0.212 ; spi_slave:spi_slave_rx_inst|rreg[39] ; spi_slave:spi_slave_rx_inst|rreg[40] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.319 ; -; 0.213 ; spi_slave:spi_slave_rx2_inst|rreg[25] ; spi_slave:spi_slave_rx2_inst|rreg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.320 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[3] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[4] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[1] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[0] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[2] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[5] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[7] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[6] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[8] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[9] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[10] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[11] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[12] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[13] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[14] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.214 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[15] ; spi_ce1 ; spi_sck ; 0.000 ; 1.961 ; 2.289 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[35] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[39] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[43] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[47] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[37] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[38] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[36] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[46] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[45] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[44] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[40] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[42] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[32] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.215 ; spi_ce[1] ; spi_slave:spi_slave_rx2_inst|treg[41] ; spi_ce1 ; spi_sck ; 0.000 ; 1.983 ; 2.312 ; -; 0.218 ; spi_slave:spi_slave_rx_inst|rreg[34] ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.325 ; -; 0.218 ; spi_slave:spi_slave_rx_inst|rreg[35] ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.325 ; -; 0.218 ; spi_slave:spi_slave_rx_inst|rreg[28] ; spi_slave:spi_slave_rx_inst|rreg[29] ; spi_sck ; spi_sck ; 0.000 ; 0.025 ; 0.327 ; -; 0.220 ; spi_slave:spi_slave_rx_inst|rreg[36] ; spi_slave:spi_slave_rx_inst|rreg[37] ; spi_sck ; spi_sck ; 0.000 ; 0.023 ; 0.327 ; -; 0.226 ; spi_slave:spi_slave_rx_inst|rreg[23] ; spi_slave:spi_slave_rx_inst|rdata[24] ; spi_sck ; spi_sck ; 0.000 ; 0.007 ; 0.317 ; -; 0.226 ; spi_slave:spi_slave_rx_inst|rreg[18] ; spi_slave:spi_slave_rx_inst|rdata[19] ; spi_sck ; spi_sck ; 0.000 ; 0.007 ; 0.317 ; -; 0.229 ; spi_slave:spi_slave_rx_inst|rreg[22] ; spi_slave:spi_slave_rx_inst|rdata[23] ; spi_sck ; spi_sck ; 0.000 ; 0.007 ; 0.320 ; -; 0.230 ; spi_slave:spi_slave_rx_inst|rreg[21] ; spi_slave:spi_slave_rx_inst|rdata[22] ; spi_sck ; spi_sck ; 0.000 ; 0.007 ; 0.321 ; -; 0.232 ; spi_slave:spi_slave_rx2_inst|rreg[30] ; spi_slave:spi_slave_rx2_inst|rdata[31] ; spi_sck ; spi_sck ; 0.000 ; 0.011 ; 0.327 ; -; 0.235 ; spi_slave:spi_slave_rx_inst|rreg[24] ; spi_slave:spi_slave_rx_inst|rdata[25] ; spi_sck ; spi_sck ; 0.000 ; 0.007 ; 0.326 ; -; 0.253 ; spi_slave:spi_slave_rx_inst|rreg[14] ; spi_slave:spi_slave_rx_inst|rdata[15] ; spi_sck ; spi_sck ; 0.000 ; 0.048 ; 0.385 ; -; 0.259 ; spi_slave:spi_slave_rx_inst|treg[14] ; spi_slave:spi_slave_rx_inst|treg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.372 ; -; 0.259 ; spi_slave:spi_slave_rx_inst|treg[12] ; spi_slave:spi_slave_rx_inst|treg[13] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.372 ; -; 0.260 ; spi_slave:spi_slave_rx_inst|treg[25] ; spi_slave:spi_slave_rx_inst|treg[26] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.373 ; -; 0.260 ; spi_slave:spi_slave_rx_inst|treg[26] ; spi_slave:spi_slave_rx_inst|treg[27] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.373 ; -; 0.260 ; spi_slave:spi_slave_rx2_inst|rreg[31] ; spi_slave:spi_slave_rx2_inst|rdata[32] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.391 ; -; 0.260 ; spi_slave:spi_slave_rx_inst|treg[11] ; spi_slave:spi_slave_rx_inst|treg[12] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.373 ; -; 0.260 ; spi_slave:spi_slave_rx_inst|treg[8] ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.373 ; -; 0.260 ; spi_slave:spi_slave_rx2_inst|rreg[11] ; spi_slave:spi_slave_rx2_inst|rdata[12] ; spi_sck ; spi_sck ; 0.000 ; 0.047 ; 0.391 ; -; 0.260 ; spi_slave:spi_slave_rx_inst|treg[40] ; spi_slave:spi_slave_rx_inst|treg[41] ; spi_sck ; spi_sck ; 0.000 ; 0.028 ; 0.372 ; -; 0.261 ; spi_slave:spi_slave_rx_inst|treg[9] ; spi_slave:spi_slave_rx_inst|treg[10] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.374 ; -; 0.261 ; spi_slave:spi_slave_rx2_inst|treg[10] ; spi_slave:spi_slave_rx2_inst|treg[11] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.372 ; -; 0.261 ; spi_slave:spi_slave_rx_inst|treg[33] ; spi_slave:spi_slave_rx_inst|treg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.028 ; 0.373 ; -; 0.262 ; spi_slave:spi_slave_rx_inst|treg[13] ; spi_slave:spi_slave_rx_inst|treg[14] ; spi_sck ; spi_sck ; 0.000 ; 0.029 ; 0.375 ; -; 0.262 ; spi_slave:spi_slave_rx2_inst|treg[12] ; spi_slave:spi_slave_rx2_inst|treg[13] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.373 ; -; 0.262 ; spi_slave:spi_slave_rx2_inst|treg[33] ; spi_slave:spi_slave_rx2_inst|treg[34] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.373 ; -; 0.262 ; spi_slave:spi_slave_rx_inst|treg[32] ; spi_slave:spi_slave_rx_inst|treg[33] ; spi_sck ; spi_sck ; 0.000 ; 0.028 ; 0.374 ; -; 0.262 ; spi_slave:spi_slave_rx_inst|rreg[4] ; spi_slave:spi_slave_rx_inst|rdata[5] ; spi_sck ; spi_sck ; 0.000 ; 0.045 ; 0.391 ; -; 0.262 ; spi_slave:spi_slave_rx2_inst|treg[14] ; spi_slave:spi_slave_rx2_inst|treg[15] ; spi_sck ; spi_sck ; 0.000 ; 0.027 ; 0.373 ; -+-------+---------------------------------------+----------------------------------------+--------------+-------------+--------------+------------+------------+ - - -+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Fast 1200mV 0C Model Hold: 'spi_ce1' ; -+-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ -; 0.194 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.307 ; -; 0.195 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.307 ; -; 0.195 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.307 ; -; 0.203 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.027 ; 0.314 ; -; 0.225 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.337 ; -; 0.226 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.338 ; -; 0.226 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.029 ; 0.339 ; -; 0.228 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.340 ; -; 0.261 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.027 ; 0.372 ; -; 0.263 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.145 ; 0.492 ; -; 0.289 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.204 ; 0.577 ; -; 0.291 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.403 ; -; 0.294 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.406 ; -; 0.295 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.135 ; 0.514 ; -; 0.305 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[2] ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.027 ; 0.416 ; -; 0.325 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[6] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.012 ; 0.397 ; -; 0.329 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.441 ; -; 0.336 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[7] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.012 ; 0.408 ; -; 0.352 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.096 ; 0.340 ; -; 0.369 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.052 ; 0.525 ; -; 0.370 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.482 ; -; 0.400 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.204 ; 0.688 ; -; 0.408 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.145 ; 0.637 ; -; 0.413 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[4] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.012 ; 0.485 ; -; 0.418 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.096 ; 0.406 ; -; 0.438 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.145 ; 0.667 ; -; 0.443 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.036 ; 0.511 ; -; 0.446 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.096 ; 0.434 ; -; 0.449 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.036 ; 0.517 ; -; 0.454 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.096 ; 0.442 ; -; 0.456 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.090 ; 0.650 ; -; 0.456 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.204 ; 0.744 ; -; 0.457 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.036 ; 0.525 ; -; 0.461 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.036 ; 0.529 ; -; 0.462 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.029 ; 0.517 ; -; 0.467 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.036 ; 0.535 ; -; 0.474 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.089 ; 0.667 ; -; 0.475 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.587 ; -; 0.483 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.096 ; 0.471 ; -; 0.505 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.617 ; -; 0.509 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.096 ; 0.497 ; -; 0.511 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 0.719 ; -; 0.513 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[0] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.008 ; 0.589 ; -; 0.517 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[8] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.070 ; 0.531 ; -; 0.519 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.013 ; 0.616 ; -; 0.524 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.636 ; -; 0.527 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.639 ; -; 0.530 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.113 ; 0.727 ; -; 0.530 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[2] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.008 ; 0.606 ; -; 0.531 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.643 ; -; 0.541 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.002 ; 0.647 ; -; 0.545 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.204 ; 0.833 ; -; 0.548 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 0.756 ; -; 0.550 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.001 ; 0.655 ; -; 0.558 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.002 ; 0.664 ; -; 0.558 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.001 ; 0.663 ; -; 0.559 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.001 ; 0.664 ; -; 0.561 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.002 ; 0.667 ; -; 0.565 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.002 ; 0.671 ; -; 0.566 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.001 ; 0.671 ; -; 0.589 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[9] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.070 ; 0.603 ; -; 0.597 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|sub_parity3a[1] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.096 ; 0.585 ; -; 0.607 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[5] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.070 ; 0.621 ; -; 0.616 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 0.824 ; -; 0.619 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.731 ; -; 0.626 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.738 ; -; 0.629 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.741 ; -; 0.644 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.756 ; -; 0.645 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.002 ; 0.751 ; -; 0.651 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.763 ; -; 0.651 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.001 ; 0.756 ; -; 0.651 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.034 ; 0.701 ; -; 0.658 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|rdptr_g[3] ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.070 ; 0.672 ; -; 0.659 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.145 ; 0.888 ; -; 0.663 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.145 ; 0.892 ; -; 0.664 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.776 ; -; 0.665 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 0.873 ; -; 0.668 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.780 ; -; 0.686 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a12~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.002 ; 0.792 ; -; 0.718 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.204 ; 1.006 ; -; 0.721 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|parity2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.204 ; 1.009 ; -; 0.727 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.839 ; -; 0.734 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a0~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; -0.036 ; 0.802 ; -; 0.751 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.863 ; -; 0.767 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a5 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.001 ; 0.872 ; -; 0.773 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.885 ; -; 0.775 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.068 ; 0.947 ; -; 0.776 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a1 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a7 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.888 ; -; 0.779 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a3 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 0.891 ; -; 0.826 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a9 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.001 ; 0.931 ; -; 0.872 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|altsyncram_rv61:fifo_ram|ram_block7a30~portb_address_reg0 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.001 ; 0.977 ; -; 0.897 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a4 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.028 ; 1.009 ; -; 0.899 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a2 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a8 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.145 ; 1.128 ; -; 0.914 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a0 ; rxFIFO:rx2_FIFO_inst|dcfifo:dcfifo_component|dcfifo_3rj1:auto_generated|a_graycounter_u67:rdptr_g1p|counter1a6 ; spi_ce1 ; spi_ce1 ; 0.000 ; 0.124 ; 1.122 ; -+-------+---------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+ - - -+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Fast 1200mV 0C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' ; -+-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; -+-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ -; 0.319 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.205 ; 2.629 ; -; 0.365 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.207 ; 2.677 ; -; 0.376 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.179 ; 2.660 ; -; 0.376 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.205 ; 2.686 ; -; 0.353 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.257 ; 2.715 ; -; 0.408 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.205 ; 2.718 ; -; 0.414 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.208 ; 2.727 ; -; 0.437 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.179 ; 2.721 ; -; 0.480 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.268 ; 2.853 ; -; 0.345 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.171 ; 2.621 ; -; 0.505 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.267 ; 2.877 ; -; 0.570 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.265 ; 2.940 ; -; 0.516 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.176 ; 2.797 ; -; 5.523 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.205 ; 2.853 ; -; 5.534 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.268 ; 2.927 ; -; 5.562 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.205 ; 2.892 ; -; 5.568 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.267 ; 2.960 ; -; 5.585 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.205 ; 2.915 ; -; 5.654 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.179 ; 2.958 ; -; 5.681 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.179 ; 2.985 ; -; 5.558 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.207 ; 2.890 ; -; 5.529 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.257 ; 2.911 ; -; 5.577 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.208 ; 2.910 ; -; 5.479 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.171 ; 2.775 ; -; 5.959 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.265 ; 3.349 ; -; 5.703 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.176 ; 3.004 ; -+-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ - - +------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'spi_slave:spi_slave_rx2_inst|done' ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ -; 0.513 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.022 ; 0.398 ; -; 0.513 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.022 ; 0.398 ; -; 0.516 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.022 ; 0.401 ; -; 0.528 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.022 ; 0.413 ; -; 0.531 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.022 ; 0.416 ; -; 0.569 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.071 ; 0.405 ; -; 0.583 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.086 ; 0.404 ; -; 0.583 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.086 ; 0.404 ; -; 0.591 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.086 ; 0.412 ; -; 0.595 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.086 ; 0.416 ; -; 0.600 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.097 ; 0.410 ; -; 0.606 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.097 ; 0.416 ; -; 0.606 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; tx_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.097 ; 0.416 ; -; 0.607 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.097 ; 0.417 ; -; 0.614 ; spi_slave:spi_slave_rx2_inst|rdata[32] ; keyer_weight[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.127 ; 0.394 ; -; 0.614 ; spi_slave:spi_slave_rx2_inst|rdata[35] ; keyer_weight[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.127 ; 0.394 ; -; 0.615 ; spi_slave:spi_slave_rx2_inst|rdata[34] ; keyer_weight[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.127 ; 0.395 ; -; 0.620 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.022 ; 0.505 ; -; 0.623 ; spi_slave:spi_slave_rx2_inst|rdata[37] ; keyer_weight[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.129 ; 0.401 ; -; 0.626 ; spi_slave:spi_slave_rx2_inst|rdata[45] ; cw_speed[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.113 ; 0.627 ; -; 0.627 ; spi_slave:spi_slave_rx2_inst|rdata[36] ; keyer_weight[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.129 ; 0.405 ; -; 0.629 ; spi_slave:spi_slave_rx2_inst|rdata[42] ; cw_speed[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.113 ; 0.630 ; -; 0.632 ; spi_slave:spi_slave_rx2_inst|rdata[43] ; cw_speed[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.113 ; 0.633 ; -; 0.634 ; spi_slave:spi_slave_rx2_inst|rdata[33] ; keyer_weight[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.127 ; 0.414 ; -; 0.646 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.022 ; 0.531 ; -; 0.660 ; spi_slave:spi_slave_rx2_inst|rdata[39] ; keyer_revers ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.111 ; 0.663 ; -; 0.671 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.024 ; 0.554 ; -; 0.671 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.026 ; 0.552 ; -; 0.681 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.024 ; 0.564 ; -; 0.684 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.024 ; 0.567 ; -; 0.684 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.024 ; 0.567 ; -; 0.687 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.084 ; 0.510 ; -; 0.689 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; tx_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.015 ; 0.581 ; -; 0.691 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; cw_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.037 ; 0.768 ; -; 0.692 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.086 ; 0.513 ; -; 0.695 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; rx2_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.040 ; 0.769 ; -; 0.698 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; rx2_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.114 ; 0.698 ; -; 0.699 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.062 ; 0.544 ; -; 0.706 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; tx_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.097 ; 0.516 ; -; 0.708 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.097 ; 0.518 ; -; 0.716 ; spi_slave:spi_slave_rx2_inst|rdata[44] ; cw_speed[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.113 ; 0.717 ; -; 0.719 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.084 ; 0.542 ; -; 0.722 ; spi_slave:spi_slave_rx2_inst|rdata[38] ; keyer_weight[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.129 ; 0.500 ; -; 0.732 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.088 ; 0.551 ; -; 0.736 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.088 ; 0.555 ; -; 0.738 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.084 ; 0.561 ; -; 0.740 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.084 ; 0.563 ; -; 0.742 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; tx_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.077 ; 0.572 ; -; 0.742 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; tx_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.100 ; 0.549 ; -; 0.745 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; cw_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.113 ; 0.746 ; -; 0.751 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.106 ; 0.552 ; -; 0.753 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.120 ; 0.540 ; -; 0.754 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.108 ; 0.553 ; -; 0.755 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; tx_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.100 ; 0.562 ; -; 0.756 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.100 ; 0.563 ; -; 0.763 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.126 ; 0.544 ; -; 0.763 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.108 ; 0.562 ; -; 0.764 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.024 ; 0.647 ; -; 0.765 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.128 ; 0.544 ; -; 0.767 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.024 ; 0.650 ; -; 0.768 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.128 ; 0.547 ; -; 0.769 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.125 ; 0.551 ; -; 0.770 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.024 ; 0.653 ; -; 0.772 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.024 ; 0.655 ; -; 0.773 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.118 ; 0.562 ; -; 0.773 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.024 ; 0.656 ; -; 0.775 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.108 ; 0.574 ; -; 0.780 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.118 ; 0.569 ; -; 0.782 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.126 ; 0.563 ; -; 0.783 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.126 ; 0.564 ; -; 0.783 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.132 ; 0.558 ; -; 0.793 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.134 ; 0.566 ; -; 0.793 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.136 ; 0.564 ; -; 0.794 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.015 ; 0.686 ; -; 0.798 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.132 ; 0.573 ; -; 0.799 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.136 ; 0.570 ; -; 0.802 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.134 ; 0.575 ; -; 0.811 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.026 ; 0.692 ; -; 0.824 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.010 ; 0.721 ; -; 0.825 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.097 ; 0.635 ; -; 0.829 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.010 ; 0.726 ; -; 0.831 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.018 ; 0.720 ; -; 0.832 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; tx_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.065 ; 0.674 ; -; 0.836 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.018 ; 0.725 ; -; 0.836 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.018 ; 0.725 ; -; 0.836 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.010 ; 0.733 ; -; 0.839 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.018 ; 0.728 ; -; 0.841 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.086 ; 0.662 ; -; 0.844 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.010 ; 0.741 ; -; 0.847 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.106 ; 0.648 ; -; 0.849 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.010 ; 0.746 ; -; 0.852 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; tx_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.077 ; 0.682 ; -; 0.854 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.086 ; 0.675 ; -; 0.854 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; tx_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.018 ; 0.743 ; -; 0.857 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.018 ; 0.746 ; -; 0.859 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.108 ; 0.658 ; -; 0.860 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; tx_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.100 ; 0.667 ; -; 0.860 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.100 ; 0.667 ; -; 0.863 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.106 ; 0.664 ; -; 0.864 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; tx_freq[19] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.128 ; 0.643 ; +; 0.484 ; spi_slave:spi_slave_rx2_inst|rdata[39] ; keyer_revers ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.131 ; 0.467 ; +; 0.561 ; spi_slave:spi_slave_rx2_inst|rdata[42] ; cw_speed[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.127 ; 0.548 ; +; 0.564 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; cw_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.104 ; 0.574 ; +; 0.564 ; spi_slave:spi_slave_rx2_inst|rdata[40] ; rx2_speed[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.104 ; 0.574 ; +; 0.596 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.099 ; 0.404 ; +; 0.612 ; spi_slave:spi_slave_rx2_inst|rdata[45] ; cw_speed[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.127 ; 0.599 ; +; 0.618 ; spi_slave:spi_slave_rx2_inst|rdata[47] ; iambic_mode[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.131 ; 0.601 ; +; 0.630 ; spi_slave:spi_slave_rx2_inst|rdata[43] ; cw_speed[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.127 ; 0.617 ; +; 0.635 ; spi_slave:spi_slave_rx2_inst|rdata[46] ; iambic_mode[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.131 ; 0.618 ; +; 0.635 ; spi_slave:spi_slave_rx2_inst|rdata[44] ; cw_speed[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.127 ; 0.622 ; +; 0.673 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.074 ; 0.506 ; +; 0.678 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.074 ; 0.511 ; +; 0.704 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.098 ; 0.513 ; +; 0.706 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.098 ; 0.515 ; +; 0.711 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; rx2_freq[11]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.098 ; 0.520 ; +; 0.711 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.098 ; 0.520 ; +; 0.714 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.065 ; 0.556 ; +; 0.728 ; spi_slave:spi_slave_rx2_inst|rdata[41] ; cw_speed[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.126 ; 0.716 ; +; 0.728 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.098 ; 0.537 ; +; 0.740 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.074 ; 0.573 ; +; 0.745 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.104 ; 0.548 ; +; 0.750 ; spi_slave:spi_slave_rx2_inst|rdata[3] ; rx2_freq[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.143 ; 0.514 ; +; 0.752 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.098 ; 0.561 ; +; 0.753 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.143 ; 0.517 ; +; 0.754 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.074 ; 0.587 ; +; 0.755 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.098 ; 0.564 ; +; 0.756 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.139 ; 0.524 ; +; 0.757 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.135 ; 0.529 ; +; 0.788 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.178 ; 0.517 ; +; 0.820 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.060 ; 0.667 ; +; 0.824 ; spi_slave:spi_slave_rx2_inst|rdata[0] ; rx2_freq[0]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.052 ; 0.679 ; +; 0.832 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; rx2_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.091 ; 0.648 ; +; 0.841 ; spi_slave:spi_slave_rx2_inst|rdata[28] ; rx2_freq[28]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.095 ; 0.653 ; +; 0.845 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.074 ; 0.678 ; +; 0.856 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.081 ; 0.844 ; +; 0.864 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; rx2_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.106 ; 0.665 ; +; 0.866 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; rx2_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.106 ; 0.667 ; +; 0.875 ; spi_slave:spi_slave_rx2_inst|rdata[37] ; keyer_weight[5] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.142 ; 0.640 ; +; 0.880 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; tx_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.040 ; 0.827 ; +; 0.881 ; spi_slave:spi_slave_rx2_inst|rdata[35] ; keyer_weight[3] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.142 ; 0.646 ; +; 0.889 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.139 ; 0.657 ; +; 0.890 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; rx2_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.066 ; 0.731 ; +; 0.890 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.139 ; 0.658 ; +; 0.890 ; spi_slave:spi_slave_rx2_inst|rdata[36] ; keyer_weight[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.142 ; 0.655 ; +; 0.893 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.139 ; 0.661 ; +; 0.893 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.139 ; 0.661 ; +; 0.893 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; tx_freq[18] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.079 ; 0.879 ; +; 0.899 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; rx2_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.106 ; 0.700 ; +; 0.899 ; spi_slave:spi_slave_rx2_inst|rdata[31] ; rx2_freq[31] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.148 ; 0.658 ; +; 0.902 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.148 ; 0.661 ; +; 0.903 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; rx2_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.143 ; 0.667 ; +; 0.904 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.139 ; 0.672 ; +; 0.906 ; spi_slave:spi_slave_rx2_inst|rdata[33] ; keyer_weight[1] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.142 ; 0.671 ; +; 0.907 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.139 ; 0.675 ; +; 0.908 ; spi_slave:spi_slave_rx2_inst|rdata[34] ; keyer_weight[2] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.142 ; 0.673 ; +; 0.908 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.139 ; 0.676 ; +; 0.909 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; rx2_freq[24] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.148 ; 0.668 ; +; 0.909 ; spi_slave:spi_slave_rx2_inst|rdata[26] ; rx2_freq[26] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.148 ; 0.668 ; +; 0.909 ; spi_slave:spi_slave_rx2_inst|rdata[12] ; tx_freq[12] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.040 ; 0.856 ; +; 0.911 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; rx2_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.135 ; 0.683 ; +; 0.915 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; rx2_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.106 ; 0.716 ; +; 0.919 ; spi_slave:spi_slave_rx2_inst|rdata[25] ; rx2_freq[25]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.139 ; 0.687 ; +; 0.920 ; spi_slave:spi_slave_rx2_inst|rdata[16] ; rx2_freq[16] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.106 ; 0.721 ; +; 0.921 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; rx2_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.148 ; 0.680 ; +; 0.921 ; spi_slave:spi_slave_rx2_inst|rdata[27] ; rx2_freq[27] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.148 ; 0.680 ; +; 0.926 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; rx2_freq[22] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.148 ; 0.685 ; +; 0.926 ; spi_slave:spi_slave_rx2_inst|rdata[1] ; rx2_freq[1]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.170 ; 0.663 ; +; 0.929 ; spi_slave:spi_slave_rx2_inst|rdata[30] ; rx2_freq[30] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.148 ; 0.688 ; +; 0.930 ; spi_slave:spi_slave_rx2_inst|rdata[23] ; rx2_freq[23] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.148 ; 0.689 ; +; 0.932 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; tx_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.072 ; 0.911 ; +; 0.939 ; spi_slave:spi_slave_rx2_inst|rdata[32] ; keyer_weight[0] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.176 ; 0.670 ; +; 0.942 ; spi_slave:spi_slave_rx2_inst|rdata[2] ; tx_freq[2]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.003 ; 0.852 ; +; 0.943 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; tx_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.072 ; 0.922 ; +; 0.946 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; tx_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.072 ; 0.925 ; +; 0.946 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.174 ; 0.679 ; +; 0.952 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.040 ; 0.899 ; +; 0.952 ; spi_slave:spi_slave_rx2_inst|rdata[19] ; rx2_freq[19]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.070 ; 0.789 ; +; 0.954 ; spi_slave:spi_slave_rx2_inst|rdata[6] ; tx_freq[6]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.072 ; 0.933 ; +; 0.956 ; spi_slave:spi_slave_rx2_inst|rdata[29] ; rx2_freq[29] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.183 ; 0.680 ; +; 0.957 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.040 ; 0.904 ; +; 0.958 ; spi_slave:spi_slave_rx2_inst|rdata[10] ; tx_freq[10]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.040 ; 0.905 ; +; 0.958 ; spi_slave:spi_slave_rx2_inst|rdata[18] ; rx2_freq[18]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.056 ; 0.809 ; +; 0.959 ; spi_slave:spi_slave_rx2_inst|rdata[7] ; tx_freq[7]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.047 ; 0.913 ; +; 0.966 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.070 ; 0.803 ; +; 0.968 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.002 ; 0.873 ; +; 0.969 ; spi_slave:spi_slave_rx2_inst|rdata[11] ; tx_freq[11] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.040 ; 0.916 ; +; 0.972 ; spi_slave:spi_slave_rx2_inst|rdata[8] ; rx2_freq[8]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.066 ; 0.813 ; +; 0.972 ; spi_slave:spi_slave_rx2_inst|rdata[13] ; tx_freq[13] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.040 ; 0.919 ; +; 0.972 ; spi_slave:spi_slave_rx2_inst|rdata[4] ; tx_freq[4] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.003 ; 0.882 ; +; 0.975 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; tx_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.072 ; 0.954 ; +; 0.983 ; spi_slave:spi_slave_rx2_inst|rdata[14] ; tx_freq[14]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.040 ; 0.930 ; +; 0.988 ; spi_slave:spi_slave_rx2_inst|rdata[20] ; rx2_freq[20] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.079 ; 0.816 ; +; 0.988 ; spi_slave:spi_slave_rx2_inst|rdata[22] ; tx_freq[22]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.002 ; 0.893 ; +; 0.988 ; spi_slave:spi_slave_rx2_inst|rdata[21] ; tx_freq[21] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.004 ; 0.891 ; +; 0.990 ; spi_slave:spi_slave_rx2_inst|rdata[9] ; rx2_freq[9]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.066 ; 0.831 ; +; 0.991 ; spi_slave:spi_slave_rx2_inst|rdata[17] ; rx2_freq[17]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.066 ; 0.832 ; +; 0.992 ; spi_slave:spi_slave_rx2_inst|rdata[24] ; tx_freq[24]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.002 ; 0.897 ; +; 0.996 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; tx_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; 0.040 ; 0.943 ; +; 0.996 ; spi_slave:spi_slave_rx2_inst|rdata[15] ; rx2_freq[15] ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.106 ; 0.797 ; +; 0.997 ; spi_slave:spi_slave_rx2_inst|rdata[5] ; rx2_freq[5]~_Duplicate_1 ; spi_sck ; spi_slave:spi_slave_rx2_inst|done ; 0.000 ; -0.066 ; 0.838 ; +-------+----------------------------------------+---------------------------+--------------+-----------------------------------+--------------+------------+------------+ ++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Fast 1200mV 0C Model Hold: 'ad9866:ad9866_inst|dut1_pc[0]' ; ++-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ +; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; ++-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ +; 0.632 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.213 ; 2.950 ; +; 0.651 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.220 ; 2.976 ; +; 0.658 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.223 ; 2.986 ; +; 0.679 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.220 ; 3.004 ; +; 0.684 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.205 ; 2.994 ; +; 0.686 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.223 ; 3.014 ; +; 0.724 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.226 ; 3.055 ; +; 0.727 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.219 ; 3.051 ; +; 0.657 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.220 ; 2.982 ; +; 0.674 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.212 ; 2.991 ; +; 0.757 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.220 ; 3.082 ; +; 0.659 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.224 ; 2.988 ; +; 0.690 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 0.000 ; 2.219 ; 3.014 ; +; 5.712 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[10] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.205 ; 3.042 ; +; 5.745 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[12] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.220 ; 3.090 ; +; 5.859 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[7] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.220 ; 3.204 ; +; 5.929 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[4] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.224 ; 3.278 ; +; 5.934 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[0] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.220 ; 3.279 ; +; 5.966 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[8] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.220 ; 3.311 ; +; 5.804 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[1] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.213 ; 3.142 ; +; 6.004 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[9] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.219 ; 3.348 ; +; 6.006 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[2] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.219 ; 3.350 ; +; 6.052 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[6] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.223 ; 3.400 ; +; 6.070 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[11] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.223 ; 3.418 ; +; 5.961 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[5] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.226 ; 3.312 ; +; 5.852 ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|datain[3] ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; -5.000 ; 2.212 ; 3.189 ; ++-------+-------------------------------+-------------------------------+-------------------------------+-------------------------------+--------------+------------+------------+ + + +--------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fast 1200mV 0C Model Hold: 'virt_ad9866_rxclk' ; +--------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ; +--------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ -; 11.346 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.928 ; 2.428 ; -; 11.350 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.928 ; 2.432 ; -; 11.432 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.928 ; 2.514 ; -; 11.513 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.928 ; 2.595 ; -; 11.654 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.928 ; 2.736 ; -; 11.686 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.012 ; 2.684 ; -; 11.699 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.012 ; 2.697 ; -; 11.900 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.256 ; 2.654 ; -; 12.985 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.945 ; 4.050 ; -; 13.163 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.012 ; 4.161 ; -; 13.229 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.945 ; 4.294 ; -; 13.298 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.928 ; 4.380 ; +; 11.456 ; transmitter:transmitter_inst|out_data[11] ; ad9866_adio[9] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.903 ; 2.563 ; +; 11.484 ; transmitter:transmitter_inst|out_data[5] ; ad9866_adio[3] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.880 ; 2.614 ; +; 11.558 ; transmitter:transmitter_inst|out_data[8] ; ad9866_adio[6] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.880 ; 2.688 ; +; 11.577 ; transmitter:transmitter_inst|out_data[7] ; ad9866_adio[5] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.880 ; 2.707 ; +; 11.587 ; transmitter:transmitter_inst|out_data[6] ; ad9866_adio[4] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.101 ; 2.496 ; +; 11.621 ; transmitter:transmitter_inst|out_data[10] ; ad9866_adio[8] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.880 ; 2.751 ; +; 12.217 ; transmitter:transmitter_inst|out_data[13] ; ad9866_adio[11] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.255 ; 2.972 ; +; 12.346 ; transmitter:transmitter_inst|out_data[4] ; ad9866_adio[2] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.117 ; 3.239 ; +; 13.028 ; transmitter:transmitter_inst|out_data[2] ; ad9866_adio[0] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.880 ; 4.158 ; +; 13.093 ; transmitter:transmitter_inst|out_data[9] ; ad9866_adio[7] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.880 ; 4.223 ; +; 13.102 ; transmitter:transmitter_inst|out_data[12] ; ad9866_adio[10] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -1.805 ; 4.307 ; +; 13.609 ; transmitter:transmitter_inst|out_data[3] ; ad9866_adio[1] ; ad9866_clk ; virt_ad9866_rxclk ; -6.510 ; -2.117 ; 4.502 ; +--------+-------------------------------------------+-----------------+--------------+-------------------+--------------+------------+------------+ @@ -6643,7 +6643,7 @@ Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds. Number of Synchronizer Chains Found: 64 Shortest Synchronizer Chain: 2 Registers Fraction of Chains for which MTBFs Could Not be Calculated: 0.500 -Worst Case Available Settling Time: 20.161 ns +Worst Case Available Settling Time: 19.717 ns Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions. - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 10.8 @@ -6655,20 +6655,20 @@ Typical MTBF values are calculated based on the nominal silicon characteristics, +--------------------------------------------------------------+-----------+--------+----------+---------+---------------------+ ; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ; +--------------------------------------------------------------+-----------+--------+----------+---------+---------------------+ -; Worst-case Slack ; 0.240 ; 0.048 ; N/A ; N/A ; -2.666 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2599.539 ; 0.185 ; N/A ; N/A ; 2603.373 ; -; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33325.980 ; 0.187 ; N/A ; N/A ; 16665.873 ; -; ad9866:ad9866_inst|dut1_pc[0] ; 1.614 ; 0.319 ; N/A ; N/A ; 4.543 ; -; ad9866_clk ; 0.646 ; 0.099 ; N/A ; N/A ; 5.460 ; +; Worst-case Slack ; 0.080 ; 0.066 ; N/A ; N/A ; -2.666 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 2598.989 ; 0.185 ; N/A ; N/A ; 2603.370 ; +; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 33325.302 ; 0.187 ; N/A ; N/A ; 16665.870 ; +; ad9866:ad9866_inst|dut1_pc[0] ; 1.418 ; 0.632 ; N/A ; N/A ; 4.550 ; +; ad9866_clk ; 0.550 ; 0.066 ; N/A ; N/A ; 5.465 ; ; ad9866_rxclk ; N/A ; N/A ; N/A ; N/A ; -2.666 ; ; ad9866_txclk ; N/A ; N/A ; N/A ; N/A ; -2.666 ; -; clk_10mhz ; 91.911 ; 0.187 ; N/A ; N/A ; 49.189 ; -; spi_ce0 ; 0.240 ; 0.048 ; N/A ; N/A ; 1248.849 ; -; spi_ce1 ; 2496.334 ; 0.194 ; N/A ; N/A ; 1248.970 ; -; spi_sck ; 0.283 ; 0.188 ; N/A ; N/A ; 30.987 ; -; spi_slave:spi_slave_rx2_inst|done ; 0.732 ; 0.513 ; N/A ; N/A ; 1249.369 ; -; spi_slave:spi_slave_rx_inst|done ; 1.487 ; 0.101 ; N/A ; N/A ; 1249.229 ; -; virt_ad9866_rxclk ; 1.131 ; 11.346 ; N/A ; N/A ; N/A ; +; clk_10mhz ; 92.640 ; 0.188 ; N/A ; N/A ; 49.225 ; +; spi_ce0 ; 0.437 ; 0.146 ; N/A ; N/A ; 1248.810 ; +; spi_ce1 ; 2494.853 ; 0.120 ; N/A ; N/A ; 1248.907 ; +; spi_sck ; 0.080 ; 0.185 ; N/A ; N/A ; 31.017 ; +; spi_slave:spi_slave_rx2_inst|done ; 0.384 ; 0.484 ; N/A ; N/A ; 1249.371 ; +; spi_slave:spi_slave_rx_inst|done ; 1.349 ; 0.173 ; N/A ; N/A ; 1249.297 ; +; virt_ad9866_rxclk ; 0.442 ; 11.456 ; N/A ; N/A ; N/A ; ; Design-wide TNS ; 0.0 ; 0.0 ; 0.0 ; 0.0 ; -5.332 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.000 ; N/A ; N/A ; 0.000 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.000 ; N/A ; N/A ; 0.000 ; @@ -6909,7 +6909,7 @@ Typical MTBF values are calculated based on the nominal silicon characteristics, ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 19 ; 19 ; 0 ; 0 ; ; clk_10mhz ; ad9866:ad9866_inst|dut1_pc[0] ; false path ; 0 ; false path ; 0 ; ; spi_slave:spi_slave_rx_inst|done ; ad9866:ad9866_inst|dut1_pc[0] ; false path ; 0 ; 0 ; 0 ; -; ad9866_clk ; ad9866_clk ; 455611 ; 2 ; 12 ; 0 ; +; ad9866_clk ; ad9866_clk ; 456237 ; 2 ; 12 ; 0 ; ; clk_10mhz ; ad9866_clk ; false path ; 0 ; 0 ; 0 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; ad9866_clk ; false path ; false path ; 0 ; 0 ; ; spi_ce0 ; ad9866_clk ; false path ; false path ; 0 ; 0 ; @@ -6950,7 +6950,7 @@ Entries labeled "false path" only account for clock-to-clock false paths and not ; ad9866:ad9866_inst|dut1_pc[0] ; ad9866:ad9866_inst|dut1_pc[0] ; 19 ; 19 ; 0 ; 0 ; ; clk_10mhz ; ad9866:ad9866_inst|dut1_pc[0] ; false path ; 0 ; false path ; 0 ; ; spi_slave:spi_slave_rx_inst|done ; ad9866:ad9866_inst|dut1_pc[0] ; false path ; 0 ; 0 ; 0 ; -; ad9866_clk ; ad9866_clk ; 455611 ; 2 ; 12 ; 0 ; +; ad9866_clk ; ad9866_clk ; 456237 ; 2 ; 12 ; 0 ; ; clk_10mhz ; ad9866_clk ; false path ; 0 ; 0 ; 0 ; ; PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] ; ad9866_clk ; false path ; false path ; 0 ; 0 ; ; spi_ce0 ; ad9866_clk ; false path ; false path ; 0 ; 0 ; @@ -7072,7 +7072,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi Info: ******************************************************************* Info: Running Quartus Prime TimeQuest Timing Analyzer Info: Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition - Info: Processing started: Sat Feb 24 19:55:08 2018 + Info: Processing started: Fri Mar 09 21:38:00 2018 Info: Command: quartus_sta radioberry -c radioberry-10CL016 Info: qsta_default_script.tcl version: #1 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance. @@ -7095,34 +7095,34 @@ Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQue Warning (332061): Virtual clock virt_ad9866_txclk is never referenced in any input or output delay assignment. Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON Info: Analyzing Slow 1200mV 85C Model -Info (332146): Worst-case setup slack is 0.283 +Info (332146): Worst-case setup slack is 0.080 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): 0.283 0.000 spi_sck - Info (332119): 0.286 0.000 spi_ce0 - Info (332119): 0.646 0.000 ad9866_clk - Info (332119): 0.732 0.000 spi_slave:spi_slave_rx2_inst|done - Info (332119): 1.131 0.000 virt_ad9866_rxclk - Info (332119): 1.487 0.000 spi_slave:spi_slave_rx_inst|done - Info (332119): 1.614 0.000 ad9866:ad9866_inst|dut1_pc[0] - Info (332119): 91.911 0.000 clk_10mhz - Info (332119): 2496.334 0.000 spi_ce1 - Info (332119): 2599.539 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] - Info (332119): 33325.980 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] -Info (332146): Worst-case hold slack is 0.258 + Info (332119): 0.080 0.000 spi_sck + Info (332119): 0.384 0.000 spi_slave:spi_slave_rx2_inst|done + Info (332119): 0.442 0.000 virt_ad9866_rxclk + Info (332119): 0.515 0.000 spi_ce0 + Info (332119): 0.550 0.000 ad9866_clk + Info (332119): 1.349 0.000 spi_slave:spi_slave_rx_inst|done + Info (332119): 1.418 0.000 ad9866:ad9866_inst|dut1_pc[0] + Info (332119): 92.640 0.000 clk_10mhz + Info (332119): 2494.853 0.000 spi_ce1 + Info (332119): 2598.989 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 33325.302 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] +Info (332146): Worst-case hold slack is 0.370 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): 0.258 0.000 spi_ce0 - Info (332119): 0.344 0.000 ad9866_clk - Info (332119): 0.454 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 0.370 0.000 spi_ce1 + Info (332119): 0.385 0.000 ad9866_clk + Info (332119): 0.426 0.000 spi_ce0 + Info (332119): 0.447 0.000 spi_sck Info (332119): 0.454 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] Info (332119): 0.454 0.000 clk_10mhz - Info (332119): 0.476 0.000 spi_ce1 - Info (332119): 0.476 0.000 spi_sck - Info (332119): 0.564 0.000 spi_slave:spi_slave_rx_inst|done - Info (332119): 1.174 0.000 ad9866:ad9866_inst|dut1_pc[0] - Info (332119): 1.564 0.000 spi_slave:spi_slave_rx2_inst|done - Info (332119): 14.885 0.000 virt_ad9866_rxclk + Info (332119): 0.455 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 0.709 0.000 spi_slave:spi_slave_rx_inst|done + Info (332119): 1.524 0.000 spi_slave:spi_slave_rx2_inst|done + Info (332119): 1.759 0.000 ad9866:ad9866_inst|dut1_pc[0] + Info (332119): 15.143 0.000 virt_ad9866_rxclk Info (332140): No Recovery paths to report Info (332140): No Removal paths to report Critical Warning (332148): Timing requirements not met @@ -7132,23 +7132,23 @@ Info (332146): Worst-case minimum pulse width slack is -2.666 Info (332119): ========= =================== ===================== Info (332119): -2.666 -2.666 ad9866_rxclk Info (332119): -2.666 -2.666 ad9866_txclk - Info (332119): 4.607 0.000 ad9866:ad9866_inst|dut1_pc[0] - Info (332119): 5.751 0.000 ad9866_clk - Info (332119): 31.545 0.000 spi_sck - Info (332119): 49.516 0.000 clk_10mhz - Info (332119): 1248.952 0.000 spi_ce0 - Info (332119): 1249.122 0.000 spi_ce1 - Info (332119): 1249.363 0.000 spi_slave:spi_slave_rx_inst|done - Info (332119): 1249.369 0.000 spi_slave:spi_slave_rx2_inst|done - Info (332119): 2603.373 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] - Info (332119): 16665.873 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] + Info (332119): 4.642 0.000 ad9866:ad9866_inst|dut1_pc[0] + Info (332119): 5.747 0.000 ad9866_clk + Info (332119): 31.573 0.000 spi_sck + Info (332119): 49.555 0.000 clk_10mhz + Info (332119): 1248.954 0.000 spi_ce0 + Info (332119): 1249.077 0.000 spi_ce1 + Info (332119): 1249.371 0.000 spi_slave:spi_slave_rx2_inst|done + Info (332119): 1249.378 0.000 spi_slave:spi_slave_rx_inst|done + Info (332119): 2603.370 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 16665.870 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] Info (332114): Report Metastability: Found 64 synchronizer chains. Info (332114): Typical MTBF of Design is 1e+09 years or 3.15e+16 seconds. Info (332114): Number of Synchronizer Chains Found: 64 Info (332114): Shortest Synchronizer Chain: 2 Registers Info (332114): Fraction of Chains for which MTBFs Could Not be Calculated: 0.500 - Info (332114): Worst Case Available Settling Time: 13.637 ns + Info (332114): Worst Case Available Settling Time: 12.716 ns Info (332114): Info (332114): Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions. Info (332114): - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 10.8 @@ -7157,34 +7157,34 @@ Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. Warning (332061): Virtual clock virt_ad9866_txclk is never referenced in any input or output delay assignment. -Info (332146): Worst-case setup slack is 0.240 +Info (332146): Worst-case setup slack is 0.293 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): 0.240 0.000 spi_ce0 - Info (332119): 0.475 0.000 spi_sck - Info (332119): 0.768 0.000 spi_slave:spi_slave_rx2_inst|done - Info (332119): 1.199 0.000 ad9866_clk - Info (332119): 1.560 0.000 spi_slave:spi_slave_rx_inst|done - Info (332119): 1.983 0.000 ad9866:ad9866_inst|dut1_pc[0] - Info (332119): 2.561 0.000 virt_ad9866_rxclk - Info (332119): 92.340 0.000 clk_10mhz - Info (332119): 2496.630 0.000 spi_ce1 - Info (332119): 2599.732 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] - Info (332119): 33326.295 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] -Info (332146): Worst-case hold slack is 0.241 + Info (332119): 0.293 0.000 spi_sck + Info (332119): 0.422 0.000 spi_slave:spi_slave_rx2_inst|done + Info (332119): 0.437 0.000 spi_ce0 + Info (332119): 1.088 0.000 ad9866_clk + Info (332119): 1.441 0.000 spi_slave:spi_slave_rx_inst|done + Info (332119): 1.644 0.000 ad9866:ad9866_inst|dut1_pc[0] + Info (332119): 1.915 0.000 virt_ad9866_rxclk + Info (332119): 93.046 0.000 clk_10mhz + Info (332119): 2495.085 0.000 spi_ce1 + Info (332119): 2599.239 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 33325.618 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] +Info (332146): Worst-case hold slack is 0.341 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): 0.241 0.000 spi_ce0 - Info (332119): 0.329 0.000 ad9866_clk - Info (332119): 0.403 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 0.341 0.000 spi_ce1 + Info (332119): 0.387 0.000 ad9866_clk Info (332119): 0.403 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] Info (332119): 0.403 0.000 clk_10mhz - Info (332119): 0.423 0.000 spi_ce1 - Info (332119): 0.437 0.000 spi_sck - Info (332119): 0.574 0.000 spi_slave:spi_slave_rx_inst|done - Info (332119): 1.219 0.000 ad9866:ad9866_inst|dut1_pc[0] - Info (332119): 1.599 0.000 spi_slave:spi_slave_rx2_inst|done - Info (332119): 14.058 0.000 virt_ad9866_rxclk + Info (332119): 0.404 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 0.407 0.000 spi_ce0 + Info (332119): 0.410 0.000 spi_sck + Info (332119): 0.703 0.000 spi_slave:spi_slave_rx_inst|done + Info (332119): 1.541 0.000 spi_slave:spi_slave_rx2_inst|done + Info (332119): 1.754 0.000 ad9866:ad9866_inst|dut1_pc[0] + Info (332119): 14.280 0.000 virt_ad9866_rxclk Info (332140): No Recovery paths to report Info (332140): No Removal paths to report Critical Warning (332148): Timing requirements not met @@ -7194,14 +7194,14 @@ Info (332146): Worst-case minimum pulse width slack is -2.666 Info (332119): ========= =================== ===================== Info (332119): -2.666 -2.666 ad9866_rxclk Info (332119): -2.666 -2.666 ad9866_txclk - Info (332119): 4.543 0.000 ad9866:ad9866_inst|dut1_pc[0] - Info (332119): 5.748 0.000 ad9866_clk - Info (332119): 31.454 0.000 spi_sck - Info (332119): 49.411 0.000 clk_10mhz - Info (332119): 1249.076 0.000 spi_ce0 - Info (332119): 1249.187 0.000 spi_ce1 - Info (332119): 1249.229 0.000 spi_slave:spi_slave_rx_inst|done - Info (332119): 1249.453 0.000 spi_slave:spi_slave_rx2_inst|done + Info (332119): 4.550 0.000 ad9866:ad9866_inst|dut1_pc[0] + Info (332119): 5.706 0.000 ad9866_clk + Info (332119): 31.477 0.000 spi_sck + Info (332119): 49.459 0.000 clk_10mhz + Info (332119): 1249.091 0.000 spi_ce0 + Info (332119): 1249.208 0.000 spi_ce1 + Info (332119): 1249.297 0.000 spi_slave:spi_slave_rx_inst|done + Info (332119): 1249.412 0.000 spi_slave:spi_slave_rx2_inst|done Info (332119): 2603.435 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] Info (332119): 16665.935 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] Info (332114): Report Metastability: Found 64 synchronizer chains. @@ -7210,41 +7210,41 @@ Info (332114): Report Metastability: Found 64 synchronizer chains. Info (332114): Number of Synchronizer Chains Found: 64 Info (332114): Shortest Synchronizer Chain: 2 Registers Info (332114): Fraction of Chains for which MTBFs Could Not be Calculated: 0.500 - Info (332114): Worst Case Available Settling Time: 14.562 ns + Info (332114): Worst Case Available Settling Time: 13.704 ns Info (332114): Info (332114): Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions. Info (332114): - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 10.8 Info: Analyzing Fast 1200mV 0C Model Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. Warning (332061): Virtual clock virt_ad9866_txclk is never referenced in any input or output delay assignment. -Info (332146): Worst-case setup slack is 0.471 +Info (332146): Worst-case setup slack is 0.564 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): 0.471 0.000 spi_sck - Info (332119): 1.373 0.000 ad9866_clk - Info (332119): 1.794 0.000 spi_ce0 - Info (332119): 2.633 0.000 spi_slave:spi_slave_rx2_inst|done - Info (332119): 2.854 0.000 spi_slave:spi_slave_rx_inst|done - Info (332119): 3.284 0.000 ad9866:ad9866_inst|dut1_pc[0] - Info (332119): 5.943 0.000 virt_ad9866_rxclk - Info (332119): 96.266 0.000 clk_10mhz - Info (332119): 2498.420 0.000 spi_ce1 - Info (332119): 2602.186 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] - Info (332119): 33330.158 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] -Info (332146): Worst-case hold slack is 0.048 + Info (332119): 0.564 0.000 spi_sck + Info (332119): 1.346 0.000 ad9866_clk + Info (332119): 1.890 0.000 spi_ce0 + Info (332119): 2.443 0.000 spi_slave:spi_slave_rx2_inst|done + Info (332119): 2.815 0.000 spi_slave:spi_slave_rx_inst|done + Info (332119): 3.213 0.000 ad9866:ad9866_inst|dut1_pc[0] + Info (332119): 5.586 0.000 virt_ad9866_rxclk + Info (332119): 96.870 0.000 clk_10mhz + Info (332119): 2497.734 0.000 spi_ce1 + Info (332119): 2601.894 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 33329.832 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] +Info (332146): Worst-case hold slack is 0.066 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): 0.048 0.000 spi_ce0 - Info (332119): 0.099 0.000 ad9866_clk - Info (332119): 0.101 0.000 spi_slave:spi_slave_rx_inst|done + Info (332119): 0.066 0.000 ad9866_clk + Info (332119): 0.120 0.000 spi_ce1 + Info (332119): 0.146 0.000 spi_ce0 + Info (332119): 0.173 0.000 spi_slave:spi_slave_rx_inst|done Info (332119): 0.185 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 0.185 0.000 spi_sck Info (332119): 0.187 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] - Info (332119): 0.187 0.000 clk_10mhz - Info (332119): 0.188 0.000 spi_sck - Info (332119): 0.194 0.000 spi_ce1 - Info (332119): 0.319 0.000 ad9866:ad9866_inst|dut1_pc[0] - Info (332119): 0.513 0.000 spi_slave:spi_slave_rx2_inst|done - Info (332119): 11.346 0.000 virt_ad9866_rxclk + Info (332119): 0.188 0.000 clk_10mhz + Info (332119): 0.484 0.000 spi_slave:spi_slave_rx2_inst|done + Info (332119): 0.632 0.000 ad9866:ad9866_inst|dut1_pc[0] + Info (332119): 11.456 0.000 virt_ad9866_rxclk Info (332140): No Recovery paths to report Info (332140): No Removal paths to report Info (332146): Worst-case minimum pulse width slack is 2.563 @@ -7252,14 +7252,14 @@ Info (332146): Worst-case minimum pulse width slack is 2.563 Info (332119): ========= =================== ===================== Info (332119): 2.563 0.000 ad9866_rxclk Info (332119): 2.563 0.000 ad9866_txclk - Info (332119): 4.842 0.000 ad9866:ad9866_inst|dut1_pc[0] - Info (332119): 5.460 0.000 ad9866_clk - Info (332119): 30.987 0.000 spi_sck - Info (332119): 49.189 0.000 clk_10mhz - Info (332119): 1248.849 0.000 spi_ce0 - Info (332119): 1248.970 0.000 spi_ce1 - Info (332119): 1249.572 0.000 spi_slave:spi_slave_rx_inst|done - Info (332119): 1249.668 0.000 spi_slave:spi_slave_rx2_inst|done + Info (332119): 4.809 0.000 ad9866:ad9866_inst|dut1_pc[0] + Info (332119): 5.465 0.000 ad9866_clk + Info (332119): 31.017 0.000 spi_sck + Info (332119): 49.225 0.000 clk_10mhz + Info (332119): 1248.810 0.000 spi_ce0 + Info (332119): 1248.907 0.000 spi_ce1 + Info (332119): 1249.596 0.000 spi_slave:spi_slave_rx_inst|done + Info (332119): 1249.675 0.000 spi_slave:spi_slave_rx2_inst|done Info (332119): 2603.671 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0] Info (332119): 16666.212 0.000 PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1] Info (332114): Report Metastability: Found 64 synchronizer chains. @@ -7268,15 +7268,15 @@ Info (332114): Report Metastability: Found 64 synchronizer chains. Info (332114): Number of Synchronizer Chains Found: 64 Info (332114): Shortest Synchronizer Chain: 2 Registers Info (332114): Fraction of Chains for which MTBFs Could Not be Calculated: 0.500 - Info (332114): Worst Case Available Settling Time: 20.161 ns + Info (332114): Worst Case Available Settling Time: 19.717 ns Info (332114): Info (332114): Typical MTBF values are calculated based on the nominal silicon characteristics, at nominal operating conditions. Info (332114): - Under typical conditions, an increase of 100ps in available settling time will increase MTBF values by a factor of 10.8 Info (332101): Design is fully constrained for setup requirements Info (332101): Design is fully constrained for hold requirements Info: Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 10 warnings - Info: Peak virtual memory: 853 megabytes - Info: Processing ended: Sat Feb 24 19:55:21 2018 + Info: Peak virtual memory: 854 megabytes + Info: Processing ended: Fri Mar 09 21:38:13 2018 Info: Elapsed time: 00:00:13 Info: Total CPU time (on all processors): 00:00:15 diff --git a/firmware/output_files/radioberry-10CL016.sta.summary b/firmware/output_files/radioberry-10CL016.sta.summary index 9d2f398..4f9ae47 100644 --- a/firmware/output_files/radioberry-10CL016.sta.summary +++ b/firmware/output_files/radioberry-10CL016.sta.summary @@ -3,59 +3,63 @@ TimeQuest Timing Analyzer Summary ------------------------------------------------------------ Type : Slow 1200mV 85C Model Setup 'spi_sck' -Slack : 0.283 -TNS : 0.000 - -Type : Slow 1200mV 85C Model Setup 'spi_ce0' -Slack : 0.286 -TNS : 0.000 - -Type : Slow 1200mV 85C Model Setup 'ad9866_clk' -Slack : 0.646 +Slack : 0.080 TNS : 0.000 Type : Slow 1200mV 85C Model Setup 'spi_slave:spi_slave_rx2_inst|done' -Slack : 0.732 +Slack : 0.384 TNS : 0.000 Type : Slow 1200mV 85C Model Setup 'virt_ad9866_rxclk' -Slack : 1.131 +Slack : 0.442 +TNS : 0.000 + +Type : Slow 1200mV 85C Model Setup 'spi_ce0' +Slack : 0.515 +TNS : 0.000 + +Type : Slow 1200mV 85C Model Setup 'ad9866_clk' +Slack : 0.550 TNS : 0.000 Type : Slow 1200mV 85C Model Setup 'spi_slave:spi_slave_rx_inst|done' -Slack : 1.487 +Slack : 1.349 TNS : 0.000 Type : Slow 1200mV 85C Model Setup 'ad9866:ad9866_inst|dut1_pc[0]' -Slack : 1.614 +Slack : 1.418 TNS : 0.000 Type : Slow 1200mV 85C Model Setup 'clk_10mhz' -Slack : 91.911 +Slack : 92.640 TNS : 0.000 Type : Slow 1200mV 85C Model Setup 'spi_ce1' -Slack : 2496.334 +Slack : 2494.853 TNS : 0.000 Type : Slow 1200mV 85C Model Setup 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' -Slack : 2599.539 +Slack : 2598.989 TNS : 0.000 Type : Slow 1200mV 85C Model Setup 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' -Slack : 33325.980 +Slack : 33325.302 TNS : 0.000 -Type : Slow 1200mV 85C Model Hold 'spi_ce0' -Slack : 0.258 +Type : Slow 1200mV 85C Model Hold 'spi_ce1' +Slack : 0.370 TNS : 0.000 Type : Slow 1200mV 85C Model Hold 'ad9866_clk' -Slack : 0.344 +Slack : 0.385 TNS : 0.000 -Type : Slow 1200mV 85C Model Hold 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' -Slack : 0.454 +Type : Slow 1200mV 85C Model Hold 'spi_ce0' +Slack : 0.426 +TNS : 0.000 + +Type : Slow 1200mV 85C Model Hold 'spi_sck' +Slack : 0.447 TNS : 0.000 Type : Slow 1200mV 85C Model Hold 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' @@ -66,28 +70,24 @@ Type : Slow 1200mV 85C Model Hold 'clk_10mhz' Slack : 0.454 TNS : 0.000 -Type : Slow 1200mV 85C Model Hold 'spi_ce1' -Slack : 0.476 -TNS : 0.000 - -Type : Slow 1200mV 85C Model Hold 'spi_sck' -Slack : 0.476 +Type : Slow 1200mV 85C Model Hold 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' +Slack : 0.455 TNS : 0.000 Type : Slow 1200mV 85C Model Hold 'spi_slave:spi_slave_rx_inst|done' -Slack : 0.564 -TNS : 0.000 - -Type : Slow 1200mV 85C Model Hold 'ad9866:ad9866_inst|dut1_pc[0]' -Slack : 1.174 +Slack : 0.709 TNS : 0.000 Type : Slow 1200mV 85C Model Hold 'spi_slave:spi_slave_rx2_inst|done' -Slack : 1.564 +Slack : 1.524 +TNS : 0.000 + +Type : Slow 1200mV 85C Model Hold 'ad9866:ad9866_inst|dut1_pc[0]' +Slack : 1.759 TNS : 0.000 Type : Slow 1200mV 85C Model Hold 'virt_ad9866_rxclk' -Slack : 14.885 +Slack : 15.143 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'ad9866_rxclk' @@ -99,99 +99,95 @@ Slack : -2.666 TNS : -2.666 Type : Slow 1200mV 85C Model Minimum Pulse Width 'ad9866:ad9866_inst|dut1_pc[0]' -Slack : 4.607 +Slack : 4.642 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'ad9866_clk' -Slack : 5.751 +Slack : 5.747 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_sck' -Slack : 31.545 +Slack : 31.573 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'clk_10mhz' -Slack : 49.516 +Slack : 49.555 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_ce0' -Slack : 1248.952 +Slack : 1248.954 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_ce1' -Slack : 1249.122 -TNS : 0.000 - -Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_slave:spi_slave_rx_inst|done' -Slack : 1249.363 +Slack : 1249.077 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_slave:spi_slave_rx2_inst|done' -Slack : 1249.369 +Slack : 1249.371 +TNS : 0.000 + +Type : Slow 1200mV 85C Model Minimum Pulse Width 'spi_slave:spi_slave_rx_inst|done' +Slack : 1249.378 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' -Slack : 2603.373 +Slack : 2603.370 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' -Slack : 16665.873 -TNS : 0.000 - -Type : Slow 1200mV 0C Model Setup 'spi_ce0' -Slack : 0.240 +Slack : 16665.870 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'spi_sck' -Slack : 0.475 +Slack : 0.293 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'spi_slave:spi_slave_rx2_inst|done' -Slack : 0.768 +Slack : 0.422 +TNS : 0.000 + +Type : Slow 1200mV 0C Model Setup 'spi_ce0' +Slack : 0.437 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'ad9866_clk' -Slack : 1.199 +Slack : 1.088 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'spi_slave:spi_slave_rx_inst|done' -Slack : 1.560 +Slack : 1.441 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'ad9866:ad9866_inst|dut1_pc[0]' -Slack : 1.983 +Slack : 1.644 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'virt_ad9866_rxclk' -Slack : 2.561 +Slack : 1.915 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'clk_10mhz' -Slack : 92.340 +Slack : 93.046 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'spi_ce1' -Slack : 2496.630 +Slack : 2495.085 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' -Slack : 2599.732 +Slack : 2599.239 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' -Slack : 33326.295 +Slack : 33325.618 TNS : 0.000 -Type : Slow 1200mV 0C Model Hold 'spi_ce0' -Slack : 0.241 +Type : Slow 1200mV 0C Model Hold 'spi_ce1' +Slack : 0.341 TNS : 0.000 Type : Slow 1200mV 0C Model Hold 'ad9866_clk' -Slack : 0.329 -TNS : 0.000 - -Type : Slow 1200mV 0C Model Hold 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' -Slack : 0.403 +Slack : 0.387 TNS : 0.000 Type : Slow 1200mV 0C Model Hold 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' @@ -202,28 +198,32 @@ Type : Slow 1200mV 0C Model Hold 'clk_10mhz' Slack : 0.403 TNS : 0.000 -Type : Slow 1200mV 0C Model Hold 'spi_ce1' -Slack : 0.423 +Type : Slow 1200mV 0C Model Hold 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' +Slack : 0.404 +TNS : 0.000 + +Type : Slow 1200mV 0C Model Hold 'spi_ce0' +Slack : 0.407 TNS : 0.000 Type : Slow 1200mV 0C Model Hold 'spi_sck' -Slack : 0.437 +Slack : 0.410 TNS : 0.000 Type : Slow 1200mV 0C Model Hold 'spi_slave:spi_slave_rx_inst|done' -Slack : 0.574 -TNS : 0.000 - -Type : Slow 1200mV 0C Model Hold 'ad9866:ad9866_inst|dut1_pc[0]' -Slack : 1.219 +Slack : 0.703 TNS : 0.000 Type : Slow 1200mV 0C Model Hold 'spi_slave:spi_slave_rx2_inst|done' -Slack : 1.599 +Slack : 1.541 +TNS : 0.000 + +Type : Slow 1200mV 0C Model Hold 'ad9866:ad9866_inst|dut1_pc[0]' +Slack : 1.754 TNS : 0.000 Type : Slow 1200mV 0C Model Hold 'virt_ad9866_rxclk' -Slack : 14.058 +Slack : 14.280 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'ad9866_rxclk' @@ -235,35 +235,35 @@ Slack : -2.666 TNS : -2.666 Type : Slow 1200mV 0C Model Minimum Pulse Width 'ad9866:ad9866_inst|dut1_pc[0]' -Slack : 4.543 +Slack : 4.550 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'ad9866_clk' -Slack : 5.748 +Slack : 5.706 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_sck' -Slack : 31.454 +Slack : 31.477 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'clk_10mhz' -Slack : 49.411 +Slack : 49.459 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_ce0' -Slack : 1249.076 +Slack : 1249.091 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_ce1' -Slack : 1249.187 +Slack : 1249.208 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_slave:spi_slave_rx_inst|done' -Slack : 1249.229 +Slack : 1249.297 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'spi_slave:spi_slave_rx2_inst|done' -Slack : 1249.453 +Slack : 1249.412 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' @@ -275,91 +275,91 @@ Slack : 16665.935 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'spi_sck' -Slack : 0.471 +Slack : 0.564 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'ad9866_clk' -Slack : 1.373 +Slack : 1.346 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'spi_ce0' -Slack : 1.794 +Slack : 1.890 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'spi_slave:spi_slave_rx2_inst|done' -Slack : 2.633 +Slack : 2.443 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'spi_slave:spi_slave_rx_inst|done' -Slack : 2.854 +Slack : 2.815 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'ad9866:ad9866_inst|dut1_pc[0]' -Slack : 3.284 +Slack : 3.213 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'virt_ad9866_rxclk' -Slack : 5.943 +Slack : 5.586 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'clk_10mhz' -Slack : 96.266 +Slack : 96.870 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'spi_ce1' -Slack : 2498.420 +Slack : 2497.734 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' -Slack : 2602.186 +Slack : 2601.894 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' -Slack : 33330.158 -TNS : 0.000 - -Type : Fast 1200mV 0C Model Hold 'spi_ce0' -Slack : 0.048 +Slack : 33329.832 TNS : 0.000 Type : Fast 1200mV 0C Model Hold 'ad9866_clk' -Slack : 0.099 +Slack : 0.066 +TNS : 0.000 + +Type : Fast 1200mV 0C Model Hold 'spi_ce1' +Slack : 0.120 +TNS : 0.000 + +Type : Fast 1200mV 0C Model Hold 'spi_ce0' +Slack : 0.146 TNS : 0.000 Type : Fast 1200mV 0C Model Hold 'spi_slave:spi_slave_rx_inst|done' -Slack : 0.101 +Slack : 0.173 TNS : 0.000 Type : Fast 1200mV 0C Model Hold 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' Slack : 0.185 TNS : 0.000 +Type : Fast 1200mV 0C Model Hold 'spi_sck' +Slack : 0.185 +TNS : 0.000 + Type : Fast 1200mV 0C Model Hold 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[1]' Slack : 0.187 TNS : 0.000 Type : Fast 1200mV 0C Model Hold 'clk_10mhz' -Slack : 0.187 -TNS : 0.000 - -Type : Fast 1200mV 0C Model Hold 'spi_sck' Slack : 0.188 TNS : 0.000 -Type : Fast 1200mV 0C Model Hold 'spi_ce1' -Slack : 0.194 +Type : Fast 1200mV 0C Model Hold 'spi_slave:spi_slave_rx2_inst|done' +Slack : 0.484 TNS : 0.000 Type : Fast 1200mV 0C Model Hold 'ad9866:ad9866_inst|dut1_pc[0]' -Slack : 0.319 -TNS : 0.000 - -Type : Fast 1200mV 0C Model Hold 'spi_slave:spi_slave_rx2_inst|done' -Slack : 0.513 +Slack : 0.632 TNS : 0.000 Type : Fast 1200mV 0C Model Hold 'virt_ad9866_rxclk' -Slack : 11.346 +Slack : 11.456 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'ad9866_rxclk' @@ -371,35 +371,35 @@ Slack : 2.563 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'ad9866:ad9866_inst|dut1_pc[0]' -Slack : 4.842 +Slack : 4.809 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'ad9866_clk' -Slack : 5.460 +Slack : 5.465 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_sck' -Slack : 30.987 +Slack : 31.017 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'clk_10mhz' -Slack : 49.189 +Slack : 49.225 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_ce0' -Slack : 1248.849 +Slack : 1248.810 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_ce1' -Slack : 1248.970 +Slack : 1248.907 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_slave:spi_slave_rx_inst|done' -Slack : 1249.572 +Slack : 1249.596 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'spi_slave:spi_slave_rx2_inst|done' -Slack : 1249.668 +Slack : 1249.675 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'PLL_IAMBIC_inst|altpll_component|auto_generated|pll1|clk[0]' diff --git a/firmware/radioberry-10CL016.qws b/firmware/radioberry-10CL016.qws deleted file mode 100644 index 63563b7..0000000 Binary files a/firmware/radioberry-10CL016.qws and /dev/null differ diff --git a/firmware/radioberry.qpf b/firmware/radioberry.qpf index 47f26f2..989629e 100644 --- a/firmware/radioberry.qpf +++ b/firmware/radioberry.qpf @@ -19,14 +19,14 @@ # # Quartus Prime # Version 17.0.2 Build 602 07/19/2017 SJ Lite Edition -# Date created = 17:28:38 February 28, 2018 +# Date created = 21:33:01 March 09, 2018 # # -------------------------------------------------------------------------- # QUARTUS_VERSION = "17.0" -DATE = "17:28:38 February 28, 2018" +DATE = "21:33:01 March 09, 2018" # Revisions -PROJECT_REVISION = "radioberry" PROJECT_REVISION = "radioberry-10CL016" +PROJECT_REVISION = "radioberry" diff --git a/firmware/radioberry.qws b/firmware/radioberry.qws index f883580..aa7c081 100644 Binary files a/firmware/radioberry.qws and b/firmware/radioberry.qws differ