Added SPI readout check bitmask

pull/282/head^2
jgromes 2021-04-15 19:34:53 +02:00
rodzic 17f5397652
commit d49a107c7e
2 zmienionych plików z 5 dodań i 3 usunięć

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@ -206,7 +206,7 @@ int16_t Module::SPIgetRegValue(uint8_t reg, uint8_t msb, uint8_t lsb) {
return(maskedValue);
}
int16_t Module::SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb, uint8_t lsb, uint8_t checkInterval) {
int16_t Module::SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb, uint8_t lsb, uint8_t checkInterval, uint8_t checkMask) {
if((msb > 7) || (lsb > 7) || (lsb > msb)) {
return(ERR_INVALID_BIT_RANGE);
}
@ -223,7 +223,7 @@ int16_t Module::SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb, uint8_t
uint8_t readValue = 0x00;
while(Module::micros() - start < (checkInterval * 1000)) {
readValue = SPIreadRegister(reg);
if(readValue == newValue) {
if((readValue & checkMask) == (newValue & checkMask)) {
// check passed, we can stop the loop
return(ERR_NONE);
}

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@ -238,9 +238,11 @@ class Module {
\param checkInterval Number of milliseconds between register writing and verification reading. Some registers need up to 10ms to process the change.
\param checkMask Mask of bits to check, only bits set to 1 will be verified.
\returns \ref status_codes
*/
int16_t SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb = 7, uint8_t lsb = 0, uint8_t checkInterval = 2);
int16_t SPIsetRegValue(uint8_t reg, uint8_t value, uint8_t msb = 7, uint8_t lsb = 0, uint8_t checkInterval = 2, uint8_t checkMask = 0xFF);
/*!
\brief SPI burst read method.