From bdb14b9e9d999855b1870a339129cd85f4ad4e68 Mon Sep 17 00:00:00 2001 From: obones Date: Wed, 6 Jul 2022 15:29:40 +0200 Subject: [PATCH] Implement setDIOMapping for RF69 family --- src/modules/RF69/RF69.cpp | 10 ++++++++++ src/modules/RF69/RF69.h | 41 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/src/modules/RF69/RF69.cpp b/src/modules/RF69/RF69.cpp index 5a388152..f21cb0b5 100644 --- a/src/modules/RF69/RF69.cpp +++ b/src/modules/RF69/RF69.cpp @@ -806,6 +806,16 @@ void RF69::readBit(RADIOLIB_PIN_TYPE pin) { updateDirectBuffer((uint8_t)digitalRead(pin)); } +int16_t RF69::setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value) { + if (pin > 5) + return RADIOLIB_ERR_INVALID_DIO_PIN; + + if (pin < 4) + return(_mod->SPIsetRegValue(RADIOLIB_RF69_REG_DIO_MAPPING_1, value, 7 - 2 * pin, 6 - 2 * pin)); + else + return(_mod->SPIsetRegValue(RADIOLIB_RF69_REG_DIO_MAPPING_2, value, 15 - 2 * pin, 14 - 2 * pin)); +} + int16_t RF69::getChipVersion() { return(_mod->SPIgetRegValue(RADIOLIB_RF69_REG_VERSION)); } diff --git a/src/modules/RF69/RF69.h b/src/modules/RF69/RF69.h index 7e13deb6..e3ade50e 100644 --- a/src/modules/RF69/RF69.h +++ b/src/modules/RF69/RF69.h @@ -295,8 +295,38 @@ #define RADIOLIB_RF69_DIO1_PACK_PLL_LOCK 0b00110000 // 5 4 #define RADIOLIB_RF69_DIO1_PACK_TIMEOUT 0b00110000 // 5 4 #define RADIOLIB_RF69_DIO2_CONT_DATA 0b00000000 // 3 2 +#define RADIOLIB_RF69_DIO2_PACK_FIFO_NOT_EMPTY 0b00000000 // 3 2 +#define RADIOLIB_RF69_DIO2_PACK_AUTO_MODE 0b00001100 // 3 2 +#define RADIOLIB_RF69_DIO2_PACK_DATA 0b00000100 // 3 2 +#define RADIOLIB_RF69_DIO3_CONT_AUTO_MODE 0b00000010 // 0 1 +#define RADIOLIB_RF69_DIO3_CONT_RSSI 0b00000000 // 0 1 +#define RADIOLIB_RF69_DIO3_CONT_RX_READY 0b00000001 // 0 1 +#define RADIOLIB_RF69_DIO3_CONT_TIMEOUT 0b00000011 // 0 1 +#define RADIOLIB_RF69_DIO3_CONT_TX_READY 0b00000001 // 0 1 +#define RADIOLIB_RF69_DIO3_PACK_FIFO_FULL 0b00000000 // 0 1 +#define RADIOLIB_RF69_DIO3_PACK_PLL_LOCK 0b00000011 // 0 1 +#define RADIOLIB_RF69_DIO3_PACK_RSSI 0b00000001 // 0 1 +#define RADIOLIB_RF69_DIO3_PACK_SYNC_ADDRESSS 0b00000010 // 0 1 +#define RADIOLIB_RF69_DIO3_PACK_TX_READY 0b00000001 // 0 1 // RF69_REG_DIO_MAPPING_2 +#define RADIOLIB_RF69_DIO4_CONT_PLL_LOCK 0b11000000 // 7 6 +#define RADIOLIB_RF69_DIO4_CONT_TIMEOUT 0b00000000 // 7 6 +#define RADIOLIB_RF69_DIO4_CONT_RX_READY 0b01000000 // 7 6 +#define RADIOLIB_RF69_DIO4_CONT_SYNC_ADDRESS 0b10000000 // 7 6 +#define RADIOLIB_RF69_DIO4_CONT_TX_READY 0b01000000 // 7 6 +#define RADIOLIB_RF69_DIO4_PACK_PLL_LOCK 0b11000000 // 7 6 +#define RADIOLIB_RF69_DIO4_PACK_TIMEOUT 0b00000000 // 7 6 +#define RADIOLIB_RF69_DIO4_PACK_RSSI 0b01000000 // 7 6 +#define RADIOLIB_RF69_DIO4_PACK_RX_READY 0b10000000 // 7 6 +#define RADIOLIB_RF69_DIO4_PACK_MODE_READY 0b00000000 // 7 6 +#define RADIOLIB_RF69_DIO4_PACK_TX_READY 0b01000000 // 7 6 +#define RADIOLIB_RF69_DIO5_CONT_MODE_READY 0b00110000 // 5 4 +#define RADIOLIB_RF69_DIO5_CONT_CLK_OUT 0b00000000 // 5 4 +#define RADIOLIB_RF69_DIO5_CONT_RSSI 0b00010000 // 5 4 +#define RADIOLIB_RF69_DIO5_PACK_MODE_READY 0b00110000 // 5 4 +#define RADIOLIB_RF69_DIO5_PACK_CLK_OUT 0b00000000 // 5 4 +#define RADIOLIB_RF69_DIO5_PACK_DATA 0b00010000 // 5 4 #define RADIOLIB_RF69_CLK_OUT_FXOSC 0b00000000 // 2 0 ClkOut frequency: F(XOSC) #define RADIOLIB_RF69_CLK_OUT_FXOSC_2 0b00000001 // 2 0 F(XOSC) / 2 #define RADIOLIB_RF69_CLK_OUT_FXOSC_4 0b00000010 // 2 0 F(XOSC) / 4 @@ -919,6 +949,17 @@ class RF69: public PhysicalLayer { */ void readBit(RADIOLIB_PIN_TYPE pin); + /*! + \brief Configure DIO pin mapping to get a given signal on a DIO pin (if available). + + \param pin Pin number onto which a signal is to be placed. + + \param value The value that indicates which function to place on that pin. See chip datasheet for details. + + \returns \ref status_codes + */ + int16_t setDIOMapping(RADIOLIB_PIN_TYPE pin, uint8_t value); + #if !defined(RADIOLIB_GODMODE) && !defined(RADIOLIB_LOW_LEVEL) protected: #endif