fifo underflow check

src/drivers/si4063/si4063.c

@@ -205,21 +205,6 @@ static void si4063_set_state(uint8_t state)
     si4063_send_command(SI4063_COMMAND_CHANGE_STATE, 1, &state);
 }
 
-void si4063_get_int_status()
-{
-    uint8_t data[] = {0xFF, 0xFF, 0xFF};
-    si4063_send_command(SI4063_COMMAND_GET_INT_STATUS, 0, NULL);//sizeof(data), data);
-    uint8_t response[6];
-    si4063_read_response(sizeof(response), response);
-    log_debug("int status: %#x %#x %#x %#x %#x %#x\n",
-              response[0],
-              response[1],
-              response[2],
-              response[3],
-              response[4],
-              response[5]);
-}
-
 void si4063_enable_tx()
 {
     log_debug("Si4063: Enable TX\n");
@@ -286,7 +271,6 @@ uint16_t si4063_refill_buffer(uint8_t *data, int len)
     si4063_read_response(sizeof(response), response);
 
     uint8_t free_space = response[1];
-    // printf("free space %d\n", free_space);
     if(free_space < len) {
         len = free_space;
     }
@@ -356,6 +340,17 @@ static int si4063_get_band(const uint32_t frequency_hz)
     return 0;
 }
 
+bool si4063_fifo_underflow()
+{
+    uint8_t data[] = {0xFF, 0xFF, ~0x20}; // Clear underflow status
+    si4063_send_command(SI4063_COMMAND_GET_INT_STATUS, sizeof(data), data);
+    uint8_t response[7];
+    si4063_read_response(sizeof(response), response);
+
+    bool fifo_underflow_pending = response[6] & 0x20;
+    return fifo_underflow_pending;
+}
+
 void si4063_set_tx_frequency(const uint32_t frequency_hz)
 {
     uint8_t outdiv, band;
@@ -409,6 +404,7 @@ void si4063_set_tx_frequency(const uint32_t frequency_hz)
     // Deviation depends on the frequency band
     si4063_set_frequency_deviation(current_deviation_hz);
 }
+
 void si4063_set_data_rate(const uint32_t rate_bps)
 {
     int rate = rate_bps * 10;

src/drivers/si4063/si4063.h

@@ -17,7 +17,9 @@ void si4063_disable_tx();
 uint16_t si4063_start_tx(uint8_t *data, int len);
 uint16_t si4063_refill_buffer(uint8_t *data, int len);
 int si4063_wait_for_tx_complete(int timeout_ms);
+bool si4063_fifo_underflow();
 void si4063_set_tx_frequency(uint32_t frequency_hz);
+void si4063_set_data_rate(const uint32_t rate_bps);
 void si4063_set_tx_power(uint8_t power);
 void si4063_set_frequency_offset(uint16_t offset);
 void si4063_set_frequency_deviation(uint32_t deviation);

src/log.h

@@ -10,7 +10,7 @@
 #define log_error printf
 #define log_warn printf
 #define log_info printf
-#define log_debug(...)
+#define log_debug printf
 #define log_trace(...)
 
 #else

src/radio_si4063.c

@@ -189,7 +189,6 @@ static void radio_handle_main_loop_manual_si4063(radio_transmit_entry *entry, ra
     system_enable_tick();
 }
 
-// TODO check for FIFO underflows!
 void radio_handle_fifo_si4063(radio_transmit_entry *entry, radio_module_state *shared_state) {
     log_debug("Start FIFO TX\n");
     fsk_encoder_api *fsk_encoder_api = entry->fsk_encoder_api;
@@ -199,20 +198,25 @@ void radio_handle_fifo_si4063(radio_transmit_entry *entry, radio_module_state *s
     uint16_t len = fsk_encoder_api->get_data_len(fsk_enc);
 
     uint16_t written = si4063_start_tx(data, len);
-    log_debug("Wrote %d bytes\n", written);
     data += written;
     len -= written;
     
     while(len > 0) {
         uint16_t written = si4063_refill_buffer(data, len);
-        log_debug("Wrote %d bytes\n", written);
         data += written;
         len -= written;
+
+        if(si4063_fifo_underflow()) {
+            log_info("FIFO underflow - Aborting");
+            shared_state->radio_transmission_finished = true;
+
+            return;
+        }
     }
 
     int err = si4063_wait_for_tx_complete(100);
     if(err != HAL_OK) {
-        log_debug("Error waiting for tx complete: %d\n", err);
+        log_info("Error waiting for tx complete: %d\n", err);
     }
 
     log_debug("Finished FIFO TX\n");