RS41ng/openocd_rs41.cfg

# Copied and adapted from random internet sources.

# Unlocking is not needed, but every 1k block of Flash Ram is write protected
#  - see: http://openocd.org/doc/html/Flash-Commands.html#flashprotect

# Typical usages:
#	openocd -f ./openocd_rs41.cfg -c "init; halt; flash protect 0 0 31 off; exit"
#						to unlock 64k of Flash for programming
#	openocd -f ./openocd_rs41.cfg -c "program RS41ng.elf verify reset exit"
#						to program the connected rs41
#	openocd -f ./openocd_rs41.cfg -c "init; reset; exit"
#						will reset the connected rs41
#

# Debugging with semihosting, use GDB commands:
# target remote localhost:3333
# monitor arm semihosting enable
# load build/src/RS41ng.elf
# monitor reset halt
# continue

# Normal use is with cheap STLINKv2 clone
source [find interface/stlink-v2.cfg]
# Alternative is to connect directly to a Raspberry Pi3
# Find AdaFruit tutorial to build and run OpenOCD on RPi:
#	source [find interface/raspberrypi2-native.cfg]
#	bcm2835gpio_swd_nums 25 24
#	bcm2835gpio_speed_coeffs 194938 48
#	bcm2835gpio_srst_num 18
#	reset_config srst_only srst_push_pull

set WORKAREASIZE 0x2000

# RS41 uses stm32f1 cortex m3
source [find target/stm32f1x.cfg]

# example script:
proc RS41 {will_fail} {
    init
    sleep 200
    reset
    halt
    wait_halt
    stm32f1x unlock $will_fail
    sleep 10
    shutdown
}

#
# Uncommon usage:
#	openocd -f ./openocd_rs41.cfg -c "init; halt; stm32f1x options_read 0; exit"
#						check setings before changing them
#	openocd -f ./openocd_rs41.cfg -c "init; halt; stm32f1x unlock 0; exit"
#						is not needed just to re-program RS41
#	openocd -f ./openocd_rs41.cfg -c "RS41 0"
#						to run a macro written above
#