Zilog80
|
966599197a
|
rs41: rel. hum. v0.2
|
2019-04-09 21:52:26 +02:00 |
Zilog80
|
3af2f1e474
|
remove non-ascii
|
2019-04-06 22:13:53 +02:00 |
Zilog80
|
c1b18c2f80
|
rs41: rel.hum. empirical/experimental
|
2019-04-04 14:52:42 +02:00 |
Zilog80
|
3a41bd33af
|
rs41: binary bit/byte input
|
2019-02-25 20:31:22 +01:00 |
Zilog80
|
4ffe2633df
|
rs41: binary bit/byte input
|
2019-02-25 20:12:50 +01:00 |
Zilog80
|
3e68a22786
|
rs41 -vv: timer
|
2018-07-30 00:00:39 +02:00 |
Zilog80
|
1a3a803e8a
|
rs41: ecc2 errors
|
2018-06-30 23:29:40 +02:00 |
Zilog80
|
09502c8ae8
|
rs92,rs41,dfm,m10: select stereo channel
|
2018-06-16 23:44:45 +02:00 |
Zilog80
|
c681b9ff8b
|
rs41: unexpected blocks
|
2018-05-19 22:35:24 +02:00 |
Zilog80
|
3aef9324e3
|
rs41: ecc2 2-pass error correction
|
2018-01-23 00:17:28 +01:00 |
Zilog80
|
034c6a00c3
|
rs41: ecc2 2-pass error correction
|
2018-01-22 22:27:17 +01:00 |
Zilog80
|
ee90c7125e
|
rs41: ecc2 (corrected errors); output if crc ok
|
2018-01-18 21:53:04 +01:00 |
Zilog80
|
77469d644d
|
rs41: rawin
|
2018-01-18 21:02:30 +01:00 |
Zilog80
|
9ef53fa831
|
rs41: frame <-> noise detect
|
2017-11-29 11:50:57 +01:00 |
Zilog80
|
f9e6c41b2e
|
RS41-PTU: temperature
|
2017-08-26 14:08:10 +02:00 |
Zilog80
|
c9c0359280
|
RS41-PTU: temperature
|
2017-08-26 02:43:49 +02:00 |