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David Banks 2018-07-14 15:34:05 +01:00
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@ -26,6 +26,12 @@ The difficulty here is that the pixel spacing is very uneven:
[[images/IMG_0913.JPG]]
This is because of the way the Beeb generates the 6MHz clock from 2, 4 and 8MHz clocks:
This is because of the way the Beeb generated the 6MHz clock from 2, 4 and 8MHz clocks:
[[images/6M_clock_beeb.png]]
The clock edges (both are used by the SAA5050) deviate from where they should be with a pure 6MHz clock, but crucially the differences repeat every 6 edges.
The CPLD on the RGBtoHDMI interface allows the pixel sampling points to varied in units of 10.4ns (1/96MHz) over a range of +/- half a pixel. In mode 7, six possible sampling points can be configured, to match the clock skew.
An automatic calibration process is used to set these sample points.