RGBtoHDMI/vhdl_YUV_6bit/RGBtoHDMI.ucf

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# Global Clock Nets
NET "clk" BUFG=CLK;
# Global Clock Nets
NET "sp_clk" BUFG=CLK;
# 96MHz clock domain
NET "clk" TNM_NET = clk_period_grp_1;
TIMESPEC TS_clk_period_1 = PERIOD "clk_period_grp_1" 10.4ns HIGH;
# 10MHz clock domain
#NET "sp_clk" TNM_NET = clk_period_grp_2;
#TIMESPEC TS_clk_period_2 = PERIOD "clk_period_grp_2" 100ns HIGH;
NET "clk" LOC = "P43"; # input gpio21 (gclk)
NET "AH_I" LOC = "P32"; # input
NET "AL_I" LOC = "P34"; # input
NET "BH_I" LOC = "P30"; # input
NET "BL_I" LOC = "P37"; # input
NET "LH_I" LOC = "P31"; # input
NET "LL_I" LOC = "P36"; # input
NET "HS_I" LOC = "P23"; # input
NET "FS_I" LOC = "P41"; # input
NET "version" LOC = "P33"; # input gpio18 (gsr)
NET "clamp" LOC = "P19"; # input gpio24
NET "mux" LOC = "P18"; # input gpio24
NET "sp_clk" LOC = "P44"; # input gpio20 (gclk)
NET "sp_data" LOC = "P7"; # input gpio0 (input only)
NET "sp_clken" LOC = "P6"; # input gpio1 (input only)
NET "quad(0)" LOC = "P29"; # output gpio2
NET "quad(1)" LOC = "P28"; # output gpio3
NET "quad(2)" LOC = "P27"; # output gpio4
NET "quad(3)" LOC = "P5"; # output gpio5
NET "quad(4)" LOC = "P2"; # output gpio6
NET "quad(5)" LOC = "P8"; # output gpio7
NET "quad(6)" LOC = "P12"; # output gpio8
NET "quad(7)" LOC = "P14"; # output gpio9
NET "quad(8)" LOC = "P16"; # output gpio10
NET "quad(9)" LOC = "P13"; # output gpio11
NET "quad(10)" LOC = "P3"; # output gpio12
NET "quad(11)" LOC = "P1"; # output gpio13
NET "psync" LOC = "P22"; # output gpio17
NET "csync" LOC = "P20"; # output gpio23
NET "quad(0)" SLOW;
NET "quad(1)" SLOW;
NET "quad(2)" SLOW;
NET "quad(3)" SLOW;
NET "quad(4)" SLOW;
NET "quad(5)" SLOW;
NET "quad(6)" SLOW;
NET "quad(7)" SLOW;
NET "quad(8)" SLOW;
NET "quad(9)" SLOW;
NET "quad(10)" SLOW;
NET "quad(11)" SLOW;
NET "psync" SLOW;
NET "csync" SLOW;