IanSB 168c617b25 Update RGB CPLD to inhibit clamp pulse in DC mode		2020-06-23 05:46:40 +01:00
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RGBtoHDMI.ucf	CPLD: cosmetic renaming, no change to jedec files	2020-02-08 12:41:24 +00:00
RGBtoHDMI.vhdl	Update RGB CPLD to inhibit clamp pulse in DC mode	2020-06-23 05:46:40 +01:00
fitting.notes	VHDL: properly isolate analog additions (now v6.6 as mono on vsync dropped)	2019-12-22 16:22:18 +00:00