David Banks cb5a8461b6 CPLD: Start sampling 8us earlier ... Change-Id: I0f1215f801f46472597130476e8912a25bf00e38		2018-11-11 17:20:58 +00:00
..
RGBtoHDMI.jed	CPLD: Start sampling 8us earlier	2018-11-11 17:20:58 +00:00
RGBtoHDMI.ucf	CPLD: final pinout changes	2018-06-12 12:39:06 +01:00
RGBtoHDMI.vhdl	CPLD: Start sampling 8us earlier	2018-11-11 17:20:58 +00:00
RGBtoHDMI.xise	CPLD: Mostly cosmetic seperation of the logic into several blocks	2018-06-07 17:14:02 +01:00
fitting.notes	CPLD: Make bits 7..4 of the MODE 7 offset counter programmable	2018-10-29 15:26:16 +00:00