kopia lustrzana https://github.com/hoglet67/RGBtoHDMI
Atom CPLD: Increase Offset to 4 bits
Change-Id: I40bfa28cb3f60bfcb3a314c1e57eea61307c75c0pull/11/head
David Banks
rodzic
827df2f535
commit
f7fa4bd189
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@ -61,7 +61,7 @@ architecture Behavorial of RGBtoHDMI is
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constant atom_clamp_end : unsigned(8 downto 0) := to_unsigned(512 - 255 + 248, 9);
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-- Sampling points
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constant INIT_SAMPLING_POINTS : std_logic_vector(2 downto 0) := "111";
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constant INIT_SAMPLING_POINTS : std_logic_vector(3 downto 0) := "1111";
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signal shift_R : std_logic_vector(3 downto 0);
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signal shift_G : std_logic_vector(3 downto 0);
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@ -80,14 +80,15 @@ architecture Behavorial of RGBtoHDMI is
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signal counter : unsigned(8 downto 0);
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-- Sample point register;
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signal sp_reg : std_logic_vector(2 downto 0) := INIT_SAMPLING_POINTS;
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signal sp_reg : std_logic_vector(3 downto 0) := INIT_SAMPLING_POINTS;
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-- Break out of sp_reg
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signal offset : unsigned (2 downto 0);
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signal offset : unsigned (3 downto 0);
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-- Sample pixel on next clock; pipelined to reduce the number of product terms
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signal shift : std_logic;
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signal sample : std_logic;
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signal shift : std_logic;
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signal sample_C : std_logic;
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signal sample_L : std_logic;
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-- Decoded RGB signals
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signal R : std_logic;
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@ -125,7 +126,7 @@ architecture Behavorial of RGBtoHDMI is
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begin
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offset <= unsigned(sp_reg(2 downto 0));
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offset <= unsigned(sp_reg(3 downto 0));
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-- Shift the bits in LSB first
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process(sp_clk)
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@ -154,11 +155,18 @@ begin
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counter(5 downto 0) <= counter(5 downto 0) + 1;
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end if;
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-- sample
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if counter(2 downto 0) = offset(2 downto 0) then
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sample <= '1';
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-- sample luminance signal
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if counter(2 downto 0) = (not offset(2)) & offset(1 downto 0) then
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sample_L <= '1';
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else
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sample <= '0';
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sample_L <= '0';
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end if;
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-- sample colour signal
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if counter(3 downto 0) = offset then
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sample_C <= '1';
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else
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sample_C <= '0';
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end if;
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-- shift
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@ -169,34 +177,41 @@ begin
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end if;
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-- Atom pixel processing
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if counter(0) = offset(0) then
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if counter(0) /= offset(0) then
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AL1 <= AL_I;
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AH1 <= AH_I;
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BL1 <= BL_I;
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BH1 <= BH_I;
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L1 <= L_I;
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AL2 <= AL1;
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AH2 <= AH1;
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BL2 <= BL1;
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BH2 <= BH1;
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L2 <= L1;
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AL3 <= AL2;
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AH3 <= AH2;
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BL3 <= BL2;
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BH3 <= BH2;
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L1 <= L_I;
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L2 <= L1;
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L3 <= L2;
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L <= ( L1 AND L2) OR ( L1 AND L3) OR ( L2 AND L3);
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end if;
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if sample_C = '1' then
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AL <= (AL1 AND AL2) OR (AL1 AND AL3) OR (AL2 AND AL3);
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AH <= (AH1 AND AH2) OR (AH1 AND AH3) OR (AH2 AND AH3);
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BL <= (BL1 AND BL2) OR (BL1 AND BL3) OR (BL2 AND BL3);
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BH <= (BH1 AND BH2) OR (BH1 AND BH3) OR (BH2 AND BH3);
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end if;
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if sample_L = '1' then
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L <= (L1 AND L2) OR (L1 AND L3) OR (L2 AND L3);
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end if;
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-- YUV to RGB
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if sample = '1' then
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if sample_L = '1' then
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-- AL AH BL BH L R G1 G2 B
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--YELLOW 1.5 1.0 0 0 1 0 X 1 1 1 0
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--RED 2.0 1.5 0 1 0 0 X 1 0 1 0
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@ -1,10 +1,65 @@
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1. Initial design:
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1. Atom CPLD: Initial version for home-etched prototype
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Function Mcells FB Inps Pterms IO
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Block Used/Tot Used/Tot Used/Tot Used/Tot
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Function Mcells FB Inps Pterms IO
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Block Used/Tot Used/Tot Used/Tot Used/Tot
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FB1 18/18* 30/54 49/90 8/ 9
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FB2 17/18 26/54 38/90 4/ 9
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FB3 18/18* 30/54 69/90 8/ 9
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FB4 18/18* 32/54 48/90 7/ 7*
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----- ----- ----- -----
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71/72 118/216 204/360 27/34
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----- ----- ----- -----
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71/72 118/216 204/360 27/34
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2. Atom CPLD: Reworked for a 57.272MHz clock
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Function Mcells FB Inps Pterms IO
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Block Used/Tot Used/Tot Used/Tot Used/Tot
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FB1 18/18* 26/54 48/90 8/ 9
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FB2 14/18 23/54 31/90 4/ 9
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FB3 18/18* 30/54 61/90 8/ 9
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FB4 18/18* 29/54 45/90 7/ 7*
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----- ----- ----- -----
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68/72 108/216 185/360 27/34
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3. Atom CPLD: Shave two bits of the counter
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Function Mcells FB Inps Pterms IO
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Block Used/Tot Used/Tot Used/Tot Used/Tot
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FB1 18/18* 30/54 49/90 8/ 9
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FB2 12/18 22/54 27/90 4/ 9
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FB3 18/18* 28/54 60/90 8/ 9
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FB4 18/18* 30/54 44/90 7/ 7*
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----- ----- ----- -----
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66/72 110/216 180/360 27/34
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4. Atom CPLD: Added back in glitch filtering
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Function Mcells FB Inps Pterms IO
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Block Used/Tot Used/Tot Used/Tot Used/Tot
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FB1 18/18* 30/54 58/90 8/ 9
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FB2 12/18 24/54 39/90 4/ 9
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FB3 18/18* 27/54 60/90 8/ 9
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FB4 18/18* 31/54 83/90 7/ 7*
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----- ----- ----- -----
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66/72 112/216 240/360 27/34
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5. Atom CPLD: Generate CSYNC from HS_N and FS_N
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Function Mcells FB Inps Pterms IO
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Block Used/Tot Used/Tot Used/Tot Used/Tot
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FB1 18/18* 30/54 58/90 8/ 9
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FB2 13/18 25/54 40/90 4/ 9
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FB3 18/18* 29/54 63/90 8/ 9
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FB4 18/18* 31/54 83/90 7/ 7*
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----- ----- ----- -----
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67/72 115/216 244/360 27/34
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6. Atom CPLD: Increase Offset to 4 bits
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Function Mcells FB Inps Pterms IO
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Block Used/Tot Used/Tot Used/Tot Used/Tot
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FB1 18/18* 29/54 52/90 8/ 9
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FB2 15/18 30/54 41/90 4/ 9
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FB3 18/18* 30/54 69/90 8/ 9
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FB4 18/18* 30/54 72/90 7/ 7*
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----- ----- ----- -----
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69/72 119/216 234/360 27/34
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