Add support for Amiga interlaced sync and equalising pulses

src/defs.h

@@ -252,13 +252,14 @@ typedef struct {
 #define BLANK_FILE "/cpld_firmware/recovery/blank/BLANK.xsvf"
 
 //these defines are adjusted for different clock speeds
-#define FIELD_TYPE_THRESHOLD 32000                   //  32uS
-#define ELK_LO_FIELD_SYNC_THRESHOLD 150000           // 150uS
-#define ELK_HI_FIELD_SYNC_THRESHOLD 170000           // 170uS
+#define FIELD_TYPE_THRESHOLD 45000          //  post frame sync times are ~22uS & ~54uS on beeb and ~34uS and ~66uS on Amiga so threshold of 45uS covers both
+#define ELK_LO_FIELD_SYNC_THRESHOLD 150000  // 150uS
+#define ELK_HI_FIELD_SYNC_THRESHOLD 170000  // 170uS
 #define ODD_THRESHOLD 22500
 #define EVEN_THRESHOLD 54500
 #define BBC_HSYNC_THRESHOLD 6144
 #define OTHER_HSYNC_THRESHOLD 9000
+#define EQUALISING_THRESHOLD 3400      // equalising pulses are half sync pulse length and must be filtered out
 #define FRAME_MINIMUM 10000000         // 10ms
 #define FRAME_TIMEOUT 24000000         // 24ms which is over a frame / field @ 50Hz (20ms)
 #define LINE_MINIMUM 20000             // 20uS

src/rgb_to_fb.S

@@ -45,6 +45,7 @@
 .global odd_threshold
 .global even_threshold
 .global hsync_threshold
+.global equalising_threshold
 .global frame_minimum
 .global line_minimum
 .global frame_timeout
@@ -417,16 +418,10 @@ skip_switch_test:
         bne    skip_interlace_test
 
         tst    r3, #BIT_MODE_DETECT // Have we been told to exit on mode change
-        bne    force_mode_test
-
-        ldr    r9, param_video_type
-        cmp    r9, #1  //VIDEO_INTERLACE
-        bne    skip_interlace_test
-
-force_mode_test:
+        beq    do_interlace_test
 
         tst    r3, #BIT_INHIBIT_MODE_DETECT
-        bne    detect_interlace
+        bne    do_interlace_test
 
         tst    r3, #BIT_MODE7
         moveq  r5, #0         // Modes 0-6
@@ -434,6 +429,7 @@ force_mode_test:
         cmp    r5, r0         // Check if we have changed mode
         bne    exit           // If so, then bail, as the frame buffer needs to be resized
 
+do_interlace_test:
         tst    r3, #BIT_FIELD_TYPE1_VALID
         beq    detect_interlace // we haven't yet seen two fields, so skip the test
 
@@ -1106,6 +1102,8 @@ even_threshold:
         .word 54500
 hsync_threshold:
         .word 6144
+equalising_threshold:
+        .word 3250
 frame_minimum:
         .word 10000000
 line_minimum:
@@ -1241,10 +1239,13 @@ vsync_loop:
         // - normal hsync pulses are 4us
         // - during vsync everything is either inverted, or clamped to zero
         // - this results in hsync pulses between 9us and 128us
-
+        ldr    r8, equalising_threshold
+        cmp    r11, r8
+        blt    not_hsync
         ldr    r8, hsync_threshold
         cmp    r11, r8
         blt    seen_short
+not_hsync:
         cmp    r9, #1
         movne  r5, r14     // save falling edge of first broad pulse to calculate field sync length
         // Set the state variable to indicate we are in the vsync

src/rgb_to_fb.h

@@ -64,6 +64,7 @@ extern int elk_hi_field_sync_threshold;
 extern int odd_threshold;
 extern int even_threshold;
 extern int hsync_threshold;
+extern int equalising_threshold;
 extern int frame_minimum;
 extern int line_minimum;
 extern int frame_timeout;

src/rgb_to_hdmi.c

@@ -1387,6 +1387,7 @@ static void init_hardware() {
    odd_threshold = ODD_THRESHOLD * cpuspeed / 1000;
    even_threshold = EVEN_THRESHOLD * cpuspeed / 1000;
    hsync_threshold = BBC_HSYNC_THRESHOLD * cpuspeed / 1000;
+   equalising_threshold = EQUALISING_THRESHOLD * cpuspeed / 1000;
    frame_minimum = (int)((double)FRAME_MINIMUM * cpuspeed / 1000);
    frame_timeout = (int)((double)FRAME_TIMEOUT * cpuspeed / 1000);
    line_minimum = LINE_MINIMUM * cpuspeed / 1000;
@@ -2792,9 +2793,11 @@ void rgb_to_hdmi_main() {
 
          fb_size_changed = (capinfo->width != last_capinfo.width) || (capinfo->height != last_capinfo.height) || (capinfo->bpp != last_capinfo.bpp) || (capinfo->sample_width != last_capinfo.sample_width);
 
-         if ((result & RET_INTERLACE_CHANGED) && capinfo->video_type == VIDEO_INTERLACED) {
-             fb_size_changed |= 1;
-             log_info("Interlaced changed");
+         if (result & RET_INTERLACE_CHANGED)  {
+             log_info("Interlace changed");
+             if(capinfo->video_type == VIDEO_INTERLACED) {
+                fb_size_changed |= 1;
+             }
          }
 
          active_size_changed = (capinfo->chars_per_line != last_capinfo.chars_per_line) || (capinfo->nlines != last_capinfo.nlines);
@@ -2818,7 +2821,7 @@ void rgb_to_hdmi_main() {
             clear = BIT_CLEAR;
          }
 
-         if ((clk_changed || (result & RET_INTERLACE_CHANGED)) && !fb_size_changed) { // || lock_fail != 0) {
+         if ((clk_changed || (result & RET_INTERLACE_CHANGED)) && !fb_size_changed && !mode_changed) {
             target_difference = 0;
             resync_count = 0;
             // Measure the frame time and set the sampling clock