kopia lustrzana https://github.com/hoglet67/RGBtoHDMI
Merge RGB and YUV sampling file formats so profiles are interchangeable between CPLDs
rodzic
03bae32680
commit
eb439e7cdb
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@ -21,6 +21,11 @@ typedef struct {
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int half_px_delay; // 0 = off, 1 = on, all modes
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int divider; // cpld divider, 6 or 8
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int full_px_delay; // 0..15
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int filter_l;
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int sub_c;
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int alt_r;
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int edge;
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int clamptype;
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int mux; // 0 = direct, 1 = via the 74LS08 buffer
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int rate; // 0 = normal psync rate (3 bpp), 1 = double psync rate (6 bpp), 2 = sub-sample (odd), 3=sub-sample(even)
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int terminate;
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@ -110,6 +115,11 @@ enum {
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HALF,
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DIVIDER,
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DELAY,
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FILTER_L,
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SUB_C,
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ALT_R,
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EDGE,
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CLAMPTYPE,
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MUX,
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RATE,
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TERMINATE,
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@ -187,6 +197,13 @@ static param_t params[] = {
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{ HALF, "Half", "half", 0, 1, 1 },
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{ DIVIDER, "Divider", "divider", 6, 8, 2 },
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{ DELAY, "Delay", "delay", 0, 15, 1 },
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//block of hidden YUV options for file compatibility
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{ FILTER_L, "Filter Y", "l_filter", 0, 1, 1 },
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{ SUB_C, "Subsample UV", "sub_c", 0, 1, 1 },
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{ ALT_R, "PAL switch", "alt_r", 0, 1, 1 },
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{ EDGE, "Sync Edge", "edge", 0, 1, 1 },
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{ CLAMPTYPE, "Clamp Type", "clamptype", 0, 4, 1 },
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//end of hidden block
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{ MUX, "Sync on G/V", "input_mux", 0, 1, 1 },
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{ RATE, "Sample Mode", "sample_mode", 0, 3, 1 },
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{ TERMINATE, "75R Termination", "termination", 0, NUM_RGB_TERM-1, 1 },
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@ -531,6 +548,13 @@ static void log_sp(config_t *config) {
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// =============================================================
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static void cpld_init(int version) {
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// hide YUV lines included for file compatibility
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params[FILTER_L].hidden = 1;
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params[SUB_C].hidden = 1;
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params[ALT_R].hidden = 1;
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params[EDGE].hidden = 1;
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params[CLAMPTYPE].hidden = 1;
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cpld_version = version;
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// Setup default frame buffer params
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//
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@ -598,12 +622,18 @@ static void cpld_init(int version) {
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//*******************************************************************************************************************************
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// Remove analog frontend parameters by. This is more drastic than simply
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// hiding them, as it also affects the parsing/serializing of profiles.
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// This is necessary as RGB(TTL) and RGB(Analog) have separate profile
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// directories with differening numbers of parameters.
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// Hide analog frontend parameters by.
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if (!supports_analog) {
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params[TERMINATE].key = -1;
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params[TERMINATE].hidden = 1;
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params[COUPLING].hidden = 1;
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params[DAC_A].hidden = 1;
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params[DAC_B].hidden = 1;
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params[DAC_C].hidden = 1;
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params[DAC_D].hidden = 1;
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params[DAC_E].hidden = 1;
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params[DAC_F].hidden = 1;
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params[DAC_G].hidden = 1;
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params[DAC_H].hidden = 1;
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}
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if (major > 2) {
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@ -23,6 +23,9 @@
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typedef struct {
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int cpld_setup_mode;
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int sp_offset;
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int dummy_offsets[NUM_OFFSETS - 1];
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int half_px_delay; // 0 = off, 1 = on, all modes
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int divider; // cpld divider, 6 or 8
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int delay;
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int filter_l;
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int sub_c;
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@ -44,6 +47,7 @@ typedef struct {
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} config_t;
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enum {
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YUV_RATE_UNUSED,
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YUV_RATE_6,
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YUV_RATE_6_LEVEL_4,
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};
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@ -89,6 +93,14 @@ static int invert = 0;
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enum {
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CPLD_SETUP_MODE,
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OFFSET,
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A_OFFSET,
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B_OFFSET,
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C_OFFSET,
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D_OFFSET,
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E_OFFSET,
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F_OFFSET,
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HALF,
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DIVIDER,
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DELAY,
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FILTER_L,
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SUB_C,
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@ -136,6 +148,7 @@ static const char *level_names[] = {
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};
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static const char *rate_names[] = {
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"Unused",
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"6 Bits Per Pixel",
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"6 Bits (4 Level)",
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};
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@ -175,6 +188,16 @@ enum {
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static param_t params[] = {
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{ CPLD_SETUP_MODE, "Setup Mode", "setup_mode", 0, NUM_CPLD_SETUP-1, 1 },
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{ OFFSET, "Offset", "offset", 0, 15, 1 },
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//block of hidden RGB options for file compatibility
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{ A_OFFSET, "A Offset", "a_offset", 0, 0, 1 },
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{ B_OFFSET, "B Offset", "b_offset", 0, 0, 1 },
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{ C_OFFSET, "C Offset", "c_offset", 0, 0, 1 },
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{ D_OFFSET, "D Offset", "d_offset", 0, 0, 1 },
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{ E_OFFSET, "E Offset", "e_offset", 0, 0, 1 },
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{ F_OFFSET, "F Offset", "f_offset", 0, 0, 1 },
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{ HALF, "Half", "half", 0, 1, 1 },
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{ DIVIDER, "Divider", "divider", 6, 8, 2 },
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//end of hidden block
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{ DELAY, "Delay", "delay", 0, 15, 1 },
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{ FILTER_L, "Filter Y", "l_filter", 0, 1, 1 },
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{ SUB_C, "Subsample UV", "sub_c", 0, 1, 1 },
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@ -182,7 +205,7 @@ static param_t params[] = {
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{ EDGE, "Sync Edge", "edge", 0, 1, 1 },
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{ CLAMPTYPE, "Clamp Type", "clamptype", 0, NUM_CLAMPTYPE-1, 1 },
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{ MUX, "Sync on Y/V", "input_mux", 0, 1, 1 },
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{ RATE, "Sample Mode", "sample_mode", 0, 1, 1 },
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{ RATE, "Sample Mode", "sample_mode", 1, 2, 1 },
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{ TERMINATE, "75R Termination", "termination", 0, NUM_YUV_TERM-1, 1 },
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{ COUPLING, "Y Coupling", "coupling", 0, NUM_YUV_COUPLING-1, 1 },
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{ DAC_A, "DAC-A: Y Hi", "dac_a", 0, 255, 1 },
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@ -315,7 +338,7 @@ static void write_config(config_t *config) {
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scan_len += 2;
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}
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sp |= config->rate << scan_len;
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sp |= ((config->rate - 1) & 1) << scan_len;
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scan_len++;
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sp |= config->filter_l << scan_len;
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@ -460,10 +483,19 @@ static void log_sp(config_t *config) {
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// =============================================================
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static void cpld_init(int version) {
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params[A_OFFSET].hidden = 1;
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params[B_OFFSET].hidden = 1;
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params[C_OFFSET].hidden = 1;
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params[D_OFFSET].hidden = 1;
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params[E_OFFSET].hidden = 1;
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params[F_OFFSET].hidden = 1;
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params[HALF].hidden = 1;
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params[DIVIDER].hidden = 1;
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cpld_version = version;
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config->sp_offset = 0;
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config->rate = YUV_RATE_6;
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config->filter_l = 1;
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config->divider = 8;
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for (int i = 0; i < RANGE_MAX; i++) {
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sum_metrics[i] = -1;
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}
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@ -514,7 +546,7 @@ static void cpld_init(int version) {
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if (!eight_bit_detected()) {
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params[RATE].max = 0; // four level YUV won't work on 6 bit boards
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params[DAC_H].hidden = 1;
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config->rate = 0;
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config->rate = YUV_RATE_6;
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supports_four_level = 0;
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}
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}
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@ -2436,6 +2436,7 @@ void rgb_to_hdmi_main() {
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int ncapture;
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int last_profile = -1;
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int last_subprofile = -1;
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int last_divider = -1;
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int wait_keyrelease = 0;
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int powerup = 1;
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int refresh_osd = 0;
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@ -2504,6 +2505,7 @@ void rgb_to_hdmi_main() {
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log_info("Autoswitch: No profile matched");
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}
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}
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last_divider = cpld->get_divider();
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last_profile = profile;
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last_subprofile = subprofile;
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log_debug("Setting up frame buffer");
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@ -2714,7 +2716,7 @@ void rgb_to_hdmi_main() {
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mode_changed = mode7 != last_mode7 || capinfo->vsync_type != last_capinfo.vsync_type || capinfo->sync_type != last_capinfo.sync_type || capinfo->border != last_capinfo.border
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|| capinfo->video_type != last_capinfo.video_type || capinfo->px_sampling != last_capinfo.px_sampling
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|| profile != last_profile || last_subprofile != subprofile || (result & RET_SYNC_TIMING_CHANGED);
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|| profile != last_profile || last_subprofile != subprofile || cpld->get_divider() != last_divider || (result & RET_SYNC_TIMING_CHANGED);
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if (active_size_changed) {
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clear = BIT_CLEAR;
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