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Changed some log_info to log_debug 

Change-Id: I11d52619675c5bff86fdeb9c4977bd19c5ec7081
issue_1022
David Banks 2017-04-30 10:58:03 +01:00
rodzic d54fba890a
commit e0e2d3bfdb
1 zmienionych plików z 13 dodań i 17 usunięć
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30
src/rgb_to_hdmi.c
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@ -72,32 +72,32 @@ extern int measure_vsync();
// Source 6 = PLLD = 500MHz // Source 6 = PLLD = 500MHz
void init_gpclk(int source, int divisor) { void init_gpclk(int source, int divisor) {
log_info("A GP_CLK1_DIV = %08"PRIx32, *GP_CLK1_DIV); log_debug("A GP_CLK1_DIV = %08"PRIx32, *GP_CLK1_DIV);
log_info("B GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL); log_debug("B GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL);
// Stop the clock generator // Stop the clock generator
*GP_CLK1_CTL = 0x5a000000 | source; *GP_CLK1_CTL = 0x5a000000 | source;
// Wait for BUSY low // Wait for BUSY low
log_info("C GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL); log_debug("C GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL);
while ((*GP_CLK1_CTL) & GZ_CLK_BUSY) {} while ((*GP_CLK1_CTL) & GZ_CLK_BUSY) {}
log_info("D GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL); log_debug("D GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL);
// Configure the clock generator // Configure the clock generator
*GP_CLK1_DIV = 0x5A000000 | (divisor << 12); *GP_CLK1_DIV = 0x5A000000 | (divisor << 12);
*GP_CLK1_CTL = 0x5A000000 | source; *GP_CLK1_CTL = 0x5A000000 | source;
log_info("E GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL); log_debug("E GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL);
// Start the clock generator // Start the clock generator
*GP_CLK1_CTL = 0x5A000010 | source; *GP_CLK1_CTL = 0x5A000010 | source;
log_info("F GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL); log_debug("F GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL);
while (!((*GP_CLK1_CTL) & GZ_CLK_BUSY)) {} // Wait for BUSY high while (!((*GP_CLK1_CTL) & GZ_CLK_BUSY)) {} // Wait for BUSY high
log_info("G GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL); log_debug("G GP_CLK1_CTL = %08"PRIx32, *GP_CLK1_CTL);
log_info("H GP_CLK1_DIV = %08"PRIx32, *GP_CLK1_DIV); log_debug("H GP_CLK1_DIV = %08"PRIx32, *GP_CLK1_DIV);
} }
static unsigned char* fb = NULL; static unsigned char* fb = NULL;
@ -278,19 +278,15 @@ void kernel_main(unsigned int r0, unsigned int r1, unsigned int atags)
int bytes_per_line = mode7 ? MODE7_BYTES_PER_LINE : DEFAULT_BYTES_PER_LINE; int bytes_per_line = mode7 ? MODE7_BYTES_PER_LINE : DEFAULT_BYTES_PER_LINE;
RPI_SetGpioValue(MODE7_PIN, mode7); RPI_SetGpioValue(MODE7_PIN, mode7);
if (mode7) { if (mode7) {
log_info("Setting up for mode 7, divisor = %d", divisor); log_debug("Setting up for mode 7, divisor = %d", divisor);
} else { } else {
log_info("Setting up for modes 0..6, divisor = %d", divisor); log_debug("Setting up for modes 0..6, divisor = %d", divisor);
} }
init_gpclk(5, divisor); init_gpclk(5, divisor);
log_info("Done setting up"); log_debug("Done setting up");
log_info("Entering rgb_to_fb"); log_debug("Entering rgb_to_fb");
mode7 = rgb_to_fb(fb, chars_per_line, bytes_per_line, mode7); mode7 = rgb_to_fb(fb, chars_per_line, bytes_per_line, mode7);
log_info("Leaving rgb_to_fb %d", mode7); log_debug("Leaving rgb_to_fb %d", mode7);
} }
log_info("RGB to HDMI finished");
while (1);
} }