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Add RPI4 GPIO pullup control from pitubedirect

pull/360/head
IanSB 2023-11-26 17:04:58 +00:00
rodzic 2fb72cbcd9
commit df4ec94542
2 zmienionych plików z 34 dodań i 26 usunięć
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16
src/rpi-gpio.c
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@ -106,13 +106,21 @@ void RPI_SetGpioValue(rpi_gpio_pin_t gpio, rpi_gpio_value_t value)
RPI_SetGpioHi(gpio);
}
void RPI_SetGpioPullUpDown(uint32_t gpio_pins, uint32_t pull_type) {
void RPI_SetGpioPullUpDown(uint32_t gpio, uint32_t pull) {
#if defined(RPI4)
rpi_reg_rw_t* pull_reg = &RPI_GpioBase->GPPULL[gpio / 16];
rpi_reg_rw_t pull_copy = *pull_reg;
pull_copy &= (uint32_t)~(0x3 << ((gpio % 16) * 2));
pull_copy |= (pull << ((gpio % 16) * 2));
*pull_reg = pull_copy;
#else
RPI_GpioBase = (rpi_gpio_t*) RPI_GPIO_BASE;
//log_info("Pull Type: %08X, %02X", gpio_pins, pull_type);
RPI_GpioBase->GPPUD = pull_type;
//log_info("Pull Type: %08X, %02X", gpio, pull);
RPI_GpioBase->GPPUD = pull;
delay_in_arm_cycles_cpu_adjust(5000);
RPI_GpioBase->GPPUDCLK0 = gpio_pins;
RPI_GpioBase->GPPUDCLK0 = gpio;
delay_in_arm_cycles_cpu_adjust(5000);
RPI_GpioBase->GPPUD = 0x0; //clear GPPUD
RPI_GpioBase->GPPUDCLK0 = 0x0; //clear GPPUDCLK0
#endif
}

44
src/rpi-gpio.h
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@ -159,36 +159,36 @@ typedef struct
rpi_reg_wo_t GPCLR0;
rpi_reg_wo_t GPCLR1;
rpi_reg_ro_t Reserved2;
rpi_reg_wo_t GPLEV0;
rpi_reg_wo_t GPLEV1;
rpi_reg_ro_t GPLEV0;
rpi_reg_ro_t GPLEV1;
rpi_reg_ro_t Reserved3;
rpi_reg_wo_t GPEDS0;
rpi_reg_wo_t GPEDS1;
rpi_reg_rw_t GPEDS0;
rpi_reg_rw_t GPEDS1;
rpi_reg_ro_t Reserved4;
rpi_reg_wo_t GPREN0;
rpi_reg_wo_t GPREN1;
rpi_reg_rw_t GPREN0;
rpi_reg_rw_t GPREN1;
rpi_reg_ro_t Reserved5;
rpi_reg_wo_t GPFEN0;
rpi_reg_wo_t GPFEN1;
rpi_reg_rw_t GPFEN0;
rpi_reg_rw_t GPFEN1;
rpi_reg_ro_t Reserved6;
rpi_reg_wo_t GPHEN0;
rpi_reg_wo_t GPHEN1;
rpi_reg_rw_t GPHEN0;
rpi_reg_rw_t GPHEN1;
rpi_reg_ro_t Reserved7;
rpi_reg_wo_t GPLEN0;
rpi_reg_wo_t GPLEN1;
rpi_reg_rw_t GPLEN0;
rpi_reg_rw_t GPLEN1;
rpi_reg_ro_t Reserved8;
rpi_reg_wo_t GPAREN0;
rpi_reg_wo_t GPAREN1;
rpi_reg_rw_t GPAREN0;
rpi_reg_rw_t GPAREN1;
rpi_reg_ro_t Reserved9;
rpi_reg_wo_t GPAFEN0;
rpi_reg_wo_t GPAFEN1;
rpi_reg_ro_t Reserved10;
rpi_reg_wo_t GPPUD;
rpi_reg_wo_t GPPUDCLK0;
rpi_reg_wo_t GPPUDCLK1;
rpi_reg_ro_t Reserved11;
rpi_reg_rw_t GPAFEN0;
rpi_reg_rw_t GPAFEN1; //0x8C
rpi_reg_ro_t Reserved10; //0x90
rpi_reg_rw_t GPPUD; // 0x94
rpi_reg_rw_t GPPUDCLK0; // 0x98
rpi_reg_rw_t GPPUDCLK1; // 0x9c
rpi_reg_ro_t Reserved11[0x11];
rpi_reg_rw_t GPPULL[4]; // 0xe4 Pi4 only
} rpi_gpio_t;
typedef enum
{
RPI_IO_LO = 0,