kopia lustrzana https://github.com/hoglet67/RGBtoHDMI
Atom CPLD: Send two 4-bit pixels per psync edge
Change-Id: I585ee6b74a69405dcbd1ce13e38eadc792a16048pull/11/head
rodzic
20465e78fc
commit
a40367459c
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@ -61,11 +61,12 @@ architecture Behavorial of RGBtoHDMI is
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constant atom_clamp_end : unsigned(8 downto 0) := to_unsigned(512 - 255 + 248, 9);
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constant atom_clamp_end : unsigned(8 downto 0) := to_unsigned(512 - 255 + 248, 9);
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-- Sampling points
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-- Sampling points
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constant INIT_SAMPLING_POINTS : std_logic_vector(3 downto 0) := "0010";
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constant INIT_SAMPLING_POINTS : std_logic_vector(3 downto 0) := "0000";
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signal shift_R : std_logic_vector(3 downto 0);
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signal shift_R : std_logic_vector(1 downto 0);
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signal shift_G : std_logic_vector(3 downto 0);
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signal shift_G1 : std_logic_vector(1 downto 0);
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signal shift_B : std_logic_vector(3 downto 0);
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signal shift_G2 : std_logic_vector(1 downto 0);
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signal shift_B : std_logic_vector(1 downto 0);
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-- The sampling counter runs at 8x pixel clock of 7.15909MHz = 56.272720MHz
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-- The sampling counter runs at 8x pixel clock of 7.15909MHz = 56.272720MHz
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--
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--
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@ -86,13 +87,13 @@ architecture Behavorial of RGBtoHDMI is
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signal offset : unsigned (3 downto 0);
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signal offset : unsigned (3 downto 0);
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-- Sample pixel on next clock; pipelined to reduce the number of product terms
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-- Sample pixel on next clock; pipelined to reduce the number of product terms
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signal shift : std_logic;
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signal sample_C : std_logic;
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signal sample_C : std_logic;
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signal sample_L : std_logic;
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signal sample_L : std_logic;
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-- Decoded RGB signals
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-- Decoded RGB signals
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signal R : std_logic;
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signal R : std_logic;
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signal G : std_logic;
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signal G1 : std_logic;
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signal G2 : std_logic;
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signal B : std_logic;
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signal B : std_logic;
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-- R/PA/PB processing pipeline
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-- R/PA/PB processing pipeline
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@ -126,7 +127,7 @@ architecture Behavorial of RGBtoHDMI is
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begin
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begin
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offset <= unsigned(sp_reg(3 downto 0));
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offset <= unsigned(sp_reg(3 downto 0));
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-- Shift the bits in LSB first
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-- Shift the bits in LSB first
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process(sp_clk)
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process(sp_clk)
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@ -169,13 +170,6 @@ begin
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sample_C <= '0';
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sample_C <= '0';
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end if;
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end if;
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-- shift
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if counter(1 downto 0) = offset(1 downto 0) then
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shift <= '1';
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else
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shift <= '0';
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end if;
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-- Atom pixel processing
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-- Atom pixel processing
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AL1 <= AL_I;
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AL1 <= AL_I;
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AH1 <= AH_I;
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AH1 <= AH_I;
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@ -195,7 +189,7 @@ begin
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L1 <= L_I;
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L1 <= L_I;
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L2 <= L1;
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L2 <= L1;
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L3 <= L2;
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L3 <= L2;
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if sample_C = '1' then
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if sample_C = '1' then
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AL <= (AL1 AND AL2) OR (AL1 AND AL3) OR (AL2 AND AL3);
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AL <= (AL1 AND AL2) OR (AL1 AND AL3) OR (AL2 AND AL3);
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AH <= (AH1 AND AH2) OR (AH1 AND AH3) OR (AH2 AND AH3);
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AH <= (AH1 AND AH2) OR (AH1 AND AH3) OR (AH2 AND AH3);
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@ -225,7 +219,13 @@ begin
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--BUFF 1.5 1.5 0 0 0 0 1 1 1 1 1
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--BUFF 1.5 1.5 0 0 0 0 1 1 1 1 1
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--ORANGE 2.0 1.0 0 1 1 0 1 1 1 0 0
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--ORANGE 2.0 1.0 0 1 1 0 1 1 1 0 0
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G <= (NOT AL AND NOT AH AND BL AND NOT BH) OR (AL AND NOT AH AND NOT BL AND NOT BH) OR (AL AND NOT AH AND BL AND NOT BH AND L) OR (NOT AL AND NOT AH AND NOT BL AND NOT BH AND L) OR (NOT AL AND AH AND BL AND NOT BH AND L);
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G1 <= (NOT AL AND NOT AH AND BL AND NOT BH) OR (AL AND NOT AH AND NOT BL AND NOT BH) OR (AL AND NOT AH AND BL AND NOT BH AND L) OR (NOT AL AND NOT AH AND NOT BL AND NOT BH AND L) OR (NOT AL AND AH AND BL AND NOT BH AND L);
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-- AL AH BL BH L R G1 G2 B
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--ORANGE 2.0 1.0 0 1 1 0 1 1 1 0 0
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-- Note: invert this, so orange appears in colours 8..15
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G2 <= (NOT AL AND AH AND BL AND NOT BH AND L);
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-- AL AH BL BH L R G1 G2 B
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-- AL AH BL BH L R G1 G2 B
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--BLUE 1.5 2.0 0 0 0 1 X 0 0 1 1
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--BLUE 1.5 2.0 0 0 0 1 X 0 0 1 1
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@ -237,13 +237,15 @@ begin
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end if;
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end if;
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if shift = '1' and counter(counter'left) = '0' then
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if sample_L = '1' and counter(counter'left) = '0' then
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-- R Sample/shift register
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-- R Sample/shift register
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shift_R <= R & shift_R(3 downto 1);
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shift_R <= R & shift_R(1);
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-- G Sample/shift register
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-- G1 Sample/shift register
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shift_G <= G & shift_G(3 downto 1);
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shift_G1 <= G1 & shift_G1(1);
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-- G2 Sample/shift register
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shift_G2 <= G2 & shift_G2(1);
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-- B Sample/shift register
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-- B Sample/shift register
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shift_B <= B & shift_B(3 downto 1);
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shift_B <= B & shift_B(1);
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end if;
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end if;
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-- Output quad register
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-- Output quad register
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@ -252,17 +254,17 @@ begin
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psync <= '0';
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psync <= '0';
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elsif counter(counter'left) = '0' then
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elsif counter(counter'left) = '0' then
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if counter(3 downto 0) = "0000" then
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if counter(3 downto 0) = "0000" then
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quad(11) <= shift_B(3);
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quad(11) <= '0';
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quad(10) <= shift_G(3);
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quad(10) <= '0';
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quad(9) <= shift_R(3);
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quad(9) <= '0';
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quad(8) <= shift_B(2);
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quad(8) <= '0';
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quad(7) <= shift_G(2);
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quad(7) <= shift_G2(1);
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quad(6) <= shift_R(2);
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quad(6) <= shift_B(1);
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quad(5) <= shift_B(1);
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quad(5) <= shift_G1(1);
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quad(4) <= shift_G(1);
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quad(4) <= shift_R(1);
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quad(3) <= shift_R(1);
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quad(3) <= shift_G2(0);
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quad(2) <= shift_B(0);
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quad(2) <= shift_B(0);
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quad(1) <= shift_G(0);
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quad(1) <= shift_G1(0);
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quad(0) <= shift_R(0);
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quad(0) <= shift_R(0);
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psync <= counter(4);
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psync <= counter(4);
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end if;
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end if;
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@ -74,3 +74,14 @@ FB3 18/18* 30/54 69/90 8/ 9
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FB4 18/18* 28/54 39/90 7/ 7*
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FB4 18/18* 28/54 39/90 7/ 7*
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----- ----- ----- -----
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----- ----- ----- -----
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69/72 111/216 189/360 27/34
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69/72 111/216 189/360 27/34
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8. Atom CPLD: Send two 4-bit pixels per psync edge
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Function Mcells FB Inps Pterms IO
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Block Used/Tot Used/Tot Used/Tot Used/Tot
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FB1 18/18* 27/54 46/90 8/ 9
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FB2 11/18 20/54 21/90 4/ 9
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FB3 18/18* 28/54 63/90 8/ 9
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FB4 18/18* 27/54 36/90 7/ 7*
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----- ----- ----- -----
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65/72 102/216 166/360 27/34
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