kopia lustrzana https://github.com/hoglet67/RGBtoHDMI
Move sync detection into GPU
IanSB
rodzic
3b538b3115
commit
94e221ec78
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@ -27,10 +27,8 @@ skip_psync_loop_no_oldL\@:
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#else
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.macro SKIP_PSYNC_NO_OLD_CPLD_NTSC
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mov r8, #4 //adds 4 to capture length
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SKIP_PSYNC_COMMON_NO_OLD_CPLD
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add r8, r7, r1
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add r8, r8, #4
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str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
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mov r9, #0
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skip_psync_loop_no_oldL6\@:
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WAIT_FOR_PSYNC_EDGE_FAST // wait for next edge of psync
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@ -47,10 +45,8 @@ skip_psync_loop_no_oldL6\@:
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.endm
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.macro SKIP_PSYNC_NO_OLD_CPLD_NTSC_3BPP
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mov r8, #2 //adds 2 to capture length
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SKIP_PSYNC_COMMON_NO_OLD_CPLD
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add r8, r7, r1
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add r8, r8, #2
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str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
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mov r9, #0
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skip_psync_loop_no_oldL3\@:
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WAIT_FOR_PSYNC_EDGE_FAST // wait for next edge of psync
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@ -578,6 +578,8 @@ typedef struct {
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#define MODE_SET1 0
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#define MODE_SET2 1
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#define SYNC_ABORT_FLAG 0x80000000
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#define LEADING_SYNC_FLAG 0x00010000
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#define SIMPLE_SYNC_FLAG 0x00008000
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#define HIGH_LATENCY_FLAG 0x00004000
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#define OLD_FIRMWARE_FLAG 0x00002000
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@ -593,4 +595,5 @@ typedef struct {
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#endif
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#define Bit32u uint32_t
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#define Bit8u uint8_t
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#define Bit8u uint8_t
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#define Bitu uint32_t
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84
src/macros.S
84
src/macros.S
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@ -412,19 +412,35 @@ clear_regs\@:
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str r8, [r10, r14]
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subs r14, r14, #4
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bpl clear_regs\@
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ldr r10, =GPU_workspace
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str r8, [r10]
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str r8, [r10, #4]
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ldr r14, =GPU_workspace
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str r8, [r14]
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str r8, [r14, #4]
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.endm
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.macro SETUP_GPU_CAPTURE_CPLD
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push {r8}
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SETUP_GPU_CAPTURE
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add r8, r7, r1 //now r8 is total samples to capture (offset + video)
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tst r3, #BIT_NO_H_SCROLL // only allow fine sideways scrolling in bbc / electron mode (causes timing issues in ega mode)
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addeq r8, r8, #2 // add 2 extra samples when hscrolling to allow for shift
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tst r3, #BIT_HSYNC_EDGE // if leading edge then don't wait for end of hsync (means scroll detection won't work)
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addne r8, r7, r1 //restore r8 if leading edge as no sideways scrolling allowed
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orrne r8, #LEADING_SYNC_FLAG
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pop {r14}
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add r8, r8, r14 // adds in extra flags such as high latency capture or additional psync counts used in NTSC artfact capture
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str r8, [r10] //command register
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.endm
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.macro SKIP_PSYNC_COMMON_NO_OLD_CPLD
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SETUP_GPU_CAPTURE
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//enters with R8 containing extra gpu flags such as high latency or additional psync counts used in NTSC artfact capture
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SETUP_GPU_CAPTURE_CPLD
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WAIT_FOR_CSYNC_0_FAST_SKIP_HSYNC
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bic r3, r3, #PSYNC_MASK // wait for zero after CSYNC
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READ_CYCLE_COUNTER r10
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bic r3, r3, #PSYNC_MASK // wait for zero after CSYNC
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push {r10}
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tst r3, #BIT_HSYNC_EDGE // if leading edge then don't wait for end of hsync (means scroll detection won't work)
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bne do_skip_psync_no_old\@
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bne do_skip_psync_no_old1\@
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pop {r10}
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mov r6, r9, lsr #16 //HSYNC_SCROLL_HI
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bic r9, r9, #0xff000000
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@ -453,49 +469,55 @@ clear_regs\@:
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addlt r8, r8, #1
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orrlt r3, r3, #BIT_INHIBIT_MODE_DETECT
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tst r3, #BIT_NO_H_SCROLL
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moveq r7, r8 // only allow fine sideways scrolling in bbc / electron mode (causes timing issues in ega mode)
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subeq r10, r8, r7
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rsbeq r10, r10, #2
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addeq r1, r1, r10 // increase r1 if no adjustment to r7
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moveq r7, r8 // only allow fine sideways scrolling in bbc / electron mode (causes timing issues in ega mode)
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// Skip the configured number of psync edges (modes 0..6: edges every 250ns, mode 7: edges ever 333ns)
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do_skip_psync_no_old\@:
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do_skip_psync_no_old1\@:
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bl _get_gpu_data_base_r4
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mov r8, #SYNC_ABORT_FLAG
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str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
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.endm
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.macro SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
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SKIP_PSYNC_COMMON_NO_OLD_CPLD
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add r8, r7, r1
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mov r8, #0
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tst r3, #BIT_RPI234
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orrne r8, r8, #HIGH_LATENCY_FLAG //request high latency capture (slightly faster but only really suitable for 9/12bpp modes)
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str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
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skip_psync_no_old_loop\@:
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SKIP_PSYNC_COMMON_NO_OLD_CPLD
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skip_psync_no_old_loop2\@:
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WAIT_FOR_PSYNC_EDGE_FAST // wait for next edge of psync
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subs r7, r7, #1
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bne skip_psync_no_old_loop\@
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bne skip_psync_no_old_loop2\@
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.endm
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.macro SKIP_PSYNC_NO_OLD_CPLD
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mov r8, #0
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SKIP_PSYNC_COMMON_NO_OLD_CPLD
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add r8, r7, r1
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str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
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skip_psync_no_old_loop\@:
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skip_psync_no_old_loop1\@:
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WAIT_FOR_PSYNC_EDGE_FAST // wait for next edge of psync
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subs r7, r7, #1
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bne skip_psync_no_old_loop\@
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bne skip_psync_no_old_loop1\@
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.endm
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.macro SKIP_PSYNC
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SETUP_GPU_CAPTURE
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// called if 4 bits per pixel in non-fast mode so has support for old CPLV v1 & v2
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mov r8, #0
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tst r3, #BIT_OLD_FIRMWARE_SUPPORT
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orrne r8, r8, #OLD_FIRMWARE_FLAG //request old firmware support (does double reads so slower but only used on 3bpp)
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SETUP_GPU_CAPTURE_CPLD
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WAIT_FOR_CSYNC_0_SKIP_HSYNC
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bic r3, r3, #PSYNC_MASK // wait for zero after CSYNC
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READ_CYCLE_COUNTER r10
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push {r10}
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tst r3, #BIT_HSYNC_EDGE // if leading edge then don't wait for end of hsync (means scroll detection won't work)
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bne do_skip_psync\@
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pop {r10}
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bic r3, r3, #PSYNC_MASK // wait for zero after CSYNC
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push {r10}
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tst r3, #BIT_HSYNC_EDGE // if leading edge then don't wait for end of hsync (means scroll detection won't work)
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bne do_skip_psync3\@
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pop {r10}
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// Wait for the end of hsync
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WAIT_FOR_CSYNC_1
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READ_CYCLE_COUNTER r14
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push {r14}
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push {r14} //save timestamp
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// Calculate length of low hsync pulse (in ARM cycles = ns)
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subs r10, r14, r10
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rsbmi r10, r10, #0
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@ -533,13 +555,15 @@ notoldfirmwarescroll\@:
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orrlt r3, r3, #BIT_INHIBIT_MODE_DETECT
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doneoldfirmwarescroll\@:
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tst r3, #BIT_NO_H_SCROLL
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subeq r10, r8, r7
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rsbeq r10, r10, #2
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addeq r1, r1, r10 // increase r1 if no adjustment to r7
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moveq r7, r8 // only allow fine sideways scrolling in bbc / electron mode (causes timing issues in ega mode)
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// Skip the configured number of psync edges (modes 0..6: edges every 250ns, mode 7: edges ever 333ns)
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do_skip_psync\@:
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do_skip_psync3\@:
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bl _get_gpu_data_base_r4
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add r8, r7, r1
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tst r3, #BIT_OLD_FIRMWARE_SUPPORT
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orrne r8, r8, #OLD_FIRMWARE_FLAG //request old firmware support (does double reads so slower but only used on 3bpp)
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mov r8, #SYNC_ABORT_FLAG
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str r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)] //command register
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skip_psync_loop\@:
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WAIT_FOR_PSYNC_EDGE // wait for next edge of psync
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@ -1156,7 +1156,7 @@ skip_hsync_time_test:
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ldr r0, param_timingset
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orr r0, #RET_SYNC_TIMING_CHANGED
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ldr r6, hsync_period
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ldr r6, total_hsync_period
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ldr r7, hsync_comparison_lo
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ldr r8, hsync_comparison_hi
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cmp r6, r7
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@ -3080,6 +3080,8 @@ void setup_profile(int profile_changed) {
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}
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log_info("Window: H=%d to %d, V=%d to %d", hsync_comparison_lo * 1000 / cpuspeed, hsync_comparison_hi * 1000 / cpuspeed, (int)((double)vsync_comparison_lo * 1000 / cpuspeed)
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, (int)((double)vsync_comparison_hi * 1000 / cpuspeed));
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hsync_comparison_lo *= (capinfo->nlines - 1); //actually measure nlines-1 hsyncs to average out jitter
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hsync_comparison_hi *= (capinfo->nlines - 1);
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log_info("Sync=%s, Det-Sync=%s, Det-HS-Width=%d, HS-Thresh=%d", sync_names[capinfo->sync_type & SYNC_BIT_MASK], sync_names[capinfo->detected_sync_type & SYNC_BIT_MASK], hsync_width, hsync_threshold);
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}
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@ -3459,7 +3461,7 @@ void rgb_to_hdmi_main() {
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flags = old_flags;
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if (result & RET_SYNC_TIMING_CHANGED) {
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log_info("Timing exceeds window: H=%d, V=%d, Lines=%d, VSync=%d", hsync_period * 1000 / cpuspeed, (int)((double)vsync_period * 1000 / cpuspeed), (int) (((double)vsync_period/hsync_period) + 0.5), (result & RET_SYNC_POLARITY_CHANGED) ? 1 : 0);
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log_info("Timing exceeds window: H=%d, V=%d, Lines=%d, VSync=%d", (int)((double)total_hsync_period * 1000 / cpuspeed / (capinfo->nlines - 1)), (int)((double)vsync_period * 1000 / cpuspeed), (int) (((double)vsync_period/(total_hsync_period/(capinfo->nlines-1))) + 0.5), (result & RET_SYNC_POLARITY_CHANGED) ? 1 : 0);
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}
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if (result & RET_SYNC_STATE_CHANGED) {
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Plik binarny nie jest wyświetlany.
160
src/videocore.c
160
src/videocore.c
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@ -11,93 +11,103 @@ unsigned char ___videocore_asm[] = {
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0x52, 0x23, 0x53, 0x25, 0x59, 0x26, 0x5a, 0x27, 0x5c, 0x30, 0x5c, 0x34,
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0xf0, 0x71, 0xf1, 0x71, 0xf2, 0x71, 0xf3, 0x71, 0xf9, 0x71, 0xfa, 0x71,
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0x50, 0x31, 0x51, 0x32, 0x52, 0x33, 0x53, 0x35, 0x59, 0x36, 0x5a, 0x37,
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0x82, 0x40, 0x53, 0x20, 0x03, 0x6a, 0x7e, 0x18, 0xf3, 0x6c, 0x00, 0x90,
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0x64, 0x00, 0x31, 0x40, 0x01, 0x7b, 0x01, 0x6a, 0x39, 0x18, 0x11, 0x6a,
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0x27, 0x18, 0x12, 0x73, 0x21, 0x6a, 0x34, 0x18, 0x31, 0x6a, 0x22, 0x18,
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0x41, 0x6a, 0x0e, 0x18, 0x51, 0x6a, 0xd7, 0x18, 0x40, 0x08, 0x20, 0x45,
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0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0xf9, 0x18,
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0x58, 0x34, 0x00, 0x9e, 0x41, 0x00, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d,
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0x82, 0x40, 0x01, 0x00, 0x53, 0x20, 0x01, 0x00, 0x03, 0x6a, 0x01, 0x00,
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0x7b, 0x18, 0xf3, 0x6d, 0xe4, 0x18, 0xf3, 0x6c, 0x00, 0x90, 0x65, 0x00,
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0x31, 0x40, 0x01, 0x7b, 0x01, 0x6a, 0x39, 0x18, 0x11, 0x6a, 0x27, 0x18,
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0x12, 0x73, 0x21, 0x6a, 0x34, 0x18, 0x31, 0x6a, 0x22, 0x18, 0x41, 0x6a,
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0x0e, 0x18, 0x51, 0x6a, 0xd2, 0x18, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d,
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0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0xf9, 0x18, 0x58, 0x34,
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0x00, 0x9e, 0x41, 0x00, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18,
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0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0xf9, 0x18, 0x58, 0x34, 0x40, 0x08,
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0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d,
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0x79, 0x18, 0x2e, 0x1f, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18,
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0x20, 0x45, 0x12, 0x75, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18,
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0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0xf3, 0x18, 0x58, 0x34, 0x1e, 0x1f,
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0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75,
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0x70, 0x6d, 0x79, 0x18, 0x2e, 0x1f, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d,
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0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75,
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0x70, 0x6d, 0xf3, 0x18, 0x58, 0x34, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d,
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0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d,
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0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0xf3, 0x18, 0x58, 0x34,
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0x1e, 0x1f, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45,
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0x12, 0x75, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45,
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0x12, 0x75, 0x70, 0x6d, 0xf3, 0x18, 0x58, 0x34, 0x40, 0x08, 0x20, 0x45,
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0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x40, 0x08, 0x20, 0x45,
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0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0x73, 0x18,
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0x12, 0x6d, 0x87, 0x18, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18,
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0x20, 0x45, 0x12, 0x75, 0x82, 0x40, 0xe3, 0x6c, 0x00, 0x91, 0x25, 0x01,
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0xd3, 0x6c, 0x00, 0x91, 0x8c, 0x00, 0x73, 0x47, 0x13, 0x62, 0x13, 0x7a,
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0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2,
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0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18,
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0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a,
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0x10, 0x4d, 0x50, 0x31, 0x7f, 0x90, 0x66, 0xff, 0x40, 0x08, 0x10, 0x6d,
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0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x13, 0x66,
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0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47,
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0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x32,
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0x7f, 0x90, 0x50, 0xff, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d,
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0xfd, 0x18, 0x20, 0x45, 0x12, 0x75, 0x70, 0x6d, 0x73, 0x18, 0x12, 0x6d,
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0x87, 0x18, 0x40, 0x08, 0x20, 0x45, 0x10, 0x6d, 0xfd, 0x18, 0x20, 0x45,
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0x12, 0x75, 0x82, 0x40, 0x12, 0x1f, 0xd3, 0x6c, 0x00, 0x91, 0x9d, 0x00,
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0x50, 0x20, 0xf0, 0x6d, 0x8c, 0x18, 0x40, 0x08, 0x70, 0x6d, 0xfb, 0x18,
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0x03, 0x6d, 0x87, 0x18, 0x50, 0x20, 0xf0, 0x6d, 0x84, 0x18, 0x40, 0x08,
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0x70, 0x6d, 0x7b, 0x18, 0xe3, 0x6c, 0x00, 0x91, 0x48, 0x01, 0x73, 0x47,
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0x13, 0x62, 0x13, 0x7a, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d,
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0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08,
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0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
|
||||
0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x33, 0x7f, 0x90, 0x3a, 0xff,
|
||||
0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x31, 0x7f, 0x90, 0x52, 0xff,
|
||||
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2,
|
||||
0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18,
|
||||
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a,
|
||||
0x10, 0x4d, 0x50, 0x35, 0x7f, 0x90, 0x24, 0xff, 0x40, 0x08, 0x10, 0x6d,
|
||||
0x10, 0x4d, 0x50, 0x32, 0x7f, 0x90, 0x3c, 0xff, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x13, 0x66,
|
||||
0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47,
|
||||
0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x36,
|
||||
0x7f, 0x90, 0x0e, 0xff, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d,
|
||||
0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x12, 0x75,
|
||||
0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2,
|
||||
0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x37, 0x7f, 0x90,
|
||||
0xf7, 0xfe, 0x7f, 0x9e, 0x7b, 0xff, 0x73, 0x47, 0x13, 0x62, 0x13, 0x7a,
|
||||
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47,
|
||||
0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
|
||||
0x7e, 0x18, 0x41, 0x08, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
|
||||
0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x31, 0x7f, 0x90, 0xda, 0xfe,
|
||||
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47,
|
||||
0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
|
||||
0x7e, 0x18, 0x41, 0x08, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
|
||||
0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x32, 0x7f, 0x90, 0xc2, 0xfe,
|
||||
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47,
|
||||
0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
|
||||
0x7e, 0x18, 0x41, 0x08, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
|
||||
0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x33, 0x7f, 0x90, 0xaa, 0xfe,
|
||||
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47,
|
||||
0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
|
||||
0x7e, 0x18, 0x41, 0x08, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
|
||||
0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x35, 0x7f, 0x90, 0x92, 0xfe,
|
||||
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47,
|
||||
0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
|
||||
0x7e, 0x18, 0x41, 0x08, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
|
||||
0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x36, 0x7f, 0x90, 0x7a, 0xfe,
|
||||
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47,
|
||||
0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x12, 0x75, 0x41, 0x08,
|
||||
0x11, 0x6d, 0x7e, 0x18, 0x41, 0x08, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2,
|
||||
0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x37, 0x7f, 0x90,
|
||||
0x61, 0xfe, 0x7f, 0x9e, 0x6f, 0xff, 0x73, 0x47, 0x30, 0x40, 0xb0, 0x62,
|
||||
0xc1, 0x60, 0xe3, 0xc4, 0x01, 0x07, 0x12, 0x75, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x12, 0x75,
|
||||
0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47,
|
||||
0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d, 0x50, 0x31,
|
||||
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2,
|
||||
0xce, 0x00, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d,
|
||||
0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d,
|
||||
0x50, 0x32, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47,
|
||||
0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
|
||||
0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d,
|
||||
0x10, 0x4d, 0x10, 0x4d, 0x50, 0x33, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18,
|
||||
0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d, 0x41, 0x08,
|
||||
0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x33,
|
||||
0x7f, 0x90, 0x26, 0xff, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d,
|
||||
0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08,
|
||||
0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
|
||||
0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d, 0x50, 0x35, 0x40, 0x08, 0x10, 0x6d,
|
||||
0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x35, 0x7f, 0x90, 0x10, 0xff,
|
||||
0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2,
|
||||
0xce, 0x00, 0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18,
|
||||
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a,
|
||||
0x10, 0x4d, 0x50, 0x36, 0x7f, 0x90, 0xfa, 0xfe, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x13, 0x66,
|
||||
0x20, 0x4d, 0x12, 0x75, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d,
|
||||
0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a, 0x10, 0x4d,
|
||||
0x50, 0x37, 0x7f, 0x90, 0xe3, 0xfe, 0x7f, 0x9e, 0x7b, 0xff, 0x50, 0x20,
|
||||
0xf0, 0x6d, 0xa4, 0x18, 0x40, 0x08, 0x70, 0x6d, 0xfb, 0x18, 0x40, 0x08,
|
||||
0x70, 0x6d, 0xf8, 0x18, 0x40, 0x08, 0x70, 0x6d, 0xf5, 0x18, 0x40, 0x08,
|
||||
0x70, 0x6d, 0xf2, 0x18, 0x40, 0x08, 0x70, 0x6d, 0xef, 0x18, 0x03, 0x6d,
|
||||
0x93, 0x18, 0x50, 0x20, 0xf0, 0x6d, 0x90, 0x18, 0x40, 0x08, 0x70, 0x6d,
|
||||
0x7b, 0x18, 0x40, 0x08, 0x70, 0x6d, 0x78, 0x18, 0x40, 0x08, 0x70, 0x6d,
|
||||
0x75, 0x18, 0x40, 0x08, 0x70, 0x6d, 0x72, 0x18, 0x40, 0x08, 0x70, 0x6d,
|
||||
0x6f, 0x18, 0x73, 0x47, 0x13, 0x62, 0x13, 0x7a, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00,
|
||||
0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x41, 0x08,
|
||||
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a,
|
||||
0x10, 0x4d, 0x50, 0x31, 0x7f, 0x90, 0xa0, 0xfe, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00,
|
||||
0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x41, 0x08,
|
||||
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a,
|
||||
0x10, 0x4d, 0x50, 0x32, 0x7f, 0x90, 0x88, 0xfe, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00,
|
||||
0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x41, 0x08,
|
||||
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a,
|
||||
0x10, 0x4d, 0x50, 0x33, 0x7f, 0x90, 0x70, 0xfe, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00,
|
||||
0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x41, 0x08,
|
||||
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a,
|
||||
0x10, 0x4d, 0x50, 0x35, 0x7f, 0x90, 0x58, 0xfe, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00,
|
||||
0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x41, 0x08,
|
||||
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x03, 0x6a,
|
||||
0x10, 0x4d, 0x50, 0x36, 0x7f, 0x90, 0x40, 0xfe, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x40, 0x08, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00,
|
||||
0x13, 0x66, 0x20, 0x4d, 0x12, 0x75, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18,
|
||||
0x41, 0x08, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d,
|
||||
0x03, 0x6a, 0x10, 0x4d, 0x50, 0x37, 0x7f, 0x90, 0x27, 0xfe, 0x7f, 0x9e,
|
||||
0x6f, 0xff, 0x73, 0x47, 0x30, 0x40, 0xb0, 0x62, 0xc1, 0x60, 0xe3, 0xc4,
|
||||
0x01, 0x07, 0x12, 0x75, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d,
|
||||
0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x12, 0x75, 0x20, 0x4d, 0x41, 0x08,
|
||||
0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
|
||||
0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d, 0x50, 0x31, 0x40, 0x08, 0x10, 0x6d,
|
||||
0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d,
|
||||
0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2,
|
||||
0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d, 0x50, 0x36, 0x40, 0x08,
|
||||
0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d, 0x50, 0x32, 0x40, 0x08,
|
||||
0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00,
|
||||
0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47,
|
||||
0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x03, 0x6a, 0x10, 0x4d,
|
||||
0x50, 0x37, 0x7f, 0x91, 0x8b, 0xff, 0x7f, 0x9e, 0xdf, 0xfd
|
||||
0x13, 0x66, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d,
|
||||
0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d, 0x10, 0x4d,
|
||||
0x50, 0x33, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d, 0x60, 0x47,
|
||||
0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d, 0x7e, 0x18,
|
||||
0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d, 0x10, 0x4d,
|
||||
0x10, 0x4d, 0x50, 0x35, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18, 0x80, 0x6d,
|
||||
0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d, 0x41, 0x08, 0x11, 0x6d,
|
||||
0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08, 0x01, 0x7d,
|
||||
0x10, 0x4d, 0x10, 0x4d, 0x50, 0x36, 0x40, 0x08, 0x10, 0x6d, 0xfe, 0x18,
|
||||
0x80, 0x6d, 0x60, 0x47, 0x00, 0xc2, 0xce, 0x00, 0x20, 0x4d, 0x41, 0x08,
|
||||
0x11, 0x6d, 0x7e, 0x18, 0x81, 0x6d, 0x61, 0x47, 0x01, 0xc2, 0xce, 0x08,
|
||||
0x01, 0x7d, 0x10, 0x4d, 0x03, 0x6a, 0x10, 0x4d, 0x50, 0x37, 0x7f, 0x91,
|
||||
0x8b, 0xff, 0x7f, 0x9e, 0xa5, 0xfd
|
||||
};
|
||||
unsigned int ___videocore_asm_len = 1198;
|
||||
unsigned int ___videocore_asm_len = 1314;
|
||||
|
|
|
|||
1851
src/videocore.lst
1851
src/videocore.lst
Plik diff jest za duży
Load Diff
|
|
@ -34,10 +34,14 @@
|
|||
.equ ALT_MUX_BIT, 14 #moved version of MUX bit
|
||||
.equ SYNC_BIT, 23 #sync input
|
||||
.equ VIDEO_MASK, 0x3ffc #12bit GPIO mask
|
||||
|
||||
.equ COMMAND_MASK, 0x00000fff #masks out command bits that trigger sync detection
|
||||
.equ SIMPLE_SYNC_FLAG, 15
|
||||
.equ HIGH_LATENCY_FLAG, 14
|
||||
#command bits
|
||||
.equ OLD_FIRMWARE_FLAG, 13
|
||||
.equ HIGH_LATENCY_FLAG, 14
|
||||
.equ SIMPLE_SYNC_FLAG, 15
|
||||
.equ LEADING_SYNC_FLAG, 16
|
||||
.equ SYNC_ABORT_FLAG, 31
|
||||
|
||||
#macros
|
||||
|
||||
|
|
@ -198,9 +202,14 @@ wait_for_command:
|
|||
mov r2, r8 #set the default state of the control bits
|
||||
|
||||
wait_for_command_loop:
|
||||
nop #some idle time to reduce continuous polling of register
|
||||
ld r3, GPU_COMMAND_offset(r5)
|
||||
nop
|
||||
cmp r3, 0
|
||||
nop
|
||||
beq wait_for_command_loop
|
||||
btst r3, SYNC_ABORT_FLAG
|
||||
bne wait_for_command
|
||||
btst r3, SIMPLE_SYNC_FLAG #bit signals upper 16 bits is a sync command
|
||||
beq do_capture
|
||||
mov r1, r3
|
||||
|
|
@ -271,16 +280,36 @@ done_simple_sync:
|
|||
bne no_compensate_psync
|
||||
EDGE_DETECT #have to compensate because capture hard coded to always start on same edge
|
||||
no_compensate_psync:
|
||||
|
||||
mov r2, r8 #set the default state of the control bits
|
||||
b capture_rest
|
||||
|
||||
do_capture:
|
||||
btst r3, HIGH_LATENCY_FLAG #bit signals high latency capture, only suitable for 9/12bpp modes
|
||||
bne hl_capture
|
||||
|
||||
btst r3, OLD_FIRMWARE_FLAG #bit signals old firmware capture, requires double reads as psync not pipelined
|
||||
bne ofw_capture
|
||||
|
||||
wait_csync_lo_cpld:
|
||||
ld r0, GPU_COMMAND_offset(r5)
|
||||
btst r0, SYNC_ABORT_FLAG
|
||||
bne capture_rest
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
bne wait_csync_lo_cpld
|
||||
|
||||
btst r3, LEADING_SYNC_FLAG
|
||||
bne capture_rest
|
||||
|
||||
wait_csync_hi_cpld:
|
||||
ld r0, GPU_COMMAND_offset(r5)
|
||||
btst r0, SYNC_ABORT_FLAG
|
||||
bne capture_rest
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
beq wait_csync_hi_cpld
|
||||
|
||||
capture_rest:
|
||||
btst r3, HIGH_LATENCY_FLAG #bit signals high latency capture, only suitable for 9/12bpp modes
|
||||
bne hl_capture
|
||||
|
||||
and r3, r7 #mask off any command bits (max capture is 4095 psync cycles)
|
||||
add r3, 1 #round up to multiple of 2
|
||||
lsr r3, 1 #divide by 2 as capturing 2 samples per cycle
|
||||
|
|
@ -326,6 +355,50 @@ capture_loop:
|
|||
b capture_loop
|
||||
|
||||
ofw_capture:
|
||||
ofw_wait_csync_lo_cpld:
|
||||
ld r0, GPU_COMMAND_offset(r5)
|
||||
btst r0, SYNC_ABORT_FLAG
|
||||
bne ofw_capture_rest
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
bne ofw_wait_csync_lo_cpld
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
bne ofw_wait_csync_lo_cpld
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
bne ofw_wait_csync_lo_cpld
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
bne ofw_wait_csync_lo_cpld
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
bne ofw_wait_csync_lo_cpld
|
||||
|
||||
btst r3, LEADING_SYNC_FLAG
|
||||
bne ofw_capture_rest
|
||||
|
||||
ofw_wait_csync_hi_cpld:
|
||||
ld r0, GPU_COMMAND_offset(r5)
|
||||
btst r0, SYNC_ABORT_FLAG
|
||||
bne ofw_capture_rest
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
beq ofw_wait_csync_hi_cpld
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
beq ofw_wait_csync_hi_cpld
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
beq ofw_wait_csync_hi_cpld
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
beq ofw_wait_csync_hi_cpld
|
||||
ld r0, (r4)
|
||||
btst r0, SYNC_BIT
|
||||
beq ofw_wait_csync_hi_cpld
|
||||
|
||||
ofw_capture_rest:
|
||||
and r3, r7 #mask off any command bits (max capture is 4095 psync cycles)
|
||||
add r3, 1 #round up to multiple of 2
|
||||
lsr r3, 1 #divide by 2 as capturing 2 samples per cycle
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue