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Fix debug lines in 8bpp mode

pull/30/head
IanSB 2019-03-07 23:38:03 +00:00
rodzic bc103f61e3
commit 945184694d
4 zmienionych plików z 29 dodań i 15 usunięć
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11
src/capture_line_default_4bpp_8bpp.S
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@ -60,17 +60,22 @@ capture_line_default_8bpp:
orrle r3, r3, #BITDUP_NO_LINE_DOUBLE
bicgt r3, r3, #BITDUP_NO_LINE_DOUBLE
tst r3, #BIT_VSYNC_MARKER
ldrne r5, =0x01010101
moveq r5, #0
ldrne r6, =0x01010101
moveq r6, #0
tst r3, #BIT_DEBUG
eorne r6, r6, #0x05 //magenta in leftmost
eorne r5, r5, #0x05 //magenta in leftmost
eorne r6, r6, #0x02000000 //green in rightmost
mov r1, r1, lsl #1
SKIP_PSYNC
loop_8bpp:
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
CAPTURE_BITS_8BPP // input in r8, result in r10, corrupts r9
WRITE_WORD_FAST
mov r11, r10 // save first word
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
CAPTURE_BITS_8BPP // input in r8, result in r9/r10
mov r9, r11
WRITE_WORDS_8BPP_FAST
subs r1, r1, #1
bne loop_8bpp
pop {pc}

6
src/capture_line_double_4bpp_8bpp.S
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@ -59,11 +59,13 @@ capture_line_double_8bpp:
orrle r3, r3, #BITDUP_NO_LINE_DOUBLE
bicgt r3, r3, #BITDUP_NO_LINE_DOUBLE
tst r3, #BIT_VSYNC_MARKER
ldrne r5, =0x01010101
moveq r5, #0
ldrne r6, =0x01010101
moveq r6, #0
tst r3, #BIT_DEBUG
eorne r6, r6, #0x05 //magenta in leftmost
eorne r6, r6, #0x02000000 //green in rightmost
eorne r5, r5, #0x05 //magenta in leftmost
eorne r6, r6, #0x02000000 //green in rightmost
SKIP_PSYNC
loop_8bpp:
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8

25
src/capture_line_oddeven_4bpp_8bpp.S
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@ -68,17 +68,17 @@ preload_capture_line_oddeven:
b preload_capture_line_oddeven_8bpp
capture_line_oddeven_8bpp:
push {lr}
cmp r5, #DUPLICATE_HEIGHT
orrle r3, r3, #BITDUP_NO_LINE_DOUBLE
bicgt r3, r3, #BITDUP_NO_LINE_DOUBLE
tst r3, #BIT_VSYNC_MARKER
ldrne r5, =0x01010101
moveq r5, #0
ldrne r6, =0x01010101
moveq r6, #0
tst r3, #BIT_DEBUG
eorne r6, r6, #0x05 //magenta in leftmost
eorne r6, r6, #0x02000000 //green in rightmost
mov r1, r1, lsl #1
eorne r5, r5, #0x05 //magenta in leftmost
eorne r6, r6, #0x02000000 //green in rightmost
SKIP_PSYNC
tst r3, #BIT_EVEN_SAMPLES
ldrne r7, =0x00070007
@ -88,16 +88,23 @@ capture_line_oddeven_8bpp:
loop_8bpp:
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
CAPTURE_BITS_8BPP // input in r8, result in r10, corrupts r9
tst r3, #BIT_EVEN_SAMPLES
bicne r10, r10, r7
orrne r10, r10, r10, lsr #8
tst r3, #BIT_ODD_SAMPLES
bicne r10, r10, r7
orrne r10, r10, r10, lsl #8
WRITE_WORD_FAST
orrne r10, r10, r10, lsl #8
mov r11, r10 // save first word
WAIT_FOR_PSYNC_EDGE // expects GPLEV0 in r4, result in r8
CAPTURE_BITS_8BPP // input in r8, result in r9/r10
tst r3, #BIT_EVEN_SAMPLES
bicne r10, r10, r7
orrne r10, r10, r10, lsr #8
tst r3, #BIT_ODD_SAMPLES
bicne r10, r10, r7
orrne r10, r10, r10, lsl #8
mov r9, r11
WRITE_WORDS_8BPP_FAST
subs r1, r1, #1
bne loop_8bpp
pop {pc}

2
src/macros.S
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@ -318,7 +318,7 @@ skip_psync_loop_exit\@:
.endm
.macro WRITE_WORDS_8BPP_FAST
eor r9, r9, r6 //eor in vsync and debug
eor r9, r9, r5 //eor in vsync and debug
eor r10, r10, r6 //eor in vsync and debug
stmia r0, {r9, r10}
add r0, r0, r2