From 6c519cdc2959ce40812f364457fa3ae2f9a7956d Mon Sep 17 00:00:00 2001
From: David Banks <dave@hoglet.com>
Date: Tue, 25 Apr 2017 09:57:21 +0100
Subject: [PATCH] VHDL: idle psync should be zero

Change-Id: I3422fb75376be0c3a29e8f02b5019910e9c84614
---
 vhdl/RGBtoHDMI.vhdl | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/vhdl/RGBtoHDMI.vhdl b/vhdl/RGBtoHDMI.vhdl
index 55311e03..599e180e 100644
--- a/vhdl/RGBtoHDMI.vhdl
+++ b/vhdl/RGBtoHDMI.vhdl
@@ -84,6 +84,7 @@ begin
             if nCSYNC1 = '0' then
                 -- within horizontal line sync pulse
                 hsync <= '1';
+                psync <= '0';
                 counter <= to_unsigned(1311, counter'length);
             else
                 -- within the line
@@ -103,7 +104,7 @@ begin
                     end if;
                 else
                     quad <= (others => '0');
-                    psync <= '1';
+                    psync <= '0';
                 end if;
             end if;
         end if;