Disable ARM use of L2 cache really helps!

Change-Id: I781daac0866ebe6bad7990161de9e6047aafbbe8
issue_1022
David Banks 2017-05-25 13:32:20 +01:00
rodzic 5f9be9ebda
commit 392a95a4e5
2 zmienionych plików z 6 dodań i 2 usunięć

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@ -188,7 +188,9 @@ void init_framebuffer(int mode7) {
// but the ARM doesn't see the updated value for a very long time // but the ARM doesn't see the updated value for a very long time
// i.e. the commented out section of code below is needed, and this eventually // i.e. the commented out section of code below is needed, and this eventually
// exits with i=4603039 // exits with i=4603039
RPI_Mailbox0Write(MB0_FRAMEBUFFER, ((unsigned int)fbp) + 0x40000000 ); //
// 0xC0000000 should be added if disable_l2cache=1
RPI_Mailbox0Write(MB0_FRAMEBUFFER, ((unsigned int)fbp) + 0xC0000000 );
// Wait for the response (0) // Wait for the response (0)
RPI_Mailbox0Read( MB0_FRAMEBUFFER ); RPI_Mailbox0Read( MB0_FRAMEBUFFER );
@ -343,7 +345,7 @@ int diff_N_frames(int sp, int n, int mode7, int chars_per_line) {
// int diff_sum2 = 0; // int diff_sum2 = 0;
// Grab an initial frame // Grab an initial frame
//rgb_to_fb(fb, chars_per_line, pitch, mode7 | BIT_CALIBRATE); rgb_to_fb(fb, chars_per_line, pitch, mode7 | BIT_CALIBRATE);
for (int i = 0; i < n; i++) { for (int i = 0; i < n; i++) {
// int total = 0; // int total = 0;

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@ -21,6 +21,8 @@ force_turbo=1
# Disable adjusting the refresh rate of RAM every 500 ms # Disable adjusting the refresh rate of RAM every 500 ms
disable_pvt=1 disable_pvt=1
boot_delay=0 boot_delay=0
disable_l2cache=1
# Enable VSYNC interrupt # Enable VSYNC interrupt
fake_vsync_isr=1 fake_vsync_isr=1