kopia lustrzana https://github.com/hoglet67/RGBtoHDMI
Pi Firmware: Remove need to specify n_lines (lines / frame)
Change-Id: Ia2409d346f27ef7798d6c3269c880b64f4ae03aepull/21/head
David Banks
rodzic
3badfc7535
commit
1ecf824152
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@ -135,7 +135,6 @@ typedef struct {
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typedef struct {
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int clock; // sample clock frequency (Hz)
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int line_len; // length of a line (in sample clocks)
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int n_lines; // number of lines in a frame
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} clk_info_t;
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#endif // __ASSEMBLER__
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@ -10,8 +10,7 @@ enum {
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FB_HEIGHT,
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FB_BPP,
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CLOCK,
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LINE_LEN,
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N_LINES,
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LINE_LEN
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};
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static param_t params[] = {
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@ -24,7 +23,6 @@ static param_t params[] = {
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{ FB_BPP, "FB bits/pixel", 4, 8, 4 },
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{ CLOCK, "Clock freq", 75000000, 100000000, 1 },
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{ LINE_LEN, "Line length", 1000, 9999, 1 },
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{ N_LINES, "Lines per frame", 500, 699, 1 },
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{ -1, NULL, 0, 0, 0 },
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};
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@ -38,7 +36,6 @@ typedef struct {
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int fb_bpp; // framebuffer bits per pixel
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int clock; // cpld clock (in Hz)
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int line_len; // number of clocks per horizontal line
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int n_lines; // number of horizontal lines per frame (two fields)
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} geometry_t;
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static int mode7;
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@ -73,7 +70,6 @@ void geometry_init(int version) {
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mode7_geometry.fb_bpp = 4;
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mode7_geometry.clock = 96000000;
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mode7_geometry.line_len = 96 * 64;
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mode7_geometry.n_lines = 625;
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default_geometry.h_offset = 32;
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default_geometry.v_offset = 21;
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default_geometry.h_width = 672 / (32 / 4);
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@ -83,7 +79,6 @@ void geometry_init(int version) {
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default_geometry.fb_bpp = 4;
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default_geometry.clock = 96000000;
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default_geometry.line_len = 96 * 64;
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default_geometry.n_lines = 625;
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// For backwards compatibility with CPLDv1
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int supports_delay = (((version >> VERSION_DESIGN_BIT) & 0x0F) == 0) &&
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(((version >> VERSION_MAJOR_BIT ) & 0x0F) >= 2);
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@ -121,8 +116,6 @@ int geometry_get_value(int num) {
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return geometry->clock;
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case LINE_LEN:
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return geometry->line_len;
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case N_LINES:
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return geometry->n_lines;
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}
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return -1;
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}
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@ -157,9 +150,6 @@ void geometry_set_value(int num, int value) {
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case LINE_LEN:
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geometry->line_len = value;
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break;
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case N_LINES:
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geometry->n_lines = value;
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break;
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}
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}
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@ -180,5 +170,4 @@ void geometry_get_fb_params(capture_info_t *capinfo) {
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void geometry_get_clk_params(clk_info_t *clkinfo) {
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clkinfo->clock = geometry->clock;
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clkinfo->line_len = geometry->line_len;
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clkinfo->n_lines = geometry->n_lines;
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}
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@ -8,6 +8,7 @@
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.text
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.global rgb_to_fb
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.global measure_vsync
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.global measure_n_lines
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.global sw1counter
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.global sw2counter
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.global sw3counter
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@ -635,6 +636,43 @@ measure_vsync:
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pop {r4-r12, pc}
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// ======================================================================
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// MEASURE_N_LINES
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// ======================================================================
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// TODO: We might want to mitigate the effects of any I-Cache misses
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measure_n_lines:
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push {r4-r12, lr}
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// Setup R4 as a constant
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ldr r4, =GPLEV0
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// wait for vsync
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bl wait_for_vsync
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// skip 10 lines so we are well away from any double vsync pulses
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mov r1, #10
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measure_n_loop1:
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WAIT_FOR_CSYNC_1
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WAIT_FOR_CSYNC_0
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subs r1, r1, #1
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bne measure_n_loop1
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READ_CYCLE_COUNTER r7
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// now do the actual counting
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measure_n_loop2:
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WAIT_FOR_CSYNC_1
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WAIT_FOR_CSYNC_0
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subs r0, r0, #1
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bne measure_n_loop2
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READ_CYCLE_COUNTER r6
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sub r0, r6, r7
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pop {r4-r12, pc}
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// ======================================================================
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// CLEAR_SCREEN
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// ======================================================================
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@ -9,6 +9,8 @@ extern int rgb_to_fb(capture_info_t *cap_info, int flags);
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extern int measure_vsync();
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extern int measure_n_lines(int n);
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extern int sw1counter;
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extern int sw2counter;
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@ -281,14 +281,12 @@ static int calibrate_sampling_clock() {
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// Default values for the Beeb
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clkinfo.clock = 96000000;
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clkinfo.line_len = 64000;
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clkinfo.n_lines = 625;
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// Update from configuration
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geometry_get_clk_params(&clkinfo);
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log_info(" clkinfo.clock = %d Hz", clkinfo.clock);
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log_info(" clkinfo.line_len = %d", clkinfo.line_len);
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log_info(" clkinfo.n_lines = %d", clkinfo.n_lines);
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// Pick the best value for core_freq and gpclk_divisor given the following constraints
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// 1. Core Freq should be as high as possible, but <= 400MHz
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@ -298,36 +296,20 @@ static int calibrate_sampling_clock() {
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// i.e. gp_clk_divisor = floor(Core Freq * 3 / clkinfo.clock)
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// and core_freq = clkinfo.clock * gp_clk_divisor / 3
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int gpclk_divisor = 400000000 * 3 / clkinfo.clock;
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int core_freq = clkinfo.clock * gpclk_divisor / 3;
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int line_ref = (int) (1e9 * ((double) clkinfo.line_len) / ((double) clkinfo.clock));
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int frame_ref = (int) (1e9 * ((double) clkinfo.line_len) * ((double) clkinfo.n_lines) / ((double) clkinfo.clock));
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int gpclk_divisor = 400000000 * 3 / clkinfo.clock;
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int core_freq = clkinfo.clock * gpclk_divisor / 3;
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int nlines = 100; // Measure over N=100 lines
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int nlines_ref_ns = nlines * (int) (1e9 * ((double) clkinfo.line_len) / ((double) clkinfo.clock));
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int nlines_time_ns = measure_n_lines(nlines);
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log_info(" GPCLK Divisor = %d", gpclk_divisor);
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log_info("Nominal core clock = %d Hz", core_freq);
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log_info(" Nominal Line time = %d ns", line_ref);
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log_info("Nominal Frame time = %d ns", frame_ref);
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log_info(" Nominal %3d lines = %d ns", nlines, nlines_ref_ns);
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log_info(" Actual %3d lines = %d ns", nlines, nlines_time_ns);
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vsync_time_ns = measure_vsync();
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if (vsync_time_ns & INTERLACED_FLAG) {
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log_info(" Target n lines = %d", clkinfo.n_lines);
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log_info(" Target frame time = %d ns (interlaced)", frame_ref);
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} else {
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// If the video is non-interlaced and n_lines is odd, then loose a line
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if (clkinfo.n_lines % 2) {
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frame_ref -= line_ref;
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}
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log_info(" Target n lines = %d", clkinfo.n_lines);
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log_info(" Target frame time = %d ns (non-interlaced)", frame_ref);
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}
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vsync_time_ns &= ~INTERLACED_FLAG;
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log_info(" Actual frame time = %d ns", vsync_time_ns);
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double error = (double) vsync_time_ns / (double) frame_ref;
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double error = (double) nlines_time_ns / (double) nlines_ref_ns;
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clock_error_ppm = ((error - 1.0) * 1e6);
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log_info(" Frame time error = %d PPM", clock_error_ppm);
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log_info(" Clock error = %d PPM", clock_error_ppm);
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int new_clock;
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if (abs(clock_error_ppm) > MAX_CLOCK_ERROR_PPM) {
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@ -380,6 +362,17 @@ static int calibrate_sampling_clock() {
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init_gpclk(GPCLK_SOURCE, gpclk_divisor);
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log_debug("Done setting up divisor");
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// Remeasure the vsync time
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vsync_time_ns = measure_vsync();
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// And log it
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if (vsync_time_ns & INTERLACED_FLAG) {
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vsync_time_ns &= ~INTERLACED_FLAG;
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log_info(" Actual frame time = %d ns (interlaced)", vsync_time_ns);
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} else {
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log_info(" Actual frame time = %d ns (non-interlaced)", vsync_time_ns);
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}
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// Invalidate the current vlock mode to force an updated, as vsync_time_ns will have changed
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current_vlockmode = -1;
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@ -1276,7 +1269,7 @@ void rgb_to_hdmi_main() {
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active_size_decreased = (capinfo->chars_per_line < last_capinfo.chars_per_line) || (capinfo->nlines < last_capinfo.nlines);
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geometry_get_clk_params(&clkinfo);
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clk_changed = (clkinfo.clock != last_clkinfo.clock) || (clkinfo.line_len != last_clkinfo.line_len) || (clkinfo.n_lines != last_clkinfo.n_lines);
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clk_changed = (clkinfo.clock != last_clkinfo.clock) || (clkinfo.line_len != last_clkinfo.line_len);
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last_mode7 = mode7;
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mode7 = result & BIT_MODE7 & !m7disable;
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@ -65,7 +65,6 @@
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# - FB Bits/pixel 4 or 8 4 4 | a Beeb or
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# - Clock 75000000 100000000 96000000 96000000 | an Electron
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# - Line Length 1000 9999 6144 6144 |
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# - Lines per Frame 500 688 625 625 |
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#
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# Any number of these parameters can be specified but typically you would specify:
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#
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@ -83,7 +82,6 @@
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# - FB Bits/pixel: defines the number of bits per pixel in the frame buffer (4 or 8)
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# - Clock: the nominal sampling clock fed to the CPLD (in Hz)
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# - Line Length: the length of a horizontal line (in sampling clocks)
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# - Lines Per Frame: the number of horizontal lines per frame (two fields)
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#
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# info: the default info screen
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# - 0 is the calibration summary
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@ -185,16 +183,16 @@ sampling06=3 sampling7=0,2,2,2,2,2,2,0,8,5 info=1 palette=0 deinterlace=6 scanli
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#sampling06=4 geometry06=23,26,100,270,800,540 info=1 palette=0 deinterlace=0 scanlines=0 mux=0 elk=0 vsync=0 vlockmode=0 nbuffers=2 debug=1 m7disable=1
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#
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# Here's an example that might work with an Atom (CPLDv1) (narrow border)
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#sampling06=0,5,5,5,5,5,5,0 geometry06=3,37,66,200,528,400,4,85909091,5472,524 nbuffers=2 m7disable=1
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#sampling06=0,5,5,5,5,5,5,0 geometry06=3,37,66,200,528,400,4,85909091,5472 nbuffers=2 m7disable=1
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#
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# Here's an example that might work with an Atom (CPLDv1) (wider border)
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#sampling06=0,5,5,5,5,5,5,0 geometry06=0,31,69,212,552,424,4,85909091,5472,524 nbuffers=2 m7disable=1
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#sampling06=0,5,5,5,5,5,5,0 geometry06=0,31,69,212,552,424,4,85909091,5472 nbuffers=2 m7disable=1
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#
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# Here's an example that might work with an Atom (CPLDv2) (even wider border)
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#sampling06=0,5,5,5,5,5,5,0 geometry06=24,16,76,240,608,480,4,85909091,5472,524 nbuffers=2 m7disable=1
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#sampling06=0,5,5,5,5,5,5,0 geometry06=24,16,76,240,608,480,4,85909091,5472 nbuffers=2 m7disable=1
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#
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# Here's an example that might work with an Atom (Atom CPLD)
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#sampling06=0 geometry06=19,11,76,240,608,480,8,57272720,3648,524 palette=10 nbuffers=2 m7disable=1 keymap=1233232
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#sampling06=0 geometry06=19,11,76,240,608,480,8,57272720,3648 palette=10 nbuffers=2 m7disable=1 keymap=1233232
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#
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# Here's an example that might work with a ZX80/ZX81
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#sampling06=0,4,4,4,4,4,4,0 geometry06=9,18,84,270,672,540,4,78000000,4968,620 nbuffers=2 m7disable=1 keymap=1323232 return=0
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#sampling06=0,4,4,4,4,4,4,0 geometry06=9,18,84,270,672,540,4,78000000,4968 nbuffers=2 m7disable=1 keymap=1323232 return=0
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