Update simple mode menus

pull/158/head
IanSB 2020-10-03 07:54:41 +01:00
rodzic 851d7c65b1
commit 19c70aefa7
2 zmienionych plików z 16 dodań i 14 usunięć

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@ -8,6 +8,7 @@
typedef struct {
int cpld_setup_mode;
int all_offsets;
int sp_offset[NUM_OFFSETS];
int half_px_delay; // 0 = off, 1 = on, all modes
int divider; // cpld divider, 6 or 8
@ -96,7 +97,7 @@ enum {
static const char *cpld_setup_names[] = {
"Normal",
"Set Delay"
"Set Pixel H Offset"
};
static const char *edge_names[] = {
@ -125,16 +126,16 @@ enum {
static param_t params[] = {
{ CPLD_SETUP_MODE, "Setup Mode", "setup_mode", 0,NUM_CPLD_SETUP-1, 1 },
{ ALL_OFFSETS, "All Offsets", "all_offsets", 0, 7, 1 },
{ A_OFFSET, "A Offset", "a_offset", 0, 7, 1 },
{ B_OFFSET, "B Offset", "b_offset", 0, 7, 1 },
{ C_OFFSET, "C Offset", "c_offset", 0, 7, 1 },
{ D_OFFSET, "D Offset", "d_offset", 0, 7, 1 },
{ E_OFFSET, "E Offset", "e_offset", 0, 7, 1 },
{ F_OFFSET, "F Offset", "f_offset", 0, 7, 1 },
{ HALF, "Half", "half", 0, 1, 1 },
{ DIVIDER, "Divider", "divider", 6, 8, 2 },
{ DELAY, "Delay", "delay", 0, 15, 1 },
{ ALL_OFFSETS, "Sample Phase", "all_offsets", 0, 0, 1 },
{ A_OFFSET, "A Phase", "a_offset", 0, 0, 1 },
{ B_OFFSET, "B Phase", "b_offset", 0, 0, 1 },
{ C_OFFSET, "C Phase", "c_offset", 0, 0, 1 },
{ D_OFFSET, "D Phase", "d_offset", 0, 0, 1 },
{ E_OFFSET, "E Phase", "e_offset", 0, 0, 1 },
{ F_OFFSET, "F Phase", "f_offset", 0, 0, 1 },
{ HALF, "Half Pixel Shift", "half", 0, 1, 1 },
{ DIVIDER, "Clock Multiplier", "divider", 0, 3, 1 },
{ DELAY, "Pixel H Offset", "delay", 0, 15, 1 },
//block of hidden YUV options for file compatibility
{ FILTER_L, "Filter Y", "l_filter", 0, 1, 1 },
{ SUB_C, "Subsample UV", "sub_c", 0, 1, 1 },
@ -252,7 +253,7 @@ static int cpld_get_value(int num) {
case CPLD_SETUP_MODE:
return config->cpld_setup_mode;
case ALL_OFFSETS:
return config->sp_offset[0];
return config->all_offsets;
case A_OFFSET:
return config->sp_offset[0];
case B_OFFSET:
@ -334,6 +335,7 @@ static void cpld_set_value(int num, int value) {
set_setup_mode(value);
break;
case ALL_OFFSETS:
config->all_offsets = value;
config->sp_offset[0] = value;
config->sp_offset[1] = value;
config->sp_offset[2] = value;

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@ -1481,8 +1481,8 @@ static void cpld_init() {
// have to set mux to 0 to allow analog detection to work
// so clock out 32 bits of 0 into register chain as later CPLDs have mux as a register bit
int sp = 0b00011000000000000000000000; //sets the rate bits to 12bit capture for testing simple mode with amiga
for (int i = 0; i < 26; i++) {
int sp = 0b0000001100000000000011000000; //sets the rate bits to 12bit capture for testing simple mode with amiga
for (int i = 0; i < 27; i++) {
RPI_SetGpioValue(SP_DATA_PIN, sp & 1);
delay_in_arm_cycles_cpu_adjust(250);
RPI_SetGpioValue(SP_CLKEN_PIN, 1);