2019-03-15 05:43:34 +00:00
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#include "rpi-base.h"
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#include "defs.h"
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#include "macros.S"
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.text
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.global capture_line_fast_4bpp
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.global capture_line_fast_8bpp
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// The capture line function is provided the following:
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// r0 = pointer to current line in frame buffer
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2019-03-20 16:12:11 +00:00
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// r1 = number of complete psync cycles to capture (=param_chars_per_line)
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2019-03-15 05:43:34 +00:00
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// r2 = frame buffer line pitch in bytes (=param_fb_pitch)
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// r3 = flags register
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// r4 = GPLEV0 constant
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2019-03-20 16:12:11 +00:00
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// r5 = line number count down to 0 (initial value =param_nlines)
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2019-03-15 05:43:34 +00:00
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// r6 = scan line count modulo 10
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2019-03-20 16:12:11 +00:00
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// r7 = number of psyncs to skip
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// r8 = frame buffer height (=param_fb_height)
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2019-03-15 05:43:34 +00:00
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//
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// All registers are available as scratch registers (i.e. nothing needs to be preserved)
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b preload_capture_line_fast
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capture_line_fast_4bpp:
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push {lr}
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tst r3, #BIT_VSYNC_MARKER
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ldrne r11, =0x11111111
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moveq r11, #0
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tst r3, #BIT_DEBUG
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eorne r11, r11, #0x50 //magenta in leftmost
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eorne r11, r11, #0x02000000 //green in rightmost
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mov r1, r1, lsr #1
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2019-03-20 01:35:02 +00:00
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SKIP_PSYNC_NO_H_SCROLL
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2019-03-20 14:48:16 +00:00
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push {r14}
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2019-03-15 05:43:34 +00:00
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loop:
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2019-03-15 15:06:53 +00:00
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WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
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2019-03-15 05:43:34 +00:00
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CAPTURE_LOW_BITS // input in r8, result in r10, corrupts r9
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2019-03-15 15:06:53 +00:00
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WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
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2019-03-15 05:43:34 +00:00
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CAPTURE_HIGH_BITS // input in r8, result in r10, corrupts r9
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eor r7, r10, r11
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2019-03-15 15:06:53 +00:00
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WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
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2019-03-15 05:43:34 +00:00
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CAPTURE_LOW_BITS // input in r8, result in r10, corrupts r9
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2019-03-15 15:06:53 +00:00
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WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
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2019-03-15 05:43:34 +00:00
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CAPTURE_HIGH_BITS // input in r8, result in r10, corrupts r9
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eor r10, r10, r11
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stmia r0!, {r7, r10}
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subs r1, r1, #1
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bne loop
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2019-03-20 14:48:16 +00:00
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pop {r0, pc}
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2019-03-15 05:43:34 +00:00
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preload_capture_line_fast:
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SETUP_DUMMY_PARAMETERS
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b capture_line_fast_4bpp
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.ltorg
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// *** 8 bit ***
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b preload_capture_line_fast_8bpp
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capture_line_fast_8bpp:
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push {lr}
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tst r3, #BIT_VSYNC_MARKER
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ldrne r11, =0x01010101
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moveq r11, #0
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movne r12, r11
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moveq r12, #0
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tst r3, #BIT_DEBUG
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eorne r11, r11, #0x05 //magenta in leftmost
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eorne r12, r12, #0x02000000 //green in rightmost
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mov r1, r1, lsr #1
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2019-03-20 01:35:02 +00:00
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SKIP_PSYNC_NO_H_SCROLL
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2019-03-20 14:48:16 +00:00
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push {r14}
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2019-03-15 05:43:34 +00:00
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loop_8bpp:
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2019-03-15 15:06:53 +00:00
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WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
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2019-03-15 05:43:34 +00:00
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CAPTURE_BITS_8BPP // input in r8, result in r10, corrupts r9
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eor r5, r10, r11 // save first word
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2019-03-15 15:06:53 +00:00
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WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
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2019-03-15 05:43:34 +00:00
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CAPTURE_BITS_8BPP // input in r8, result in r9/r10
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eor r6, r10, r12
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2019-03-15 15:06:53 +00:00
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WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
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2019-03-15 05:43:34 +00:00
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CAPTURE_BITS_8BPP // input in r8, result in r10, corrupts r9
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eor r7, r10, r11 // save first word
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2019-03-15 15:06:53 +00:00
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WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
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2019-03-15 05:43:34 +00:00
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CAPTURE_BITS_8BPP // input in r8, result in r9/r10
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eor r10, r10, r12
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stmia r0!, {r5, r6, r7, r10}
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subs r1, r1, #1
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bne loop_8bpp
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2019-03-20 14:48:16 +00:00
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pop {r0, pc}
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2019-03-15 05:43:34 +00:00
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preload_capture_line_fast_8bpp:
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SETUP_DUMMY_PARAMETERS
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b capture_line_fast_8bpp
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