kopia lustrzana https://github.com/hoglet67/RGBtoHDMI
116 wiersze
3.4 KiB
C
116 wiersze
3.4 KiB
C
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/*
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** cpu.h PDP-11 cpu-description header-file
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** (c) in 2020 by Frank Wille
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*/
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#define BIGENDIAN 0
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#define LITTLEENDIAN 1
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#define VASM_CPU_PDP11 1
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/* maximum number of operands for one mnemonic */
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#define MAX_OPERANDS 2
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/* maximum number of mnemonic-qualifiers per mnemonic */
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#define MAX_QUALIFIERS 0
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/* data type to represent a target-address */
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typedef int32_t taddr;
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typedef uint32_t utaddr;
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/* minimum instruction alignment */
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#define INST_ALIGN 2
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/* default alignment for n-bit data */
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#define DATA_ALIGN(n) ((n)<=8?1:2)
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/* operand class for n-bit data definitions */
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#define DATA_OPERAND(n) EXP
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/* returns true when instruction is valid for selected cpu */
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#define MNEMONIC_VALID(i) cpu_available(i)
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/* parse cpu-specific directives with label */
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/*#define PARSE_CPU_LABEL(l,s) parse_cpu_label(l,s)*/
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/* operand types */
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enum {
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_NO_OP=0, /* no operand */
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ANY, /* any addressing mode */
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REG, /* register R0-R7 */
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EXP /* numeric expression */
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};
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/* type to store each operand */
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typedef struct {
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uint8_t mode;
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int8_t reg;
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expr *value;
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} operand;
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/* real addressing modes */
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#define MMASK 7 /* mask for real addressing modes */
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#define MREG 0 /* Rn : register direct */
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#define MREGD 1 /* (Rn) or @Rn : register deferred */
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#define MAINC 2 /* (Rn)+ : autoincrement */
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#define MAINCD 3 /* @(Rn)+ : autoincrement deferred */
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#define MADEC 4 /* -(Rn) : autodecrement */
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#define MADECD 5 /* @-(Rn) : autodecrement deferred */
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#define MIDX 6 /* d(Rn) : indexed */
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#define MIDXD 7 /* @d(Rn) : indexed deferred */
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/* pseudo addressing modes */
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#define MPC 8 /* PC-based pseudo addressing modes, reg=7 */
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#define MIMM (MPC+2) /* #x : immediate */
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#define MABS (MPC+3) /* @#a : absolute address */
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#define MREL (MPC+6) /* a : pc-relative address */
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#define MRELD (MPC+7) /* @a : pc-relative address deferred */
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#define MEXP 0x10 /* x : a numeric expression */
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#define MBCCJMP 0x11 /* a : pc-relative address for B!cc .+6, JMP a */
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/* evaluated expressions */
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struct MyOpVal {
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taddr value;
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symbol *base;
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int btype;
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};
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/* additional mnemonic data */
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typedef struct {
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uint16_t opcode;
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uint8_t format;
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uint8_t flags;
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} mnemonic_extension;
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/* instruction format */
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enum {
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NO, /* oooooooooooooooo: no operand */
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DO, /* oooommmrrrmmmrrr: double operand */
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RO, /* ooooooorrrmmmrrr: register and operand */
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SO, /* oooooooooommmrrr: single operand */
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RG, /* ooooooooooooorrr: register only */
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BR, /* oooooooobbbbbbbb: branches */
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RB, /* ooooooorrrbbbbbb: register and branch */
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TP /* oooooooocccccccc: traps */
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};
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/* flags: cpu availability */
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#define STD 1 /* standard PDP-11 instruction set */
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#define EIS 2 /* extended instruction set */
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#define FIS 4 /* floating instruction set */
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#define FPP 8 /* floating point processor */
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#define CIS 16 /* commercial instruction set */
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#define PSW 32 /* processor status word instructions */
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#define MSP 64 /* memory space instructions */
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/* register symbols */
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#define HAVE_REGSYMS
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#define REGSYMHTSIZE 64
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#define RTYPE_R 0 /* Register R0..R7 */
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/* exported by cpu.c */
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int cpu_available(int);
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/*int parse_cpu_label(char *,char **);*/
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