kopia lustrzana https://github.com/roncarr880/QRP_LABS_WSPR
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@ -61,7 +61,7 @@
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#define CAT_MODE 0 // computer control of TX
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#define FRAME_MODE 1 // self timed frame (stand alone mode)
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#define MUTE A1 // receiver module T/R switch pin
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#define START_CLOCK_FREQ 27004466L // ( 4498, 4466 )
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#define START_CLOCK_FREQ 27004450L // ( 4498, 4466 )
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//#define START_CLOCK_FREQ 2700466600 // test too high
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//#define START_CLOCK_FREQ 2700426600 // test too low
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@ -169,7 +169,7 @@ int frame_msec;
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// but disturbs the trending bit display
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// very long term time correction
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int FF = 3; // fixed part of fudge factor for frequency counter result ( counting 3 mhz signal )
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int FF = 0; // fixed part of fudge factor for frequency counter result ( counting 3 mhz signal )
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int ff = 0; // fractional part of the fudge factor ( floats not useful as limited in significant figures )
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uint8_t dbug_print_state; // print messages at 1200 baud without blocking
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@ -514,7 +514,7 @@ uint8_t i;
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else{ // way off, reset to the correct time
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frame_sec = 60;
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frame_msec = 0;
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FF = 3, ff = 0; // reset timing fudge factor
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FF = 0, ff = 0; // reset timing fudge factor
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clr_trends = 1; // the trend buckets will be incorrect now
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}
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}
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@ -633,7 +633,7 @@ uint32_t local_drift; // corrects for drift due to day/night temperature c
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if( wspr_tx_enable ) return; // ignore this when transmitting
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local_drift = map( cal_result, 2999900, 3000000, 20, 0 );
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local_drift = map( cal_result, 2999900, 3000000, 30, 0 ); // 20
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if( local_drift != drift ){
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drift = local_drift;
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@ -1076,8 +1076,8 @@ void si_pll_x(unsigned char pll, uint32_t freq, uint32_t out_divider, uint32_t
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cl_freq = clock_freq;
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if( pll == PLLA ) cl_freq += drift; // drift not applied to 3 mhz calibrate freq
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//cl_freq += drift; // drift applied to 3 mhz. Pick one of these.
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//if( pll == PLLA ) cl_freq += drift; // drift not applied to 3 mhz calibrate freq
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cl_freq += drift; // drift applied to 3 mhz. Pick one of these.
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if( pll == PLLB ) c = 1000000; // max 1048575, cal freq pll
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else{
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