kopia lustrzana https://github.com/Wren6991/PicoDVI
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a248d72b8c
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jo | a248d72b8c | |
bruelltuete | fa16ae779f |
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@ -1,6 +1,10 @@
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#ifndef _DVI_H
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#define _DVI_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define N_TMDS_LANES 3
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#define TMDS_SYNC_LANE 0 // blue!
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@ -69,4 +73,8 @@ void dvi_scanbuf_main_16bpp(struct dvi_inst *inst);
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void dvi_framebuf_main_8bpp(struct dvi_inst *inst);
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void dvi_framebuf_main_16bpp(struct dvi_inst *inst);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -63,6 +63,8 @@ void dvi_serialiser_enable(struct dvi_serialiser_cfg *cfg, bool enable) {
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for (int i = 0; i < N_TMDS_LANES; ++i)
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mask |= 1u << (cfg->sm_tmds[i] + PIO_CTRL_SM_ENABLE_LSB);
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if (enable) {
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// The DVI spec allows for phase offset between clock and data links.
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// So PWM and PIO do not need to be synchronised perfectly.
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hw_set_bits(&cfg->pio->ctrl, mask);
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pwm_set_enabled(pwm_gpio_to_slice_num(cfg->pins_clk), true);
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}
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@ -217,7 +217,7 @@ static uint32_t __attribute__((aligned(8))) __dvi_const(empty_scanline_tmds)[6]
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void dvi_timing_state_init(struct dvi_timing_state *t) {
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t->v_ctr = 0;
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t->v_state = DVI_STATE_FRONT_PORCH;
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};
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}
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void __dvi_func(dvi_timing_state_advance)(const struct dvi_timing *t, struct dvi_timing_state *s) {
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s->v_ctr++;
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@ -252,7 +252,7 @@ static void _set_data_cb(dma_cb_t *cb, const struct dvi_lane_dma_cfg *dma_cfg,
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channel_config_set_chain_to(&cb->c, dma_cfg->chan_ctrl);
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// Note we never send a null trigger, so IRQ_QUIET is an IRQ suppression flag
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channel_config_set_irq_quiet(&cb->c, !irq_on_finish);
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};
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}
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void dvi_setup_scanline_for_vblank(const struct dvi_timing *t, const struct dvi_lane_dma_cfg dma_cfg[],
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bool vsync_asserted, struct dvi_scanline_dma_list *l) {
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