kopia lustrzana https://github.com/OpenRTX/OpenRTX
218 wiersze
7.0 KiB
C
218 wiersze
7.0 KiB
C
/***************************************************************************
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* Copyright (C) 2020 - 2025 by Federico Amedeo Izzo IU2NUO, *
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* Niccolò Izzo IU2KIN *
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* Frederik Saraci IU2NRO *
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* Silvano Seva IU2KWO *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 3 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, see <http://www.gnu.org/licenses/> *
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***************************************************************************/
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#include <interfaces/nvmem.h>
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#include <interfaces/delays.h>
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#include <calibInfo_MDx.h>
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#include <nvmem_access.h>
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#include <spi_stm32.h>
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#include <string.h>
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#include <wchar.h>
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#include <utils.h>
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#include "W25Qx.h"
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#define SECREG_READ(dev, offs, data, len) \
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nvm_devRead((const struct nvmDevice *) dev, offs, data, len)
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static const struct W25QxCfg eflashCfg =
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{
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#ifdef PLATFORM_MD9600
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.spi = &spi2,
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#else
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.spi = &nvm_spi,
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#endif
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.cs = { FLASH_CS }
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};
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W25Qx_DEVICE_DEFINE(eflash, eflashCfg, 0x1000000) // 16 MB, 128 Mbit
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W25Qx_SECREG_DEFINE(cal1, eflashCfg, 0x1000, 0x100) // 256 byte
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W25Qx_SECREG_DEFINE(cal2, eflashCfg, 0x2000, 0x100) // 256 byte
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W25Qx_SECREG_DEFINE(hwInfo, eflashCfg, 0x3000, 0x100) // 256 byte
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static const struct nvmDescriptor nvmDevices[] =
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{
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{
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.name = "External flash",
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.dev = &eflash,
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.partNum = 0,
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.partitions = NULL
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},
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{
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.name = "Cal. data 1",
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.dev = (const struct nvmDevice *) &cal1,
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.partNum = 0,
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.partitions = NULL
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},
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{
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.name = "Cal. data 2",
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.dev = (const struct nvmDevice *) &cal2,
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.partNum = 0,
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.partitions = NULL
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}
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};
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void nvm_init()
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{
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#ifndef PLATFORM_MD9600
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gpio_setMode(FLASH_CLK, ALTERNATE | ALTERNATE_FUNC(5));
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gpio_setMode(FLASH_SDO, ALTERNATE | ALTERNATE_FUNC(5));
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gpio_setMode(FLASH_SDI, ALTERNATE | ALTERNATE_FUNC(5));
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spiStm32_init(&nvm_spi, 21000000, 0);
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#endif
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W25Qx_init(&eflash);
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}
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void nvm_terminate()
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{
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W25Qx_terminate(&eflash);
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}
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const struct nvmDescriptor *nvm_getDesc(const size_t index)
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{
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if(index >= ARRAY_SIZE(nvmDevices))
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return NULL;
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return &nvmDevices[index];
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}
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void nvm_readCalibData(void *buf)
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{
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uint32_t freqs[18];
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// Common calibration data between single and dual-band radios
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struct CalData *calib = ((struct CalData *) buf);
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// Security register 1: base address 0x1000
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SECREG_READ(&cal1, 0x0009, &(calib->freqAdjustMid), 1);
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SECREG_READ(&cal1, 0x0010, calib->txHighPower, 9);
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SECREG_READ(&cal1, 0x0020, calib->txLowPower, 9);
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SECREG_READ(&cal1, 0x0030, calib->rxSensitivity, 9);
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// Security register 2: base address 0x2000
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SECREG_READ(&cal2, 0x0030, calib->sendIrange, 9);
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SECREG_READ(&cal2, 0x0040, calib->sendQrange, 9);
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SECREG_READ(&cal2, 0x0070, calib->analogSendIrange, 9);
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SECREG_READ(&cal2, 0x0080, calib->analogSendQrange, 9);
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SECREG_READ(&cal2, 0x00b0, ((uint8_t *) &freqs), 72);
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/*
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* Frequency stored in calibration data is divided by ten: so, after
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* bcdToBin conversion, we have something like 40'135'000. To ajdust
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* things, frequency has to be multiplied by ten.
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*/
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for(uint8_t i = 0; i < 9; i++)
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{
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calib->rxFreq[i] = ((freq_t) bcdToBin(freqs[2*i])) * 10;
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calib->txFreq[i] = ((freq_t) bcdToBin(freqs[2*i+1])) * 10;
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}
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// Calibration data for dual-band radios only
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#ifndef PLATFORM_MD3x0
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mduv3x0Calib_t *cal = (mduv3x0Calib_t *) buf;
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struct CalData *vhfCal = &(cal->vhfCal);
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// Security register 1: base address 0x1000
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SECREG_READ(&cal1, 0x000c, (&vhfCal->freqAdjustMid), 1);
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SECREG_READ(&cal1, 0x0019, vhfCal->txHighPower, 5);
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SECREG_READ(&cal1, 0x0029, vhfCal->txLowPower, 5);
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SECREG_READ(&cal1, 0x0039, vhfCal->rxSensitivity, 5);
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// Security register 2: base address 0x2000
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SECREG_READ(&cal2, 0x0039, vhfCal->sendIrange, 5);
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SECREG_READ(&cal2, 0x0049, vhfCal->sendQrange, 5);
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SECREG_READ(&cal2, 0x0079, vhfCal->analogSendIrange, 5);
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SECREG_READ(&cal2, 0x0089, vhfCal->analogSendQrange, 5);
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SECREG_READ(&cal2, 0x0000, ((uint8_t *) &freqs), 40);
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for(uint8_t i = 0; i < 5; i++)
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{
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vhfCal->rxFreq[i] = ((freq_t) bcdToBin(freqs[2*i]));
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vhfCal->txFreq[i] = ((freq_t) bcdToBin(freqs[2*i+1]));
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}
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#endif
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}
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void nvm_readHwInfo(hwInfo_t *info)
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{
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uint16_t freqMin = 0;
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uint16_t freqMax = 0;
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uint8_t lcdInfo = 0;
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// Security register 3: base address 0x3000
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SECREG_READ(&hwInfo, 0x0000, info->name, 8);
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SECREG_READ(&hwInfo, 0x0014, &freqMin, 2);
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SECREG_READ(&hwInfo, 0x0016, &freqMax, 2);
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SECREG_READ(&hwInfo, 0x001D, &lcdInfo, 1);
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// Ensure correct null-termination of device name by removing the 0xff.
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for(uint8_t i = 0; i < sizeof(info->name); i++)
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{
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if(info->name[i] == 0xFF)
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info->name[i] = '\0';
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}
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freqMin = ((uint16_t) bcdToBin(freqMin))/10;
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freqMax = ((uint16_t) bcdToBin(freqMax))/10;
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info->hw_version = lcdInfo & 0x03;
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#ifdef PLATFORM_MD3x0
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// Single band device, either VHF or UHF
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if(freqMin < 200)
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{
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info->vhf_maxFreq = freqMax;
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info->vhf_minFreq = freqMin;
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info->vhf_band = 1;
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}
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else
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{
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info->uhf_maxFreq = freqMax;
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info->uhf_minFreq = freqMin;
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info->uhf_band = 1;
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}
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#else
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// For dual band devices load the remaining data
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uint16_t vhf_freqMin = 0;
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uint16_t vhf_freqMax = 0;
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SECREG_READ(&hwInfo, 0x0018, &vhf_freqMin, 2);
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SECREG_READ(&hwInfo, 0x001a, &vhf_freqMax, 2);
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info->vhf_minFreq = ((uint16_t) bcdToBin(vhf_freqMin))/10;
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info->vhf_maxFreq = ((uint16_t) bcdToBin(vhf_freqMax))/10;
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info->uhf_minFreq = freqMin;
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info->uhf_maxFreq = freqMax;
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info->vhf_band = 1;
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info->uhf_band = 1;
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#endif
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}
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/**
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* TODO: functions temporarily implemented in "nvmem_settings_MDx.c"
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int nvm_readVFOChannelData(channel_t *channel)
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int nvm_readSettings(settings_t *settings)
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int nvm_writeSettings(const settings_t *settings)
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*/
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