diff --git a/platform/drivers/baseband/AT1846S.c b/platform/drivers/baseband/AT1846S.c index 2a267979..3b913f3d 100644 --- a/platform/drivers/baseband/AT1846S.c +++ b/platform/drivers/baseband/AT1846S.c @@ -47,58 +47,58 @@ static inline void _reloadConfig() void AT1846S_init() { - i2c_writeReg16(0x30, 0x0001); // Soft reset + i2c_writeReg16(0x30, 0x0001); /* Soft reset */ delayMs(50); - i2c_writeReg16(0x30, 0x0004); // Init settings - i2c_writeReg16(0x04, 0x0FD0); - i2c_writeReg16(0x1F, 0x1000); + i2c_writeReg16(0x30, 0x0004); /* Chip enable */ + i2c_writeReg16(0x04, 0x0FD0); /* 26MHz crystal frequency */ + i2c_writeReg16(0x1F, 0x1000); /* Gpio6 squelch output */ i2c_writeReg16(0x09, 0x03AC); i2c_writeReg16(0x24, 0x0001); i2c_writeReg16(0x31, 0x0031); - i2c_writeReg16(0x33, 0x45F5); - i2c_writeReg16(0x34, 0x2B89); - i2c_writeReg16(0x3F, 0x3263); - i2c_writeReg16(0x41, 0x470F); + i2c_writeReg16(0x33, 0x45F5); /* AGC number */ + i2c_writeReg16(0x34, 0x2B89); /* RX digital gain */ + i2c_writeReg16(0x3F, 0x3263); /* RSSI 3 threshold */ + i2c_writeReg16(0x41, 0x470F); /* Tx digital gain */ i2c_writeReg16(0x42, 0x1036); i2c_writeReg16(0x43, 0x00BB); - i2c_writeReg16(0x44, 0x06FF); - i2c_writeReg16(0x47, 0x7F2F); + i2c_writeReg16(0x44, 0x06FF); /* Tx digital gain */ + i2c_writeReg16(0x47, 0x7F2F); /* Soft mute */ i2c_writeReg16(0x4E, 0x0082); i2c_writeReg16(0x4F, 0x2C62); i2c_writeReg16(0x53, 0x0094); i2c_writeReg16(0x54, 0x2A3C); i2c_writeReg16(0x55, 0x0081); i2c_writeReg16(0x56, 0x0B02); - i2c_writeReg16(0x57, 0x1C00); - i2c_writeReg16(0x5A, 0x4935); + i2c_writeReg16(0x57, 0x1C00); /* Bypass RSSI low-pass */ + i2c_writeReg16(0x5A, 0x4935); /* SQ detection time */ i2c_writeReg16(0x58, 0xBCCD); - i2c_writeReg16(0x62, 0x3263); + i2c_writeReg16(0x62, 0x3263); /* Modulation detect tresh */ i2c_writeReg16(0x4E, 0x2082); i2c_writeReg16(0x63, 0x16AD); i2c_writeReg16(0x30, 0x40A4); delayMs(50); - i2c_writeReg16(0x30, 0x40A6); // cal start + i2c_writeReg16(0x30, 0x40A6); /* Start calibration */ delayMs(100); - i2c_writeReg16(0x30, 0x4006); // cal end + i2c_writeReg16(0x30, 0x4006); /* Stop calibration */ delayMs(100); i2c_writeReg16(0x58, 0xBCED); - i2c_writeReg16(0x0A, 0x7BA0); - i2c_writeReg16(0x41, 0x4731); - i2c_writeReg16(0x44, 0x05FF); - i2c_writeReg16(0x59, 0x09D2); - i2c_writeReg16(0x44, 0x05CF); - i2c_writeReg16(0x44, 0x05CC); - i2c_writeReg16(0x48, 0x1A32); - i2c_writeReg16(0x60, 0x1A32); - i2c_writeReg16(0x3F, 0x29D1); - i2c_writeReg16(0x0A, 0x7BA0); - i2c_writeReg16(0x49, 0x0C96); - i2c_writeReg16(0x33, 0x45F5); - i2c_writeReg16(0x41, 0x470F); + i2c_writeReg16(0x0A, 0x7BA0); /* PGA gain */ + i2c_writeReg16(0x41, 0x4731); /* Tx digital gain */ + i2c_writeReg16(0x44, 0x05FF); /* Tx digital gain */ + i2c_writeReg16(0x59, 0x09D2); /* Mixer gain */ + i2c_writeReg16(0x44, 0x05CF); /* Tx digital gain */ + i2c_writeReg16(0x44, 0x05CC); /* Tx digital gain */ + i2c_writeReg16(0x48, 0x1A32); /* Noise 1 threshold */ + i2c_writeReg16(0x60, 0x1A32); /* Noise 2 threshold */ + i2c_writeReg16(0x3F, 0x29D1); /* RSSI 3 threshold */ + i2c_writeReg16(0x0A, 0x7BA0); /* PGA gain */ + i2c_writeReg16(0x49, 0x0C96); /* RSSI SQL thresholds */ + i2c_writeReg16(0x33, 0x45F5); /* AGC number */ + i2c_writeReg16(0x41, 0x470F); /* Tx digital gain */ i2c_writeReg16(0x42, 0x1036); i2c_writeReg16(0x43, 0x00BB); } @@ -127,17 +127,17 @@ void AT1846S_setBandwidth(const AT1846S_bw_t band) if(band == AT1846S_BW_25) { /* 25kHz bandwidth */ - i2c_writeReg16(0x15, 0x1F00); - i2c_writeReg16(0x32, 0x7564); - i2c_writeReg16(0x3A, 0x44C3); - i2c_writeReg16(0x3F, 0x29D2); - i2c_writeReg16(0x3C, 0x0E1C); - i2c_writeReg16(0x48, 0x1E38); - i2c_writeReg16(0x62, 0x3767); + i2c_writeReg16(0x15, 0x1F00); /* Tuning bit */ + i2c_writeReg16(0x32, 0x7564); /* AGC target power */ + i2c_writeReg16(0x3A, 0x44C3); /* Modulation detect sel */ + i2c_writeReg16(0x3F, 0x29D2); /* RSSI 3 threshold */ + i2c_writeReg16(0x3C, 0x0E1C); /* Peak detect threshold */ + i2c_writeReg16(0x48, 0x1E38); /* Noise 1 threshold */ + i2c_writeReg16(0x62, 0x3767); /* Modulation detect tresh */ i2c_writeReg16(0x65, 0x248A); - i2c_writeReg16(0x66, 0xFF2E); - i2c_writeReg16(0x7F, 0x0001); - i2c_writeReg16(0x06, 0x0024); + i2c_writeReg16(0x66, 0xFF2E); /* RSSI comp and AFC range */ + i2c_writeReg16(0x7F, 0x0001); /* Switch to page 1 */ + i2c_writeReg16(0x06, 0x0024); /* AGC gain table */ i2c_writeReg16(0x07, 0x0214); i2c_writeReg16(0x08, 0x0224); i2c_writeReg16(0x09, 0x0314); @@ -147,23 +147,23 @@ void AT1846S_setBandwidth(const AT1846S_bw_t band) i2c_writeReg16(0x0E, 0x1B84); i2c_writeReg16(0x0F, 0x3F84); i2c_writeReg16(0x12, 0xE0EB); - i2c_writeReg16(0x7F, 0x0000); + i2c_writeReg16(0x7F, 0x0000); /* Back to page 0 */ _maskSetRegister(0x30, 0x3000, 0x3000); } else { /* 12.5kHz bandwidth */ - i2c_writeReg16(0x15, 0x1100); - i2c_writeReg16(0x32, 0x4495); - i2c_writeReg16(0x3A, 0x40C3); - i2c_writeReg16(0x3F, 0x28D0); - i2c_writeReg16(0x3C, 0x0F1E); - i2c_writeReg16(0x48, 0x1DB6); - i2c_writeReg16(0x62, 0x1425); + i2c_writeReg16(0x15, 0x1100); /* Tuning bit */ + i2c_writeReg16(0x32, 0x4495); /* AGC target power */ + i2c_writeReg16(0x3A, 0x40C3); /* Modulation detect sel */ + i2c_writeReg16(0x3F, 0x28D0); /* RSSI 3 threshold */ + i2c_writeReg16(0x3C, 0x0F1E); /* Peak detect threshold */ + i2c_writeReg16(0x48, 0x1DB6); /* Noise 1 threshold */ + i2c_writeReg16(0x62, 0x1425); /* Modulation detect tresh */ i2c_writeReg16(0x65, 0x2494); - i2c_writeReg16(0x66, 0xEB2E); - i2c_writeReg16(0x7F, 0x0001); - i2c_writeReg16(0x06, 0x0014); + i2c_writeReg16(0x66, 0xEB2E); /* RSSI comp and AFC range */ + i2c_writeReg16(0x7F, 0x0001); /* Switch to page 1 */ + i2c_writeReg16(0x06, 0x0014); /* AGC gain table */ i2c_writeReg16(0x07, 0x020C); i2c_writeReg16(0x08, 0x0214); i2c_writeReg16(0x09, 0x030C); @@ -173,7 +173,7 @@ void AT1846S_setBandwidth(const AT1846S_bw_t band) i2c_writeReg16(0x0D, 0x1344); i2c_writeReg16(0x0E, 0x1B44); i2c_writeReg16(0x0F, 0x3F44); - i2c_writeReg16(0x12, 0xE0EB); + i2c_writeReg16(0x12, 0xE0EB); /* Back to page 0 */ i2c_writeReg16(0x7F, 0x0000); _maskSetRegister(0x30, 0x3000, 0x0000); }