From 822fb84146011eebb847b9eb66ff56427085a0ee Mon Sep 17 00:00:00 2001 From: Jacob McSwain Date: Fri, 15 Jul 2022 03:03:41 -0500 Subject: [PATCH] nvmem: md3x0: Explicitly read in calibration data This should fix the frequency offset issues --- platform/drivers/NVM/nvmem_MD3x0.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/platform/drivers/NVM/nvmem_MD3x0.c b/platform/drivers/NVM/nvmem_MD3x0.c index 604b40fd..d074bba5 100644 --- a/platform/drivers/NVM/nvmem_MD3x0.c +++ b/platform/drivers/NVM/nvmem_MD3x0.c @@ -43,7 +43,17 @@ void nvm_readCalibData(void *buf) md3x0Calib_t *calib = ((md3x0Calib_t *) buf); - (void) W25Qx_readSecurityRegister(0x1000, &(calib->vox1), 11); + (void) W25Qx_readSecurityRegister(0x1000, &(calib->vox1), 1); + (void) W25Qx_readSecurityRegister(0x1001, &(calib->vox10), 1); + (void) W25Qx_readSecurityRegister(0x1002, &(calib->rxLowVoltage), 1); + (void) W25Qx_readSecurityRegister(0x1003, &(calib->rxFullVoltage), 1); + (void) W25Qx_readSecurityRegister(0x1004, &(calib->rssi1), 1); + (void) W25Qx_readSecurityRegister(0x1005, &(calib->rssi4), 1); + (void) W25Qx_readSecurityRegister(0x1006, &(calib->analogMic), 1); + (void) W25Qx_readSecurityRegister(0x1007, &(calib->digitalMic), 1); + (void) W25Qx_readSecurityRegister(0x1008, &(calib->freqAdjustHigh), 1); + (void) W25Qx_readSecurityRegister(0x1009, &(calib->freqAdjustMid), 1); + (void) W25Qx_readSecurityRegister(0x100A, &(calib->freqAdjustLow), 1); (void) W25Qx_readSecurityRegister(0x1010, calib->txHighPower, 9); (void) W25Qx_readSecurityRegister(0x1020, calib->txLowPower, 9); (void) W25Qx_readSecurityRegister(0x1030, calib->rxSensitivity, 9);