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Added compilation of MD3x0 rtx source files to MD390 target

replace/4734878ff8a0ae8a4d6ecf9091ee11d0cd4c738d
Silvano Seva 2020-12-06 19:49:10 +01:00
rodzic 409bd0f9d0
commit 2f05bbc6ff
3 zmienionych plików z 42 dodań i 4 usunięć
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7
meson.build
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@ -171,9 +171,9 @@ endif
## TYT MD380
md380_src = src + stm32f405_src + ['platform/drivers/display/HX83XX_MDx.c',
'platform/drivers/keyboard/keyboard_MDx.c',
'platform/drivers/ADC/ADC1_MDx.c',
'platform/drivers/NVM/extFlash_MDx.c',
'platform/drivers/NVM/nvmem_MD3x0.c',
'platform/drivers/ADC/ADC1_MDx.c',
'platform/drivers/tones/toneGenerator_MDx.c',
'platform/drivers/baseband/pll_MD3x0.c',
'platform/drivers/baseband/rtx_MD3x0.c',
@ -188,10 +188,13 @@ md380_def = def + stm32f405_def + {'PLATFORM_MD380': ''}
## TYT MD390
md390_src = src + stm32f405_src + ['platform/drivers/display/HX83XX_MDx.c',
'platform/drivers/keyboard/keyboard_MDx.c',
'platform/drivers/ADC/ADC1_MDx.c',
'platform/drivers/NVM/extFlash_MDx.c',
'platform/drivers/NVM/nvmem_MD3x0.c',
'platform/drivers/ADC/ADC1_MDx.c',
'platform/drivers/tones/toneGenerator_MDx.c',
'platform/drivers/baseband/pll_MD3x0.c',
'platform/drivers/baseband/rtx_MD3x0.c',
'platform/drivers/baseband/HR-C5000_MD3x0.c',
'platform/targets/MD-390/platform.c',
'openrtx/src/graphics/graphics_rgb565.c']

3
platform/targets/MD-380/hwconfig.h
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@ -29,6 +29,9 @@
/* Screen needs x-axis mirroring */
#define DISPLAY_MIRROR_X
/* Maximum battery voltage */
#define MAX_VBAT 8.4f
/* Display */
#define LCD_D0 GPIOD,14
#define LCD_D1 GPIOD,15

36
platform/targets/MD-390/hwconfig.h
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@ -26,6 +26,9 @@
#define SCREEN_WIDTH 160
#define SCREEN_HEIGHT 128
/* Maximum battery voltage */
#define MAX_VBAT 8.4f
/* Display */
#define LCD_D0 GPIOD,14
#define LCD_D1 GPIOD,15
@ -84,7 +87,36 @@
#define FLASH_SDO GPIOB,4
#define FLASH_SDI GPIOB,5
/* Maximum battery voltage */
#define MAX_VBAT 8.4f
/* PLL */
#define PLL_CS GPIOD,11
#define PLL_CLK GPIOE,4
#define PLL_DAT GPIOE,5 /* WARNING: this line is also HR_C5000 MOSI */
#define PLL_LD GPIOD,10
/* HR_C5000 */
#define DMR_CS GPIOE,2
#define DMR_CLK GPIOC,13
#define DMR_MOSI PLL_DAT
#define DMR_MISO GPIOE,3
#define DMR_SLEEP GPIOE,6
#define V_CS GPIOB,12
/* RTX control */
#define PLL_PWR GPIOA,8
#define VCOVCC_SW GPIOA,9
#define DMR_SW GPIOA,10
#define FM_SW GPIOB,2
#define WN_SW GPIOA,13
#define RF_APC_SW GPIOC,4
#define TX_STG_EN GPIOC,5
#define RX_STG_EN GPIOC,9
#define APC_TV GPIOA,4
#define MOD2_BIAS GPIOA,5
/* Audio control */
#define AMP_EN GPIOB,9
#define SPK_MUTE GPIOB,8
#define FM_MUTE GPIOE,13
#define MIC_PWR GPIOA,14
#endif