kopia lustrzana https://github.com/Jean-MarcHarvengt/MCUME
357 wiersze
8.5 KiB
C
357 wiersze
8.5 KiB
C
/*****************************************************************************
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h6280.c - Portable HuC6280 emulator
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Copyright (c) 1999, 2000 Bryan McPhail, mish@tendril.co.uk
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This source code is based (with permission!) on the 6502 emulator by
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Juergen Buchmueller. It is released as part of the Mame emulator project.
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Let me know if you intend to use this code in any other project.
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NOTICE:
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This code is around 99% complete! Several things are unimplemented,
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some due to lack of time, some due to lack of documentation, mainly
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due to lack of programs using these features.
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csh, csl opcodes are not supported.
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set opcode and T flag behaviour are not supported.
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I am unsure if instructions like SBC take an extra cycle when used in
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decimal mode. I am unsure if flag B is set upon execution of rti.
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Cycle counts should be quite accurate, illegal instructions are assumed
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to take two cycles.
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Changelog, version 1.02:
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JMP + indirect X (0x7c) opcode fixed.
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SMB + RMB opcodes fixed in disassembler.
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change_pc function calls removed.
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TSB & TRB now set flags properly.
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BIT opcode altered.
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Changelog, version 1.03:
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Swapped IRQ mask for IRQ1 & IRQ2 (thanks Yasuhiro)
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Changelog, version 1.04, 28/9/99-22/10/99:
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Adjusted RTI (thanks Karl)
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TST opcodes fixed in disassembler (missing break statements in a case!).
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TST behaviour fixed.
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SMB/RMB/BBS/BBR fixed in disassembler.
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Changelog, version 1.05, 8/12/99-16/12/99:
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Added CAB's timer implementation (note: irq ack & timer reload are changed).
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Fixed STA IDX.
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Fixed B flag setting on BRK.
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Assumed CSH & CSL to take 2 cycles each.
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Todo: Performance could be improved by precalculating timer fire position.
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Changelog, version 1.06, 4/5/00 - last opcode bug found?
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JMP indirect was doing a EAL++; instead of EAD++; - Obviously causing
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a corrupt read when L = 0xff! This fixes Bloody Wolf and Trio The Punch!
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Changelog, version 1.07, 3/9/00:
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Changed timer to be single shot - fixes Crude Buster music in level 1.
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Changelog, version 1.08, 1/18/01: (Charles MacDonald)
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Added h6280_speed to reflect current CPU speed set by CSL/CSH.
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Added implementation of SET opcode.
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Changed INLINE in tblh6280.h to 'static __inline__' (Allegro conflict)
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Added FAST_MEM routines for quicker ROM/RAM access.
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******************************************************************************/
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#include "shared.h"
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#include "cpuintrf.h"
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#include "h6280.h"
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/* Default state of HuC6280 clock (1=7.16MHz, 0=3.58MHz) */
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int h6280_speed = 1;
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int h6280_ICount = 0;
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static h6280_Regs h6280;
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#include "h6280ops.h"
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#include "tblh6280.h"
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/*****************************************************************************/
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void h6280_reset(void)
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{
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int i;
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/* wipe out the h6280 structure */
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memset(&h6280, 0, sizeof(h6280_Regs));
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/* set I and Z flags */
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P = _fI | _fZ;
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/* stack starts at 0x01ff */
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h6280.sp.d = 0x1ff;
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/* read the reset vector into PC */
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PCL = RDMEM(H6280_RESET_VEC);
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PCH = RDMEM((H6280_RESET_VEC+1));
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/* timer off by default */
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h6280.timer_status=0;
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h6280.timer_ack=1;
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/* clear pending interrupts */
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for (i = 0; i < 3; i++)
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h6280.irq_state[i] = CLEAR_LINE;
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h6280_speed = 1; /* default = 7.16MHz (?) */
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}
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void h6280_exit(void)
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{
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/* nothing */
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}
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int h6280_execute(int cycles)
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{
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int in,lastcycle,deltacycle;
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h6280_ICount = cycles;
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/* Subtract cycles used for taking an interrupt */
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h6280_ICount -= h6280.extra_cycles;
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h6280.extra_cycles = 0;
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lastcycle = h6280_ICount;
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// DEBUGLOG("h6280_execute 1\n");
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/* Execute instructions */
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do
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{
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h6280.ppc = h6280.pc;
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// DEBUGLOG("h6280_execute 2 PC[%08X]\n",PCW );
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/* Execute 1 instruction */
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in=RDOP();
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PCW++;
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// DEBUGLOG("h6280_execute 2.5 in=[%d]\n",in);
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insnh6280[in]();
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// DEBUGLOG("h6280_execute 3\n");
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/* Check internal timer */
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if(h6280.timer_status)
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{
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deltacycle = lastcycle - h6280_ICount;
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h6280.timer_value -= deltacycle;
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if(h6280.timer_value<=0 && h6280.timer_ack==1)
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{
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h6280.timer_ack=h6280.timer_status=0;
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h6280_set_irq_line(2,ASSERT_LINE);
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}
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}
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lastcycle = h6280_ICount;
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// DEBUGLOG("h6280_execute 4\n");
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/* If PC has not changed we are stuck in a tight loop, may as well finish */
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if( h6280.pc.d == h6280.ppc.d )
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{
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if (h6280_ICount > 0) h6280_ICount=0;
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h6280.extra_cycles = 0;
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return cycles;
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}
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// DEBUGLOG("h6280_execute 5\n");
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} while (h6280_ICount > 0);
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/* Subtract cycles used for taking an interrupt */
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h6280_ICount -= h6280.extra_cycles;
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h6280.extra_cycles = 0;
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return cycles - h6280_ICount;
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}
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unsigned h6280_get_context (void *dst)
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{
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if( dst )
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*(h6280_Regs*)dst = h6280;
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return sizeof(h6280_Regs);
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}
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void h6280_set_context (void *src)
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{
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if( src )
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h6280 = *(h6280_Regs*)src;
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}
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unsigned h6280_get_pc (void)
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{
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return PCD;
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}
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void h6280_set_pc (unsigned val)
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{
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PCW = val;
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}
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unsigned h6280_get_sp (void)
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{
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return S;
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}
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void h6280_set_sp (unsigned val)
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{
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S = val;
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}
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unsigned h6280_get_reg (int regnum)
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{
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switch( regnum )
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{
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case H6280_PC: return PCD;
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case H6280_S: return S;
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case H6280_P: return P;
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case H6280_A: return A;
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case H6280_X: return X;
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case H6280_Y: return Y;
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case H6280_IRQ_MASK: return h6280.irq_mask;
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case H6280_TIMER_STATE: return h6280.timer_status;
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case H6280_NMI_STATE: return h6280.nmi_state;
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case H6280_IRQ1_STATE: return h6280.irq_state[0];
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case H6280_IRQ2_STATE: return h6280.irq_state[1];
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case H6280_IRQT_STATE: return h6280.irq_state[2];
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case REG_PREVIOUSPC: return h6280.ppc.d;
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default:
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if( regnum <= REG_SP_CONTENTS )
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{
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unsigned offset = S + 2 * (REG_SP_CONTENTS - regnum);
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if( offset < 0x1ff )
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return RDMEM( offset ) | ( RDMEM( offset+1 ) << 8 );
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}
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}
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return 0;
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}
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void h6280_set_reg (int regnum, unsigned val)
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{
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switch( regnum )
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{
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case H6280_PC: PCW = val; break;
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case H6280_S: S = val; break;
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case H6280_P: P = val; break;
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case H6280_A: A = val; break;
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case H6280_X: X = val; break;
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case H6280_Y: Y = val; break;
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case H6280_IRQ_MASK: h6280.irq_mask = val; CHECK_IRQ_LINES; break;
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case H6280_TIMER_STATE: h6280.timer_status = val; break;
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case H6280_NMI_STATE: h6280_set_nmi_line( val ); break;
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case H6280_IRQ1_STATE: h6280_set_irq_line( 0, val ); break;
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case H6280_IRQ2_STATE: h6280_set_irq_line( 1, val ); break;
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case H6280_IRQT_STATE: h6280_set_irq_line( 2, val ); break;
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default:
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if( regnum <= REG_SP_CONTENTS )
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{
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unsigned offset = S + 2 * (REG_SP_CONTENTS - regnum);
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if( offset < 0x1ff )
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{
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WRMEM( offset, val & 0xff );
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WRMEM( offset+1, (val >> 8) & 0xff );
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}
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}
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}
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}
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/*****************************************************************************/
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void h6280_set_nmi_line(int state)
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{
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if (h6280.nmi_state == state) return;
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h6280.nmi_state = state;
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if (state != CLEAR_LINE)
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{
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DO_INTERRUPT(H6280_NMI_VEC);
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}
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}
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void h6280_set_irq_line(int irqline, int state)
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{
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h6280.irq_state[irqline] = state;
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/* If line is cleared, just exit */
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if (state == CLEAR_LINE) return;
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/* Check if interrupts are enabled and the IRQ mask is clear */
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CHECK_IRQ_LINES;
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}
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void h6280_set_irq_callback(int (*callback)(int irqline))
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{
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h6280.irq_callback = callback;
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}
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int H6280_irq_status_r (int offset)
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{
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int status;
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switch (offset)
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{
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case 0: /* Read irq mask */
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return h6280.irq_mask;
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case 1: /* Read irq status */
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status=0;
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if(h6280.irq_state[1]!=CLEAR_LINE) status|=1; /* IRQ 2 */
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if(h6280.irq_state[0]!=CLEAR_LINE) status|=2; /* IRQ 1 */
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if(h6280.irq_state[2]!=CLEAR_LINE) status|=4; /* TIMER */
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return status;
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}
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return 0;
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}
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void H6280_irq_status_w (int offset, int data)
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{
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switch (offset)
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{
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case 0: /* Write irq mask */
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h6280.irq_mask=data&0x7;
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CHECK_IRQ_LINES;
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break;
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case 1: /* Timer irq ack - timer is reloaded here */
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h6280.timer_value = h6280.timer_load;
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h6280.timer_ack=1; /* Timer can't refire until ack'd */
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break;
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}
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}
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int H6280_timer_r (int offset)
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{
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switch (offset) {
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case 0: /* Counter value */
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return (h6280.timer_value/1024)&127;
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case 1: /* Read counter status */
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return h6280.timer_status;
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}
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return 0;
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}
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void H6280_timer_w (int offset, int data)
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{
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switch (offset) {
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case 0: /* Counter preload */
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h6280.timer_load=h6280.timer_value=((data&127)+1)*1024;
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return;
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case 1: /* Counter enable */
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if(data&1)
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{ /* stop -> start causes reload */
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if(h6280.timer_status==0) h6280.timer_value=h6280.timer_load;
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}
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h6280.timer_status=data&1;
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return;
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}
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}
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/*****************************************************************************/
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