fix palette issue, screen offset still there

pull/31/head
AlinTigaeru 2023-03-10 15:00:26 +00:00
rodzic d64a38f994
commit a6987a44bb
6 zmienionych plików z 37 dodań i 40 usunięć

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@ -27,7 +27,7 @@ extern "C" {
// Declarations of instances of the RAM, VRAM, processor and other required components.
uint8_t RAM[0x10000]; // 64k
uint8_t RAM[0x10000]; // 64k
unsigned char* bitstream = 0; // 16k video ram to be used by PIO.
static z80_t CPU;
uint64_t pins;
@ -41,6 +41,7 @@ int x, y = 0;
void write_to_bitstream(char pixel)
{
// this populates the bitstream.
x = position % WIDTH;
y = position / WIDTH;
@ -49,12 +50,13 @@ void write_to_bitstream(char pixel)
firmware_palette[hardware_colours[pixel]].B);
position++;
if(position == WIDTH * HEIGHT)
{
position = 0;
vsync_wait = true;
}
}
static void display_screen()
@ -114,7 +116,7 @@ uint8_t in_z80(uint16_t Port)
*/
void cpc_Init(void)
{
for(int i = 0; i < PALETTE_SIZE; i++)
for(int i = 0; i < 32; i++)
{
emu_SetPaletteEntry(firmware_palette[hardware_colours[i]].R,
firmware_palette[hardware_colours[i]].G,

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@ -101,8 +101,8 @@ bool is_vsync_active()
{
const uint8_t char_height = registers[9] + 1;
int8_t char_lines_counted = (int8_t) char_line_count - registers[7];
return char_height * char_lines_counted >= 0 &&
char_height * char_lines_counted <= 16;
return char_height * char_lines_counted >= 0 &&
char_height * char_lines_counted <= 16;
}
void write_crt_controller(unsigned short address, uint8_t value)

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@ -13,7 +13,7 @@
#define emu_Step(x) {cpc_Step();}
#define emu_Input(x) {cpc_Input(x);}
#define PALETTE_SIZE 32
#define PALETTE_SIZE 27
#define VID_FRAME_SKIP 0x0
#define TFT_VBUFFER_YCROP 0

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@ -50,33 +50,33 @@ uint8_t hardware_colours[32] = {
14
};
struct RGB firmware_palette[27] = {
{0, 0, 0},
{0, 0, 128},
{0, 0, 255},
{128, 0, 0},
{128, 0, 128},
{128, 0, 255},
{255, 0, 0},
{255, 0, 128},
{255, 0, 255},
{0, 128, 0},
{0, 128, 128},
{0, 128, 255},
{128, 128, 0},
{128, 128, 128},
{128, 128, 255},
{255, 128, 0},
{255, 128, 128},
{255, 128, 255},
{0, 255, 0},
{0, 255, 128},
{0, 255, 255},
{128, 255, 0},
{128, 255, 128},
{128, 255, 255},
{255, 255, 0},
{255, 255, 128},
{255, 255, 255}
{0, 0, 0}, // 0
{0, 0, 128}, // 1
{0, 0, 255}, // 2
{128, 0, 0}, // 3
{128, 0, 128}, // 4
{128, 0, 255}, // 5
{255, 0, 0}, // 6
{255, 0, 128}, // 7
{255, 0, 255}, // 8
{0, 128, 0}, // 9
{0, 128, 128}, // 10
{0, 128, 255}, // 11
{128, 128, 0}, // 12
{128, 128, 128}, // 13
{128, 128, 255}, // 14
{255, 128, 0}, // 15
{255, 128, 128}, // 16
{255, 128, 255}, // 17
{0, 255, 0}, // 18
{0, 255, 128}, // 19
{0, 255, 255}, // 20
{128, 255, 0}, // 21
{128, 255, 128}, // 22
{128, 255, 255}, // 23
{255, 255, 0}, // 24
{255, 255, 128}, // 25
{255, 255, 255} // 26
};
bool update_interrupts()
@ -112,11 +112,6 @@ bool update_interrupts()
return interrupt_generated;
}
char ga_rgb_to_vga(uint8_t r, uint8_t g, uint8_t b)
{
return VGA_RGB(r,g,b);
}
void address_to_pixels()
{
if(!ga_config.vsync_active && is_vsync_active())

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@ -15,7 +15,7 @@ void rom_and_screen_mgmt(uint8_t value);
#define PEN_NUMBER 17 // Mode 0 has 16 pens, mode 1 has 4 pens and mode 2 has 2 pens.
struct RGB {
uint8_t R, G, B;
int R, G, B;
};
struct GAConfig {

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@ -90,7 +90,7 @@ void emu_SetPaletteEntry(unsigned char r, unsigned char g, unsigned char b, int
palette8[index] = RGBVAL8(r,g,b);
palette16[index] = RGBVAL16(r,g,b);
}
printf("index: %d palette[8]: %d\n", index, palette8[index]);
printf("index: %d palette[8]: %d, r %d, g %d, b %d\n", index, palette8[index], r, g, b);
}
void emu_DrawVsync(void)