kopia lustrzana https://github.com/Jean-MarcHarvengt/MCUME
add psramtest
jean-marcharvengt
rodzic
03abc85044
commit
a40c614ab9
Plik binarny nie jest wyświetlany.
|
|
@ -7,6 +7,7 @@ include(pico_sdk_import.cmake)
|
|||
#include(pico_extras_import.cmake)
|
||||
|
||||
#set(TARGET testkeymax)
|
||||
set(TARGET testpsram)
|
||||
#set(TARGET pico20)
|
||||
#set(TARGET pico64)
|
||||
#set(TARGET pico81)
|
||||
|
|
@ -15,7 +16,7 @@ include(pico_sdk_import.cmake)
|
|||
#set(TARGET picomsx)
|
||||
#set(TARGET pico8086)
|
||||
#set(TARGET picocastaway)
|
||||
set(TARGET picoaiie)
|
||||
#set(TARGET picoaiie)
|
||||
#set(TARGET picocolem)
|
||||
#set(TARGET picoo2em)
|
||||
#set(TARGET picovcs)
|
||||
|
|
@ -404,6 +405,12 @@ set(TESTKEYMAX_SOURCES
|
|||
)
|
||||
endif()
|
||||
|
||||
if( ${TARGET} MATCHES "testpsram" )
|
||||
set(TESTPSRAM_SOURCES
|
||||
testpsram/testpsram.cpp
|
||||
)
|
||||
endif()
|
||||
|
||||
set(DISPLAY_SOURCES
|
||||
display/pico_dsp.cpp
|
||||
display/hdmi_framebuffer.cpp
|
||||
|
|
@ -454,6 +461,7 @@ add_executable(${TARGET}
|
|||
${TESTIO_SOURCES}
|
||||
${TESTVGA_SOURCES}
|
||||
${TESTKEYMAX_SOURCES}
|
||||
${TESTPSRAM_SOURCES}
|
||||
${PSRAM_SOURCES}
|
||||
${FLASH_SOURCES}
|
||||
${DISPLAY_SOURCES}
|
||||
|
|
|
|||
Plik binarny nie jest wyświetlany.
|
|
@ -90,14 +90,16 @@
|
|||
// PSRAM SPI
|
||||
#define PSRAM_SPIREG spi1
|
||||
//#define PSRAM_ASYNC 1
|
||||
#define PSRAM_SCLK 10
|
||||
#define PSRAM_MOSI 11
|
||||
#define PSRAM_MISO 8
|
||||
#define PSRAM_CS 9
|
||||
#define PSRAM_SCLK 1 //1 //1 //10
|
||||
|
||||
#define PSRAM_MOSI 8 //11 //8 //11
|
||||
#define PSRAM_MISO 9 //8 //9 //8
|
||||
|
||||
#define PSRAM_CS 0 //0 //0 //9
|
||||
// PSRAM QSPI
|
||||
//#define PSRAM_CS 0
|
||||
//#define PSRAM_SCLK 1
|
||||
//#define PSRAM_DAT0 8 //9,10,11
|
||||
#define PSRAM_SIO0 8 //9,10,11
|
||||
|
||||
// HDMI
|
||||
#define HDMI_D0_PLUS 0 // GPIO12
|
||||
|
|
|
|||
|
|
@ -32,11 +32,8 @@ static int skip=0;
|
|||
|
||||
#include "hardware/clocks.h"
|
||||
#include "hardware/vreg.h"
|
||||
|
||||
#include "hdmi_framebuffer.h"
|
||||
|
||||
//psram_spi_inst_t* async_spi_inst;
|
||||
|
||||
int main(void) {
|
||||
// vreg_set_voltage(VREG_VOLTAGE_1_05);
|
||||
// set_sys_clock_khz(125000, true);
|
||||
|
|
@ -45,19 +42,16 @@ int main(void) {
|
|||
// set_sys_clock_khz(200000, true);
|
||||
// set_sys_clock_khz(210000, true);
|
||||
// set_sys_clock_khz(230000, true);
|
||||
// set_sys_clock_khz(225000, truxe);
|
||||
// set_sys_clock_khz(250000, true);
|
||||
|
||||
set_sys_clock_khz(280000, true);
|
||||
*((uint32_t *)(0x40010000+0x58)) = 2 << 16; //CLK_HSTX_DIV = 2 << 16; // HSTX clock/2
|
||||
// set_sys_clock_khz(225000, truxe);
|
||||
|
||||
// Overclock!
|
||||
// set_sys_clock_khz(280000, true);
|
||||
set_sys_clock_khz(260000, true); // for PSRAM tolerance
|
||||
*((uint32_t *)(0x40010000+0x58)) = 2 << 16; //CLK_HSTX_DIV = 2 << 16; // HSTX clock/2
|
||||
|
||||
// Overclock!
|
||||
// stdio_init_all();
|
||||
|
||||
emu_init();
|
||||
|
||||
|
||||
|
||||
char * filename;
|
||||
#ifdef FILEBROWSER
|
||||
|
|
|
|||
|
|
@ -4,6 +4,6 @@
|
|||
#define FLASH_STORE_START 0x280000
|
||||
#define KEYBOARD_ACTIVATED 1
|
||||
#define NO_SOUND 1
|
||||
//#define HAS_PSRAM 1
|
||||
#define HAS_PSRAM 1
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -65,7 +65,9 @@ extern "C" {
|
|||
|
||||
#define PIO_SPI 1
|
||||
#define PSRAM_WAITDMA 1
|
||||
//#define QSPI 1
|
||||
|
||||
static uint8_t nibconv[256];
|
||||
|
||||
/**
|
||||
* @brief A struct that holds the configuration for the PSRAM interface.
|
||||
|
|
@ -139,6 +141,11 @@ __force_inline static void __time_critical_func(pio_spi_write_blocking)(
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
static uint8_t wrbuffer[16];
|
||||
//#define CINIT 0b00000000
|
||||
#define CINIT 0b01110111
|
||||
|
||||
/**
|
||||
* @brief Write raw data to the PSRAM SPI PIO, driven by DMA without CPU
|
||||
* involvement.
|
||||
|
|
@ -159,7 +166,34 @@ __force_inline static void __time_critical_func(pio_spi_write_dma_blocking)(
|
|||
dma_channel_wait_for_finish_blocking(spi->write_dma_chan);
|
||||
dma_channel_wait_for_finish_blocking(spi->read_dma_chan);
|
||||
#endif // PSRAM_WAITDMA
|
||||
dma_channel_transfer_from_buffer_now(spi->write_dma_chan, src, src_len);
|
||||
int i=0;
|
||||
int k=0;
|
||||
#ifdef QSPI
|
||||
wrbuffer[k++]=src[i++];
|
||||
wrbuffer[k++]=src[i++];
|
||||
uint8_t c=src[i++];
|
||||
uint8_t d=CINIT;
|
||||
if (c & 0b10000000) d |= 0b1000000;
|
||||
if (c & 0b01000000) d |= 0b0001000;
|
||||
wrbuffer[k++] = d;
|
||||
d=CINIT;
|
||||
if (c & 0b00100000) d |= 0b1000000;
|
||||
if (c & 0b00010000) d |= 0b0001000;
|
||||
wrbuffer[k++] = d;
|
||||
d=CINIT;
|
||||
if (c & 0b00001000) d |= 0b1000000;
|
||||
if (c & 0b00000100) d |= 0b0001000;
|
||||
wrbuffer[k++] = d;
|
||||
d=CINIT;
|
||||
if (c & 0b00000010) d |= 0b1000000;
|
||||
if (c & 0b00000010) d |= 0b0001000;
|
||||
wrbuffer[k++] = d;
|
||||
while (i<src_len) wrbuffer[k++]=nibconv[src[i++]];
|
||||
#else
|
||||
while (i<src_len) wrbuffer[k++]=src[i++];
|
||||
#endif
|
||||
dma_channel_transfer_from_buffer_now(spi->write_dma_chan, wrbuffer, k);
|
||||
// dma_channel_transfer_from_buffer_now(spi->write_dma_chan, src, src_len);
|
||||
dma_channel_wait_for_finish_blocking(spi->write_dma_chan);
|
||||
}
|
||||
|
||||
|
|
@ -188,7 +222,34 @@ __force_inline static void __time_critical_func(pio_spi_write_read_dma_blocking)
|
|||
dma_channel_wait_for_finish_blocking(spi->write_dma_chan);
|
||||
dma_channel_wait_for_finish_blocking(spi->read_dma_chan);
|
||||
#endif // PSRAM_WAITDMA
|
||||
dma_channel_transfer_from_buffer_now(spi->write_dma_chan, src, src_len);
|
||||
int i=0;
|
||||
int k=0;
|
||||
#ifdef QSPI
|
||||
wrbuffer[k++]=src[i++];
|
||||
wrbuffer[k++]=src[i++];
|
||||
uint8_t c=src[i++];
|
||||
uint8_t d=CINIT;
|
||||
if (c & 0b10000000) d |= 0b1000000;
|
||||
if (c & 0b01000000) d |= 0b0001000;
|
||||
wrbuffer[k++] = d;
|
||||
d=CINIT;
|
||||
if (c & 0b00100000) d |= 0b1000000;
|
||||
if (c & 0b00010000) d |= 0b0001000;
|
||||
wrbuffer[k++] = d;
|
||||
d=CINIT;
|
||||
if (c & 0b00001000) d |= 0b1000000;
|
||||
if (c & 0b00000100) d |= 0b0001000;
|
||||
wrbuffer[k++] = d;
|
||||
d=CINIT;
|
||||
if (c & 0b00000010) d |= 0b1000000;
|
||||
if (c & 0b00000010) d |= 0b0001000;
|
||||
wrbuffer[k++] = d;
|
||||
while (i<src_len) wrbuffer[k++]=nibconv[src[i++]];
|
||||
#else
|
||||
while (i<src_len) wrbuffer[k++]=src[i++];
|
||||
#endif
|
||||
dma_channel_transfer_from_buffer_now(spi->write_dma_chan, wrbuffer, k);
|
||||
// dma_channel_transfer_from_buffer_now(spi->write_dma_chan, src, src_len);
|
||||
dma_channel_transfer_to_buffer_now(spi->read_dma_chan, dst, dst_len);
|
||||
dma_channel_wait_for_finish_blocking(spi->write_dma_chan);
|
||||
dma_channel_wait_for_finish_blocking(spi->read_dma_chan);
|
||||
|
|
@ -233,11 +294,26 @@ psram_spi_inst_t psram_spi_init_clkdiv(PIO pio, int sm, float clkdiv, bool fudge
|
|||
*/
|
||||
psram_spi_inst_t psram_spi_init(PIO pio, int sm);
|
||||
|
||||
#ifdef QSPI
|
||||
#define READ_CMD 0xebu
|
||||
#define WRITE_CMD 0x38u
|
||||
//#define READ_CMD 0x0bu
|
||||
//#define WRITE_CMD 0x02u
|
||||
#else
|
||||
#define READ_CMD 0x0bu
|
||||
#define WRITE_CMD 0x02u
|
||||
#endif
|
||||
|
||||
|
||||
static uint8_t write8_command[] = {
|
||||
#ifdef QSPI
|
||||
40/4, // 40 bits write
|
||||
0, // 0 bits read
|
||||
#else
|
||||
40, // 40 bits write
|
||||
0, // 0 bits read
|
||||
0x02u, // Write command
|
||||
#endif
|
||||
WRITE_CMD, // Write command
|
||||
0, 0, 0, // Address
|
||||
0 // 8 bits data
|
||||
};
|
||||
|
|
@ -267,9 +343,14 @@ __force_inline static void psram_write8(psram_spi_inst_t* spi, uint32_t addr, ui
|
|||
};
|
||||
|
||||
static uint8_t read8_command[] = {
|
||||
#ifdef QSPI
|
||||
40/4, // 40 bits write
|
||||
8/4, // 8 bits read
|
||||
#else
|
||||
40, // 40 bits write
|
||||
8, // 8 bits read
|
||||
0x0bu, // Fast read command
|
||||
#endif
|
||||
READ_CMD, // Fast read command
|
||||
0, 0, 0, // Address
|
||||
0 // 8 delay cycles
|
||||
};
|
||||
|
|
@ -302,9 +383,14 @@ __force_inline static uint8_t psram_read8(psram_spi_inst_t* spi, uint32_t addr)
|
|||
};
|
||||
|
||||
static uint8_t write16_command[] = {
|
||||
#ifdef QSPI
|
||||
48/4, // 48 bits write
|
||||
0, // 0 bits read
|
||||
#else
|
||||
48, // 48 bits write
|
||||
0, // 0 bits read
|
||||
0x02u, // Write command
|
||||
#endif
|
||||
WRITE_CMD, // Write command
|
||||
0, 0, 0, // Address
|
||||
0, 0 // 16 bits data
|
||||
};
|
||||
|
|
@ -336,9 +422,14 @@ __force_inline static void psram_write16(psram_spi_inst_t* spi, uint32_t addr, u
|
|||
};
|
||||
|
||||
static uint8_t read16_command[] = {
|
||||
#ifdef QSPI
|
||||
40/4, // 40 bits write
|
||||
16/4, // 16 bits read
|
||||
#else
|
||||
40, // 40 bits write
|
||||
16, // 16 bits read
|
||||
0x0bu, // Fast read command
|
||||
#endif
|
||||
READ_CMD, // Fast read command
|
||||
0, 0, 0, // Address
|
||||
0 // 8 delay cycles
|
||||
};
|
||||
|
|
@ -371,12 +462,18 @@ __force_inline static uint16_t psram_read16(psram_spi_inst_t* spi, uint32_t addr
|
|||
return val;
|
||||
};
|
||||
|
||||
/*
|
||||
static uint8_t write_command[] = {
|
||||
0, // n bits write
|
||||
0, // 0 bits read
|
||||
0x02u, // Fast write command
|
||||
#ifdef QSPI
|
||||
0x38u, // Write QUAD command
|
||||
#else
|
||||
0x02u, // Write command
|
||||
#endif
|
||||
0, 0, 0 // Address
|
||||
};
|
||||
*/
|
||||
/**
|
||||
* @brief Write @c count bytes of data to a given address to the PSRAM SPI PIO,
|
||||
* driven by DMA without CPU involvement, blocking until the write is
|
||||
|
|
@ -403,9 +500,14 @@ __force_inline static void psram_writen(psram_spi_inst_t* spi, const uint32_t ad
|
|||
*/
|
||||
|
||||
static uint8_t read_command[] = {
|
||||
#ifdef QSPI
|
||||
40/4, // 40 bits write
|
||||
0, // n bits read
|
||||
#else
|
||||
40, // 40 bits write
|
||||
0, // n bits read
|
||||
0x0bu, // Fast read command
|
||||
#endif
|
||||
READ_CMD, // Fast read command
|
||||
0, 0, 0, // Address
|
||||
0 // 8 delay cycles
|
||||
};
|
||||
|
|
@ -420,7 +522,11 @@ static uint8_t read_command[] = {
|
|||
* @param count Number of bytes to read.
|
||||
*/
|
||||
__force_inline static void psram_readn(psram_spi_inst_t* spi, const uint32_t addr, uint8_t* dst, const size_t count) {
|
||||
#ifdef QSPI
|
||||
read_command[1] = count * 2;
|
||||
#else
|
||||
read_command[1] = count * 8;
|
||||
#endif
|
||||
read_command[3] = addr >> 16;
|
||||
read_command[4] = addr >> 8;
|
||||
read_command[5] = addr;
|
||||
|
|
@ -430,7 +536,30 @@ __force_inline static void psram_readn(psram_spi_inst_t* spi, const uint32_t add
|
|||
#endif
|
||||
};
|
||||
|
||||
static uint8_t nib[16] = {
|
||||
0b0000,
|
||||
0b1000,
|
||||
0b0100,
|
||||
0b1100,
|
||||
0b0010,
|
||||
0b1010,
|
||||
0b0110,
|
||||
0b1110,
|
||||
0b0001,
|
||||
0b1001,
|
||||
0b0101,
|
||||
0b1101,
|
||||
0b0011,
|
||||
0b1011,
|
||||
0b0111,
|
||||
0b1111
|
||||
};
|
||||
|
||||
static void psram_init_nib(void) {
|
||||
for (unsigned int i=0; i<256;i++) {
|
||||
nibconv[i]=(nib[i>>4]<<4)+nib[i&0xf];
|
||||
}
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
|
|
@ -79,6 +79,7 @@ static inline void pio_spi_psram_cs_init(PIO pio, uint sm, uint prog_offs, uint
|
|||
pio_sm_set_consecutive_pindirs(pio, sm, pin_mosi, 1, true);
|
||||
pio_sm_set_consecutive_pindirs(pio, sm, pin_miso, 1, false);
|
||||
pio_gpio_init(pio, pin_mosi);
|
||||
pio_gpio_init(pio, pin_miso);
|
||||
pio_gpio_init(pio, pin_cs);
|
||||
pio_gpio_init(pio, pin_cs + 1);
|
||||
|
||||
|
|
|
|||
|
|
@ -24,34 +24,45 @@ int8_t PSRAM_T::last=0;
|
|||
|
||||
static psram_spi_inst_t psram_spi;
|
||||
|
||||
psram_spi_inst_t psram_spi_init_clkdiv(PIO pio, int sm, float clkdiv, bool fudge) {
|
||||
psram_spi_inst_t psram_spi_init_clkdiv(PIO pio, int sm, float clkdiv, bool fudge, bool qspi) {
|
||||
psram_spi_inst_t spi;
|
||||
spi.pio = pio;
|
||||
spi.offset = pio_add_program(spi.pio, fudge ? &spi_psram_fudge_program : &spi_psram_program);
|
||||
if (!qspi)
|
||||
spi.offset = pio_add_program(spi.pio, fudge ? &spi_psram_fudge_program : &spi_psram_program);
|
||||
|
||||
if (sm == -1) {
|
||||
spi.sm = pio_claim_unused_sm(spi.pio, true);
|
||||
} else {
|
||||
spi.sm = sm;
|
||||
}
|
||||
|
||||
//gpio_set_drive_strength(PSRAM_PIN_CS, GPIO_DRIVE_STRENGTH_4MA);
|
||||
//gpio_set_drive_strength(PSRAM_PIN_SCK, GPIO_DRIVE_STRENGTH_4MA);
|
||||
//gpio_set_drive_strength(PSRAM_PIN_MOSI, GPIO_DRIVE_STRENGTH_4MA);
|
||||
|
||||
gpio_init(PSRAM_SCLK);
|
||||
gpio_pull_up(PSRAM_SCLK);
|
||||
gpio_init(PSRAM_MISO);
|
||||
gpio_pull_up(PSRAM_MISO);
|
||||
gpio_init(PSRAM_MOSI);
|
||||
gpio_pull_up(PSRAM_MOSI);
|
||||
gpio_init(PSRAM_CS);
|
||||
gpio_pull_up(PSRAM_CS);
|
||||
//gpio_set_drive_strength(PSRAM_CS, GPIO_DRIVE_STRENGTH_4MA);
|
||||
//gpio_set_drive_strength(PSRAM_SCLK, GPIO_DRIVE_STRENGTH_4MA);
|
||||
//gpio_set_drive_strength(PSRAM_MOSI, GPIO_DRIVE_STRENGTH_4MA);
|
||||
|
||||
/* gpio_set_slew_rate(PSRAM_PIN_CS, GPIO_SLEW_RATE_FAST); */
|
||||
/* gpio_set_slew_rate(PSRAM_PIN_SCK, GPIO_SLEW_RATE_FAST); */
|
||||
/* gpio_set_slew_rate(PSRAM_PIN_MOSI, GPIO_SLEW_RATE_FAST); */
|
||||
//gpio_init(PSRAM_SCLK);
|
||||
//gpio_pull_up(PSRAM_SCLK);
|
||||
//gpio_init(PSRAM_MISO);
|
||||
//gpio_pull_up(PSRAM_MISO);
|
||||
//gpio_init(PSRAM_MOSI);
|
||||
//gpio_pull_up(PSRAM_MOSI);
|
||||
//gpio_init(PSRAM_CS);
|
||||
//gpio_pull_up(PSRAM_CS);
|
||||
|
||||
pio_spi_psram_cs_init(spi.pio, spi.sm, spi.offset, 8 /*n_bits*/, clkdiv, fudge, PSRAM_CS, PSRAM_MOSI, PSRAM_MISO);
|
||||
//gpio_set_slew_rate(PSRAM_CS, GPIO_SLEW_RATE_FAST);
|
||||
//gpio_set_slew_rate(PSRAM_SCLK, GPIO_SLEW_RATE_FAST);
|
||||
//gpio_set_slew_rate(PSRAM_MOSI, GPIO_SLEW_RATE_FAST);
|
||||
|
||||
|
||||
//gpio_set_function(PSRAM_CS, GPIO_FUNC_SPI);
|
||||
//gpio_set_function(PSRAM_MISO, GPIO_FUNC_SPI);
|
||||
//gpio_set_function(PSRAM_SCLK, GPIO_FUNC_SPI);
|
||||
//gpio_set_function(PSRAM_MOSI, GPIO_FUNC_SPI);
|
||||
|
||||
if (qspi)
|
||||
pio_qspi_psram_cs_init(spi.pio, spi.sm, pio_add_program(spi.pio,&qspi_psram_program), 8 /*n_bits*/, clkdiv, PSRAM_CS, PSRAM_SIO0);
|
||||
else
|
||||
pio_spi_psram_cs_init(spi.pio, spi.sm, spi.offset, 8 /*n_bits*/, clkdiv, fudge, PSRAM_CS, PSRAM_MOSI, PSRAM_MISO);
|
||||
|
||||
// Write DMA channel setup
|
||||
spi.write_dma_chan = PSR_DMA_CHANNEL; //dma_claim_unused_channel(true);
|
||||
|
|
@ -73,22 +84,31 @@ psram_spi_inst_t psram_spi_init_clkdiv(PIO pio, int sm, float clkdiv, bool fudge
|
|||
dma_channel_set_read_addr(spi.read_dma_chan, &spi.pio->rxf[spi.sm], false);
|
||||
dma_channel_set_config(spi.read_dma_chan, &spi.read_dma_chan_config, false);
|
||||
|
||||
|
||||
uint8_t psram_reset_en_cmd[] = {
|
||||
8, // 8 bits to write
|
||||
0, // 0 bits to read
|
||||
0x66u // Reset enable command
|
||||
};
|
||||
pio_spi_write_read_dma_blocking(&spi, psram_reset_en_cmd, 3, 0, 0);
|
||||
busy_wait_us(50);
|
||||
uint8_t psram_reset_cmd[] = {
|
||||
8, // 8 bits to write
|
||||
0, // 0 bits to read
|
||||
0x99u // Reset command
|
||||
};
|
||||
pio_spi_write_read_dma_blocking(&spi, psram_reset_cmd, 3, 0, 0);
|
||||
busy_wait_us(100);
|
||||
|
||||
if (!qspi) {
|
||||
uint8_t psram_reset_en_cmd[] = {
|
||||
8, // 8 bits to write
|
||||
0, // 0 bits to read
|
||||
0x66u // Reset enable command
|
||||
};
|
||||
pio_spi_write_read_dma_blocking(&spi, psram_reset_en_cmd, 3, 0, 0);
|
||||
busy_wait_us(50);
|
||||
uint8_t psram_reset_cmd[] = {
|
||||
8, // 8 bits to write
|
||||
0, // 0 bits to read
|
||||
0x99u // Reset command
|
||||
};
|
||||
pio_spi_write_read_dma_blocking(&spi, psram_reset_cmd, 3, 0, 0);
|
||||
busy_wait_us(100);
|
||||
#ifdef QSPI
|
||||
uint8_t psram_qspi_cmd[] = {
|
||||
8, // 8 bits to write
|
||||
0, // 0 bits to read
|
||||
0x35u // enter quad command
|
||||
};
|
||||
pio_spi_write_read_dma_blocking(&spi, psram_qspi_cmd, 3, 0, 0);
|
||||
busy_wait_us(500);
|
||||
#endif
|
||||
}
|
||||
return spi;
|
||||
};
|
||||
|
||||
|
|
@ -107,7 +127,14 @@ void PSRAM_T::begin(void)
|
|||
{
|
||||
|
||||
#ifdef PIO_SPI
|
||||
psram_spi = psram_spi_init_clkdiv(pio2, 0, 1.0, true);
|
||||
psram_init_nib();
|
||||
psram_spi = psram_spi_init_clkdiv(pio2, 0, 1.0, true, false);
|
||||
//pio_sm_set_enabled(pio2, 0, false);
|
||||
//psram_spi = psram_spi_init_clkdiv(pio2, 1, 1.0, true, false);
|
||||
#ifdef QSPI
|
||||
pio_sm_set_enabled(pio2, 0, false);
|
||||
psram_spi = psram_spi_init_clkdiv(pio2, 1, 1.0, true, true);
|
||||
#endif
|
||||
#else
|
||||
gpio_init(PSRAM_SCLK);
|
||||
gpio_pull_up(PSRAM_SCLK);
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
#include "pico.h"
|
||||
#include "pico/stdlib.h"
|
||||
|
||||
#define PSCACHE 1
|
||||
//#define PSCACHE 1
|
||||
|
||||
//#define PAGE_SIZE 16 //32 //2048 //1024
|
||||
//#define MAX_PAGES 8
|
||||
|
|
|
|||
|
|
@ -0,0 +1,86 @@
|
|||
#ifndef EMUCFG_H
|
||||
#define EMUCFG_H
|
||||
|
||||
#define CUSTOM_SND 1
|
||||
//#define TIMER_REND 1
|
||||
#define EXTRA_HEAP 0x10
|
||||
//#define FILEBROWSER
|
||||
|
||||
// Title: < >
|
||||
#define TITLE " keymaptest "
|
||||
#define ROMSDIR ""
|
||||
|
||||
#ifdef KEYMAP_PRESENT
|
||||
|
||||
#ifdef PICOZX
|
||||
const unsigned short key_map1[] = {
|
||||
'1','2','3','4','5','6','7','8','9','0',
|
||||
'Q','W','E','R','T','Y','U','I','O','P',
|
||||
'A','S','D','F','G','H','J','K','L',0x0D,
|
||||
0,'Z','X','C','V','B','N','M',0,' ',
|
||||
145,157,29,17,157,29 //U L R D L R
|
||||
};
|
||||
|
||||
const unsigned short key_map2[] = {
|
||||
'!','@','#','$','%','&','\'','(',')','_',
|
||||
0,0,0,'<','>',0,0,0,';','"',
|
||||
0,0,0,0,0,'^','-','+','=',0x0D,
|
||||
0,':',0,'?','\/','*',',','.',0,' ',
|
||||
0,0,0,0,0,0
|
||||
};
|
||||
|
||||
const unsigned short key_map3[] = {
|
||||
133,134,135,136,137,138,139,140,0,0, // function keys
|
||||
0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0
|
||||
};
|
||||
|
||||
const unsigned short matkeys[] = {
|
||||
0x104,0x101,0x108,0x102,0x110,0x120,0x140,0x204,0x201,0x208, // row 1
|
||||
0x202,0x210,0x220,0x240,0x304,0x301,0x308,0x302,0x310,0x320, // row 2
|
||||
0x340,0x404,0x401,0x408,0x402,0x410,0x420,0x440,0x504,0x501, // row 3
|
||||
0x020,0x508,0x502,0x510,0x520,0x540,0x604,0x601,0x040,0x608, // row 4
|
||||
0x008,0x001,0x002,0x010,0x620,0x640 }; // cursor keys up, left, right, down, <<<, >>>
|
||||
|
||||
#else
|
||||
#define keylables_map1_0 (char *)"qwertyuiop\x1a"
|
||||
#define keylables_map1_1 (char *)" asdfghjkl\x19"
|
||||
#define keylables_map1_2 (char *)" zxcvbnm.\x10 "
|
||||
const unsigned short key_map1[] = {
|
||||
'Q','W','E','R','T','Y','U','I','O','P',157,
|
||||
0,'A','S','D','F','G','H','J','K','L',0x0D,
|
||||
0,'Z','X','C','V','B','N','M','.',' ',
|
||||
145,157,29,17 //U L R D
|
||||
};
|
||||
|
||||
#define keylables_map2_0 (char *)"1234567890 "
|
||||
#define keylables_map2_1 (char *)" !@#$%+&*- "
|
||||
#define keylables_map2_2 (char *)" ()?/\"<>,: "
|
||||
const unsigned short key_map2[] = {
|
||||
'1','2','3','4','5','6','7','8','9','0',0,
|
||||
0, '!','@','#','$','%','+','&','*','-','\/',
|
||||
0, '(',')','?','\/','"','<','>',',',':',
|
||||
0,0,0,0
|
||||
};
|
||||
|
||||
#define keylables_map3_0 (char *)"\x11\x12\x13\x14\x15\x16\x17\x18 "
|
||||
#define keylables_map3_1 (char *)" "
|
||||
#define keylables_map3_2 (char *)" ;= "
|
||||
const unsigned short key_map3[] = {
|
||||
133,134,135,136,137,138,139,140,0,0,0, // function keys
|
||||
0, 0,0,0,0,0,0,0,0,0,0,
|
||||
0, 0,0,0,0,0,0,0,';','=',
|
||||
0,0,0,0
|
||||
};
|
||||
|
||||
const unsigned short matkeys[] = {
|
||||
0x020,0x120,0x220,0x320,0x420,0x408,0x308,0x208,0x108,0x008,0x002, // row 1
|
||||
0x510,0x010,0x110,0x210,0x310,0x410,0x401,0x301,0x201,0x101,0x001, // row 2
|
||||
0x520,0x102,0x202,0x302,0x402,0x404,0x304,0x204,0x104,0x004, // row 3
|
||||
0x508,0x501,0x502,0x504 }; // cursor keys
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
|
||||
#ifndef keyboard_osd_h_
|
||||
#define keyboard_osd_h_
|
||||
|
||||
extern bool virtualkeyboardIsActive(void);
|
||||
extern void drawVirtualkeyboard(void);
|
||||
extern void toggleVirtualkeyboard(bool keepOn);
|
||||
extern void handleVirtualkeyboard(void);
|
||||
|
||||
extern bool callibrationActive(void);
|
||||
extern int handleCallibration(uint16_t bClick);
|
||||
|
||||
extern bool menuActive(void);
|
||||
extern char * menuSelection(void);
|
||||
extern void toggleMenu(bool on);
|
||||
extern int handleMenu(uint16_t bClick);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
#ifndef _PROGRAM_CONFIG_H_
|
||||
#define _PROGRAM_CONFIG_H_
|
||||
|
||||
#define HAS_PSRAM 1
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,203 @@
|
|||
#include "pico.h"
|
||||
#include "pico/stdlib.h"
|
||||
#include <stdio.h>
|
||||
extern "C" {
|
||||
#include "iopins.h"
|
||||
#include "emuapi.h"
|
||||
}
|
||||
#include "keyboard_osd.h"
|
||||
#include "pico_dsp.h"
|
||||
|
||||
#define BLUE RGBVAL16(0, 0, 170)
|
||||
#define RED RGBVAL16(255, 0, 0)
|
||||
#define LIGHT_BLUE RGBVAL16(0, 136, 255)
|
||||
|
||||
PICO_DSP tft;
|
||||
static int fb_width, fb_height;
|
||||
|
||||
|
||||
#include "hardware/clocks.h"
|
||||
#include "hardware/vreg.h"
|
||||
|
||||
static const char * digits = "0123456789ABCDEF";
|
||||
static int hk = 0;
|
||||
static int prevhk = 0;
|
||||
static int col=0;
|
||||
static int row=0;
|
||||
|
||||
#ifdef HAS_PSRAM
|
||||
#include "psram_t.h"
|
||||
PSRAM_T psram = PSRAM_T(PSRAM_CS, PSRAM_MOSI, PSRAM_SCLK, PSRAM_MISO);
|
||||
#endif
|
||||
|
||||
|
||||
void emu_Input(uint16_t bClick) {
|
||||
hk = emu_ReadI2CKeyboard();
|
||||
}
|
||||
|
||||
bool repeating_timer_callback(struct repeating_timer *t) {
|
||||
uint16_t bClick = emu_DebounceLocalKeys();
|
||||
emu_Input(bClick);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
int main(void) {
|
||||
// vreg_set_voltage(VREG_VOLTAGE_1_05);
|
||||
// set_sys_clock_khz(125000, true);
|
||||
// set_sys_clock_khz(150000, true);
|
||||
// set_sys_clock_khz(133000, true);
|
||||
// set_sys_clock_khz(200000, true);
|
||||
// set_sys_clock_khz(210000, true);
|
||||
//// set_sys_clock_khz(230000, true);
|
||||
// set_sys_clock_khz(225000, true);
|
||||
// set_sys_clock_khz(250000, true);
|
||||
|
||||
|
||||
// Overclock!
|
||||
// set_sys_clock_khz(280000, true);
|
||||
set_sys_clock_khz(260000, true); // for PSRAM tolerance
|
||||
*((uint32_t *)(0x40010000+0x58)) = 2 << 16; //CLK_HSTX_DIV = 2 << 16; // HSTX clock/2
|
||||
|
||||
emu_init();
|
||||
|
||||
#ifdef FILEBROWSER
|
||||
while (true) {
|
||||
if (menuActive()) {
|
||||
uint16_t bClick = emu_DebounceLocalKeys();
|
||||
int action = handleMenu(bClick);
|
||||
char * filename = menuSelection();
|
||||
if (action == ACTION_RUN) {
|
||||
break;
|
||||
}
|
||||
tft.waitSync();
|
||||
}
|
||||
}
|
||||
#endif
|
||||
emu_start();
|
||||
tft.startRefresh();
|
||||
|
||||
#ifdef HAS_PSRAM
|
||||
psram.begin();
|
||||
#endif
|
||||
|
||||
struct repeating_timer timer;
|
||||
add_repeating_timer_ms(20, repeating_timer_callback, NULL, &timer);
|
||||
|
||||
tft.fillScreen(LIGHT_BLUE);
|
||||
tft.get_frame_buffer_size(&fb_width, &fb_height);
|
||||
tft.drawRect((fb_width-320)/2,(fb_height-200)/2, 320,200, BLUE);
|
||||
|
||||
|
||||
|
||||
char buf[4] = {32,32,32,0};
|
||||
uint sys_clk = clock_get_hz(clk_sys)/1000000;
|
||||
uint r1 = sys_clk/100;
|
||||
uint r = sys_clk - r1*100;
|
||||
uint r2 = r/10;
|
||||
r = sys_clk - r1*100 - r2*10;
|
||||
uint r3 = r;
|
||||
buf[0] = digits[r1];
|
||||
buf[1] = digits[r2];
|
||||
buf[2] = digits[r3];
|
||||
tft.drawText(8,8,buf,BLUE,LIGHT_BLUE,false);
|
||||
|
||||
#ifdef HAS_PSRAM
|
||||
uint32_t addr = 0xFFFFFF;
|
||||
uint8_t val = 0x33;
|
||||
char valpt[3] = {0,0,0};
|
||||
#endif
|
||||
while (true) {
|
||||
#ifdef HAS_PSRAM
|
||||
valpt[0]=digits[val>>4];
|
||||
valpt[1]=digits[val&0xf];
|
||||
psram.pswrite(addr,val);
|
||||
//psram.psread(addr);
|
||||
//if (psram.psread(addr) == val ) {
|
||||
// tft.drawText((addr&0xF)*16,(3+(addr>>4))*8,valpt,BLUE,LIGHT_BLUE,false);
|
||||
//}
|
||||
//else {
|
||||
// tft.drawText((addr&0xF)*16,(3+(addr>>4))*8,valpt,RED,LIGHT_BLUE,false);
|
||||
//}
|
||||
//addr = (addr+1) & 0xFF;
|
||||
//val = val+1;
|
||||
//if ((addr& 0xFF)==0) val++;
|
||||
#endif
|
||||
uint16_t bClick = emu_GetPad();
|
||||
char buf[5] = {0,0,0,0,0};
|
||||
buf[0] = digits[(bClick>>12)&0xf];
|
||||
buf[1] = digits[(bClick>>8)&0xf];
|
||||
buf[2] = digits[(bClick>>4)&0xf];
|
||||
buf[3] = digits[bClick&0xf];
|
||||
tft.drawText(4*8,0,buf,RGBVAL16(0x00,0x00,0x00),RGBVAL16(0xFF,0xFF,0xFF),false);
|
||||
buf[3] = 0;
|
||||
int key = emu_ReadI2CKeyboard();
|
||||
buf[0] = digits[(key>>8)&0xf];
|
||||
buf[1] = digits[(key>>4)&0xf];
|
||||
buf[2] = digits[key&0xf];
|
||||
tft.drawText(4*8,8,buf,RGBVAL16(0x00,0x00,0x00),RGBVAL16(0xFF,0xFF,0xFF),false);
|
||||
|
||||
buf[2] = 0;
|
||||
key = emu_ReadI2CKeyboard2(0);
|
||||
buf[0] = digits[(key>>4)&0xf];
|
||||
buf[1] = digits[key&0xf];
|
||||
tft.drawText(9*8+0*24,0*8,buf,RGBVAL16(0x00,0x00,0x00),RGBVAL16(0xFF,0xFF,0xFF),true);
|
||||
key = emu_ReadI2CKeyboard2(1);
|
||||
buf[0] = digits[(key>>4)&0xf];
|
||||
buf[1] = digits[key&0xf];
|
||||
tft.drawText(9*8+1*24,0*8,buf,RGBVAL16(0x00,0x00,0x00),RGBVAL16(0xFF,0xFF,0xFF),true);
|
||||
key = emu_ReadI2CKeyboard2(2);
|
||||
buf[0] = digits[(key>>4)&0xf];
|
||||
buf[1] = digits[key&0xf];
|
||||
tft.drawText(9*8+2*24,0*8,buf,RGBVAL16(0x00,0x00,0x00),RGBVAL16(0xFF,0xFF,0xFF),true);
|
||||
key = emu_ReadI2CKeyboard2(3);
|
||||
buf[0] = digits[(key>>4)&0xf];
|
||||
buf[1] = digits[key&0xf];
|
||||
tft.drawText(9*8+3*24,0*8,buf,RGBVAL16(0x00,0x00,0x00),RGBVAL16(0xFF,0xFF,0xFF),true);
|
||||
key = emu_ReadI2CKeyboard2(4);
|
||||
buf[0] = digits[(key>>4)&0xf];
|
||||
buf[1] = digits[key&0xf];
|
||||
tft.drawText(9*8+4*24,0*8,buf,RGBVAL16(0x00,0x00,0x00),RGBVAL16(0xFF,0xFF,0xFF),true);
|
||||
key = emu_ReadI2CKeyboard2(5);
|
||||
buf[0] = digits[(key>>4)&0xf];
|
||||
buf[1] = digits[key&0xf];
|
||||
tft.drawText(9*8+5*24,0*8,buf,RGBVAL16(0x00,0x00,0x00),RGBVAL16(0xFF,0xFF,0xFF),true);
|
||||
#ifdef PICOZX
|
||||
key = emu_ReadI2CKeyboard2(6);
|
||||
buf[0] = digits[(key>>4)&0xf];
|
||||
buf[1] = digits[key&0xf];
|
||||
tft.drawText(9*8+6*24,0*8,buf,RGBVAL16(0x00,0x00,0x00),RGBVAL16(0xFF,0xFF,0xFF),true);
|
||||
#endif
|
||||
if ( (hk != 0) && (hk < 128) ) {
|
||||
buf[0] = (char)(hk&0xff);
|
||||
buf[1] = 0;
|
||||
tft.drawText(col*8,(row+3)*8,buf,LIGHT_BLUE,BLUE,false);
|
||||
col += 1;
|
||||
if (col >= 40) {
|
||||
col=0;
|
||||
row += 1;
|
||||
if (row >= 25) {
|
||||
row=0;
|
||||
}
|
||||
}
|
||||
if (hk != prevhk) {
|
||||
sleep_ms(200);
|
||||
}
|
||||
else {
|
||||
sleep_ms(100);
|
||||
}
|
||||
}
|
||||
prevhk = hk;
|
||||
sleep_ms(20);
|
||||
}
|
||||
}
|
||||
|
||||
void emu_KeyboardOnDown(int keymodifer, int key) {
|
||||
}
|
||||
|
||||
void emu_KeyboardOnUp(int keymodifer, int key) {
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
Ładowanie…
Reference in New Issue