kopia lustrzana https://github.com/Jean-MarcHarvengt/MCUME
some ga impl, need to test it
AlinTigaeru
rodzic
f3b6610a56
commit
552f9b4ff4
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@ -1,49 +1,67 @@
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#include "pico.h"
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#include "pico/stdlib.h"
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#include "processor/Z80.h"
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#include "roms/rom464.h"
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extern "C" {
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#include "emuapi.h"
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#include "platform_config.h"
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}
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#include "crtc.h"
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#include "ga.h"
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/*
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* Declarations of the RAM, VRAM, processor instances.
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* Declarations of instances of the RAM, VRAM, processor and other required components.
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*/
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static byte z80RAM[0x10000]; // 64k
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static byte screenRAM[0x4000]; // 16k
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static byte ram[0x10000]; // 64k
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static byte bitstream[0x4000]; // 16k video ram to be used by PIO.
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static Z80 cpu;
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extern struct GA_Config ga_config;
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/*
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* Implementation of cpc.h which is used by emuapi.h to define emu_Init() etc.
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* Implementations of system-specific emuapi Init, Step etc. functions.
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*/
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void cpc_Init(void)
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{
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return;
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}
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void cpc_Step()
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void cpc_Step(void)
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{
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return;
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}
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void cpc_Start(char* filename)
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{
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return;
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}
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void cpc_Input(int bClick)
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{
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return;
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}
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/*
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* The implementations of the Z80 instructions required by the portable Z80 emulator.
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* These implementations are system-specific.
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* System-specific implementations of the Z80 instructions required by the portable Z80 emulator.
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*/
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void OutZ80(register word Port, register byte Value)
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{
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if(!(Port & 0x8000)) write_ga(Port, Value); // The Gate Array is selected when bit 15 is set to 0.
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if(!(Port & 0x8000)) write_ga(Value); // The Gate Array is selected when bit 15 is set to 0.
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if(!(Port & 0x4000)) write_crtc(Port, Value); // The CRTC is selected when bit 14 is set to 0.
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if(!(Port & 0x2000)) ; // upper rom bank number. ROM banking needs to be done regardless of CPC model
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if(!(Port & 0x2000))
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{
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// upper rom bank number. ROM banking needs to be done regardless of CPC model
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// The Upper ROM Bank Number (in range of 0x00..0xFF) to be mapped to memory at 0xC000..0xFFFF
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// byte req_bank_number = Value & 15;
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// if(ga_config.upper_rom_enable)
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// {
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// }
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}
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}
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byte InZ80(register word Port)
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@ -52,28 +70,26 @@ byte InZ80(register word Port)
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return 0xFF;
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}
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#define RAM_BASE 0x4000 // The ROM takes up 0x0000-0x4000. From 0x4000-0x10000 is the RAM.
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#define LOWER_ROM_END 0x4000
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#define UPPER_ROM_BEGIN 0xC000
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/**
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* Write the byte Value into the address Addr. If Addr is less than RAM_BASE,
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* then we do not write anything as it would be written into the ROM.
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*/
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void WrZ80(register word Addr, register byte Value)
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{
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if(Addr >= RAM_BASE)
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{
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z80RAM[Addr - RAM_BASE] = Value;
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}
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ram[Addr] = Value;
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}
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byte RdZ80(register word Addr)
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{
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if(Addr < RAM_BASE)
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if(Addr <= LOWER_ROM_END && ga_config.lower_rom_enable)
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{
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return gb_rom_464_0[Addr];
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}
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else if(Addr >= UPPER_ROM_BEGIN && ga_config.upper_rom_enable)
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{
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return gb_rom_464_1[Addr];
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}
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else
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{
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return z80RAM[Addr - RAM_BASE];
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return ram[Addr];
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}
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}
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@ -13,7 +13,7 @@
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#define emu_Step(x) {cpc_Step();}
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#define emu_Input(x) {cpc_Input(x);}
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#define PALETTE_SIZE 27
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#define PALETTE_SIZE 32
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#define VID_FRAME_SKIP 0x0
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#define TFT_VBUFFER_YCROP 0
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#define TFT_VUBFFER_YCROP 0
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@ -11,53 +11,122 @@
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#include "pico/stdlib.h"
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#include "ga.h"
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extern struct Registers regs;
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struct GA_Config ga_config;
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/**
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* Some of these colours are duplicates, because select_pen_colour() uses the least significant
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* 5 bits to index into this array, so the duplicates prevent out-of-bounds read.
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*/
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struct RGB Palette[32] = {
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{50, 50, 50}, // White
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{50, 50, 50}, // White
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{0, 100, 50}, // Sea Green
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{100, 100, 50}, // Pastel Yellow
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{0, 0, 50}, // Blue
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{100, 0, 50}, // Purple
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{0, 50, 50}, // Cyan
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{100, 50, 50}, // Pink
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{100, 0, 50}, // Purple
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{100, 100, 50}, // Pastel Yellow
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{100, 100, 0}, // Bright Yellow
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{100, 100, 100}, // Bright White
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{100, 0, 0}, // Bright Red
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{100, 0, 100}, // Bright Magenta
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{100, 50, 0}, // Orange
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{100, 50, 100}, // Pastel Magenta
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{0, 0, 50}, // Blue
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{0, 100, 50}, // Sea Green
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{0, 100, 0}, // Bright Green
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{0, 100, 100}, // Bright Cyan
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{0, 0, 0}, // Black
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{0, 0, 100}, // Bright Blue
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{0, 50, 0}, // Green
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{0, 50, 100}, // Sky Blue
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{50, 0, 50}, // Magenta
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{50, 100, 50}, // Pastel Green
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{50, 100, 0}, // Lime
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{50, 100, 100}, // Pastel Cyan
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{50, 0, 0}, // Red
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{50, 0, 100}, // Mauve
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{50, 50, 0}, // Yellow
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{50, 50, 100} // Pastel Blue
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};
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void select_pen(register uint8_t value)
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{
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switch(value >> 4)
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{
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case 0b01:
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// Select border.
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ga_config.pen_selected = 0x10;
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break;
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case 0b00:
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// Bits 0-3 dictate the pen number
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ga_config.pen_selected = value & 15;
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break;
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}
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}
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void select_pen_colour(register uint8_t value)
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{
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// Bits 0-4 of "value" specify the hardware colour number from the hardware colour palette.
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// (i.e. which index into the Palette array of structs.)
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ga_config.pen_colors[ga_config.pen_selected] = Palette[value & 31];
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}
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void do_rom_bank_screen_cfg(register uint8_t value)
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{
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// Screen mode config, dictated by the least significant 2 bits.
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switch(value & 3)
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{
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case 0b00:
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// mode 0
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// ga_config.ScreenMode = 0;
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break;
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case 0b01:
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// mode 1
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ga_config.screen_mode = 1;
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break;
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case 0b10:
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// mode 2
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// ga_config.ScreenMode = 2;
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break;
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case 0b11:
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// mode 3, unused.
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break;
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}
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// ROM enable flags.
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if ((value >> 2) & 0b1) ga_config.lower_rom_enable = false; else ga_config.lower_rom_enable = true;
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if ((value >> 3) & 0b1) ga_config.upper_rom_enable = false; else ga_config.upper_rom_enable = true;
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// Interrupt generation control.
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if ((value >> 4) & 0b1) ga_config.interrupt_delay = true; else ga_config.interrupt_delay = false;
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}
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/** Bit 7 Bit 6 Function
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* --0-- --0-- Select pen
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* --0-- --1-- Select colour of the selected pen
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* --1-- --0-- Select screen mode, ROM configuration and interrupt control
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* --1-- --1-- RAM memory management (Note: This is not available on the CPC 464)
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* --1-- --1-- RAM memory management
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*/
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void write_ga(register uint16_t address, register uint8_t value)
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void write_ga(register uint8_t value)
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{
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switch(address >> 6)
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switch(value >> 6)
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{
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case 0x00:
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select_pen(address, value);
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case 0b00:
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select_pen(value);
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break;
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case 0x01:
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select_pen_colour(address, value);
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case 0b01:
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select_pen_colour(value);
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break;
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case 0x10:
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rom_banking(address, value);
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case 0b10:
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do_rom_bank_screen_cfg(value);
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break;
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case 0x11:
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// This would be RAM banking but we are not concerned with that yet.
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case 0b11:
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// This would be RAM banking but it is not available on the CPC464.
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break;
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}
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}
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// TODO delete address argument?
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void select_pen(register uint16_t address, register uint8_t value)
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{
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switch(value >> 4)
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{
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case 0x01:
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// Select border. TODO implement
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break;
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case 0x00:
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// Bits 0-3 dictate the pen number
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regs.PaletteIndex = value >> 4;
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}
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}
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void select_pen_colour(register uint16_t address, register uint8_t value)
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{
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// Bits 4 to 0 specify the hardware colour number from the hardware colour palette.
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regs.PaletteData[regs.PaletteIndex] = value & 0x000FFFFF;
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}
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void rom_banking(register uint16_t address, register uint8_t value)
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{
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return;
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}
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@ -1,43 +1,20 @@
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void write_ga(register uint16_t address, register uint8_t value);
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void select_pen(register uint16_t address, register uint8_t value);
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void select_pen_colour(register uint16_t address, register uint8_t value);
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void rom_banking(register uint16_t address, register uint8_t value);
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struct { unsigned char R,G,B;} Palette[27] = {
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{ 0, 0, 0}, // Black
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{ 0, 0, 128}, // Blue
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{ 0, 0, 255}, // Bright blue
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{ 128, 0, 0}, // Red
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{ 128, 0, 128}, // Magenta
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{ 128, 0, 255}, // Mauve
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{ 255, 0, 0}, // Bright Red
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{ 255, 0, 128}, // Purple
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{ 255, 0, 255}, // Bright Magenta
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{ 0, 128, 0}, // Green
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{ 0, 128, 128}, // Cyan
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{ 0, 128, 255}, // Sky Blue
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{ 128, 128, 0}, // Yellow
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{ 128, 128, 128}, // White
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{ 128, 128, 255}, // Pastel Blue
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{ 255, 128, 0}, // Orange
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{ 255, 128, 128}, // Pink
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{ 255, 128, 255}, // Pastel Magenta
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{ 0, 255, 0}, // Bright Green
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{ 0, 255, 128}, // Sea Green
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{ 0, 255, 255}, // Bright Cyan
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{ 128, 255, 0}, // Lime
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{ 128, 255, 128}, // Pastel Green
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{ 128, 255, 255}, // Pastel Cyan
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{ 255, 255, 0}, // Bright Yellow
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{ 255, 255, 128}, // Pastel Yellow
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{ 255, 255, 255}, // Bright White
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};
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extern void write_ga(register uint8_t value);
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void select_pen(register uint8_t value);
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void select_pen_colour(register uint8_t value);
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void rom_banking(register uint8_t value);
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#define PEN_NUMBER 4 // Mode 0 has 16 pens, mode 1 has 4 pens and mode 2 has 2 pens.
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struct Registers {
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uint8_t PaletteIndex = 0;
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uint8_t PaletteData[PEN_NUMBER];
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uint8_t ScreenModeAndROMConfig = 0;
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uint8_t RAMBanking = 0; // unused in CPC 464
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};
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struct RGB {
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uint8_t R, G, B;
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};
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struct GA_Config {
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uint8_t pen_selected = 0;
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RGB pen_colors[PEN_NUMBER];
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uint8_t screen_mode = 1; // 0 -> 160x200 16c; 1 -> 320x200 4c; 2 -> 640x200 2c; 3 (undocumented) -> 160x200 4c.
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bool upper_rom_enable = false;
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bool lower_rom_enable = false;
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bool interrupt_delay = false;
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uint8_t ram_banking = 0; // unused in CPC 464
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};
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@ -7,9 +7,8 @@ extern "C" {
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}
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#include "keyboard_osd.h"
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extern "C" {
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#include "cpc.h"
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}
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#include <stdio.h>
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#ifdef USE_VGA
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