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Chris Bosse 2022-11-17 23:17:53 -05:00
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2
pages/02.part-1/04.data-link-layer/docs.md
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@ -47,7 +47,7 @@ graph LR
<center><span style="font-weight:bold">Figure 7</span> Receive Payload to Contents</center>
[mermaid]
graph LR
payload[Payoad] -- Type 4 bits --> fec[ECC/FEC Decode] -- Type 1 bits--> contents[Data Link Layer Contents]
payload[Payload] -- Type 4 bits --> fec[ECC/FEC Decode] -- Type 1 bits--> contents[Data Link Layer Contents]
style contents fill:#ffffffff,stroke:#ffffffff,stroke-width:0px
style fec fill:#fff,stroke:#000,stroke-width:2px
style payload fill:#ffffffff,stroke:#ffffffff,stroke-width:0px

12
pages/02.part-1/05.application-layer/docs.md
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@ -185,14 +185,14 @@ $01_2$ | $x^{16} + x^{15} + x^{13} + x^4 + 1$ | 16 bits | 65,535
$10_2$ | $x^{24} + x^{23} + x^{22} + x^{17} + 1$ | 24 bits | 16,777,215
---
<center><span style="font-weight:bold">Figure 16</span> 8-bit LSFR taps</center>
![LSFR_8](LFSR_8.svg?classes=caption "8-bit LSFR taps")
<center><span style="font-weight:bold">Figure 16</span> 8-bit LFSR taps</center>
![LFSR_8](LFSR_8.svg?classes=caption "8-bit LFSR taps")
---
<center><span style="font-weight:bold">Figure 17</span> 16-bit LSFR taps</center>
![LSFR_16](LFSR_16.svg?classes=caption "16-bit LSFR taps")
<center><span style="font-weight:bold">Figure 17</span> 16-bit LFSR taps</center>
![LFSR_16](LFSR_16.svg?classes=caption "16-bit LFSR taps")
---
<center><span style="font-weight:bold">Figure 18</span> 24-bit LSFR taps</center>
![LSFR_24](LFSR_24.svg?classes=caption "24-bit LSFR taps")
<center><span style="font-weight:bold">Figure 18</span> 24-bit LFSR taps</center>
![LFSR_24](LFSR_24.svg?classes=caption "24-bit LFSR taps")
##### Advanced Encryption Standard (AES)

4
pages/04.appendix/07.bert-details/docs.md
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@ -80,10 +80,10 @@ the overall bit error rate.
...
static constexpr uint8_t LOCK_COUNT = 18; // 18 consecutive good bits.
...
// PRBS Syncronizer. Returns 0 if the bit matches the PRBS, otherwise 1.
// PRBS Synchronizer. Returns 0 if the bit matches the PRBS, otherwise 1.
// When synchronizing the LFSR used in the PRBS, a single bad input bit
// will result in 3 error bits being emitted, one for each tap in the LFSR.
bool syncronize(bool bit)
bool synchronize(bool bit)
{
bool result = (bit ^ (state >> TAP_1) ^ (state >> TAP_2)) & 1;
state = ((state << 1) | bit) & MASK;