kopia lustrzana https://github.com/RobertGawron/IonizationChamber
383 wiersze
16 KiB
C
383 wiersze
16 KiB
C
/**
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******************************************************************************
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* @file stm8s_clk.h
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* @author MCD Application Team
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* @version V2.2.0
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* @date 30-September-2014
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* @brief This file contains all functions prototype and macros for the CLK peripheral.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM8S_CLK_H
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#define __STM8S_CLK_H
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/* Includes ------------------------------------------------------------------*/
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/* Contains the description of all STM8 hardware registers */
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#include "stm8s.h"
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/* Exported types ------------------------------------------------------------*/
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/** @addtogroup CLK_Exported_Types
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* @{
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*/
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/**
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* @brief Switch Mode Auto, Manual.
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*/
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typedef enum {
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CLK_SWITCHMODE_MANUAL = (uint8_t)0x00, /*!< Enable the manual clock switching mode */
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CLK_SWITCHMODE_AUTO = (uint8_t)0x01 /*!< Enable the automatic clock switching mode */
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} CLK_SwitchMode_TypeDef;
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/**
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* @brief Current Clock State.
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*/
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typedef enum {
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CLK_CURRENTCLOCKSTATE_DISABLE = (uint8_t)0x00, /*!< Current clock disable */
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CLK_CURRENTCLOCKSTATE_ENABLE = (uint8_t)0x01 /*!< Current clock enable */
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} CLK_CurrentClockState_TypeDef;
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/**
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* @brief Clock security system configuration.
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*/
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typedef enum {
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CLK_CSSCONFIG_ENABLEWITHIT = (uint8_t)0x05, /*!< Enable CSS with detection interrupt */
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CLK_CSSCONFIG_ENABLE = (uint8_t)0x01, /*!< Enable CSS without detection interrupt */
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CLK_CSSCONFIG_DISABLE = (uint8_t)0x00 /*!< Leave CSS desactivated (to be used in CLK_Init() function) */
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} CLK_CSSConfig_TypeDef;
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/**
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* @brief CLK Clock Source.
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*/
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typedef enum {
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CLK_SOURCE_HSI = (uint8_t)0xE1, /*!< Clock Source HSI. */
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CLK_SOURCE_LSI = (uint8_t)0xD2, /*!< Clock Source LSI. */
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CLK_SOURCE_HSE = (uint8_t)0xB4 /*!< Clock Source HSE. */
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} CLK_Source_TypeDef;
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/**
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* @brief CLK HSI Calibration Value.
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*/
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typedef enum {
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CLK_HSITRIMVALUE_0 = (uint8_t)0x00, /*!< HSI Calibration Value 0 */
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CLK_HSITRIMVALUE_1 = (uint8_t)0x01, /*!< HSI Calibration Value 1 */
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CLK_HSITRIMVALUE_2 = (uint8_t)0x02, /*!< HSI Calibration Value 2 */
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CLK_HSITRIMVALUE_3 = (uint8_t)0x03, /*!< HSI Calibration Value 3 */
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CLK_HSITRIMVALUE_4 = (uint8_t)0x04, /*!< HSI Calibration Value 4 */
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CLK_HSITRIMVALUE_5 = (uint8_t)0x05, /*!< HSI Calibration Value 5 */
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CLK_HSITRIMVALUE_6 = (uint8_t)0x06, /*!< HSI Calibration Value 6 */
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CLK_HSITRIMVALUE_7 = (uint8_t)0x07 /*!< HSI Calibration Value 7 */
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} CLK_HSITrimValue_TypeDef;
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/**
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* @brief CLK Clock Output
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*/
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typedef enum {
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CLK_OUTPUT_HSI = (uint8_t)0x00, /*!< Clock Output HSI */
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CLK_OUTPUT_LSI = (uint8_t)0x02, /*!< Clock Output LSI */
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CLK_OUTPUT_HSE = (uint8_t)0x04, /*!< Clock Output HSE */
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CLK_OUTPUT_CPU = (uint8_t)0x08, /*!< Clock Output CPU */
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CLK_OUTPUT_CPUDIV2 = (uint8_t)0x0A, /*!< Clock Output CPU/2 */
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CLK_OUTPUT_CPUDIV4 = (uint8_t)0x0C, /*!< Clock Output CPU/4 */
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CLK_OUTPUT_CPUDIV8 = (uint8_t)0x0E, /*!< Clock Output CPU/8 */
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CLK_OUTPUT_CPUDIV16 = (uint8_t)0x10, /*!< Clock Output CPU/16 */
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CLK_OUTPUT_CPUDIV32 = (uint8_t)0x12, /*!< Clock Output CPU/32 */
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CLK_OUTPUT_CPUDIV64 = (uint8_t)0x14, /*!< Clock Output CPU/64 */
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CLK_OUTPUT_HSIRC = (uint8_t)0x16, /*!< Clock Output HSI RC */
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CLK_OUTPUT_MASTER = (uint8_t)0x18, /*!< Clock Output Master */
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CLK_OUTPUT_OTHERS = (uint8_t)0x1A /*!< Clock Output OTHER */
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} CLK_Output_TypeDef;
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/**
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* @brief CLK Enable peripheral
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*/
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/* Elements values convention: 0xXY
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X = choice between the peripheral registers
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X = 0 : PCKENR1
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X = 1 : PCKENR2
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Y = Peripheral position in the register
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*/
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typedef enum {
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CLK_PERIPHERAL_I2C = (uint8_t)0x00, /*!< Peripheral Clock Enable 1, I2C */
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CLK_PERIPHERAL_SPI = (uint8_t)0x01, /*!< Peripheral Clock Enable 1, SPI */
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#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax)
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CLK_PERIPHERAL_UART1 = (uint8_t)0x02, /*!< Peripheral Clock Enable 1, UART1 */
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#else
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CLK_PERIPHERAL_UART1 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART1 */
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#endif
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CLK_PERIPHERAL_UART2 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART2 */
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CLK_PERIPHERAL_UART3 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART3 */
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CLK_PERIPHERAL_TIMER6 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer6 */
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CLK_PERIPHERAL_TIMER4 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer4 */
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CLK_PERIPHERAL_TIMER5 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer5 */
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CLK_PERIPHERAL_TIMER2 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer2 */
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CLK_PERIPHERAL_TIMER3 = (uint8_t)0x06, /*!< Peripheral Clock Enable 1, Timer3 */
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CLK_PERIPHERAL_TIMER1 = (uint8_t)0x07, /*!< Peripheral Clock Enable 1, Timer1 */
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CLK_PERIPHERAL_AWU = (uint8_t)0x12, /*!< Peripheral Clock Enable 2, AWU */
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CLK_PERIPHERAL_ADC = (uint8_t)0x13, /*!< Peripheral Clock Enable 2, ADC */
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CLK_PERIPHERAL_CAN = (uint8_t)0x17 /*!< Peripheral Clock Enable 2, CAN */
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} CLK_Peripheral_TypeDef;
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/**
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* @brief CLK Flags.
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*/
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/* Elements values convention: 0xXZZ
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X = choice between the flags registers
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X = 1 : ICKR
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X = 2 : ECKR
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X = 3 : SWCR
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X = 4 : CSSR
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X = 5 : CCOR
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ZZ = flag mask in the register (same as map file)
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*/
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typedef enum {
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CLK_FLAG_LSIRDY = (uint16_t)0x0110, /*!< Low speed internal oscillator ready Flag */
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CLK_FLAG_HSIRDY = (uint16_t)0x0102, /*!< High speed internal oscillator ready Flag */
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CLK_FLAG_HSERDY = (uint16_t)0x0202, /*!< High speed external oscillator ready Flag */
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CLK_FLAG_SWIF = (uint16_t)0x0308, /*!< Clock switch interrupt Flag */
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CLK_FLAG_SWBSY = (uint16_t)0x0301, /*!< Switch busy Flag */
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CLK_FLAG_CSSD = (uint16_t)0x0408, /*!< Clock security system detection Flag */
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CLK_FLAG_AUX = (uint16_t)0x0402, /*!< Auxiliary oscillator connected to master clock */
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CLK_FLAG_CCOBSY = (uint16_t)0x0504, /*!< Configurable clock output busy */
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CLK_FLAG_CCORDY = (uint16_t)0x0502 /*!< Configurable clock output ready */
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}CLK_Flag_TypeDef;
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/**
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* @brief CLK interrupt configuration and Flags cleared by software.
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*/
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typedef enum {
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CLK_IT_CSSD = (uint8_t)0x0C, /*!< Clock security system detection Flag */
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CLK_IT_SWIF = (uint8_t)0x1C /*!< Clock switch interrupt Flag */
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}CLK_IT_TypeDef;
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/**
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* @brief CLK Clock Divisor.
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*/
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/* Warning:
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0xxxxxx = HSI divider
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1xxxxxx = CPU divider
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Other bits correspond to the divider's bits mapping
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*/
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typedef enum {
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CLK_PRESCALER_HSIDIV1 = (uint8_t)0x00, /*!< High speed internal clock prescaler: 1 */
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CLK_PRESCALER_HSIDIV2 = (uint8_t)0x08, /*!< High speed internal clock prescaler: 2 */
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CLK_PRESCALER_HSIDIV4 = (uint8_t)0x10, /*!< High speed internal clock prescaler: 4 */
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CLK_PRESCALER_HSIDIV8 = (uint8_t)0x18, /*!< High speed internal clock prescaler: 8 */
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CLK_PRESCALER_CPUDIV1 = (uint8_t)0x80, /*!< CPU clock division factors 1 */
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CLK_PRESCALER_CPUDIV2 = (uint8_t)0x81, /*!< CPU clock division factors 2 */
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CLK_PRESCALER_CPUDIV4 = (uint8_t)0x82, /*!< CPU clock division factors 4 */
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CLK_PRESCALER_CPUDIV8 = (uint8_t)0x83, /*!< CPU clock division factors 8 */
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CLK_PRESCALER_CPUDIV16 = (uint8_t)0x84, /*!< CPU clock division factors 16 */
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CLK_PRESCALER_CPUDIV32 = (uint8_t)0x85, /*!< CPU clock division factors 32 */
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CLK_PRESCALER_CPUDIV64 = (uint8_t)0x86, /*!< CPU clock division factors 64 */
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CLK_PRESCALER_CPUDIV128 = (uint8_t)0x87 /*!< CPU clock division factors 128 */
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} CLK_Prescaler_TypeDef;
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/**
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* @brief SWIM Clock divider.
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*/
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typedef enum {
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CLK_SWIMDIVIDER_2 = (uint8_t)0x00, /*!< SWIM clock is divided by 2 */
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CLK_SWIMDIVIDER_OTHER = (uint8_t)0x01 /*!< SWIM clock is not divided by 2 */
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}CLK_SWIMDivider_TypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @addtogroup CLK_Exported_Constants
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* @{
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*/
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#define CLK_TIMEOUT ((uint16_t)0xFFFF) /*!< Max Timeout for the clock switch operation. */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @addtogroup CLK_Private_Macros
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* @{
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*/
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/**
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* @brief Macros used by the assert function in order to check the different functions parameters.
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*/
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/**
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* @brief Macros used by the assert function in order to check the clock switching modes.
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*/
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#define IS_CLK_SWITCHMODE_OK(MODE) (((MODE) == CLK_SWITCHMODE_MANUAL) || ((MODE) == CLK_SWITCHMODE_AUTO))
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/**
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* @brief Macros used by the assert function in order to check the current clock state.
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*/
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#define IS_CLK_CURRENTCLOCKSTATE_OK(STATE) (((STATE) == CLK_CURRENTCLOCKSTATE_DISABLE) ||\
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((STATE) == CLK_CURRENTCLOCKSTATE_ENABLE))
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/**
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* @brief Macros used by the assert function in order to check the CSS configuration.
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*/
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#define IS_CLK_CSSCONFIG_OK(CSSVALUE) (((CSSVALUE) == CLK_CSSCONFIG_ENABLEWITHIT) ||\
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((CSSVALUE) == CLK_CSSCONFIG_ENABLE) ||\
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((CSSVALUE) == CLK_CSSCONFIG_DISABLE))
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/**
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* @brief Macros used by the assert function in order to check the different clock sources.
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*/
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#define IS_CLK_SOURCE_OK(SOURCE) (((SOURCE) == CLK_SOURCE_HSI) ||\
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((SOURCE) == CLK_SOURCE_LSI) ||\
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((SOURCE) == CLK_SOURCE_HSE))
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/**
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* @brief Macros used by the assert function in order to check the different HSI trimming values.
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*/
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#define IS_CLK_HSITRIMVALUE_OK(TRIMVALUE) (((TRIMVALUE) == CLK_HSITRIMVALUE_0) ||\
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((TRIMVALUE) == CLK_HSITRIMVALUE_1) ||\
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((TRIMVALUE) == CLK_HSITRIMVALUE_2) ||\
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((TRIMVALUE) == CLK_HSITRIMVALUE_3) ||\
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((TRIMVALUE) == CLK_HSITRIMVALUE_4) ||\
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((TRIMVALUE) == CLK_HSITRIMVALUE_5) ||\
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((TRIMVALUE) == CLK_HSITRIMVALUE_6) ||\
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((TRIMVALUE) == CLK_HSITRIMVALUE_7))
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/**
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* @brief Macros used by the assert function in order to check the different clocks to output.
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*/
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#define IS_CLK_OUTPUT_OK(OUTPUT) (((OUTPUT) == CLK_OUTPUT_HSI) ||\
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((OUTPUT) == CLK_OUTPUT_HSE) ||\
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((OUTPUT) == CLK_OUTPUT_LSI) ||\
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((OUTPUT) == CLK_OUTPUT_CPU) ||\
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((OUTPUT) == CLK_OUTPUT_CPUDIV2) ||\
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((OUTPUT) == CLK_OUTPUT_CPUDIV4) ||\
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((OUTPUT) == CLK_OUTPUT_CPUDIV8) ||\
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((OUTPUT) == CLK_OUTPUT_CPUDIV16) ||\
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((OUTPUT) == CLK_OUTPUT_CPUDIV32) ||\
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((OUTPUT) == CLK_OUTPUT_CPUDIV64) ||\
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((OUTPUT) == CLK_OUTPUT_HSIRC) ||\
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((OUTPUT) == CLK_OUTPUT_MASTER) ||\
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((OUTPUT) == CLK_OUTPUT_OTHERS))
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/**
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* @brief Macros used by the assert function in order to check the different peripheral's clock.
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*/
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#define IS_CLK_PERIPHERAL_OK(PERIPHERAL) (((PERIPHERAL) == CLK_PERIPHERAL_I2C) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_SPI) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_UART3) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_UART2) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_UART1) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_TIMER4) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_TIMER2) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_TIMER5) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_TIMER6) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_TIMER3) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_TIMER1) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_CAN) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_ADC) ||\
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((PERIPHERAL) == CLK_PERIPHERAL_AWU))
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/**
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* @brief Macros used by the assert function in order to check the different clock flags.
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*/
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#define IS_CLK_FLAG_OK(FLAG) (((FLAG) == CLK_FLAG_LSIRDY) ||\
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((FLAG) == CLK_FLAG_HSIRDY) ||\
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((FLAG) == CLK_FLAG_HSERDY) ||\
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((FLAG) == CLK_FLAG_SWIF) ||\
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((FLAG) == CLK_FLAG_SWBSY) ||\
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((FLAG) == CLK_FLAG_CSSD) ||\
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((FLAG) == CLK_FLAG_AUX) ||\
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((FLAG) == CLK_FLAG_CCOBSY) ||\
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((FLAG) == CLK_FLAG_CCORDY))
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/**
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* @brief Macros used by the assert function in order to check the different clock IT pending bits.
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*/
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#define IS_CLK_IT_OK(IT) (((IT) == CLK_IT_CSSD) || ((IT) == CLK_IT_SWIF))
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/**
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* @brief Macros used by the assert function in order to check the different HSI prescaler values.
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*/
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#define IS_CLK_HSIPRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\
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((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\
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((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\
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((PRESCALER) == CLK_PRESCALER_HSIDIV8))
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/**
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* @brief Macros used by the assert function in order to check the different clock prescaler values.
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*/
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#define IS_CLK_PRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\
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((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\
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((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\
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((PRESCALER) == CLK_PRESCALER_HSIDIV8) ||\
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((PRESCALER) == CLK_PRESCALER_CPUDIV1) ||\
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((PRESCALER) == CLK_PRESCALER_CPUDIV2) ||\
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((PRESCALER) == CLK_PRESCALER_CPUDIV4) ||\
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((PRESCALER) == CLK_PRESCALER_CPUDIV8) ||\
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((PRESCALER) == CLK_PRESCALER_CPUDIV16) ||\
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((PRESCALER) == CLK_PRESCALER_CPUDIV32) ||\
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((PRESCALER) == CLK_PRESCALER_CPUDIV64) ||\
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((PRESCALER) == CLK_PRESCALER_CPUDIV128))
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/**
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* @brief Macros used by the assert function in order to check the different SWIM dividers values.
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*/
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#define IS_CLK_SWIMDIVIDER_OK(SWIMDIVIDER) (((SWIMDIVIDER) == CLK_SWIMDIVIDER_2) || ((SWIMDIVIDER) == CLK_SWIMDIVIDER_OTHER))
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/**
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* @}
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*/
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/** @addtogroup CLK_Exported_functions
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* @{
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*/
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void CLK_DeInit(void);
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void CLK_HSECmd(FunctionalState NewState);
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void CLK_HSICmd(FunctionalState NewState);
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void CLK_LSICmd(FunctionalState NewState);
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void CLK_CCOCmd(FunctionalState NewState);
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void CLK_ClockSwitchCmd(FunctionalState NewState);
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void CLK_FastHaltWakeUpCmd(FunctionalState NewState);
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void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState);
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void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState);
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ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState);
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void CLK_HSIPrescalerConfig(CLK_Prescaler_TypeDef HSIPrescaler);
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void CLK_CCOConfig(CLK_Output_TypeDef CLK_CCO);
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void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState);
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void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef CLK_Prescaler);
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void CLK_SWIMConfig(CLK_SWIMDivider_TypeDef CLK_SWIMDivider);
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void CLK_ClockSecuritySystemEnable(void);
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void CLK_SYSCLKEmergencyClear(void);
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void CLK_AdjustHSICalibrationValue(CLK_HSITrimValue_TypeDef CLK_HSICalibrationValue);
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uint32_t CLK_GetClockFreq(void);
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CLK_Source_TypeDef CLK_GetSYSCLKSource(void);
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FlagStatus CLK_GetFlagStatus(CLK_Flag_TypeDef CLK_FLAG);
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ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT);
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void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT);
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/**
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* @}
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*/
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#endif /* __STM8S_CLK_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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