From 9c09dc10f44ba285c3c0c561005ac35b34f4b967 Mon Sep 17 00:00:00 2001 From: RobertGawron Date: Sat, 6 Jul 2019 11:50:52 +0100 Subject: [PATCH] minor cleanup --- software/Firmware/Inc/MCP3425A0T.h | 6 +- .../STM8S_StdPeriph_Driver/src/stm8s_awu.c | 6 +- .../STM8S_StdPeriph_Driver/src/stm8s_i2c.c | 815 ------------------ .../STM8S_StdPeriph_Driver/src/stm8s_tim1.c | 161 +++- .../STM8S_StdPeriph_Driver/src/stm8s_uart1.c | 39 +- software/Firmware/Src/ClockConfigurator.c | 19 +- software/Firmware/Src/MCP3425A0T.c | 13 +- software/Firmware/Src/main.c | 5 +- software/Firmware/makefile | 40 +- 9 files changed, 248 insertions(+), 856 deletions(-) mode change 100644 => 100755 software/Firmware/Inc/MCP3425A0T.h mode change 100644 => 100755 software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_i2c.c mode change 100644 => 100755 software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_tim1.c mode change 100644 => 100755 software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_uart1.c mode change 100644 => 100755 software/Firmware/Src/MCP3425A0T.c diff --git a/software/Firmware/Inc/MCP3425A0T.h b/software/Firmware/Inc/MCP3425A0T.h old mode 100644 new mode 100755 index 5142839..71a65a0 --- a/software/Firmware/Inc/MCP3425A0T.h +++ b/software/Firmware/Inc/MCP3425A0T.h @@ -10,17 +10,15 @@ #include "CommonDataTypes.h" +#define MCP3425A0TMeasurementData_t int typedef struct MCP3425A0TConfig_t { int pinId; } MCP3425A0TConfig_t; -#define MCP3425A0TMeasurementData_t int - -//bool MCP3425A0T_Init(MCP3425A0TConfig_t *config); -bool MCP3425A0T_Init(MCP3425A0TConfig_t *config); +void MCP3425A0T_Init(MCP3425A0TConfig_t *config); bool MCP3425A0T_GeMeasurementData(/*MCP3425A0TConfig_t *config, MCP3425A0TMeasurementData_t *measurementData*/); diff --git a/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_awu.c b/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_awu.c index d1b0b45..fb4d107 100755 --- a/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_awu.c +++ b/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_awu.c @@ -160,12 +160,13 @@ void AWU_LSICalibrationConfig(uint32_t LSIFreqHz) AWU->APR = (uint8_t)(A - 1U); } } -#if 0 + /** * @brief Configures AWU in Idle mode to reduce power consumption. * @param None * @retval None */ +#if 0 void AWU_IdleModeEnable(void) { /* Disable AWU peripheral */ @@ -174,6 +175,7 @@ void AWU_IdleModeEnable(void) /* No AWU timebase */ AWU->TBR = (uint8_t)(~AWU_TBR_AWUTB); } +#endif /** * @brief Returns status of the AWU peripheral flag. @@ -195,5 +197,5 @@ FlagStatus AWU_GetFlagStatus(void) * @} */ -#endif + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_i2c.c b/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_i2c.c old mode 100644 new mode 100755 index 07c8d05..fd81d39 --- a/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_i2c.c +++ b/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_i2c.c @@ -76,818 +76,3 @@ void I2C_DeInit(void) I2C->CCRH = I2C_CCRH_RESET_VALUE; I2C->TRISER = I2C_TRISER_RESET_VALUE; } - -/** - * @brief Initializes the I2C according to the specified parameters in standard - * or fast mode. - * @param OutputClockFrequencyHz : Specifies the output clock frequency in Hz. - * @param OwnAddress : Specifies the own address. - * @param I2C_DutyCycle : Specifies the duty cycle to apply in fast mode. - * This parameter can be any of the @ref I2C_DutyCycle_TypeDef enumeration. - * @note This parameter don't have impact when the OutputClockFrequency lower - * than 100KHz. - * @param Ack : Specifies the acknowledge mode to apply. - * This parameter can be any of the @ref I2C_Ack_TypeDef enumeration. - * @param AddMode : Specifies the acknowledge address to apply. - * This parameter can be any of the @ref I2C_AddMode_TypeDef enumeration. - * @param InputClockFrequencyMHz : Specifies the input clock frequency in MHz. - * @retval None - */ -void I2C_Init(uint32_t OutputClockFrequencyHz, uint16_t OwnAddress, - I2C_DutyCycle_TypeDef I2C_DutyCycle, I2C_Ack_TypeDef Ack, - I2C_AddMode_TypeDef AddMode, uint8_t InputClockFrequencyMHz ) -{ - uint16_t result = 0x0004; - uint16_t tmpval = 0; - uint8_t tmpccrh = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ACK_OK(Ack)); - assert_param(IS_I2C_ADDMODE_OK(AddMode)); - assert_param(IS_I2C_OWN_ADDRESS_OK(OwnAddress)); - assert_param(IS_I2C_DUTYCYCLE_OK(I2C_DutyCycle)); - assert_param(IS_I2C_INPUT_CLOCK_FREQ_OK(InputClockFrequencyMHz)); - assert_param(IS_I2C_OUTPUT_CLOCK_FREQ_OK(OutputClockFrequencyHz)); - - - /*------------------------- I2C FREQ Configuration ------------------------*/ - /* Clear frequency bits */ - I2C->FREQR &= (uint8_t)(~I2C_FREQR_FREQ); - /* Write new value */ - I2C->FREQR |= InputClockFrequencyMHz; - - /*--------------------------- I2C CCR Configuration ------------------------*/ - /* Disable I2C to configure TRISER */ - I2C->CR1 &= (uint8_t)(~I2C_CR1_PE); - - /* Clear CCRH & CCRL */ - I2C->CCRH &= (uint8_t)(~(I2C_CCRH_FS | I2C_CCRH_DUTY | I2C_CCRH_CCR)); - I2C->CCRL &= (uint8_t)(~I2C_CCRL_CCR); - - /* Detect Fast or Standard mode depending on the Output clock frequency selected */ - if (OutputClockFrequencyHz > I2C_MAX_STANDARD_FREQ) /* FAST MODE */ - { - /* Set F/S bit for fast mode */ - tmpccrh = I2C_CCRH_FS; - - if (I2C_DutyCycle == I2C_DUTYCYCLE_2) - { - /* Fast mode speed calculate: Tlow/Thigh = 2 */ - result = (uint16_t) ((InputClockFrequencyMHz * 1000000) / (OutputClockFrequencyHz * 3)); - } - else /* I2C_DUTYCYCLE_16_9 */ - { - /* Fast mode speed calculate: Tlow/Thigh = 16/9 */ - result = (uint16_t) ((InputClockFrequencyMHz * 1000000) / (OutputClockFrequencyHz * 25)); - /* Set DUTY bit */ - tmpccrh |= I2C_CCRH_DUTY; - } - - /* Verify and correct CCR value if below minimum value */ - if (result < (uint16_t)0x01) - { - /* Set the minimum allowed value */ - result = (uint16_t)0x0001; - } - - /* Set Maximum Rise Time: 300ns max in Fast Mode - = [300ns/(1/InputClockFrequencyMHz.10e6)]+1 - = [(InputClockFrequencyMHz * 3)/10]+1 */ - tmpval = ((InputClockFrequencyMHz * 3) / 10) + 1; - I2C->TRISER = (uint8_t)tmpval; - - } - else /* STANDARD MODE */ - { - - /* Calculate standard mode speed */ - result = (uint16_t)((InputClockFrequencyMHz * 1000000) / (OutputClockFrequencyHz << (uint8_t)1)); - - /* Verify and correct CCR value if below minimum value */ - if (result < (uint16_t)0x0004) - { - /* Set the minimum allowed value */ - result = (uint16_t)0x0004; - } - - /* Set Maximum Rise Time: 1000ns max in Standard Mode - = [1000ns/(1/InputClockFrequencyMHz.10e6)]+1 - = InputClockFrequencyMHz+1 */ - I2C->TRISER = (uint8_t)(InputClockFrequencyMHz + (uint8_t)1); - - } - - /* Write CCR with new calculated value */ - I2C->CCRL = (uint8_t)result; - I2C->CCRH = (uint8_t)((uint8_t)((uint8_t)(result >> 8) & I2C_CCRH_CCR) | tmpccrh); - - /* Enable I2C */ - I2C->CR1 |= I2C_CR1_PE; - - /* Configure I2C acknowledgement */ - I2C_AcknowledgeConfig(Ack); - - /*--------------------------- I2C OAR Configuration ------------------------*/ - I2C->OARL = (uint8_t)(OwnAddress); - I2C->OARH = (uint8_t)((uint8_t)(AddMode | I2C_OARH_ADDCONF) | - (uint8_t)((OwnAddress & (uint16_t)0x0300) >> (uint8_t)7)); -} - -/** - * @brief Enables or disables the I2C peripheral. - * @param NewState : Indicate the new I2C peripheral state. - * This parameter can be any of the @ref FunctionalState enumeration. - * @retval None - */ -void I2C_Cmd(FunctionalState NewState) -{ - /* Check function parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Enable I2C peripheral */ - I2C->CR1 |= I2C_CR1_PE; - } - else /* NewState == DISABLE */ - { - /* Disable I2C peripheral */ - I2C->CR1 &= (uint8_t)(~I2C_CR1_PE); - } -} - -/** - * @brief Enables or disables the I2C General Call feature. - * @param NewState : State of the General Call feature. - * This parameter can be any of the @ref FunctionalState enumeration. - * @retval None - */ -void I2C_GeneralCallCmd(FunctionalState NewState) -{ - /* Check function parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Enable General Call */ - I2C->CR1 |= I2C_CR1_ENGC; - } - else /* NewState == DISABLE */ - { - /* Disable General Call */ - I2C->CR1 &= (uint8_t)(~I2C_CR1_ENGC); - } -} - -/** - * @brief Generates I2C communication START condition. - * @note CCR must be programmed, i.e. I2C_Init function must have been called - * with a valid I2C_ClockSpeed - * @param NewState : Enable or disable the start condition. - * This parameter can be any of the @ref FunctionalState enumeration. - * @retval None - */ -void I2C_GenerateSTART(FunctionalState NewState) -{ - /* Check function parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Generate a START condition */ - I2C->CR2 |= I2C_CR2_START; - } - else /* NewState == DISABLE */ - { - /* Disable the START condition generation */ - I2C->CR2 &= (uint8_t)(~I2C_CR2_START); - } -} - -/** - * @brief Generates I2C communication STOP condition. - * @param NewState : Enable or disable the stop condition. - * This parameter can be any of the @ref FunctionalState enumeration. - * @retval None - */ -void I2C_GenerateSTOP(FunctionalState NewState) -{ - /* Check function parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Generate a STOP condition */ - I2C->CR2 |= I2C_CR2_STOP; - } - else /* NewState == DISABLE */ - { - /* Disable the STOP condition generation */ - I2C->CR2 &= (uint8_t)(~I2C_CR2_STOP); - } -} - -/** - * @brief Enables or disables I2C software reset. - * @param NewState : Specifies the new state of the I2C software reset. - * This parameter can be any of the @ref FunctionalState enumeration. - * @retval None - */ -void I2C_SoftwareResetCmd(FunctionalState NewState) -{ - /* Check function parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Peripheral under reset */ - I2C->CR2 |= I2C_CR2_SWRST; - } - else /* NewState == DISABLE */ - { - /* Peripheral not under reset */ - I2C->CR2 &= (uint8_t)(~I2C_CR2_SWRST); - } -} - -/** - * @brief Enables or disables the I2C clock stretching. - * @param NewState : Specifies the new state of the I2C Clock stretching. - * This parameter can be any of the @ref FunctionalState enumeration. - * @retval None - */ - -void I2C_StretchClockCmd(FunctionalState NewState) -{ - /* Check function parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Clock Stretching Enable */ - I2C->CR1 &= (uint8_t)(~I2C_CR1_NOSTRETCH); - - } - else /* NewState == DISABLE */ - { - /* Clock Stretching Disable (Slave mode) */ - I2C->CR1 |= I2C_CR1_NOSTRETCH; - } -} - -/** - * @brief Enable or Disable the I2C acknowledge and position acknowledge feature. - * @note This function must be called before data reception start - * @param Ack : Specifies the acknowledge mode to apply. - * This parameter can be any of the @ref I2C_Ack_TypeDef enumeration. - * @retval None - */ -void I2C_AcknowledgeConfig(I2C_Ack_TypeDef Ack) -{ - /* Check function parameters */ - assert_param(IS_I2C_ACK_OK(Ack)); - - if (Ack == I2C_ACK_NONE) - { - /* Disable the acknowledgement */ - I2C->CR2 &= (uint8_t)(~I2C_CR2_ACK); - } - else - { - /* Enable the acknowledgement */ - I2C->CR2 |= I2C_CR2_ACK; - - if (Ack == I2C_ACK_CURR) - { - /* Configure (N)ACK on current byte */ - I2C->CR2 &= (uint8_t)(~I2C_CR2_POS); - } - else - { - /* Configure (N)ACK on next byte */ - I2C->CR2 |= I2C_CR2_POS; - } - } -} - -/** - * @brief Enables or disables the specified I2C interrupt. - * @param ITName : Name of the interrupt to enable or disable. - * This parameter can be any of the @ref I2C_IT_TypeDef enumeration. - * @param NewState : State of the interrupt to apply. - * This parameter can be any of the @ref FunctionalState enumeration. - * @retval None - */ -void I2C_ITConfig(I2C_IT_TypeDef I2C_IT, FunctionalState NewState) -{ - /* Check functions parameters */ - assert_param(IS_I2C_INTERRUPT_OK(I2C_IT)); - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected I2C interrupts */ - I2C->ITR |= (uint8_t)I2C_IT; - } - else /* NewState == DISABLE */ - { - /* Disable the selected I2C interrupts */ - I2C->ITR &= (uint8_t)(~(uint8_t)I2C_IT); - } -} - -/** - * @brief Selects the specified I2C fast mode duty cycle. - * @param I2C_DutyCycle : Specifies the duty cycle to apply. - * This parameter can be any of the @ref I2C_DutyCycle_TypeDef enumeration. - * @retval None - */ -void I2C_FastModeDutyCycleConfig(I2C_DutyCycle_TypeDef I2C_DutyCycle) -{ - /* Check function parameters */ - assert_param(IS_I2C_DUTYCYCLE_OK(I2C_DutyCycle)); - - if (I2C_DutyCycle == I2C_DUTYCYCLE_16_9) - { - /* I2C fast mode Tlow/Thigh = 16/9 */ - I2C->CCRH |= I2C_CCRH_DUTY; - } - else /* I2C_DUTYCYCLE_2 */ - { - /* I2C fast mode Tlow/Thigh = 2 */ - I2C->CCRH &= (uint8_t)(~I2C_CCRH_DUTY); - } -} - -/** - * @brief Returns the most recent received data. - * @param None - * @retval uint8_t : The value of the received byte data. - */ -uint8_t I2C_ReceiveData(void) -{ - /* Return the data present in the DR register */ - return ((uint8_t)I2C->DR); -} - -/** - * @brief Transmits the 7-bit address (to select the) slave device. - * @param Address : Specifies the slave address which will be transmitted. - * @param Direction : Specifies whether the I2C device will be a Transmitter or a Receiver. - * This parameter can be any of the @ref I2C_Direction_TypeDef enumeration. - * @retval None - */ -void I2C_Send7bitAddress(uint8_t Address, I2C_Direction_TypeDef Direction) -{ - /* Check function parameters */ - assert_param(IS_I2C_ADDRESS_OK(Address)); - assert_param(IS_I2C_DIRECTION_OK(Direction)); - - /* Clear bit0 (direction) just in case */ - Address &= (uint8_t)0xFE; - - /* Send the Address + Direction */ - I2C->DR = (uint8_t)(Address | (uint8_t)Direction); -} - -/** - * @brief Send a byte by writing in the DR register. - * @param Data : Byte to be sent. - * @retval None - */ -void I2C_SendData(uint8_t Data) -{ - /* Write in the DR register the data to be sent */ - I2C->DR = Data; -} - -/** - * @brief - **************************************************************************************** - * - * I2C State Monitoring Functions - * - **************************************************************************************** - * This I2C driver provides three different ways for I2C state monitoring - * depending on the application requirements and constraints: - * - * - * 1) Basic state monitoring: - * Using I2C_CheckEvent() function: - * It compares the status registers (SR1, SR2 and SR3) content to a given event - * (can be the combination of one or more flags). - * It returns SUCCESS if the current status includes the given flags - * and returns ERROR if one or more flags are missing in the current status. - * - When to use: - * - This function is suitable for most applications as well as for startup - * activity since the events are fully described in the product reference manual - * (RM0016). - * - It is also suitable for users who need to define their own events. - * - Limitations: - * - If an error occurs (ie. error flags are set besides to the monitored flags), - * the I2C_CheckEvent() function may return SUCCESS despite the communication - * hold or corrupted real state. - * In this case, it is advised to use error interrupts to monitor the error - * events and handle them in the interrupt IRQ handler. - * - * @note - * For error management, it is advised to use the following functions: - * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). - * - I2C_IRQHandler() which is called when the I2C interrupts occur. - * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the - * I2C_IRQHandler() function in order to determine which error occurred. - * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() - * and/or I2C_GenerateStop() in order to clear the error flag and - * source and return to correct communication status. - * - * - * 2) Advanced state monitoring: - * Using the function I2C_GetLastEvent() which returns the image of both SR1 - * & SR3 status registers in a single word (uint16_t) (Status Register 3 value - * is shifted left by 8 bits and concatenated to Status Register 1). - * - When to use: - * - This function is suitable for the same applications above but it allows to - * overcome the limitations of I2C_GetFlagStatus() function (see below). - * The returned value could be compared to events already defined in the - * library (stm8s_i2c.h) or to custom values defined by user. - * - This function is suitable when multiple flags are monitored at the same time. - * - At the opposite of I2C_CheckEvent() function, this function allows user to - * choose when an event is accepted (when all events flags are set and no - * other flags are set or just when the needed flags are set like - * I2C_CheckEvent() function). - * - Limitations: - * - User may need to define his own events. - * - Same remark concerning the error management is applicable for this - * function if user decides to check only regular communication flags (and - * ignores error flags). - * - * - * 3) Flag-based state monitoring: - * Using the function I2C_GetFlagStatus() which simply returns the status of - * one single flag (ie. I2C_FLAG_RXNE ...). - * - When to use: - * - This function could be used for specific applications or in debug phase. - * - It is suitable when only one flag checking is needed (most I2C events - * are monitored through multiple flags). - * - Limitations: - * - When calling this function, the Status register is accessed. Some flags are - * cleared when the status register is accessed. So checking the status - * of one Flag, may clear other ones. - * - Function may need to be called twice or more in order to monitor one - * single event. - * - * For detailed description of Events, please refer to section I2C_Events in - * stm8s_i2c.h file. - * - */ -/** - * - * 1) Basic state monitoring - ******************************************************************************* - */ - -/** - * @brief Checks whether the last I2C Event is equal to the one passed - * as parameter. - * @param I2C_EVENT: specifies the event to be checked. - * This parameter can be one of the following values: - * @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2 - * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) : EV2 - * @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3 - * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3 - * @arg I2C_EVENT_SLAVE_ACK_FAILURE : EV3_2 - * @arg I2C_EVENT_SLAVE_STOP_DETECTED : EV4 - * @arg I2C_EVENT_MASTER_MODE_SELECT : EV5 - * @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED : EV6 - * @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED : EV6 - * @arg I2C_EVENT_MASTER_BYTE_RECEIVED : EV7 - * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING : EV8 - * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8_2 - * @arg I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9 - * - * @note: For detailed description of Events, please refer to section - * I2C_Events in stm8s_i2c.h file. - * - * @retval An ErrorStatus enumeration value: - * - SUCCESS: Last event is equal to the I2C_EVENT - * - ERROR: Last event is different from the I2C_EVENT - */ -ErrorStatus I2C_CheckEvent(I2C_Event_TypeDef I2C_Event) -{ - __IO uint16_t lastevent = 0x00; - uint8_t flag1 = 0x00 ; - uint8_t flag2 = 0x00; - ErrorStatus status = ERROR; - - /* Check the parameters */ - assert_param(IS_I2C_EVENT_OK(I2C_Event)); - - if (I2C_Event == I2C_EVENT_SLAVE_ACK_FAILURE) - { - lastevent = I2C->SR2 & I2C_SR2_AF; - } - else - { - flag1 = I2C->SR1; - flag2 = I2C->SR3; - lastevent = ((uint16_t)((uint16_t)flag2 << (uint16_t)8) | (uint16_t)flag1); - } - /* Check whether the last event is equal to I2C_EVENT */ - if (((uint16_t)lastevent & (uint16_t)I2C_Event) == (uint16_t)I2C_Event) - { - /* SUCCESS: last event is equal to I2C_EVENT */ - status = SUCCESS; - } - else - { - /* ERROR: last event is different from I2C_EVENT */ - status = ERROR; - } - - /* Return status */ - return status; -} - -/** - * - * 2) Advanced state monitoring - ******************************************************************************* - */ -/** - * @brief Returns the last I2C Event. - * - * @note: For detailed description of Events, please refer to section - * I2C_Events in stm8s_i2c.h file. - * - * @retval The last event - * This parameter can be any of the @ref I2C_Event_TypeDef enumeration. - */ -I2C_Event_TypeDef I2C_GetLastEvent(void) -{ - __IO uint16_t lastevent = 0; - uint16_t flag1 = 0; - uint16_t flag2 = 0; - - if ((I2C->SR2 & I2C_SR2_AF) != 0x00) - { - lastevent = I2C_EVENT_SLAVE_ACK_FAILURE; - } - else - { - /* Read the I2C status register */ - flag1 = I2C->SR1; - flag2 = I2C->SR3; - - /* Get the last event value from I2C status register */ - lastevent = ((uint16_t)((uint16_t)flag2 << 8) | (uint16_t)flag1); - } - /* Return status */ - return (I2C_Event_TypeDef)lastevent; -} - -/** - * - * 3) Flag-based state monitoring - ******************************************************************************* - */ -/** - * @brief Checks whether the specified I2C flag is set or not. - * @param I2C_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg I2C_FLAG_GENERALCALL: General call header flag (Slave mode) - * @arg I2C_FLAG_TRANSMITTERRECEIVER: Transmitter/Receiver flag - * @arg I2C_FLAG_BUSBUSY: Bus busy flag - * @arg I2C_FLAG_MASTERSLAVE: Master/Slave flag - * @arg I2C_FLAG_WAKEUPFROMHALT: Wake up from HALT flag - * @arg I2C_FLAG_OVERRUNUNDERRUN: Overrun/Underrun flag (Slave mode) - * @arg I2C_FLAG_ACKNOWLEDGEFAILURE: Acknowledge failure flag - * @arg I2C_FLAG_ARBITRATIONLOSS: Arbitration lost flag (Master mode) - * @arg I2C_FLAG_BUSERROR: Bus error flag - * @arg I2C_FLAG_TXEMPTY: Data register empty flag (Transmitter) - * @arg I2C_FLAG_RXNOTEMPTY: Data register not empty (Receiver) flag - * @arg I2C_FLAG_STOPDETECTION: Stop detection flag (Slave mode) - * @arg I2C_FLAG_HEADERSENT: 10-bit header sent flag (Master mode) - * @arg I2C_FLAG_TRANSFERFINISHED: Byte transfer finished flag - * @arg I2C_FLAG_ADDRESSSENTMATCHED: Address sent flag (Master mode) “ADSL” - * Address matched flag (Slave mode)”ENDAD” - * @arg I2C_FLAG_STARTDETECTION: Start bit flag (Master mode) - * @retval The new state of I2C_FLAG (SET or RESET). - */ -FlagStatus I2C_GetFlagStatus(I2C_Flag_TypeDef I2C_Flag) -{ - uint8_t tempreg = 0; - uint8_t regindex = 0; - FlagStatus bitstatus = RESET; - - /* Check the parameters */ - assert_param(IS_I2C_FLAG_OK(I2C_Flag)); - - /* Read flag register index */ - regindex = (uint8_t)((uint16_t)I2C_Flag >> 8); - /* Check SRx index */ - switch (regindex) - { - /* Returns whether the status register to check is SR1 */ - case 0x01: - tempreg = (uint8_t)I2C->SR1; - break; - - /* Returns whether the status register to check is SR2 */ - case 0x02: - tempreg = (uint8_t)I2C->SR2; - break; - - /* Returns whether the status register to check is SR3 */ - case 0x03: - tempreg = (uint8_t)I2C->SR3; - break; - - default: - break; - } - - /* Check the status of the specified I2C flag */ - if ((tempreg & (uint8_t)I2C_Flag ) != 0) - { - /* Flag is set */ - bitstatus = SET; - } - else - { - /* Flag is reset */ - bitstatus = RESET; - } - /* Return the flag status */ - return bitstatus; -} - -/** - * @brief Clear flags - * @param I2C_Flag : Specifies the flag to clear - * This parameter can be any combination of the following values: - * - I2C_FLAG_WAKEUPFROMHALT: Wakeup from Halt - * - I2C_FLAG_OVERRUNUNDERRUN: Overrun/Underrun flag (Slave mode) - * - I2C_FLAG_ACKNOWLEDGEFAILURE: Acknowledge failure flag - * - I2C_FLAG_ARBITRATIONLOSS: Arbitration lost flag (Master mode) - * - I2C_FLAG_BUSERROR: Bus error flag. - * @note Notes: - * - STOPF (STOP detection) is cleared by software - * sequence: a read operation to I2C_SR1 register - * (I2C_GetFlagStatus()) followed by a write operation - * to I2C_CR2 register. - * - ADD10 (10-bit header sent) is cleared by software - * sequence: a read operation to I2C_SR1 - * (I2C_GetFlagStatus()) followed by writing the - * second byte of the address in DR register. - * - BTF (Byte Transfer Finished) is cleared by software - * sequence: a read operation to I2C_SR1 register - * (I2C_GetFlagStatus()) followed by a read/write to - * I2C_DR register (I2C_SendData()). - * - ADDR (Address sent) is cleared by software sequence: - * a read operation to I2C_SR1 register - * (I2C_GetFlagStatus()) followed by a read operation to - * I2C_SR3 register ((void)(I2C->SR3)). - * - SB (Start Bit) is cleared software sequence: a read - * operation to I2C_SR1 register (I2C_GetFlagStatus()) - * followed by a write operation to I2C_DR register - * (I2C_SendData()). - * @retval None - */ -void I2C_ClearFlag(I2C_Flag_TypeDef I2C_FLAG) -{ - uint16_t flagpos = 0; - /* Check the parameters */ - assert_param(IS_I2C_CLEAR_FLAG_OK(I2C_FLAG)); - - /* Get the I2C flag position */ - flagpos = (uint16_t)I2C_FLAG & FLAG_Mask; - /* Clear the selected I2C flag */ - I2C->SR2 = (uint8_t)((uint16_t)(~flagpos)); -} - -/** - * @brief Checks whether the specified I2C interrupt has occurred or not. - * @param I2C_ITPendingBit: specifies the interrupt source to check. - * This parameter can be one of the following values: - * - I2C_ITPENDINGBIT_WAKEUPFROMHALT: Wakeup from Halt - * - I2C_ITPENDINGBIT_OVERRUNUNDERRUN: Overrun/Underrun flag (Slave mode) - * - I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE: Acknowledge failure flag - * - I2C_ITPENDINGBIT_ARBITRATIONLOSS: Arbitration lost flag (Master mode) - * - I2C_ITPENDINGBIT_BUSERROR: Bus error flag - * - I2C_ITPENDINGBIT_TXEMPTY: Data register empty flag (Transmitter) - * - I2C_ITPENDINGBIT_RXNOTEMPTY: Data register not empty (Receiver) flag - * - I2C_ITPENDINGBIT_STOPDETECTION: Stop detection flag (Slave mode) - * - I2C_ITPENDINGBIT_HEADERSENT: 10-bit header sent flag (Master mode) - * - I2C_ITPENDINGBIT_TRANSFERFINISHED: Byte transfer finished flag - * - I2C_ITPENDINGBIT_ADDRESSSENTMATCHED: Address sent flag (Master mode) “ADSL” - * Address matched flag (Slave mode)“ENDAD” - * - I2C_ITPENDINGBIT_STARTDETECTION: Start bit flag (Master mode) - * @retval The new state of I2C_ITPendingBit - * This parameter can be any of the @ref ITStatus enumeration. - */ -ITStatus I2C_GetITStatus(I2C_ITPendingBit_TypeDef I2C_ITPendingBit) -{ - ITStatus bitstatus = RESET; - __IO uint8_t enablestatus = 0; - uint16_t tempregister = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ITPENDINGBIT_OK(I2C_ITPendingBit)); - - tempregister = (uint8_t)( ((uint16_t)((uint16_t)I2C_ITPendingBit & ITEN_Mask)) >> 8); - - /* Check if the interrupt source is enabled or not */ - enablestatus = (uint8_t)(I2C->ITR & ( uint8_t)tempregister); - - if ((uint16_t)((uint16_t)I2C_ITPendingBit & REGISTER_Mask) == REGISTER_SR1_Index) - { - /* Check the status of the specified I2C flag */ - if (((I2C->SR1 & (uint8_t)I2C_ITPendingBit) != RESET) && enablestatus) - { - /* I2C_IT is set */ - bitstatus = SET; - } - else - { - /* I2C_IT is reset */ - bitstatus = RESET; - } - } - else - { - /* Check the status of the specified I2C flag */ - if (((I2C->SR2 & (uint8_t)I2C_ITPendingBit) != RESET) && enablestatus) - { - /* I2C_IT is set */ - bitstatus = SET; - } - else - { - /* I2C_IT is reset */ - bitstatus = RESET; - } - } - /* Return the I2C_IT status */ - return bitstatus; -} - -/** - * @brief Clear IT pending bit - * @param I2C_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * - I2C_ITPENDINGBIT_WAKEUPFROMHALT: Wakeup from Halt - * - I2C_ITPENDINGBIT_OVERRUNUNDERRUN: Overrun/Underrun interrupt (Slave mode) - * - I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE: Acknowledge failure interrupt - * - I2C_ITPENDINGBIT_ARBITRATIONLOSS: Arbitration lost interrupt (Master mode) - * - I2C_ITPENDINGBIT_BUSERROR: Bus error interrupt - * - * Notes: - * - STOPF (STOP detection) is cleared by software - * sequence: a read operation to I2C_SR1 register - * (I2C_GetITStatus()) followed by a write operation to - * I2C_CR2 register (I2C_AcknowledgeConfig() to configure - * the I2C peripheral Acknowledge). - * - ADD10 (10-bit header sent) is cleared by software - * sequence: a read operation to I2C_SR1 - * (I2C_GetITStatus()) followed by writing the second - * byte of the address in I2C_DR register. - * - BTF (Byte Transfer Finished) is cleared by software - * sequence: a read operation to I2C_SR1 register - * (I2C_GetITStatus()) followed by a read/write to - * I2C_DR register (I2C_SendData()). - * - ADDR (Address sent) is cleared by software sequence: - * a read operation to I2C_SR1 register (I2C_GetITStatus()) - * followed by a read operation to I2C_SR3 register - * ((void)(I2C->SR3)). - * - SB (Start Bit) is cleared by software sequence: a - * read operation to I2C_SR1 register (I2C_GetITStatus()) - * followed by a write operation to I2C_DR register - * (I2C_SendData()). - * @retval None - */ -void I2C_ClearITPendingBit(I2C_ITPendingBit_TypeDef I2C_ITPendingBit) -{ - uint16_t flagpos = 0; - - /* Check the parameters */ - assert_param(IS_I2C_CLEAR_ITPENDINGBIT_OK(I2C_ITPendingBit)); - - /* Get the I2C flag position */ - flagpos = (uint16_t)I2C_ITPendingBit & FLAG_Mask; - - /* Clear the selected I2C flag */ - I2C->SR2 = (uint8_t)((uint16_t)~flagpos); -} - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_tim1.c b/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_tim1.c old mode 100644 new mode 100755 index 86826e0..16d46a0 --- a/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_tim1.c +++ b/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_tim1.c @@ -55,6 +55,7 @@ static void TI4_Config(uint8_t TIM1_ICPolarity, uint8_t TIM1_ICSelection, * @param None * @retval None */ +#if 0 void TIM1_DeInit(void) { TIM1->CR1 = TIM1_CR1_RESET_VALUE; @@ -99,6 +100,7 @@ void TIM1_DeInit(void) TIM1->RCR = TIM1_RCR_RESET_VALUE; TIM1->SR1 = TIM1_SR1_RESET_VALUE; } +#endif /** * @brief Initializes the TIM1 Time Base Unit according to the specified parameters. @@ -108,6 +110,7 @@ void TIM1_DeInit(void) * @param TIM1_RepetitionCounter specifies the Repetition counter value * @retval None */ +#if 0 void TIM1_TimeBaseInit(uint16_t TIM1_Prescaler, TIM1_CounterMode_TypeDef TIM1_CounterMode, uint16_t TIM1_Period, @@ -131,6 +134,7 @@ void TIM1_TimeBaseInit(uint16_t TIM1_Prescaler, /* Set the Repetition Counter value */ TIM1->RCR = TIM1_RepetitionCounter; } +#endif /** * @brief Initializes the TIM1 Channel1 according to the specified parameters. @@ -151,6 +155,7 @@ void TIM1_TimeBaseInit(uint16_t TIM1_Prescaler, * State from @ref TIM1_OCIdleState_TypeDef. * @retval None */ +#if 0 void TIM1_OC1Init(TIM1_OCMode_TypeDef TIM1_OCMode, TIM1_OutputState_TypeDef TIM1_OutputState, TIM1_OutputNState_TypeDef TIM1_OutputNState, @@ -194,6 +199,7 @@ void TIM1_OC1Init(TIM1_OCMode_TypeDef TIM1_OCMode, TIM1->CCR1H = (uint8_t)(TIM1_Pulse >> 8); TIM1->CCR1L = (uint8_t)(TIM1_Pulse); } +#endif /** * @brief Initializes the TIM1 Channel2 according to the specified parameters. @@ -214,6 +220,7 @@ void TIM1_OC1Init(TIM1_OCMode_TypeDef TIM1_OCMode, * State from @ref TIM1_OCIdleState_TypeDef. * @retval None */ +#if 0 void TIM1_OC2Init(TIM1_OCMode_TypeDef TIM1_OCMode, TIM1_OutputState_TypeDef TIM1_OutputState, TIM1_OutputNState_TypeDef TIM1_OutputNState, @@ -258,6 +265,7 @@ void TIM1_OC2Init(TIM1_OCMode_TypeDef TIM1_OCMode, TIM1->CCR2H = (uint8_t)(TIM1_Pulse >> 8); TIM1->CCR2L = (uint8_t)(TIM1_Pulse); } +#endif /** * @brief Initializes the TIM1 Channel3 according to the specified parameters. @@ -278,6 +286,7 @@ void TIM1_OC2Init(TIM1_OCMode_TypeDef TIM1_OCMode, * Idle State from @ref TIM1_OCIdleState_TypeDef. * @retval None */ +#if 0 void TIM1_OC3Init(TIM1_OCMode_TypeDef TIM1_OCMode, TIM1_OutputState_TypeDef TIM1_OutputState, TIM1_OutputNState_TypeDef TIM1_OutputNState, @@ -321,6 +330,7 @@ void TIM1_OC3Init(TIM1_OCMode_TypeDef TIM1_OCMode, TIM1->CCR3H = (uint8_t)(TIM1_Pulse >> 8); TIM1->CCR3L = (uint8_t)(TIM1_Pulse); } +#endif /** * @brief Initializes the TIM1 Channel4 according to the specified parameters. @@ -335,6 +345,7 @@ void TIM1_OC3Init(TIM1_OCMode_TypeDef TIM1_OCMode, * from @ref TIM1_OCIdleState_TypeDef. * @retval None */ +#if 0 void TIM1_OC4Init(TIM1_OCMode_TypeDef TIM1_OCMode, TIM1_OutputState_TypeDef TIM1_OutputState, uint16_t TIM1_Pulse, @@ -371,6 +382,7 @@ void TIM1_OC4Init(TIM1_OCMode_TypeDef TIM1_OCMode, TIM1->CCR4H = (uint8_t)(TIM1_Pulse >> 8); TIM1->CCR4L = (uint8_t)(TIM1_Pulse); } +#endif /** * @brief Configures the Break feature, dead time, Lock level, the OSSI, @@ -385,6 +397,7 @@ void TIM1_OC4Init(TIM1_OCMode_TypeDef TIM1_OCMode, * from @ref TIM1_AutomaticOutput_TypeDef. * @retval None */ +#if 0 void TIM1_BDTRConfig(TIM1_OSSIState_TypeDef TIM1_OSSIState, TIM1_LockLevel_TypeDef TIM1_LockLevel, uint8_t TIM1_DeadTime, @@ -407,6 +420,7 @@ void TIM1_BDTRConfig(TIM1_OSSIState_TypeDef TIM1_OSSIState, (uint8_t)((uint8_t)(TIM1_Break | (uint8_t)TIM1_BreakPolarity) | (uint8_t)TIM1_AutomaticOutput)); } +#endif /** * @brief Initializes the TIM1 peripheral according to the specified parameters. @@ -420,6 +434,7 @@ void TIM1_BDTRConfig(TIM1_OSSIState_TypeDef TIM1_OSSIState, * @param TIM1_ICFilter specifies the Input capture filter value. * @retval None */ +#if 1 void TIM1_ICInit(TIM1_Channel_TypeDef TIM1_Channel, TIM1_ICPolarity_TypeDef TIM1_ICPolarity, TIM1_ICSelection_TypeDef TIM1_ICSelection, @@ -470,6 +485,7 @@ void TIM1_ICInit(TIM1_Channel_TypeDef TIM1_Channel, TIM1_SetIC4Prescaler(TIM1_ICPrescaler); } } +#endif /** * @brief Configures the TIM1 peripheral in PWM Input Mode according to the @@ -485,6 +501,7 @@ void TIM1_ICInit(TIM1_Channel_TypeDef TIM1_Channel, * @param TIM1_ICFilter specifies the Input capture filter value. * @retval None */ +#if 0 void TIM1_PWMIConfig(TIM1_Channel_TypeDef TIM1_Channel, TIM1_ICPolarity_TypeDef TIM1_ICPolarity, TIM1_ICSelection_TypeDef TIM1_ICSelection, @@ -551,6 +568,7 @@ void TIM1_PWMIConfig(TIM1_Channel_TypeDef TIM1_Channel, TIM1_SetIC1Prescaler(TIM1_ICPrescaler); } } +#endif /** * @brief Enables or disables the TIM1 peripheral. @@ -558,6 +576,7 @@ void TIM1_PWMIConfig(TIM1_Channel_TypeDef TIM1_Channel, * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 1 void TIM1_Cmd(FunctionalState NewState) { /* Check the parameters */ @@ -573,6 +592,7 @@ void TIM1_Cmd(FunctionalState NewState) TIM1->CR1 &= (uint8_t)(~TIM1_CR1_CEN); } } +#endif /** * @brief Enables or disables the TIM1 peripheral Main Outputs. @@ -580,6 +600,7 @@ void TIM1_Cmd(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_CtrlPWMOutputs(FunctionalState NewState) { /* Check the parameters */ @@ -596,6 +617,7 @@ void TIM1_CtrlPWMOutputs(FunctionalState NewState) TIM1->BKR &= (uint8_t)(~TIM1_BKR_MOE); } } +#endif /** * @brief Enables or disables the specified TIM1 interrupts. @@ -614,6 +636,7 @@ void TIM1_CtrlPWMOutputs(FunctionalState NewState) * @param NewState new state of the TIM1 peripheral. * @retval None */ +#if 0 void TIM1_ITConfig(TIM1_IT_TypeDef TIM1_IT, FunctionalState NewState) { /* Check the parameters */ @@ -631,17 +654,20 @@ void TIM1_ITConfig(TIM1_IT_TypeDef TIM1_IT, FunctionalState NewState) TIM1->IER &= (uint8_t)(~(uint8_t)TIM1_IT); } } +#endif /** * @brief Configures the TIM1 internal Clock. * @param None * @retval None */ +#if 0 void TIM1_InternalClockConfig(void) { /* Disable slave mode to clock the prescaler directly with the internal clock */ TIM1->SMCR &= (uint8_t)(~TIM1_SMCR_SMS); } +#endif /** * @brief Configures the TIM1 External clock Mode1. @@ -659,6 +685,7 @@ void TIM1_InternalClockConfig(void) * This parameter must be a value between 0x00 and 0x0F * @retval None */ +#if 0 void TIM1_ETRClockMode1Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, uint8_t ExtTRGFilter) @@ -674,6 +701,7 @@ void TIM1_ETRClockMode1Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, TIM1->SMCR = (uint8_t)((uint8_t)(TIM1->SMCR & (uint8_t)(~(uint8_t)(TIM1_SMCR_SMS | TIM1_SMCR_TS ))) | (uint8_t)((uint8_t)TIM1_SLAVEMODE_EXTERNAL1 | TIM1_TS_ETRF )); } +#endif /** * @brief Configures the TIM1 External clock Mode2. @@ -691,6 +719,7 @@ void TIM1_ETRClockMode1Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, * This parameter must be a value between 0x00 and 0x0F * @retval None */ +#if 0 void TIM1_ETRClockMode2Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, uint8_t ExtTRGFilter) @@ -705,6 +734,7 @@ void TIM1_ETRClockMode2Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, /* Enable the External clock mode2 */ TIM1->ETR |= TIM1_ETR_ECE; } +#endif /** * @brief Configures the TIM1 External Trigger. @@ -722,6 +752,7 @@ void TIM1_ETRClockMode2Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, * This parameter must be a value between 0x00 and 0x0F * @retval None */ +#if 0 void TIM1_ETRConfig(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, uint8_t ExtTRGFilter) @@ -732,6 +763,7 @@ void TIM1_ETRConfig(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, TIM1->ETR |= (uint8_t)((uint8_t)(TIM1_ExtTRGPrescaler | (uint8_t)TIM1_ExtTRGPolarity )| (uint8_t)ExtTRGFilter ); } +#endif /** * @brief Configures the TIM1 Trigger as External Clock. @@ -748,6 +780,7 @@ void TIM1_ETRConfig(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, * This parameter must be a value between 0x00 and 0x0F * @retval None */ +#if 0 void TIM1_TIxExternalClockConfig(TIM1_TIxExternalCLK1Source_TypeDef TIM1_TIxExternalCLKSource, TIM1_ICPolarity_TypeDef TIM1_ICPolarity, uint8_t ICFilter) @@ -773,6 +806,7 @@ void TIM1_TIxExternalClockConfig(TIM1_TIxExternalCLK1Source_TypeDef TIM1_TIxExte /* Select the External clock mode1 */ TIM1->SMCR |= (uint8_t)(TIM1_SLAVEMODE_EXTERNAL1); } +#endif /** * @brief Selects the TIM1 Input Trigger source. @@ -784,6 +818,7 @@ void TIM1_TIxExternalClockConfig(TIM1_TIxExternalCLK1Source_TypeDef TIM1_TIxExte * - TIM1_TS_ETRF: External Trigger input * @retval None */ +#if 0 void TIM1_SelectInputTrigger(TIM1_TS_TypeDef TIM1_InputTriggerSource) { /* Check the parameters */ @@ -792,6 +827,7 @@ void TIM1_SelectInputTrigger(TIM1_TS_TypeDef TIM1_InputTriggerSource) /* Select the Tgigger Source */ TIM1->SMCR = (uint8_t)((uint8_t)(TIM1->SMCR & (uint8_t)(~TIM1_SMCR_TS)) | (uint8_t)TIM1_InputTriggerSource); } +#endif /** * @brief Enables or Disables the TIM1 Update event. @@ -799,7 +835,7 @@ void TIM1_SelectInputTrigger(TIM1_TS_TypeDef TIM1_InputTriggerSource) * be ENABLE or DISABLE. * @retval None */ - +#if 0 void TIM1_UpdateDisableConfig(FunctionalState NewState) { /* Check the parameters */ @@ -815,6 +851,7 @@ void TIM1_UpdateDisableConfig(FunctionalState NewState) TIM1->CR1 &= (uint8_t)(~TIM1_CR1_UDIS); } } +#endif /** * @brief Selects the TIM1 Update Request Interrupt source. @@ -824,6 +861,7 @@ void TIM1_UpdateDisableConfig(FunctionalState NewState) * - TIM1_UPDATESOURCE_GLOBAL * @retval None */ +#if 0 void TIM1_UpdateRequestConfig(TIM1_UpdateSource_TypeDef TIM1_UpdateSource) { /* Check the parameters */ @@ -839,6 +877,7 @@ void TIM1_UpdateRequestConfig(TIM1_UpdateSource_TypeDef TIM1_UpdateSource) TIM1->CR1 &= (uint8_t)(~TIM1_CR1_URS); } } +#endif /** * @brief Enables or Disables the TIM1’s Hall sensor interface. @@ -846,6 +885,7 @@ void TIM1_UpdateRequestConfig(TIM1_UpdateSource_TypeDef TIM1_UpdateSource) * be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_SelectHallSensor(FunctionalState NewState) { /* Check the parameters */ @@ -861,6 +901,7 @@ void TIM1_SelectHallSensor(FunctionalState NewState) TIM1->CR2 &= (uint8_t)(~TIM1_CR2_TI1S); } } +#endif /** * @brief Selects the TIM1’s One Pulse Mode. @@ -870,6 +911,7 @@ void TIM1_SelectHallSensor(FunctionalState NewState) * - TIM1_OPMODE_REPETITIVE * @retval None */ +#if 0 void TIM1_SelectOnePulseMode(TIM1_OPMode_TypeDef TIM1_OPMode) { /* Check the parameters */ @@ -886,6 +928,7 @@ void TIM1_SelectOnePulseMode(TIM1_OPMode_TypeDef TIM1_OPMode) } } +#endif /** * @brief Selects the TIM1 Trigger Output Mode. @@ -900,6 +943,7 @@ void TIM1_SelectOnePulseMode(TIM1_OPMode_TypeDef TIM1_OPMode) * - TIM1_TRGOSOURCE_OC3REF * @retval None */ +#if 0 void TIM1_SelectOutputTrigger(TIM1_TRGOSource_TypeDef TIM1_TRGOSource) { /* Check the parameters */ @@ -909,6 +953,7 @@ void TIM1_SelectOutputTrigger(TIM1_TRGOSource_TypeDef TIM1_TRGOSource) TIM1->CR2 = (uint8_t)((uint8_t)(TIM1->CR2 & (uint8_t)(~TIM1_CR2_MMS)) | (uint8_t) TIM1_TRGOSource); } +#endif /** * @brief Selects the TIM1 Slave Mode. @@ -920,6 +965,7 @@ void TIM1_SelectOutputTrigger(TIM1_TRGOSource_TypeDef TIM1_TRGOSource) * - TIM1_SLAVEMODE_EXTERNAL1 * @retval None */ +#if 0 void TIM1_SelectSlaveMode(TIM1_SlaveMode_TypeDef TIM1_SlaveMode) { /* Check the parameters */ @@ -929,6 +975,7 @@ void TIM1_SelectSlaveMode(TIM1_SlaveMode_TypeDef TIM1_SlaveMode) TIM1->SMCR = (uint8_t)((uint8_t)(TIM1->SMCR & (uint8_t)(~TIM1_SMCR_SMS)) | (uint8_t)TIM1_SlaveMode); } +#endif /** * @brief Sets or Resets the TIM1 Master/Slave Mode. @@ -936,6 +983,7 @@ void TIM1_SelectSlaveMode(TIM1_SlaveMode_TypeDef TIM1_SlaveMode) * (through TRGO). This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_SelectMasterSlaveMode(FunctionalState NewState) { /* Check the parameters */ @@ -951,6 +999,7 @@ void TIM1_SelectMasterSlaveMode(FunctionalState NewState) TIM1->SMCR &= (uint8_t)(~TIM1_SMCR_MSM); } } +#endif /** * @brief Configures the TIM1 Encoder Interface. @@ -972,6 +1021,7 @@ void TIM1_SelectMasterSlaveMode(FunctionalState NewState) * - TIM1_ICPOLARITY_RISING * @retval None */ +#if 0 void TIM1_EncoderInterfaceConfig(TIM1_EncoderMode_TypeDef TIM1_EncoderMode, TIM1_ICPolarity_TypeDef TIM1_IC1Polarity, TIM1_ICPolarity_TypeDef TIM1_IC2Polarity) @@ -1009,6 +1059,7 @@ void TIM1_EncoderInterfaceConfig(TIM1_EncoderMode_TypeDef TIM1_EncoderMode, TIM1->CCMR2 = (uint8_t)((uint8_t)(TIM1->CCMR2 & (uint8_t)(~TIM1_CCMR_CCxS)) | (uint8_t) CCMR_TIxDirect_Set); } +#endif /** * @brief Configures the TIM1 Prescaler. @@ -1020,6 +1071,7 @@ void TIM1_EncoderInterfaceConfig(TIM1_EncoderMode_TypeDef TIM1_EncoderMode, * - TIM1_PSCRELOADMODE_UPDATE: The Prescaler is loaded at the update event. * @retval None */ +#if 0 void TIM1_PrescalerConfig(uint16_t Prescaler, TIM1_PSCReloadMode_TypeDef TIM1_PSCReloadMode) { @@ -1033,6 +1085,7 @@ void TIM1_PrescalerConfig(uint16_t Prescaler, /* Set or reset the UG Bit */ TIM1->EGR = (uint8_t)TIM1_PSCReloadMode; } +#endif /** * @brief Specifies the TIM1 Counter Mode to be used. @@ -1045,6 +1098,7 @@ void TIM1_PrescalerConfig(uint16_t Prescaler, * - TIM1_COUNTERMODE_CENTERALIGNED3: TIM1 Center Aligned Mode3 * @retval None */ +#if 0 void TIM1_CounterModeConfig(TIM1_CounterMode_TypeDef TIM1_CounterMode) { /* Check the parameters */ @@ -1055,6 +1109,7 @@ void TIM1_CounterModeConfig(TIM1_CounterMode_TypeDef TIM1_CounterMode) TIM1->CR1 = (uint8_t)((uint8_t)(TIM1->CR1 & (uint8_t)((uint8_t)(~TIM1_CR1_CMS) & (uint8_t)(~TIM1_CR1_DIR))) | (uint8_t)TIM1_CounterMode); } +#endif /** * @brief Forces the TIM1 Channel1 output waveform to active or inactive level. @@ -1064,6 +1119,7 @@ void TIM1_CounterModeConfig(TIM1_CounterMode_TypeDef TIM1_CounterMode) * - TIM1_FORCEDACTION_INACTIVE: Force inactive level on OC1REF. * @retval None */ +#if 0 void TIM1_ForcedOC1Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) { /* Check the parameters */ @@ -1073,6 +1129,7 @@ void TIM1_ForcedOC1Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) TIM1->CCMR1 = (uint8_t)((uint8_t)(TIM1->CCMR1 & (uint8_t)(~TIM1_CCMR_OCM))| (uint8_t)TIM1_ForcedAction); } +#endif /** * @brief Forces the TIM1 Channel2 output waveform to active or inactive level. @@ -1082,6 +1139,7 @@ void TIM1_ForcedOC1Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) * - TIM1_FORCEDACTION_INACTIVE: Force inactive level on OC2REF. * @retval None */ +#if 0 void TIM1_ForcedOC2Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) { /* Check the parameters */ @@ -1091,6 +1149,7 @@ void TIM1_ForcedOC2Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) TIM1->CCMR2 = (uint8_t)((uint8_t)(TIM1->CCMR2 & (uint8_t)(~TIM1_CCMR_OCM)) | (uint8_t)TIM1_ForcedAction); } +#endif /** * @brief Forces the TIM1 Channel3 output waveform to active or inactive level. @@ -1101,6 +1160,7 @@ void TIM1_ForcedOC2Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) * OC3REF. * @retval None */ +#if 0 void TIM1_ForcedOC3Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) { /* Check the parameters */ @@ -1110,6 +1170,7 @@ void TIM1_ForcedOC3Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) TIM1->CCMR3 = (uint8_t)((uint8_t)(TIM1->CCMR3 & (uint8_t)(~TIM1_CCMR_OCM)) | (uint8_t)TIM1_ForcedAction); } +#endif /** * @brief Forces the TIM1 Channel4 output waveform to active or inactive level. @@ -1120,6 +1181,7 @@ void TIM1_ForcedOC3Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) * OC4REF. * @retval None */ +#if 0 void TIM1_ForcedOC4Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) { /* Check the parameters */ @@ -1129,6 +1191,7 @@ void TIM1_ForcedOC4Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) TIM1->CCMR4 = (uint8_t)((uint8_t)(TIM1->CCMR4 & (uint8_t)(~TIM1_CCMR_OCM)) | (uint8_t)TIM1_ForcedAction); } +#endif /** * @brief Enables or disables TIM1 peripheral Preload register on ARR. @@ -1136,6 +1199,7 @@ void TIM1_ForcedOC4Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_ARRPreloadConfig(FunctionalState NewState) { /* Check the parameters */ @@ -1151,6 +1215,7 @@ void TIM1_ARRPreloadConfig(FunctionalState NewState) TIM1->CR1 &= (uint8_t)(~TIM1_CR1_ARPE); } } +#endif /** * @brief Selects the TIM1 peripheral Commutation event. @@ -1158,6 +1223,7 @@ void TIM1_ARRPreloadConfig(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_SelectCOM(FunctionalState NewState) { /* Check the parameters */ @@ -1173,6 +1239,7 @@ void TIM1_SelectCOM(FunctionalState NewState) TIM1->CR2 &= (uint8_t)(~TIM1_CR2_COMS); } } +#endif /** * @brief Sets or Resets the TIM1 peripheral Capture Compare Preload Control bit. @@ -1180,6 +1247,7 @@ void TIM1_SelectCOM(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_CCPreloadControl(FunctionalState NewState) { /* Check the parameters */ @@ -1195,6 +1263,7 @@ void TIM1_CCPreloadControl(FunctionalState NewState) TIM1->CR2 &= (uint8_t)(~TIM1_CR2_CCPC); } } +#endif /** * @brief Enables or disables the TIM1 peripheral Preload Register on CCR1. @@ -1202,6 +1271,7 @@ void TIM1_CCPreloadControl(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_OC1PreloadConfig(FunctionalState NewState) { /* Check the parameters */ @@ -1217,6 +1287,7 @@ void TIM1_OC1PreloadConfig(FunctionalState NewState) TIM1->CCMR1 &= (uint8_t)(~TIM1_CCMR_OCxPE); } } +#endif /** * @brief Enables or disables the TIM1 peripheral Preload Register on CCR2. @@ -1224,6 +1295,7 @@ void TIM1_OC1PreloadConfig(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_OC2PreloadConfig(FunctionalState NewState) { /* Check the parameters */ @@ -1239,6 +1311,7 @@ void TIM1_OC2PreloadConfig(FunctionalState NewState) TIM1->CCMR2 &= (uint8_t)(~TIM1_CCMR_OCxPE); } } +#endif /** * @brief Enables or disables the TIM1 peripheral Preload Register on CCR3. @@ -1246,6 +1319,7 @@ void TIM1_OC2PreloadConfig(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_OC3PreloadConfig(FunctionalState NewState) { /* Check the parameters */ @@ -1261,6 +1335,7 @@ void TIM1_OC3PreloadConfig(FunctionalState NewState) TIM1->CCMR3 &= (uint8_t)(~TIM1_CCMR_OCxPE); } } +#endif /** * @brief Enables or disables the TIM1 peripheral Preload Register on CCR4. @@ -1268,6 +1343,7 @@ void TIM1_OC3PreloadConfig(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_OC4PreloadConfig(FunctionalState NewState) { /* Check the parameters */ @@ -1283,6 +1359,7 @@ void TIM1_OC4PreloadConfig(FunctionalState NewState) TIM1->CCMR4 &= (uint8_t)(~TIM1_CCMR_OCxPE); } } +#endif /** * @brief Configures the TIM1 Capture Compare 1 Fast feature. @@ -1290,6 +1367,7 @@ void TIM1_OC4PreloadConfig(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_OC1FastConfig(FunctionalState NewState) { /* Check the parameters */ @@ -1305,6 +1383,7 @@ void TIM1_OC1FastConfig(FunctionalState NewState) TIM1->CCMR1 &= (uint8_t)(~TIM1_CCMR_OCxFE); } } +#endif /** * @brief Configures the TIM1 Capture Compare 2 Fast feature. @@ -1312,6 +1391,7 @@ void TIM1_OC1FastConfig(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_OC2FastConfig(FunctionalState NewState) { /* Check the parameters */ @@ -1327,6 +1407,7 @@ void TIM1_OC2FastConfig(FunctionalState NewState) TIM1->CCMR2 &= (uint8_t)(~TIM1_CCMR_OCxFE); } } +#endif /** * @brief Configures the TIM1 Capture Compare 3 Fast feature. @@ -1334,6 +1415,7 @@ void TIM1_OC2FastConfig(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_OC3FastConfig(FunctionalState NewState) { /* Check the parameters */ @@ -1349,6 +1431,7 @@ void TIM1_OC3FastConfig(FunctionalState NewState) TIM1->CCMR3 &= (uint8_t)(~TIM1_CCMR_OCxFE); } } +#endif /** * @brief Configures the TIM1 Capture Compare 4 Fast feature. @@ -1356,6 +1439,7 @@ void TIM1_OC3FastConfig(FunctionalState NewState) * This parameter can be ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_OC4FastConfig(FunctionalState NewState) { /* Check the parameters */ @@ -1371,6 +1455,7 @@ void TIM1_OC4FastConfig(FunctionalState NewState) TIM1->CCMR4 &= (uint8_t)(~TIM1_CCMR_OCxFE); } } +#endif /** * @brief Configures the TIM1 event to be generated by software. @@ -1386,6 +1471,7 @@ void TIM1_OC4FastConfig(FunctionalState NewState) * - TIM1_EventSourceBreak: TIM1 Break Event source * @retval None */ +#if 0 void TIM1_GenerateEvent(TIM1_EventSource_TypeDef TIM1_EventSource) { /* Check the parameters */ @@ -1394,6 +1480,7 @@ void TIM1_GenerateEvent(TIM1_EventSource_TypeDef TIM1_EventSource) /* Set the event sources */ TIM1->EGR = (uint8_t)TIM1_EventSource; } +#endif /** * @brief Configures the TIM1 Channel 1 polarity. @@ -1403,6 +1490,7 @@ void TIM1_GenerateEvent(TIM1_EventSource_TypeDef TIM1_EventSource) * - TIM1_OCPOLARITY_HIGH: Output Compare active high * @retval None */ +#if 0 void TIM1_OC1PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) { /* Check the parameters */ @@ -1418,6 +1506,7 @@ void TIM1_OC1PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) TIM1->CCER1 &= (uint8_t)(~TIM1_CCER1_CC1P); } } +#endif /** * @brief Configures the TIM1 Channel 1N polarity. @@ -1427,6 +1516,8 @@ void TIM1_OC1PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) * - TIM1_OCNPOLARITY_HIGH: Output Compare active high * @retval None */ + +#if 0 void TIM1_OC1NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) { /* Check the parameters */ @@ -1442,6 +1533,7 @@ void TIM1_OC1NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) TIM1->CCER1 &= (uint8_t)(~TIM1_CCER1_CC1NP); } } +#endif /** * @brief Configures the TIM1 Channel 2 polarity. @@ -1451,6 +1543,7 @@ void TIM1_OC1NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) * - TIM1_OCPOLARITY_HIGH: Output Compare active high * @retval None */ +#if 0 void TIM1_OC2PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) { /* Check the parameters */ @@ -1466,6 +1559,7 @@ void TIM1_OC2PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) TIM1->CCER1 &= (uint8_t)(~TIM1_CCER1_CC2P); } } +#endif /** * @brief Configures the TIM1 Channel 2N polarity. @@ -1475,6 +1569,7 @@ void TIM1_OC2PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) * - TIM1_OCNPOLARITY_HIGH: Output Compare active high * @retval None */ +#if 0 void TIM1_OC2NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) { /* Check the parameters */ @@ -1490,6 +1585,7 @@ void TIM1_OC2NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) TIM1->CCER1 &= (uint8_t)(~TIM1_CCER1_CC2NP); } } +#endif /** * @brief Configures the TIM1 Channel 3 polarity. @@ -1499,6 +1595,7 @@ void TIM1_OC2NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) * - TIM1_OCPOLARITY_HIGH: Output Compare active high * @retval None */ +#if 0 void TIM1_OC3PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) { /* Check the parameters */ @@ -1514,6 +1611,7 @@ void TIM1_OC3PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) TIM1->CCER2 &= (uint8_t)(~TIM1_CCER2_CC3P); } } +#endif /** @@ -1524,6 +1622,7 @@ void TIM1_OC3PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) * - TIM1_OCNPOLARITY_HIGH: Output Compare active high * @retval None */ +#if 0 void TIM1_OC3NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) { /* Check the parameters */ @@ -1539,6 +1638,7 @@ void TIM1_OC3NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) TIM1->CCER2 &= (uint8_t)(~TIM1_CCER2_CC3NP); } } +#endif /** * @brief Configures the TIM1 Channel 4 polarity. @@ -1548,6 +1648,7 @@ void TIM1_OC3NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) * - TIM1_OCPOLARITY_HIGH: Output Compare active high * @retval None */ +#if 0 void TIM1_OC4PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) { /* Check the parameters */ @@ -1563,6 +1664,7 @@ void TIM1_OC4PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) TIM1->CCER2 &= (uint8_t)(~TIM1_CCER2_CC4P); } } +#endif /** * @brief Enables or disables the TIM1 Capture Compare Channel x (x=1,..,4). @@ -1576,6 +1678,7 @@ void TIM1_OC4PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) * This parameter can be: ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_CCxCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState) { /* Check the parameters */ @@ -1632,6 +1735,7 @@ void TIM1_CCxCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState) } } } +#endif /** * @brief Enables or disables the TIM1 Capture Compare Channel xN (xN=1,..,3). @@ -1644,6 +1748,7 @@ void TIM1_CCxCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState) * This parameter can be: ENABLE or DISABLE. * @retval None */ +#if 0 void TIM1_CCxNCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState) { /* Check the parameters */ @@ -1687,6 +1792,7 @@ void TIM1_CCxNCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState) } } } +#endif /** * @brief Selects the TIM1 Output Compare Mode. This function disables the @@ -1709,6 +1815,7 @@ void TIM1_CCxNCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState) * - TIM1_FORCEDACTION_INACTIVE * @retval None */ +#if 0 void TIM1_SelectOCxM(TIM1_Channel_TypeDef TIM1_Channel, TIM1_OCMode_TypeDef TIM1_OCMode) { /* Check the parameters */ @@ -1752,6 +1859,7 @@ void TIM1_SelectOCxM(TIM1_Channel_TypeDef TIM1_Channel, TIM1_OCMode_TypeDef TIM1 | (uint8_t)TIM1_OCMode); } } +#endif /** * @brief Sets the TIM1 Counter Register value. @@ -1759,12 +1867,14 @@ void TIM1_SelectOCxM(TIM1_Channel_TypeDef TIM1_Channel, TIM1_OCMode_TypeDef TIM1 * This parameter is between 0x0000 and 0xFFFF. * @retval None */ +#if 0 void TIM1_SetCounter(uint16_t Counter) { /* Set the Counter Register value */ TIM1->CNTRH = (uint8_t)(Counter >> 8); TIM1->CNTRL = (uint8_t)(Counter); } +#endif /** * @brief Sets the TIM1 Autoreload Register value. @@ -1772,12 +1882,14 @@ void TIM1_SetCounter(uint16_t Counter) * This parameter is between 0x0000 and 0xFFFF. * @retval None */ +#if 0 void TIM1_SetAutoreload(uint16_t Autoreload) { /* Set the Autoreload Register value */ TIM1->ARRH = (uint8_t)(Autoreload >> 8); TIM1->ARRL = (uint8_t)(Autoreload); - } +} +#endif /** * @brief Sets the TIM1 Capture Compare1 Register value. @@ -1785,12 +1897,14 @@ void TIM1_SetAutoreload(uint16_t Autoreload) * This parameter is between 0x0000 and 0xFFFF. * @retval None */ +#if 0 void TIM1_SetCompare1(uint16_t Compare1) { /* Set the Capture Compare1 Register value */ TIM1->CCR1H = (uint8_t)(Compare1 >> 8); TIM1->CCR1L = (uint8_t)(Compare1); } +#endif /** * @brief Sets the TIM1 Capture Compare2 Register value. @@ -1798,12 +1912,14 @@ void TIM1_SetCompare1(uint16_t Compare1) * This parameter is between 0x0000 and 0xFFFF. * @retval None */ +#if 0 void TIM1_SetCompare2(uint16_t Compare2) { /* Set the Capture Compare2 Register value */ TIM1->CCR2H = (uint8_t)(Compare2 >> 8); TIM1->CCR2L = (uint8_t)(Compare2); } +#endif /** * @brief Sets the TIM1 Capture Compare3 Register value. @@ -1811,12 +1927,14 @@ void TIM1_SetCompare2(uint16_t Compare2) * This parameter is between 0x0000 and 0xFFFF. * @retval None */ +#if 0 void TIM1_SetCompare3(uint16_t Compare3) { /* Set the Capture Compare3 Register value */ TIM1->CCR3H = (uint8_t)(Compare3 >> 8); TIM1->CCR3L = (uint8_t)(Compare3); } +#endif /** * @brief Sets the TIM1 Capture Compare4 Register value. @@ -1824,12 +1942,14 @@ void TIM1_SetCompare3(uint16_t Compare3) * This parameter is between 0x0000 and 0xFFFF. * @retval None */ +#if 0 void TIM1_SetCompare4(uint16_t Compare4) { /* Set the Capture Compare4 Register value */ TIM1->CCR4H = (uint8_t)(Compare4 >> 8); TIM1->CCR4L = (uint8_t)(Compare4); } +#endif /** * @brief Sets the TIM1 Input Capture 1 prescaler. @@ -1841,6 +1961,7 @@ void TIM1_SetCompare4(uint16_t Compare4) * - TIM1_ICPSC_DIV8: capture is done once every 8 events * @retval None */ +#if 1 void TIM1_SetIC1Prescaler(TIM1_ICPSC_TypeDef TIM1_IC1Prescaler) { /* Check the parameters */ @@ -1850,6 +1971,7 @@ void TIM1_SetIC1Prescaler(TIM1_ICPSC_TypeDef TIM1_IC1Prescaler) TIM1->CCMR1 = (uint8_t)((uint8_t)(TIM1->CCMR1 & (uint8_t)(~TIM1_CCMR_ICxPSC)) | (uint8_t)TIM1_IC1Prescaler); } +#endif /** * @brief Sets the TIM1 Input Capture 2 prescaler. @@ -1861,6 +1983,7 @@ void TIM1_SetIC1Prescaler(TIM1_ICPSC_TypeDef TIM1_IC1Prescaler) * - TIM1_ICPSC_DIV8: capture is done once every 8 events * @retval None */ +#if 1 void TIM1_SetIC2Prescaler(TIM1_ICPSC_TypeDef TIM1_IC2Prescaler) { @@ -1871,6 +1994,7 @@ void TIM1_SetIC2Prescaler(TIM1_ICPSC_TypeDef TIM1_IC2Prescaler) TIM1->CCMR2 = (uint8_t)((uint8_t)(TIM1->CCMR2 & (uint8_t)(~TIM1_CCMR_ICxPSC)) | (uint8_t)TIM1_IC2Prescaler); } +#endif /** * @brief Sets the TIM1 Input Capture 3 prescaler. @@ -1882,6 +2006,7 @@ void TIM1_SetIC2Prescaler(TIM1_ICPSC_TypeDef TIM1_IC2Prescaler) * - TIM1_ICPSC_DIV8: capture is done once every 8 events * @retval None */ +#if 1 void TIM1_SetIC3Prescaler(TIM1_ICPSC_TypeDef TIM1_IC3Prescaler) { @@ -1892,6 +2017,7 @@ void TIM1_SetIC3Prescaler(TIM1_ICPSC_TypeDef TIM1_IC3Prescaler) TIM1->CCMR3 = (uint8_t)((uint8_t)(TIM1->CCMR3 & (uint8_t)(~TIM1_CCMR_ICxPSC)) | (uint8_t)TIM1_IC3Prescaler); } +#endif /** * @brief Sets the TIM1 Input Capture 4 prescaler. @@ -1903,6 +2029,7 @@ void TIM1_SetIC3Prescaler(TIM1_ICPSC_TypeDef TIM1_IC3Prescaler) * - TIM1_ICPSC_DIV8: capture is done once every 8 events * @retval None */ +#if 1 void TIM1_SetIC4Prescaler(TIM1_ICPSC_TypeDef TIM1_IC4Prescaler) { @@ -1913,12 +2040,14 @@ void TIM1_SetIC4Prescaler(TIM1_ICPSC_TypeDef TIM1_IC4Prescaler) TIM1->CCMR4 = (uint8_t)((uint8_t)(TIM1->CCMR4 & (uint8_t)(~TIM1_CCMR_ICxPSC)) | (uint8_t)TIM1_IC4Prescaler); } +#endif /** * @brief Gets the TIM1 Input Capture 1 value. * @param None * @retval Capture Compare 1 Register value. */ +#if 1 uint16_t TIM1_GetCapture1(void) { /* Get the Capture 1 Register value */ @@ -1934,12 +2063,14 @@ uint16_t TIM1_GetCapture1(void) /* Get the Capture 1 Register value */ return (uint16_t)tmpccr1; } +#endif /** * @brief Gets the TIM1 Input Capture 2 value. * @param None * @retval Capture Compare 2 Register value. */ +#if 0 uint16_t TIM1_GetCapture2(void) { /* Get the Capture 2 Register value */ @@ -1955,12 +2086,14 @@ uint16_t TIM1_GetCapture2(void) /* Get the Capture 2 Register value */ return (uint16_t)tmpccr2; } +#endif /** * @brief Gets the TIM1 Input Capture 3 value. * @param None * @retval Capture Compare 3 Register value. */ +#if 0 uint16_t TIM1_GetCapture3(void) { /* Get the Capture 3 Register value */ @@ -1975,12 +2108,14 @@ uint16_t TIM1_GetCapture3(void) /* Get the Capture 3 Register value */ return (uint16_t)tmpccr3; } +#endif /** * @brief Gets the TIM1 Input Capture 4 value. * @param None * @retval Capture Compare 4 Register value. */ +#if 0 uint16_t TIM1_GetCapture4(void) { /* Get the Capture 4 Register value */ @@ -1995,12 +2130,14 @@ uint16_t TIM1_GetCapture4(void) /* Get the Capture 4 Register value */ return (uint16_t)tmpccr4; } +#endif /** * @brief Gets the TIM1 Counter value. * @param None * @retval Counter Register value. */ +#if 0 uint16_t TIM1_GetCounter(void) { uint16_t tmpcntr = 0; @@ -2010,12 +2147,14 @@ uint16_t TIM1_GetCounter(void) /* Get the Counter Register value */ return (uint16_t)(tmpcntr | (uint16_t)(TIM1->CNTRL)); } +#endif /** * @brief Gets the TIM1 Prescaler value. * @param None * @retval Prescaler Register value. */ +#if 0 uint16_t TIM1_GetPrescaler(void) { uint16_t temp = 0; @@ -2025,6 +2164,7 @@ uint16_t TIM1_GetPrescaler(void) /* Get the Prescaler Register value */ return (uint16_t)( temp | (uint16_t)(TIM1->PSCRL)); } +#endif /** * @brief Checks whether the specified TIM1 flag is set or not. @@ -2044,6 +2184,7 @@ uint16_t TIM1_GetPrescaler(void) * - TIM1_FLAG_CC4OF: TIM1 Capture Compare 4 overcapture Flag * @retval FlagStatus The new state of TIM1_FLAG (SET or RESET). */ +#if 0 FlagStatus TIM1_GetFlagStatus(TIM1_FLAG_TypeDef TIM1_FLAG) { FlagStatus bitstatus = RESET; @@ -2065,6 +2206,7 @@ FlagStatus TIM1_GetFlagStatus(TIM1_FLAG_TypeDef TIM1_FLAG) } return (FlagStatus)(bitstatus); } +#endif /** * @brief Clears the TIM1’s pending flags. @@ -2084,6 +2226,7 @@ FlagStatus TIM1_GetFlagStatus(TIM1_FLAG_TypeDef TIM1_FLAG) * - TIM1_FLAG_CC4OF: TIM1 Capture Compare 4 overcapture Flag * @retval None. */ +#if 1 void TIM1_ClearFlag(TIM1_FLAG_TypeDef TIM1_FLAG) { /* Check the parameters */ @@ -2094,6 +2237,7 @@ void TIM1_ClearFlag(TIM1_FLAG_TypeDef TIM1_FLAG) TIM1->SR2 = (uint8_t)((uint8_t)(~((uint8_t)((uint16_t)TIM1_FLAG >> 8))) & (uint8_t)0x1E); } +#endif /** * @brief Checks whether the TIM1 interrupt has occurred or not. @@ -2109,6 +2253,7 @@ void TIM1_ClearFlag(TIM1_FLAG_TypeDef TIM1_FLAG) * - TIM1_IT_BREAK: TIM1 Break Interrupt source * @retval ITStatus The new state of the TIM1_IT(SET or RESET). */ +#if 0 ITStatus TIM1_GetITStatus(TIM1_IT_TypeDef TIM1_IT) { ITStatus bitstatus = RESET; @@ -2131,6 +2276,7 @@ ITStatus TIM1_GetITStatus(TIM1_IT_TypeDef TIM1_IT) } return (ITStatus)(bitstatus); } +#endif /** * @brief Clears the TIM1's interrupt pending bits. @@ -2146,6 +2292,7 @@ ITStatus TIM1_GetITStatus(TIM1_IT_TypeDef TIM1_IT) * - TIM1_IT_BREAK: TIM1 Break Interrupt source * @retval None. */ +#if 0 void TIM1_ClearITPendingBit(TIM1_IT_TypeDef TIM1_IT) { /* Check the parameters */ @@ -2154,6 +2301,7 @@ void TIM1_ClearITPendingBit(TIM1_IT_TypeDef TIM1_IT) /* Clear the IT pending Bit */ TIM1->SR1 = (uint8_t)(~(uint8_t)TIM1_IT); } +#endif /** * @brief Configure the TI1 as Input. @@ -2171,6 +2319,7 @@ void TIM1_ClearITPendingBit(TIM1_IT_TypeDef TIM1_IT) * This parameter must be a value between 0x00 and 0x0F. * @retval None */ +#if 1 static void TI1_Config(uint8_t TIM1_ICPolarity, uint8_t TIM1_ICSelection, uint8_t TIM1_ICFilter) @@ -2195,6 +2344,7 @@ static void TI1_Config(uint8_t TIM1_ICPolarity, /* Set the CCE Bit */ TIM1->CCER1 |= TIM1_CCER1_CC1E; } +#endif /** * @brief Configure the TI2 as Input. @@ -2212,6 +2362,7 @@ static void TI1_Config(uint8_t TIM1_ICPolarity, * This parameter must be a value between 0x00 and 0x0F. * @retval None */ +#if 1 static void TI2_Config(uint8_t TIM1_ICPolarity, uint8_t TIM1_ICSelection, uint8_t TIM1_ICFilter) @@ -2234,6 +2385,7 @@ static void TI2_Config(uint8_t TIM1_ICPolarity, /* Set the CCE Bit */ TIM1->CCER1 |= TIM1_CCER1_CC2E; } +#endif /** * @brief Configure the TI3 as Input. @@ -2251,6 +2403,7 @@ static void TI2_Config(uint8_t TIM1_ICPolarity, * This parameter must be a value between 0x00 and 0x0F. * @retval None */ +#if 1 static void TI3_Config(uint8_t TIM1_ICPolarity, uint8_t TIM1_ICSelection, uint8_t TIM1_ICFilter) @@ -2274,6 +2427,7 @@ static void TI3_Config(uint8_t TIM1_ICPolarity, /* Set the CCE Bit */ TIM1->CCER2 |= TIM1_CCER2_CC3E; } +#endif /** * @brief Configure the TI4 as Input. @@ -2291,6 +2445,7 @@ static void TI3_Config(uint8_t TIM1_ICPolarity, * This parameter must be a value between 0x00 and 0x0F. * @retval None */ +#if 1 static void TI4_Config(uint8_t TIM1_ICPolarity, uint8_t TIM1_ICSelection, uint8_t TIM1_ICFilter) @@ -2315,7 +2470,7 @@ static void TI4_Config(uint8_t TIM1_ICPolarity, /* Set the CCE Bit */ TIM1->CCER2 |= TIM1_CCER2_CC4E; } - +#endif /** * @} diff --git a/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_uart1.c b/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_uart1.c old mode 100644 new mode 100755 index 8b2079a..046b1e8 --- a/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_uart1.c +++ b/software/Firmware/STM8S_StdPeriph_Lib/Libraries/STM8S_StdPeriph_Driver/src/stm8s_uart1.c @@ -208,6 +208,7 @@ void UART1_Cmd(FunctionalState NewState) * This parameter can be: ENABLE or DISABLE. * @retval None */ +#if 0 void UART1_ITConfig(UART1_IT_TypeDef UART1_IT, FunctionalState NewState) { uint8_t uartreg = 0, itpos = 0x00; @@ -255,6 +256,7 @@ void UART1_ITConfig(UART1_IT_TypeDef UART1_IT, FunctionalState NewState) } } +#endif /** * @brief Enables or disables the UART’s Half Duplex communication. @@ -262,6 +264,7 @@ void UART1_ITConfig(UART1_IT_TypeDef UART1_IT, FunctionalState NewState) * This parameter can be: ENABLE or DISABLE. * @retval None */ +#if 0 void UART1_HalfDuplexCmd(FunctionalState NewState) { assert_param(IS_FUNCTIONALSTATE_OK(NewState)); @@ -275,6 +278,7 @@ void UART1_HalfDuplexCmd(FunctionalState NewState) UART1->CR5 &= (uint8_t)~UART1_CR5_HDSEL; /**< UART1 Half Duplex Disable */ } } +#endif /** * @brief Configures the UART’s IrDA interface. @@ -282,6 +286,7 @@ void UART1_HalfDuplexCmd(FunctionalState NewState) * This parameter can be any of the @ref UART1_IrDAMode_TypeDef values. * @retval None */ +#if 0 void UART1_IrDAConfig(UART1_IrDAMode_TypeDef UART1_IrDAMode) { assert_param(IS_UART1_IRDAMODE_OK(UART1_IrDAMode)); @@ -295,6 +300,7 @@ void UART1_IrDAConfig(UART1_IrDAMode_TypeDef UART1_IrDAMode) UART1->CR5 &= ((uint8_t)~UART1_CR5_IRLP); } } +#endif /** * @brief Enables or disables the UART’s IrDA interface. @@ -302,6 +308,7 @@ void UART1_IrDAConfig(UART1_IrDAMode_TypeDef UART1_IrDAMode) * This parameter can be: ENABLE or DISABLE. * @retval None */ +#if 0 void UART1_IrDACmd(FunctionalState NewState) { /* Check parameters */ @@ -318,6 +325,7 @@ void UART1_IrDACmd(FunctionalState NewState) UART1->CR5 &= ((uint8_t)~UART1_CR5_IREN); } } +#endif /** * @brief Sets the UART1 LIN Break detection length. @@ -326,6 +334,7 @@ void UART1_IrDACmd(FunctionalState NewState) * @ref UART1_LINBreakDetectionLength_TypeDef values. * @retval None */ +#if 0 void UART1_LINBreakDetectionConfig(UART1_LINBreakDetectionLength_TypeDef UART1_LINBreakDetectionLength) { assert_param(IS_UART1_LINBREAKDETECTIONLENGTH_OK(UART1_LINBreakDetectionLength)); @@ -339,6 +348,7 @@ void UART1_LINBreakDetectionConfig(UART1_LINBreakDetectionLength_TypeDef UART1_L UART1->CR4 &= ((uint8_t)~UART1_CR4_LBDL); } } +#endif /** * @brief Enables or disables the UART1’s LIN mode. @@ -346,6 +356,7 @@ void UART1_LINBreakDetectionConfig(UART1_LINBreakDetectionLength_TypeDef UART1_L * This parameter can be: ENABLE or DISABLE. * @retval None */ +#if 0 void UART1_LINCmd(FunctionalState NewState) { assert_param(IS_FUNCTIONALSTATE_OK(NewState)); @@ -361,6 +372,7 @@ void UART1_LINCmd(FunctionalState NewState) UART1->CR3 &= ((uint8_t)~UART1_CR3_LINEN); } } +#endif /** * @brief Enables or disables the UART1 Smart Card mode. @@ -368,6 +380,7 @@ void UART1_LINCmd(FunctionalState NewState) * This parameter can be: ENABLE or DISABLE. * @retval None */ +#if 0 void UART1_SmartCardCmd(FunctionalState NewState) { assert_param(IS_FUNCTIONALSTATE_OK(NewState)); @@ -383,6 +396,7 @@ void UART1_SmartCardCmd(FunctionalState NewState) UART1->CR5 &= ((uint8_t)(~UART1_CR5_SCEN)); } } +#endif /** * @brief Enables or disables NACK transmission. @@ -391,6 +405,7 @@ void UART1_SmartCardCmd(FunctionalState NewState) * This parameter can be: ENABLE or DISABLE. * @retval None */ +#if 0 void UART1_SmartCardNACKCmd(FunctionalState NewState) { assert_param(IS_FUNCTIONALSTATE_OK(NewState)); @@ -406,6 +421,7 @@ void UART1_SmartCardNACKCmd(FunctionalState NewState) UART1->CR5 &= ((uint8_t)~(UART1_CR5_NACK)); } } +#endif /** * @brief Selects the UART1 WakeUp method. @@ -413,6 +429,7 @@ void UART1_SmartCardNACKCmd(FunctionalState NewState) * This parameter can be any of the @ref UART1_WakeUp_TypeDef values. * @retval None */ +#if 0 void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp) { assert_param(IS_UART1_WAKEUP_OK(UART1_WakeUp)); @@ -420,6 +437,7 @@ void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp) UART1->CR1 &= ((uint8_t)~UART1_CR1_WAKE); UART1->CR1 |= (uint8_t)UART1_WakeUp; } +#endif /** * @brief Determines if the UART1 is in mute mode or not. @@ -427,6 +445,7 @@ void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp) * This parameter can be: ENABLE or DISABLE. * @retval None */ +#if 0 void UART1_ReceiverWakeUpCmd(FunctionalState NewState) { assert_param(IS_FUNCTIONALSTATE_OK(NewState)); @@ -442,22 +461,26 @@ void UART1_ReceiverWakeUpCmd(FunctionalState NewState) UART1->CR2 &= ((uint8_t)~UART1_CR2_RWU); } } +#endif /** * @brief Returns the most recent received data by the UART1 peripheral. * @param None * @retval The received data. */ +#if 0 uint8_t UART1_ReceiveData8(void) { return ((uint8_t)UART1->DR); } +#endif /** * @brief Returns the most recent received data by the UART1 peripheral. * @param None * @retval The received data. */ +#if 0 uint16_t UART1_ReceiveData9(void) { uint16_t temp = 0; @@ -465,6 +488,7 @@ uint16_t UART1_ReceiveData9(void) temp = (uint16_t)(((uint16_t)( (uint16_t)UART1->CR1 & (uint16_t)UART1_CR1_R8)) << 1); return (uint16_t)( (((uint16_t) UART1->DR) | temp ) & ((uint16_t)0x01FF)); } +#endif /** * @brief Transmits 8 bit data through the UART1 peripheral. @@ -483,6 +507,7 @@ void UART1_SendData8(uint8_t Data) * This parameter should be lower than 0x1FF. * @retval None */ +#if 0 void UART1_SendData9(uint16_t Data) { /**< Clear the transmit data bit 8 [8] */ @@ -492,22 +517,26 @@ void UART1_SendData9(uint16_t Data) /**< Write the transmit data bit [0:7] */ UART1->DR = (uint8_t)(Data); } +#endif /** * @brief Transmits break characters. * @param None * @retval None */ +#if 0 void UART1_SendBreak(void) { UART1->CR2 |= UART1_CR2_SBK; } +#endif /** * @brief Sets the address of the UART1 node. * @param UART1_Address: Indicates the address of the UART1 node. * @retval None */ +#if 0 void UART1_SetAddress(uint8_t UART1_Address) { /*assert_param for UART1_Address*/ @@ -518,6 +547,7 @@ void UART1_SetAddress(uint8_t UART1_Address) /* Set the UART1 address node */ UART1->CR4 |= UART1_Address; } +#endif /** * @brief Sets the specified UART guard time. @@ -525,11 +555,13 @@ void UART1_SetAddress(uint8_t UART1_Address) * @param UART1_GuardTime: specifies the guard time. * @retval None */ +#if 0 void UART1_SetGuardTime(uint8_t UART1_GuardTime) { /* Set the UART1 guard time */ UART1->GTR = UART1_GuardTime; } +#endif /** * @brief Sets the system clock prescaler. @@ -553,11 +585,13 @@ void UART1_SetGuardTime(uint8_t UART1_GuardTime) * - ... * @retval None */ +#if 0 void UART1_SetPrescaler(uint8_t UART1_Prescaler) { /* Load the UART1 prescaler value*/ UART1->PSCR = UART1_Prescaler; } +#endif /** * @brief Checks whether the specified UART1 flag is set or not. @@ -672,6 +706,7 @@ void UART1_ClearFlag(UART1_Flag_TypeDef UART1_FLAG) * - UART1_IT_PE: Parity Error interrupt * @retval The new state of UART1_IT (SET or RESET). */ +#if 0 ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT) { ITStatus pendingbitstatus = RESET; @@ -746,6 +781,7 @@ ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT) /* Return the UART1_IT status*/ return pendingbitstatus; } +#endif /** * @brief Clears the UART1 pending flags. @@ -772,6 +808,7 @@ ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT) * (UART1_SendData8() or UART1_SendData9()). * @retval None */ +#if 0 void UART1_ClearITPendingBit(UART1_IT_TypeDef UART1_IT) { assert_param(IS_UART1_CLEAR_IT_OK(UART1_IT)); @@ -787,7 +824,7 @@ void UART1_ClearITPendingBit(UART1_IT_TypeDef UART1_IT) UART1->CR4 &= (uint8_t)~(UART1_CR4_LBDF); } } - +#endif /** * @} */ diff --git a/software/Firmware/Src/ClockConfigurator.c b/software/Firmware/Src/ClockConfigurator.c index 7f31455..3dc5ba2 100755 --- a/software/Firmware/Src/ClockConfigurator.c +++ b/software/Firmware/Src/ClockConfigurator.c @@ -19,17 +19,16 @@ void ClockConfigurator_Init() CLK_ClockSwitchCmd(ENABLE); CLK_HSIPrescalerConfig(CLK_PRESCALER_HSIDIV8); - CLK_SYSCLKConfig(CLK_PRESCALER_CPUDIV1); + //CLK_SYSCLKConfig(CLK_PRESCALER_CPUDIV1); + CLK_HSIPrescalerConfig(CLK_PRESCALER_HSIDIV1); - CLK_ClockSwitchConfig(CLK_SWITCHMODE_AUTO, CLK_SOURCE_HSI, - DISABLE, CLK_CURRENTCLOCKSTATE_ENABLE); + CLK_ClockSwitchConfig(CLK_SWITCHMODE_AUTO, + CLK_SOURCE_HSI, + DISABLE, + CLK_CURRENTCLOCKSTATE_ENABLE); - // CLK_PeripheralClockConfig(CLK_PERIPHERAL_I2C, DISABLE); - // CLK_PeripheralClockConfig(CLK_PERIPHERAL_SPI, DISABLE); - // CLK_PeripheralClockConfig(CLK_PERIPHERAL_ADC, DISABLE); - CLK_PeripheralClockConfig(CLK_PERIPHERAL_AWU, DISABLE); + CLK_PeripheralClockConfig(CLK_PERIPHERAL_I2C, ENABLE); + CLK_PeripheralClockConfig(CLK_PERIPHERAL_AWU, ENABLE); CLK_PeripheralClockConfig(CLK_PERIPHERAL_UART1, ENABLE); - CLK_PeripheralClockConfig(CLK_PERIPHERAL_TIMER1, DISABLE); - CLK_PeripheralClockConfig(CLK_PERIPHERAL_TIMER2, DISABLE); - CLK_PeripheralClockConfig(CLK_PERIPHERAL_TIMER4, DISABLE); + CLK_PeripheralClockConfig(CLK_PERIPHERAL_TIMER1, ENABLE); } diff --git a/software/Firmware/Src/MCP3425A0T.c b/software/Firmware/Src/MCP3425A0T.c old mode 100644 new mode 100755 index a27c10b..dcb9c45 --- a/software/Firmware/Src/MCP3425A0T.c +++ b/software/Firmware/Src/MCP3425A0T.c @@ -7,18 +7,11 @@ #include "MCP3425A0T.h" -#include "stm8s_gpio.h" +#include "stm8s_i2c.h" -bool MCP3425A0T_Init(MCP3425A0TConfig_t *config) +void MCP3425A0T_Init(MCP3425A0TConfig_t *config) { - GPIO_Init(GPIOD, config->pinId, GPIO_MODE_OUT_PP_LOW_FAST); - - GPIOD->ODR |= config->pinId; - - GPIOD->ODR ^= config->pinId; - - // TODO - return TRUE; + I2C_DeInit(); } diff --git a/software/Firmware/Src/main.c b/software/Firmware/Src/main.c index f37be35..b270e52 100755 --- a/software/Firmware/Src/main.c +++ b/software/Firmware/Src/main.c @@ -6,6 +6,7 @@ */ #include "stm8s.h" +#include #include "ApplicationBuilder.h" int main( void ) @@ -17,12 +18,14 @@ int main( void ) } #ifdef USE_FULL_ASSERT - +// TODO move this to logger module void assert_failed(uint8_t* file, uint32_t line) { (void)file; (void)line; + printf("[error] asset failed %s %d\r\n", file, line); + while (TRUE) { // empty diff --git a/software/Firmware/makefile b/software/Firmware/makefile index d048902..6e0844c 100755 --- a/software/Firmware/makefile +++ b/software/Firmware/makefile @@ -19,7 +19,7 @@ DEFINES = -D$(COMPILER) -D$(MCU) -DUSE_STDPERIPH_DRIVER #CFLAGS = -mstm8 --std-c99 $(DEFINES) -CFLAGS = -mstm8 $(DEFINES) +CFLAGS = -mstm8 $(DEFINES) --opt-code-size LDFLAGS = $(addprefix -I ,$(INCLUDEDIR)) BUILD_DIR = Build @@ -41,25 +41,24 @@ build: $(IHX) $(BUILD_DIR)/stm8s_gpio.rel: -# $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(STDLIB)/src/stm8s_beep.rel $(STDLIB)/src/stm8s_beep.c - $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(STDLIB)/src/stm8s_clk.rel $(STDLIB)/src/stm8s_clk.c $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(STDLIB)/src/stm8s_gpio.rel $(STDLIB)/src/stm8s_gpio.c -$(BUILD_DIR)/stm8s_uart1.rel: +$(BUILD_DIR)/stm8s_clk.rel: $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(STDLIB)/src/stm8s_clk.rel $(STDLIB)/src/stm8s_clk.c + +$(BUILD_DIR)/stm8s_uart1.rel: $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(STDLIB)/src/stm8s_uart1.rel $(STDLIB)/src/stm8s_uart1.c $(BUILD_DIR)/stm8s_awu.rel: - $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(STDLIB)/src/stm8s_clk.rel $(STDLIB)/src/stm8s_clk.c $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(STDLIB)/src/stm8s_awu.rel $(STDLIB)/src/stm8s_awu.c -$(BUILD_DIR)/stm8s_it.rel: +$(BUILD_DIR)/stm8s_i2c.rel: $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(STDLIB)/src/stm8s_i2c.rel $(STDLIB)/src/stm8s_i2c.c $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ -o Build/ "Src/stm8s_it.rel" "Src/stm8s_it.c" $(BUILD_DIR)/stm8s_tim1.rel: $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(STDLIB)/src/stm8s_tim1.rel $(STDLIB)/src/stm8s_tim1.c -# $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ -o Build/ "Src/stm8s_tim1.rel" "Src/stm8s_tim1.c" + $(BUILD_DIR)/ClockConfigurator.rel: $(SRCS)/ClockConfigurator.c @@ -81,16 +80,37 @@ $(BUILD_DIR)/Logger.rel: $(SRCS)/Logger.c $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(SRCS)/Logger.rel $(SRCS)/Logger.c -$(BUILD_DIR)/ApplicationBuilder.rel: $(SRCS)/ApplicationBuilder.c $(BUILD_DIR)/MCP3425A0T.rel $(BUILD_DIR)/PulseCounter.rel $(BUILD_DIR)/Logger.rel $(BUILD_DIR)/UserInterface.rel $(BUILD_DIR)/stm8s_uart1.rel $(BUILD_DIR)/AutoWakeupConfigurator.rel $(BUILD_DIR)/stm8s_awu.rel +$(BUILD_DIR)/ApplicationBuilder.rel: $(SRCS)/ApplicationBuilder.c $(BUILD_DIR)/MCP3425A0T.rel $(BUILD_DIR)/PulseCounter.rel $(BUILD_DIR)/Logger.rel $(BUILD_DIR)/UserInterface.rel $(BUILD_DIR)/stm8s_uart1.rel $(BUILD_DIR)/AutoWakeupConfigurator.rel $(BUILD_DIR)/stm8s_awu.rel $(BUILD_DIR)/stm8s_i2c.rel $(CC) -c $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $(SRCS)/ApplicationBuilder.rel $(SRCS)/ApplicationBuilder.c -$(IHX): $(SRCS)/$(TARGET).c $(BUILD_DIR)/ApplicationBuilder.rel $(BUILD_DIR)/stm8s_gpio.rel $(BUILD_DIR)/stm8s_it.rel $(BUILD_DIR)/stm8s_uart1.rel $(BUILD_DIR)/stm8s_clk.rel $(BUILD_DIR)/ClockConfigurator.rel +$(IHX): $(SRCS)/$(TARGET).c \ + $(BUILD_DIR)/ApplicationBuilder.rel \ + $(BUILD_DIR)/stm8s_gpio.rel \ + $(BUILD_DIR)/stm8s_i2c.rel \ + $(BUILD_DIR)/stm8s_uart1.rel \ + $(BUILD_DIR)/stm8s_clk.rel \ + $(BUILD_DIR)/ClockConfigurator.rel \ + $(BUILD_DIR)/stm8s_tim1.rel mkdir -p $(BUILD_DIR) - $(CC) $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $< $(BUILD_DIR)/stm8s_gpio.rel $(BUILD_DIR)/stm8s_it.rel $(BUILD_DIR)/MCP3425A0T.rel $(BUILD_DIR)/ApplicationBuilder.rel $(BUILD_DIR)/PulseCounter.rel $(BUILD_DIR)/Logger.rel $(BUILD_DIR)/UserInterface.rel $(BUILD_DIR)/stm8s_uart1.rel $(BUILD_DIR)/stm8s_clk.rel $(BUILD_DIR)/ClockConfigurator.rel $(BUILD_DIR)/AutoWakeupConfigurator.rel $(BUILD_DIR)/stm8s_awu.rel + $(CC) $(CFLAGS) $(LDFLAGS) -o $(BUILD_DIR)/ $< \ + $(BUILD_DIR)/stm8s_gpio.rel \ + $(BUILD_DIR)/stm8s_it.rel \ + $(BUILD_DIR)/MCP3425A0T.rel \ + $(BUILD_DIR)/ApplicationBuilder.rel \ + $(BUILD_DIR)/PulseCounter.rel \ + $(BUILD_DIR)/Logger.rel \ + $(BUILD_DIR)/UserInterface.rel \ + $(BUILD_DIR)/stm8s_uart1.rel \ + $(BUILD_DIR)/stm8s_clk.rel \ + $(BUILD_DIR)/stm8s_i2c.rel \ + $(BUILD_DIR)/ClockConfigurator.rel \ + $(BUILD_DIR)/AutoWakeupConfigurator.rel \ + $(BUILD_DIR)/stm8s_awu.rel \ + $(BUILD_DIR)/stm8s_tim1.rel $(SIZE) $@