kopia lustrzana https://github.com/Hamlib/Hamlib
hiqsdr.c: Updates from Jim, N2ADR
Here is a new hardware file kit/hiqsdr.c to control the HiQSDR. It adds the missing "get" commands. It has been tested by the HiQSDR Yahoo group members. Please direct corrections and requests to me. Jim Ahlstrom N2ADR Signed-off-by: Nate Bargmann <n0nb@n0nb.us>Hamlib-1.2.15
James Ahlstrom
Nate Bargmann
rodzic
a214273a32
commit
f2fe401b60
240
kit/hiqsdr.c
240
kit/hiqsdr.c
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@ -38,6 +38,38 @@
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* http://www.hiqsdr.org
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*/
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/* From the hardware file hiqsdr/quisk_hardware.py:
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# want_udp_status is a 14-byte string with numbers in little-endian order:
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# [0:2] 'St'
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# [2:6] Rx tune phase
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# [6:10] Tx tune phase
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# [10] Tx output level 0 to 255
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# [11] Tx control bits:
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# 0x01 Enable CW transmit
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# 0x02 Enable all other transmit
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# 0x04 Use the HiQSDR extended IO pins not present in the 2010 QEX ver 1.0
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# 0x08 The key is down (software key)
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# [12] Rx control bits
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# Second stage decimation less one, 1-39, six bits
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# [13] zero or firmware version number
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# The above is used for firmware version 1.0.
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# Version 1.1 adds eight more bytes for the HiQSDR conntrol ports:
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# [14] X1 connector: Preselect pins 69, 68, 65, 64; Preamp pin 63, Tx LED pin 57
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# [15] Attenuator pins 84, 83, 82, 81, 80
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# [16] More bits: AntSwitch pin 41 is 0x01
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# [17:22] The remaining five bytes are sent as zero.
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# Version 1.2 uses the same format as 1.1, but adds the "Qs" command (see below).
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# Version 1.3 adds features needed by the new quisk_vna.py program:
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# [17] This one byte must be zero
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# [18:20] This is vna_count, the number of VNA data points; or zero for normal operation
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# [20:22] These two bytes mmust be zero
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# The "Qs" command is a two-byte UDP packet sent to the control port. It returns the hardware status
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# as the above string, except that the string starts with "Qs" instead of "St". Do not send the "Qs" command
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# from Quisk, as it interferes with the "St" command. The "Qs" command is meant to be used from an
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# external program, such as HamLib or a logging program.
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*/
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/* HiQSDR constants */
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#define REFCLOCK 122880000
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@ -50,7 +82,8 @@ struct hiqsdr_priv_data {
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split_t split;
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int sample_rate;
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double ref_clock;
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unsigned char control_frame[CTRL_FRAME_LEN];
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unsigned char control_frame[CTRL_FRAME_LEN]; /* control string sent to the hardware */
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unsigned char received_frame[CTRL_FRAME_LEN]; /* current control string as received from the hardware */
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};
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static int hiqsdr_init(RIG *rig);
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@ -61,10 +94,15 @@ static int hiqsdr_close(RIG *rig);
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static int hiqsdr_set_freq(RIG *rig, vfo_t vfo, freq_t freq);
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static int hiqsdr_get_freq(RIG *rig, vfo_t vfo, freq_t *freq);
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static int hiqsdr_set_split_vfo(RIG *rig, vfo_t vfo, split_t split, vfo_t tx_vfo);
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static int hiqsdr_get_split_vfo(RIG *rig, vfo_t vfo, split_t *split, vfo_t *tx_vfo);
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static int hiqsdr_set_split_freq(RIG *rig, vfo_t vfo, freq_t tx_freq);
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static int hiqsdr_get_split_freq(RIG *rig, vfo_t vfo, freq_t *tx_freq);
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static int hiqsdr_set_mode(RIG *rig, vfo_t vfo, rmode_t mode, pbwidth_t width);
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static int hiqsdr_get_mode(RIG *rig, vfo_t vfo, rmode_t *mode, pbwidth_t *width);
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static int hiqsdr_set_ptt(RIG *rig, vfo_t vfo, ptt_t ptt);
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static int hiqsdr_get_ptt(RIG *rig, vfo_t vfo, ptt_t *ptt);
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static int hiqsdr_set_ant(RIG *rig, vfo_t vfo, ant_t ant);
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static int hiqsdr_get_ant(RIG *rig, vfo_t vfo, ant_t *ant);
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static int hiqsdr_set_conf(RIG *rig, token_t token, const char *val);
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static int hiqsdr_get_conf(RIG *rig, token_t token, char *val);
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@ -105,7 +143,7 @@ const struct rig_caps hiqsdr_caps = {
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.rig_model = RIG_MODEL_HIQSDR,
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.model_name = "HiQSDR",
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.mfg_name = "N2ADR",
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.version = "0.1",
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.version = "0.2",
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.copyright = "LGPL",
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.status = RIG_STATUS_UNTESTED,
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.rig_type = RIG_TYPE_TUNER,
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@ -163,29 +201,67 @@ const struct rig_caps hiqsdr_caps = {
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.get_freq = hiqsdr_get_freq,
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.set_split_freq = hiqsdr_set_split_freq,
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.get_split_freq = hiqsdr_get_split_freq,
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.set_split_vfo = hiqsdr_set_split_vfo,
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.get_split_vfo = hiqsdr_get_split_vfo,
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.set_mode = hiqsdr_set_mode,
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.get_mode = hiqsdr_get_mode,
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.set_ptt = hiqsdr_set_ptt,
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.get_ptt = hiqsdr_get_ptt,
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.set_ant = hiqsdr_set_ant,
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.get_ant = hiqsdr_get_ant,
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.set_level = hiqsdr_set_level,
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.get_level = hiqsdr_get_level,
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};
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static void hiqsdr_discard(RIG *rig)
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{ /* Read the UDP port until no more data remains - limit the number of reads for safety */
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int i, ret, timeout;
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timeout = rig->state.rigport.timeout; /* save timeout and replace with a smaller value */
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rig->state.rigport.timeout = 10;
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for (i = 0; i < 5; i++) {
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ret = read_block(&rig->state.rigport, (char*)priv->received_frame, CTRL_FRAME_LEN);
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if (ret < 0)
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break;
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}
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rig->state.rigport.timeout = timeout;
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}
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static int hiqsdr_query(RIG *rig)
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{ /* Send a "Qs" command to the hardware to return the current control string */
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret;
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hiqsdr_discard(rig);
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priv->received_frame[0] = 'Q';
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priv->received_frame[1] = 's';
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ret = write_block(&rig->state.rigport, (const char*)priv->received_frame, 2);
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if (ret != RIG_OK)
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return ret;
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ret = read_block(&rig->state.rigport, (char*)priv->received_frame, CTRL_FRAME_LEN);
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if (ret < 0)
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return ret;
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else if (ret != CTRL_FRAME_LEN)
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return -RIG_EPROTO;
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return RIG_OK;
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}
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static int send_command(RIG *rig)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data*)rig->state.priv;
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int ret;
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ret = write_block(&rig->state.rigport, (const char*)priv->control_frame, CTRL_FRAME_LEN);
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#if 0
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ret = read_block(&rig->state.rigport, (char*)priv->control_frame, CTRL_FRAME_LEN);
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if (ret != CTRL_FRAME_LEN)
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ret = ret < 0 ? ret : -RIG_EPROTO;
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#endif
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/* All commands send back the current hardware state string */
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hiqsdr_discard(rig); /* throw away the response */
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return ret;
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}
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@ -368,6 +444,23 @@ int hiqsdr_set_freq(RIG *rig, vfo_t vfo, freq_t freq)
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return ret;
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}
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int hiqsdr_get_freq(RIG *rig, vfo_t vfo, freq_t *freq)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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uint32_t rxphase32;
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int ret;
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ret = hiqsdr_query(rig);
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if (ret != RIG_OK)
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return ret;
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rxphase32 = (uint32_t)priv->received_frame[2]
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| (uint32_t)priv->received_frame[3] << 8
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| (uint32_t)priv->received_frame[4] << 16
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| (uint32_t)priv->received_frame[5] << 24;
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*freq = (freq_t)((double)rxphase32 * priv->ref_clock / (1ULL<<32) + 0.5);
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return RIG_OK;
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}
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static int hiqsdr_set_split_vfo(RIG *rig, vfo_t vfo, split_t split, vfo_t tx_vfo)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data*)rig->state.priv;
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@ -377,6 +470,14 @@ static int hiqsdr_set_split_vfo(RIG *rig, vfo_t vfo, split_t split, vfo_t tx_vfo
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return RIG_OK;
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}
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int hiqsdr_get_split_vfo(RIG *rig, vfo_t vfo, split_t *split, vfo_t *tx_vfo)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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*split = priv->split;
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return RIG_OK;
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}
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int hiqsdr_set_split_freq(RIG *rig, vfo_t vfo, freq_t tx_freq)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data*)rig->state.priv;
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@ -400,9 +501,21 @@ int hiqsdr_set_split_freq(RIG *rig, vfo_t vfo, freq_t tx_freq)
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}
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int hiqsdr_get_freq(RIG *rig, vfo_t vfo, freq_t *freq)
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int hiqsdr_get_split_freq(RIG *rig, vfo_t vfo, freq_t *tx_freq)
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{
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return -RIG_ENIMPL;
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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uint32_t txphase32;
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int ret;
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ret = hiqsdr_query(rig);
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if (ret != RIG_OK)
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return ret;
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txphase32 = (uint32_t)priv->received_frame[6]
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| (uint32_t)priv->received_frame[7] << 8
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| (uint32_t)priv->received_frame[8] << 16
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| (uint32_t)priv->received_frame[9] << 24;
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*tx_freq = (freq_t)((double)txphase32 * priv->ref_clock / (1ULL<<32) + 0.5);
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return RIG_OK;
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}
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int hiqsdr_set_mode(RIG *rig, vfo_t vfo, rmode_t mode, pbwidth_t width)
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@ -425,6 +538,25 @@ int hiqsdr_set_mode(RIG *rig, vfo_t vfo, rmode_t mode, pbwidth_t width)
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return ret;
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}
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int hiqsdr_get_mode(RIG *rig, vfo_t vfo, rmode_t *mode, pbwidth_t *width)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret;
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ret = hiqsdr_query(rig);
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if (ret != RIG_OK)
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return ret;
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if (priv->received_frame[11] & 0x01) {
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*mode = RIG_MODE_CW;
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*width = 500; /* the bandwidth is unknown */
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}
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else {
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*mode = RIG_MODE_USB; /* We only know that the mode is not CW */
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*width = 2800; /* the bandwidth is unknown */
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}
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return RIG_OK;
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}
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int hiqsdr_set_ptt(RIG *rig, vfo_t vfo, ptt_t ptt)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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@ -448,6 +580,23 @@ int hiqsdr_set_ptt(RIG *rig, vfo_t vfo, ptt_t ptt)
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return ret;
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}
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int hiqsdr_get_ptt(RIG *rig, vfo_t vfo, ptt_t *ptt)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret;
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ret = hiqsdr_query(rig);
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if (ret != RIG_OK)
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return ret;
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if (priv->received_frame[11] & 0x08) /* Status of software PTT */
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*ptt = RIG_PTT_ON;
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else if (priv->received_frame[14] & 0x01) /* Status of software PTT and hardware PTT */
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*ptt = RIG_PTT_ON;
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else
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*ptt = RIG_PTT_OFF;
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return RIG_OK;
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}
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int hiqsdr_set_ant(RIG *rig, vfo_t vfo, ant_t ant)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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@ -467,13 +616,28 @@ int hiqsdr_set_ant(RIG *rig, vfo_t vfo, ant_t ant)
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return ret;
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}
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int hiqsdr_get_ant(RIG *rig, vfo_t vfo, ant_t *ant)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret;
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ret = hiqsdr_query(rig);
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if (ret != RIG_OK)
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return ret;
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if (priv->received_frame[16] & 0x01)
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*ant = RIG_ANT_2;
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else
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*ant = RIG_ANT_1;
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return RIG_OK;
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}
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/*
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*/
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int hiqsdr_set_level(RIG *rig, vfo_t vfo, setting_t level, value_t val)
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{
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret = RIG_OK;
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int ret = RIG_OK, dB;
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switch (level) {
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case RIG_LEVEL_PREAMP:
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@ -483,8 +647,29 @@ int hiqsdr_set_level(RIG *rig, vfo_t vfo, setting_t level, value_t val)
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priv->control_frame[14] &= ~0x02;
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break;
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case RIG_LEVEL_ATT:
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/* FIXME: val->i should be looked up from the att list */
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priv->control_frame[14] = val.i & 0x1f;
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/* The attenuator pins provide 2, 4, 8, 10, 20 dB */
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dB = val.i;
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priv->control_frame[15] = 0;
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if (dB >= 20) {
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priv->control_frame[15] |= 0x10;
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dB -= 20;
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}
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if (dB >= 10) {
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priv->control_frame[15] |= 0x08;
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dB -= 10;
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}
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if (dB >= 8) {
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priv->control_frame[15] |= 0x04;
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dB -= 8;
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}
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if (dB >= 4) {
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priv->control_frame[15] |= 0x02;
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dB -= 4;
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}
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if (dB >= 2) {
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priv->control_frame[15] |= 0x01;
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dB -= 2;
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}
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break;
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case RIG_LEVEL_RFPOWER:
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/* TX output level */
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@ -501,6 +686,35 @@ int hiqsdr_set_level(RIG *rig, vfo_t vfo, setting_t level, value_t val)
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static int hiqsdr_get_level(RIG *rig, vfo_t vfo, setting_t level, value_t *val)
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{
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return -RIG_ENIMPL;
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struct hiqsdr_priv_data *priv = (struct hiqsdr_priv_data *)rig->state.priv;
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int ret;
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ret = hiqsdr_query(rig);
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if (ret != RIG_OK)
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return ret;
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switch (level) {
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case RIG_LEVEL_PREAMP:
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if (priv->received_frame[14] & 0x02)
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val->i = 1;
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else
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val->i = 0;
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break;
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case RIG_LEVEL_ATT:
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val->i = 0;
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if (priv->received_frame[15] & 0x10) val->i += 20;
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if (priv->received_frame[15] & 0x08) val->i += 10;
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if (priv->received_frame[15] & 0x04) val->i += 8;
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if (priv->received_frame[15] & 0x02) val->i += 4;
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if (priv->received_frame[15] & 0x01) val->i += 2;
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break;
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case RIG_LEVEL_RFPOWER:
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/* TX output level */
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val->f = (unsigned)priv->received_frame[10] / 255.0;
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break;
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default:
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return -RIG_EINVAL;
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}
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return RIG_OK;
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}
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