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Fix rx_range and tx_range lists for ic9700

pull/224/head
Michael Black 2020-02-12 08:11:52 -06:00
rodzic fcf2e3094e
commit 9d4e1c502a
1 zmienionych plików z 28 dodań i 10 usunięć
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38
rigs/icom/ic7300.c
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@ -131,8 +131,8 @@ struct cmdparams ic7300_extcmds[] = {
#define IC9700_FUNCS (RIG_FUNC_NB|RIG_FUNC_COMP|RIG_FUNC_VOX|RIG_FUNC_TONE|RIG_FUNC_TSQL|RIG_FUNC_SBKIN|RIG_FUNC_FBKIN|RIG_FUNC_NR|RIG_FUNC_MON|RIG_FUNC_MN|RIG_FUNC_ANF|RIG_FUNC_LOCK|RIG_FUNC_RIT|RIG_FUNC_SCOPE|RIG_FUNC_SATMODE|RIG_FUNC_AFC)
#define IC9700_VFO_OPS (RIG_OP_CPY|RIG_OP_XCHG|RIG_OP_FROM_VFO|RIG_OP_TO_VFO|RIG_OP_MCL)
#define IC9700_ALL_TX_MODES (RIG_MODE_FM|RIG_MODE_AM|RIG_MODE_CW|RIG_MODE_CWR|RIG_MODE_SSB|RIG_MODE_RTTY|RIG_MODE_RTTYR|RIG_MODE_DSTAR|RIG_MODE_DD)
#define IC9700_ALL_RX_MODES (RIG_MODE_FM|RIG_MODE_AM|RIG_MODE_CW|RIG_MODE_CWR|RIG_MODE_SSB|RIG_MODE_RTTY|RIG_MODE_RTTYR|RIG_MODE_DSTAR|RIG_MODE_DD)
#define IC9700_ALL_TX_MODES (RIG_MODE_FM|RIG_MODE_AM|RIG_MODE_CW|RIG_MODE_CWR|RIG_MODE_SSB|RIG_MODE_RTTY|RIG_MODE_RTTYR|RIG_MODE_DSTAR|RIG_MODE_DD|RIG_MODE_DSTAR)
#define IC9700_ALL_RX_MODES (RIG_MODE_FM|RIG_MODE_AM|RIG_MODE_CW|RIG_MODE_CWR|RIG_MODE_SSB|RIG_MODE_RTTY|RIG_MODE_RTTYR|RIG_MODE_DSTAR|RIG_MODE_DD|RIG_MODE_DSTAR)
struct cmdparams ic9700_extcmds[] = {
{ {.s=RIG_PARM_BEEP}, C_CTL_MEM, S_MEM_PARM, SC_MOD_RW, 2, {0x00, 0x29}, CMD_DAT_BOL, 1 },
@ -468,19 +468,37 @@ const struct rig_caps ic9700_caps =
RIG_CHAN_END,
},
.rx_range_list1 = { {kHz(30), MHz(74.8), IC7300_ALL_RX_MODES, -1, -1, IC9700_VFOS}, RIG_FRNG_END, },
// Hopefully any future changes in bandplans can be fixed with firmware updates
// So we use the global REGION2 macros in here
.rx_range_list1 = { // EUR Version
{MHz(144), MHz(146), IC9700_ALL_RX_MODES, -1, -1, IC9700_VFOS, RIG_ANT_CURR},
{MHz(430), MHz(440), IC9700_ALL_RX_MODES, -1, -1, IC9700_VFOS, RIG_ANT_CURR},
{MHz(1240), MHz(1300), IC9700_ALL_RX_MODES, -1, -1, IC9700_VFOS, RIG_ANT_CURR},
RIG_FRNG_END,
},
.tx_range_list1 = {
FRQ_RNG_2m(1, IC9700_ALL_TX_MODES, W(2), W(100), IC9700_VFOS, RIG_ANT_2),
FRQ_RNG_70cm(1, IC9700_ALL_TX_MODES, W(2), W(75), IC9700_VFOS, RIG_ANT_2),
FRQ_RNG_23cm(1, IC9700_ALL_TX_MODES, W(2), W(23), IC9700_VFOS, RIG_ANT_3),
FRQ_RNG_2m_REGION1(IC9700_ALL_TX_MODES^RIG_MODE_AM, W(0.5), W(100), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_70cm_REGION1(IC9700_ALL_TX_MODES^RIG_MODE_AM, W(0.5), W(75), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_23cm_REGION1(IC9700_ALL_TX_MODES^RIG_MODE_AM, W(0.1), W(10), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_2m_REGION1(RIG_MODE_AM, W(0.125), W(25), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_70cm_REGION1(RIG_MODE_AM, W(0.125), W(18.75), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_23cm_REGION1(RIG_MODE_AM, W(0.025), W(2.5), IC9700_VFOS, RIG_ANT_CURR),
RIG_FRNG_END,
},
.rx_range_list2 = { {kHz(30), MHz(74.8), IC7300_ALL_RX_MODES, -1, -1, IC9700_VFOS}, RIG_FRNG_END, },
.rx_range_list2 = { // USA Version
{MHz(144), MHz(148), IC9700_ALL_RX_MODES, -1, -1, IC9700_VFOS, RIG_ANT_CURR},
{MHz(430), MHz(450), IC9700_ALL_RX_MODES, -1, -1, IC9700_VFOS, RIG_ANT_CURR},
{MHz(1240), MHz(1300), IC9700_ALL_RX_MODES, -1, -1, IC9700_VFOS, RIG_ANT_CURR},
RIG_FRNG_END,
},
.tx_range_list2 = {
FRQ_RNG_2m(1, IC9700_ALL_TX_MODES, W(2), W(100), IC9700_VFOS, RIG_ANT_2),
FRQ_RNG_70cm(1, IC9700_ALL_TX_MODES, W(2), W(75), IC9700_VFOS, RIG_ANT_2),
FRQ_RNG_23cm(1, IC9700_ALL_TX_MODES, W(2), W(23), IC9700_VFOS, RIG_ANT_3),
FRQ_RNG_2m_REGION2(IC9700_ALL_TX_MODES^RIG_MODE_AM, W(0.5), W(100), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_70cm_REGION2(IC9700_ALL_TX_MODES^RIG_MODE_AM, W(0.5), W(75), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_23cm_REGION2(IC9700_ALL_TX_MODES^RIG_MODE_AM, W(0.1), W(10), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_2m_REGION2(RIG_MODE_AM, W(0.125), W(25), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_70cm_REGION2(RIG_MODE_AM, W(0.125), W(18.75), IC9700_VFOS, RIG_ANT_CURR),
FRQ_RNG_23cm_REGION2(RIG_MODE_AM, W(0.025), W(2.5), IC9700_VFOS, RIG_ANT_CURR),
RIG_FRNG_END,
},