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Add RIG_MODE_SPEC for PowerSDR and perhaps others to come

pull/494/head
Michael Black W9MDB 2020-12-27 14:53:39 -06:00
rodzic a53f494582
commit 82958c957c
4 zmienionych plików z 17 dodań i 14 usunięć
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2
include/hamlib/rig.h
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@ -1153,7 +1153,7 @@ typedef uint64_t rmode_t;
#define RIG_MODE_DD CONSTANT_64BIT_FLAG (32) /*!< \c DD Mode IC-9700 */
#define RIG_MODE_C4FM CONSTANT_64BIT_FLAG (33) /*!< \c Yaesu C4FM mode */
#define RIG_MODE_PKTFMN CONSTANT_64BIT_FLAG (34) /*!< \c Yaesu DATA-FM-N */
#define RIG_MODE_BIT35 CONSTANT_64BIT_FLAG (35) /*!< \c reserved for future expansion */
#define RIG_MODE_SPEC CONSTANT_64BIT_FLAG (35) /*!< \c Unfiltered as in PowerSDR */
#define RIG_MODE_BIT36 CONSTANT_64BIT_FLAG (36) /*!< \c reserved for future expansion */
#define RIG_MODE_BIT37 CONSTANT_64BIT_FLAG (37) /*!< \c reserved for future expansion */
#define RIG_MODE_BIT38 CONSTANT_64BIT_FLAG (38) /*!< \c reserved for future expansion */

3
rigs/dummy/flrig.c
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@ -908,7 +908,8 @@ static int flrig_open(RIG *rig)
else if (streq(p, "WFM")) { modeMapAdd(&modes, RIG_MODE_WFM, p); }
else if (streq(p, "UCW")) { modeMapAdd(&modes, RIG_MODE_CW, p); }
else if (streq(p, "C4FM")) { modeMapAdd(&modes, RIG_MODE_C4FM, p); }
else if (streq(p, "SPEC") || streq(p,"DRM"))
else if (streq(p, "SPEC")) { modeMapAdd(&modes, RIG_MODE_SPEC, p); }
else if (streq(p,"DRM")) // we don't support DRM yet (or maybe ever)
{
rig_debug(RIG_DEBUG_VERBOSE, "%s: no mapping for mode %s\n", __func__, p);
}

2
rigs/dummy/flrig.h
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@ -28,7 +28,7 @@
#include <sys/time.h>
#endif
#define BACKEND_VER "20201226"
#define BACKEND_VER "20201227"
#define EOM "\r"
#define TRUE 1

24
rigs/kenwood/flex6xxx.c
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@ -49,6 +49,8 @@
#define F6K_ANTS (RIG_ANT_1|RIG_ANT_2|RIG_ANT_3)
/* PowerSDR differences */
#define POWERSDR_MODES (RIG_MODE_CW|RIG_MODE_SSB|RIG_MODE_AM|RIG_MODE_FM|RIG_MODE_PKTLSB|RIG_MODE_PKTUSB|RIG_MODE_SPEC)
#define POWERSDR_FUNC_ALL (RIG_FUNC_VOX|RIG_FUNC_SQL|RIG_FUNC_NB|RIG_FUNC_ANF|RIG_FUNC_MUTE|RIG_FUNC_RIT|RIG_FUNC_XIT|RIG_FUNC_TUNER)
#define POWERSDR_LEVEL_ALL (RIG_LEVEL_SLOPE_HIGH|RIG_LEVEL_SLOPE_LOW|RIG_LEVEL_KEYSPD|RIG_LEVEL_RFPOWER_METER|RIG_LEVEL_RFPOWER_METER_WATTS|RIG_LEVEL_MICGAIN|RIG_LEVEL_VOXGAIN|RIG_LEVEL_SQL|RIG_LEVEL_AF|RIG_LEVEL_AGC|RIG_LEVEL_RF|RIG_LEVEL_IF)
@ -1206,31 +1208,31 @@ const struct rig_caps powersdr_caps =
.chan_list = { RIG_CHAN_END },
.rx_range_list1 = {
{kHz(30), MHz(77), F6K_MODES, -1, -1, F6K_VFO, F6K_ANTS},
{MHz(135), MHz(165), F6K_MODES, -1, - 1, F6K_VFO, F6K_ANTS},
{kHz(30), MHz(77), POWERSDR_MODES, -1, -1, F6K_VFO, F6K_ANTS},
{MHz(135), MHz(165), POWERSDR_MODES, -1, - 1, F6K_VFO, F6K_ANTS},
RIG_FRNG_END,
}, /* rx range */
.tx_range_list1 = {
FRQ_RNG_HF(1, F6K_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_6m(1, F6K_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_2m(1, F6K_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_HF(1, POWERSDR_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_6m(1, POWERSDR_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_2m(1, POWERSDR_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
RIG_FRNG_END,
}, /* tx range */
.rx_range_list2 = {
{kHz(30), MHz(77), F6K_MODES, -1, -1, F6K_VFO, F6K_ANTS},
{ MHz(135), MHz(165), F6K_MODES, -1, -1, F6K_VFO, F6K_ANTS},
{kHz(30), MHz(77), POWERSDR_MODES, -1, -1, F6K_VFO, F6K_ANTS},
{ MHz(135), MHz(165), POWERSDR_MODES, -1, -1, F6K_VFO, F6K_ANTS},
RIG_FRNG_END,
}, /* rx range */
.tx_range_list2 = {
FRQ_RNG_HF(2, F6K_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_6m(2, F6K_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_2m(2, F6K_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_HF(2, POWERSDR_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_6m(2, POWERSDR_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
FRQ_RNG_2m(2, POWERSDR_MODES, mW(10), W(100), F6K_VFO, F6K_ANTS),
RIG_FRNG_END,
}, /* tx range */
.tuning_steps = {
{F6K_MODES, 1},
{POWERSDR_MODES, 1},
RIG_TS_END,
},