kopia lustrzana https://github.com/Hamlib/Hamlib
Merge 22636be85e
into 623ff17f61
commit
4d69d19016
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@ -1,4 +1,4 @@
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DRAKESRC = r8a.c r8b.c drake.c drake.h
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DRAKESRC = r8.c r8a.c r8b.c drake.c drake.h
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noinst_LTLIBRARIES = libhamlib-drake.la
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libhamlib_drake_la_SOURCES = $(DRAKESRC)
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1406
rigs/drake/drake.c
1406
rigs/drake/drake.c
Plik diff jest za duży
Load Diff
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@ -28,6 +28,20 @@
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struct drake_priv_data {
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int curr_ch;
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dcd_t curr_dcd;
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freq_t curr_freq;
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ant_t curr_ant;
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vfo_t curr_vfo;
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int curr_agc;
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rmode_t curr_mode;
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pbwidth_t curr_width;
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int curr_nb;
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int curr_nb2;
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int curr_att;
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int curr_pre;
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int curr_notch;
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int curr_pwr;
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int curr_ss;
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};
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int drake_set_freq(RIG *rig, vfo_t vfo, freq_t freq);
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@ -53,6 +67,7 @@ int drake_set_powerstat (RIG * rig, powerstat_t status);
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int drake_get_powerstat (RIG * rig, powerstat_t *status);
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const char *drake_get_info(RIG *rig);
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extern struct rig_caps r8_caps;
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extern struct rig_caps r8a_caps;
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extern struct rig_caps r8b_caps;
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@ -0,0 +1,190 @@
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/*
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* Hamlib Drake backend - R-8 description
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* Copyright (c) 2001-2010, 2025 by Stephane Fillod
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*
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#include <stdlib.h>
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#include <hamlib/rig.h>
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#include "idx_builtin.h"
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#include "drake.h"
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#define R8_MODES (RIG_MODE_SSB|RIG_MODE_CW|RIG_MODE_RTTY|RIG_MODE_AM|RIG_MODE_AMS|RIG_MODE_FM)
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#define R8_FUNC (RIG_FUNC_MN|RIG_FUNC_NB|RIG_FUNC_NB2)
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#define R8_LEVEL_ALL (RIG_LEVEL_PREAMP|RIG_LEVEL_ATT|RIG_LEVEL_AGC|RIG_LEVEL_RAWSTR|RIG_LEVEL_STRENGTH)
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#define R8_PARM_ALL (RIG_PARM_TIME)
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#define R8_VFO (RIG_VFO_A|RIG_VFO_B|RIG_VFO_VFO|RIG_VFO_MEM)
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#define R8_VFO_OPS (RIG_OP_UP|RIG_OP_DOWN|RIG_OP_TO_VFO|RIG_OP_FROM_VFO)
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#define R8_ANTS (RIG_ANT_1|RIG_ANT_2|RIG_ANT_3)
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#define R8_STR_CAL { 2, { \
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{ 0, -60 }, \
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{ 1, 0 }, \
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} }
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/*
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* channel caps.
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*/
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#define DRAKE_MEM_CAP { \
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.freq = 1, \
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.mode = 1, \
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.width = 1, \
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.ant = 1, \
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.funcs = R8_FUNC, \
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.levels = RIG_LEVEL_AGC|RIG_LEVEL_ATT|RIG_LEVEL_PREAMP, \
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}
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/*
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* R-8 rig capabilities.
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*
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* specs: http://www.dxing.com/rx/r8.htm
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*
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*/
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struct rig_caps r8_caps =
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{
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RIG_MODEL(RIG_MODEL_DKR8),
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.model_name = "R-8",
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.mfg_name = "Drake",
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.version = BACKEND_VER ".0",
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.copyright = "LGPL",
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.status = RIG_STATUS_NEW,
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.rig_type = RIG_TYPE_RECEIVER,
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.ptt_type = RIG_PTT_NONE,
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.dcd_type = RIG_DCD_NONE,
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.port_type = RIG_PORT_SERIAL,
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.serial_rate_min = 9600,
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.serial_rate_max = 9600,
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.serial_data_bits = 7,
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.serial_stop_bits = 1,
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.serial_parity = RIG_PARITY_EVEN,
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.serial_handshake = RIG_HANDSHAKE_HARDWARE,
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.write_delay = 1,
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.post_write_delay = 100,
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.timeout = 250,
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.retry = 3,
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.has_get_func = R8_FUNC,
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.has_set_func = R8_FUNC,
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.has_get_level = R8_LEVEL_ALL,
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.has_set_level = RIG_LEVEL_SET(R8_LEVEL_ALL),
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.has_get_parm = R8_PARM_ALL,
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.has_set_parm = RIG_PARM_SET(R8_PARM_ALL),
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.level_gran = {
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[LVL_RAWSTR] = { .min = { .i = 0 }, .max = { .i = 255 } },
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[LVL_ATT] = { .min = { .i = 0 }, .max = { .i = 10 } },
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[LVL_PREAMP] = { .min = { .i = 0 }, .max = { .i = 10 } },
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},
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.parm_gran = {},
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.ctcss_list = NULL,
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.dcs_list = NULL,
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.preamp = { 10, RIG_DBLST_END },
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.attenuator = { 10, RIG_DBLST_END },
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.max_rit = Hz(0),
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.max_xit = Hz(0),
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.max_ifshift = Hz(0),
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.targetable_vfo = 0,
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.transceive = RIG_TRN_OFF,
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.vfo_ops = R8_VFO_OPS,
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.scan_ops = 0,
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.bank_qty = 0,
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.chan_desc_sz = 0,
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.priv = NULL,
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.chan_list = {
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{ 0, 99, RIG_MTYPE_MEM, DRAKE_MEM_CAP },
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RIG_CHAN_END
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},
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.rx_range_list1 = {
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{kHz(100), MHz(30), R8_MODES, -1, -1, R8_VFO, R8_ANTS},
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RIG_FRNG_END,
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},
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.tx_range_list1 = { RIG_FRNG_END, },
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.rx_range_list2 = {
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{kHz(100), MHz(30), R8_MODES, -1, -1, R8_VFO, R8_ANTS},
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RIG_FRNG_END,
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},
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.tx_range_list2 = { RIG_FRNG_END, },
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.tuning_steps = {
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{R8_MODES, 10},
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{R8_MODES, 100},
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{R8_MODES, kHz(1)},
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{R8_MODES, kHz(10)},
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RIG_TS_END,
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},
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/* mode/filter list, remember: order matters! */
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.filters = {
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{RIG_MODE_FM, kHz(12)},
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{RIG_MODE_AM | RIG_MODE_AMS, kHz(6)},
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{RIG_MODE_AM | RIG_MODE_AMS, kHz(4)},
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{RIG_MODE_AM | RIG_MODE_AMS, kHz(2.3)},
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{RIG_MODE_AM | RIG_MODE_AMS, kHz(1.8)},
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{RIG_MODE_AM | RIG_MODE_AMS, Hz(500)},
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{RIG_MODE_SSB | RIG_MODE_RTTY, kHz(2.3)},
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{RIG_MODE_SSB | RIG_MODE_RTTY, kHz(1.8)},
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{RIG_MODE_SSB | RIG_MODE_RTTY, Hz(500)},
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{RIG_MODE_SSB | RIG_MODE_RTTY, kHz(4)},
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{RIG_MODE_SSB | RIG_MODE_RTTY, kHz(6)},
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{RIG_MODE_CW, Hz(500)},
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{RIG_MODE_CW, kHz(1.8)},
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{RIG_MODE_CW, kHz(2.3)},
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{RIG_MODE_CW, kHz(4)},
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{RIG_MODE_CW, kHz(6)},
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RIG_FLT_END,
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},
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.str_cal = R8_STR_CAL,
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.rig_init = drake_init,
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.rig_cleanup = drake_cleanup,
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.set_freq = drake_set_freq,
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.get_freq = drake_get_freq,
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.set_vfo = drake_set_vfo,
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.get_vfo = drake_get_vfo,
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.set_mode = drake_set_mode,
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.get_mode = drake_get_mode,
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.set_func = drake_set_func,
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.get_func = drake_get_func,
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.set_level = drake_set_level,
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.get_level = drake_get_level,
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.set_ant = drake_set_ant,
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.get_ant = drake_get_ant,
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.set_mem = drake_set_mem,
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.get_mem = drake_get_mem,
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.set_channel = drake_set_chan,
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.get_channel = drake_get_chan,
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.vfo_op = drake_vfo_op,
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.set_powerstat = drake_set_powerstat,
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.get_powerstat = drake_get_powerstat,
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.get_info = drake_get_info,
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.hamlib_check_rig_caps = HAMLIB_CHECK_RIG_CAPS
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};
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/*
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* Function definitions below
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*/
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