2004-09-12 21:30:21 +00:00
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/*
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* Hamlib Racal backend - RA6790 description
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* Copyright (c) 2004 by Stephane Fillod
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*
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*
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2011-08-21 23:16:20 +00:00
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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2004-09-12 21:30:21 +00:00
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*
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2011-08-21 23:16:20 +00:00
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* This library is distributed in the hope that it will be useful,
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2004-09-12 21:30:21 +00:00
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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2011-08-21 23:16:20 +00:00
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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2004-09-12 21:30:21 +00:00
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*
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2011-08-21 23:16:20 +00:00
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* You should have received a copy of the GNU Lesser General Public
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2004-09-12 21:30:21 +00:00
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* License along with this library; if not, write to the Free Software
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2011-08-21 23:16:20 +00:00
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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2004-09-12 21:30:21 +00:00
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*
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stdlib.h>
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#include <hamlib/rig.h>
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#include "idx_builtin.h"
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#include "racal.h"
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/* FIXME: ISB */
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#define RA6790_MODES (RIG_MODE_AM|RIG_MODE_CW|RIG_MODE_SSB|RIG_MODE_AMS|RIG_MODE_FM)
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#define RA6790_FUNC (RIG_FUNC_NONE)
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#define RA6790_LEVEL_ALL (RIG_LEVEL_RF|RIG_LEVEL_AGC|RIG_LEVEL_IF)
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#define RA6790_PARM_ALL (RIG_PARM_NONE)
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#define RA6790_VFO (RIG_VFO_A)
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/*
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* ra6790 rig capabilities.
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*
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* Required A6A1 serial asynchronous interface
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*
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*/
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2019-11-30 16:19:08 +00:00
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const struct rig_caps ra6790_caps =
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{
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.rig_model = RIG_MODEL_RA6790,
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.model_name = "RA6790/GM",
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.mfg_name = "Racal",
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.version = "0.1",
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.copyright = "LGPL",
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.status = RIG_STATUS_UNTESTED,
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.rig_type = RIG_TYPE_RECEIVER,
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.ptt_type = RIG_PTT_NONE,
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.dcd_type = RIG_DCD_NONE,
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.port_type = RIG_PORT_SERIAL,
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.serial_rate_min = 300,
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.serial_rate_max = 9600,
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.serial_data_bits = 7,
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.serial_stop_bits = 2,
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.serial_parity = RIG_PARITY_EVEN,
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.serial_handshake = RIG_HANDSHAKE_NONE,
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.write_delay = 0,
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.post_write_delay = 10,
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.timeout = 2000,
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.retry = 3,
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.has_get_func = RA6790_FUNC,
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.has_set_func = RA6790_FUNC,
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.has_get_level = RA6790_LEVEL_ALL,
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.has_set_level = RIG_LEVEL_SET(RA6790_LEVEL_ALL),
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.has_get_parm = RA6790_PARM_ALL,
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.has_set_parm = RIG_PARM_SET(RA6790_PARM_ALL),
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.vfo_ops = RIG_OP_NONE,
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.preamp = { RIG_DBLST_END },
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.attenuator = { RIG_DBLST_END },
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.max_rit = Hz(0),
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.max_xit = Hz(0),
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.max_ifshift = kHz(8),
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.targetable_vfo = 0,
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.transceive = RIG_TRN_OFF,
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.bank_qty = 0,
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.chan_desc_sz = 0,
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.chan_list = { RIG_CHAN_END, },
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.rx_range_list1 = {
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{kHz(500), MHz(30) - 1, RA6790_MODES, -1, -1, RA6790_VFO},
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RIG_FRNG_END,
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},
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.tx_range_list1 = { RIG_FRNG_END, },
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.rx_range_list2 = {
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{kHz(500), MHz(30) - 1, RA6790_MODES, -1, -1, RA6790_VFO},
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RIG_FRNG_END,
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},
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.tx_range_list2 = { RIG_FRNG_END, },
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.tuning_steps = {
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{RA6790_MODES, 1},
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RIG_TS_END,
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},
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/* mode/filter list, remember: order matters! */
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.filters = {
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/* at -3dB */
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{RIG_MODE_SSB, kHz(2.55)}, /* BW2 */
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{RA6790_MODES, Hz(300)}, /* BW1 */
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{RA6790_MODES, kHz(1)}, /* BW2 */
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{RA6790_MODES, kHz(3.2)}, /* BW3 */
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{RA6790_MODES, kHz(6)}, /* BW4 */
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{RA6790_MODES, kHz(20)}, /* BW5 */
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{RA6790_MODES, 0}, /* accept any BW */
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RIG_FLT_END,
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},
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.cfgparams = racal_cfg_params,
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.rig_init = racal_init,
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.rig_cleanup = racal_cleanup,
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.rig_open = racal_open,
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.rig_close = racal_close,
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.set_conf = racal_set_conf,
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.get_conf = racal_get_conf,
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.set_freq = racal_set_freq,
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.get_freq = racal_get_freq,
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.set_mode = racal_set_mode,
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.get_mode = racal_get_mode,
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.set_level = racal_set_level,
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.get_level = racal_get_level,
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.reset = racal_reset,
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.get_info = racal_get_info,
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2004-09-12 21:30:21 +00:00
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};
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/*
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* Function definitions below
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*/
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