2004-06-14 21:10:11 +00:00
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/*
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* Hamlib AOR backend - AR3030 description
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2005-01-24 23:04:35 +00:00
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* Copyright (c) 2000-2005 by Stephane Fillod
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2004-06-14 21:10:11 +00:00
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*
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*
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2011-08-20 23:16:11 +00:00
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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2004-06-14 21:10:11 +00:00
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*
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2011-08-20 23:16:11 +00:00
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* This library is distributed in the hope that it will be useful,
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2004-06-14 21:10:11 +00:00
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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2011-08-20 23:16:11 +00:00
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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2004-06-14 21:10:11 +00:00
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*
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2011-08-20 23:16:11 +00:00
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* You should have received a copy of the GNU Lesser General Public
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2004-06-14 21:10:11 +00:00
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* License along with this library; if not, write to the Free Software
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2011-08-20 23:16:11 +00:00
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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2004-06-14 21:10:11 +00:00
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*
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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2018-03-19 18:23:23 +00:00
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#include <unistd.h>
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2004-06-14 21:10:11 +00:00
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#include "hamlib/rig.h"
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#include "serial.h"
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#include "idx_builtin.h"
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#include "misc.h"
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#include "aor.h"
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static int ar3030_set_vfo(RIG *rig, vfo_t vfo);
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static int ar3030_get_vfo(RIG *rig, vfo_t *vfo);
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static int ar3030_set_freq(RIG *rig, vfo_t vfo, freq_t freq);
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static int ar3030_get_freq(RIG *rig, vfo_t vfo, freq_t *freq);
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static int ar3030_set_mode(RIG *rig, vfo_t vfo, rmode_t mode, pbwidth_t width);
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2019-11-30 16:19:08 +00:00
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static int ar3030_get_mode(RIG *rig, vfo_t vfo, rmode_t *mode,
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pbwidth_t *width);
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2004-06-14 21:10:11 +00:00
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static int ar3030_set_mem(RIG *rig, vfo_t vfo, int ch);
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static int ar3030_get_mem(RIG *rig, vfo_t vfo, int *ch);
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static int ar3030_set_level(RIG *rig, vfo_t vfo, setting_t level, value_t val);
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static int ar3030_get_level(RIG *rig, vfo_t vfo, setting_t level, value_t *val);
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static int ar3030_get_channel(RIG *rig, channel_t *chan);
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static int ar3030_init(RIG *rig);
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static int ar3030_cleanup(RIG *rig);
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2004-07-16 11:47:40 +00:00
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static int ar3030_close(RIG *rig);
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2004-06-14 21:10:11 +00:00
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static int ar3030_vfo_op(RIG *rig, vfo_t vfo, vfo_op_t op);
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2019-11-30 16:19:08 +00:00
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struct ar3030_priv_data
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{
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2018-03-19 18:23:23 +00:00
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int curr_ch;
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int curr_vfo;
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2004-06-14 21:10:11 +00:00
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};
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2011-08-20 23:16:11 +00:00
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/*
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2004-06-14 21:10:11 +00:00
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* TODO:
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2019-11-30 16:19:08 +00:00
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* set_channel(emulated?),rig_vfo_op
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* rig_reset(RIG_RESET_MCALL)
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* quit the remote control mode on close?
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2004-06-14 21:10:11 +00:00
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*/
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2004-08-08 19:42:59 +00:00
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#define AR3030_MODES (RIG_MODE_AM|RIG_MODE_AMS|RIG_MODE_CW|RIG_MODE_SSB|RIG_MODE_FM|RIG_MODE_FAX)
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2004-06-14 21:10:11 +00:00
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#define AR3030_FUNC_ALL (RIG_FUNC_NONE)
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#define AR3030_LEVEL (RIG_LEVEL_ATT|RIG_LEVEL_AGC|RIG_LEVEL_RAWSTR)
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#define AR3030_PARM (RIG_PARM_NONE)
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#define AR3030_VFO_OPS (RIG_OP_FROM_VFO|RIG_OP_MCL)
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#define AR3030_VFO (RIG_VFO_A|RIG_VFO_MEM)
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/*
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* FIXME:
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*/
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#define AR3030_STR_CAL { 2, \
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2019-11-30 16:19:08 +00:00
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{ \
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{ 0x00, -60 }, \
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{ 0x3f, 60 } \
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} }
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2004-06-14 21:10:11 +00:00
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#define AR3030_MEM_CAP { \
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2019-11-30 16:19:08 +00:00
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.freq = 1, \
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.mode = 1, \
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.width = 1, \
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.levels = RIG_LEVEL_SET(AR3030_LEVEL), \
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.flags = 1, \
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2004-06-14 21:10:11 +00:00
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}
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/*
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* Data was obtained from AR3030 pdf on http://www.aoruk.com
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*
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* ar3030 rig capabilities.
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*/
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2019-11-30 16:19:08 +00:00
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const struct rig_caps ar3030_caps =
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{
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2018-03-19 18:23:23 +00:00
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.rig_model = RIG_MODEL_AR3030,
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.model_name = "AR3030",
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.mfg_name = "AOR",
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.version = "1.0",
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.copyright = "LGPL",
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.status = RIG_STATUS_STABLE,
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.rig_type = RIG_TYPE_RECEIVER,
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.ptt_type = RIG_PTT_NONE,
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.dcd_type = RIG_DCD_NONE,
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.port_type = RIG_PORT_SERIAL,
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.serial_rate_min = 4800,
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.serial_rate_max = 9600,
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.serial_data_bits = 8,
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.serial_stop_bits = 2,
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.serial_parity = RIG_PARITY_NONE,
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.serial_handshake = RIG_HANDSHAKE_HARDWARE,
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.write_delay = 0,
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2019-11-30 16:19:08 +00:00
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.post_write_delay = 50, /* ms */
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2018-03-19 18:23:23 +00:00
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.timeout = 500,
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.retry = 0,
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.has_get_func = AR3030_FUNC_ALL,
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.has_set_func = AR3030_FUNC_ALL,
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.has_get_level = AR3030_LEVEL,
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.has_set_level = RIG_LEVEL_SET(AR3030_LEVEL),
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.has_get_parm = AR3030_PARM,
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.has_set_parm = RIG_PARM_NONE,
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.level_gran = {}, /* FIXME: granularity */
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.parm_gran = {},
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.ctcss_list = NULL,
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.dcs_list = NULL,
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.preamp = { RIG_DBLST_END, },
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.attenuator = { 10, 20, RIG_DBLST_END, },
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.max_rit = Hz(0),
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.max_xit = Hz(0),
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.max_ifshift = Hz(0),
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.targetable_vfo = 0,
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.transceive = RIG_TRN_OFF,
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.bank_qty = 0,
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.chan_desc_sz = 0,
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.vfo_ops = AR3030_VFO_OPS,
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.str_cal = AR3030_STR_CAL,
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.chan_list = {
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{ 0, 99, RIG_MTYPE_MEM, AR3030_MEM_CAP },
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RIG_CHAN_END,
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},
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.rx_range_list1 = {
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2019-11-30 16:19:08 +00:00
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{kHz(30), MHz(30), AR3030_MODES, -1, -1, AR3030_VFO},
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2018-03-19 18:23:23 +00:00
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RIG_FRNG_END,
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},
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.tx_range_list1 = { RIG_FRNG_END, },
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.rx_range_list2 = {
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2019-11-30 16:19:08 +00:00
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{kHz(30), MHz(30), AR3030_MODES, -1, -1, AR3030_VFO},
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2018-03-19 18:23:23 +00:00
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RIG_FRNG_END,
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}, /* rx range */
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2019-11-30 16:19:08 +00:00
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.tx_range_list2 = { RIG_FRNG_END, }, /* no tx range, this is a receiver! */
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2018-03-19 18:23:23 +00:00
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.tuning_steps = {
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2019-11-30 16:19:08 +00:00
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{AR3030_MODES, 10},
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{AR3030_MODES, 100},
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{AR3030_MODES, kHz(1)},
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{AR3030_MODES, MHz(1)},
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2018-03-19 18:23:23 +00:00
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RIG_TS_END,
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},
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/* mode/filter list, .remember = order matters! */
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.filters = {
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{RIG_MODE_AM, kHz(6)},
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2019-11-30 16:19:08 +00:00
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{RIG_MODE_SSB | RIG_MODE_CW | RIG_MODE_AM, kHz(2.4)},
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2018-03-19 18:23:23 +00:00
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{RIG_MODE_CW, 500},
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{RIG_MODE_FM, kHz(15)},
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RIG_FLT_END,
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},
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.rig_init = ar3030_init,
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.rig_cleanup = ar3030_cleanup,
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.rig_close = ar3030_close,
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.set_freq = ar3030_set_freq,
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.get_freq = ar3030_get_freq,
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.set_mode = ar3030_set_mode,
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.get_mode = ar3030_get_mode,
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.set_vfo = ar3030_set_vfo,
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.get_vfo = ar3030_get_vfo,
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.set_level = ar3030_set_level,
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.get_level = ar3030_get_level,
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.set_mem = ar3030_set_mem,
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.get_mem = ar3030_get_mem,
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.get_channel = ar3030_get_channel,
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.vfo_op = ar3030_vfo_op,
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2004-06-14 21:10:11 +00:00
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};
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/*
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* Function definitions below
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*/
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/* is LF really needed? */
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2018-03-19 18:23:23 +00:00
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#define CR "\x0d"
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#define EOM "\x0d\x0a"
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2004-06-14 21:10:11 +00:00
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#define BUFSZ 64
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/*
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* ar3030_transaction
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* We assume that rig!=NULL, rig->state!= NULL
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* Otherwise, you'll get a nice seg fault. You've been warned!
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* return value: RIG_OK if everything's fine, negative value otherwise
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*/
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2019-11-30 16:19:08 +00:00
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static int ar3030_transaction(RIG *rig, const char *cmd, int cmd_len,
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char *data, int *data_len)
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2004-06-14 21:10:11 +00:00
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{
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2018-03-19 18:23:23 +00:00
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int retval;
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struct rig_state *rs;
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2019-11-30 16:19:08 +00:00
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int retry = 3;
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2018-03-19 18:23:23 +00:00
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char tmpdata[BUFSZ];
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rs = &rig->state;
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2019-11-30 16:19:08 +00:00
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if (data == NULL)
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{
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data = tmpdata;
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2018-03-19 18:23:23 +00:00
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}
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2019-11-30 16:19:08 +00:00
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2018-03-19 18:23:23 +00:00
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serial_flush(&rs->rigport);
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2019-11-30 16:19:08 +00:00
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do
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{
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2018-03-19 18:23:23 +00:00
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retval = write_block(&rs->rigport, cmd, cmd_len);
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2019-11-30 16:19:08 +00:00
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if (retval != RIG_OK)
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{
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rig_debug(RIG_DEBUG_ERR, "%s: write_block error=%d\n", __func__, retval);
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2018-03-19 18:23:23 +00:00
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return retval;
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2019-11-30 16:19:08 +00:00
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}
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if (data)
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{
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2018-03-19 18:23:23 +00:00
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/* expecting 0x0d0x0a on all commands so wait for the 0x0a */
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retval = read_string(&rs->rigport, data, BUFSZ, "\x0a", 1);
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2019-11-30 16:19:08 +00:00
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if (retval == -RIG_ETIMEOUT)
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{
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rig_debug(RIG_DEBUG_ERR, "%s:timeout retry=%d\n", __func__, retry);
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usleep(50000);
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2018-03-19 18:23:23 +00:00
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}
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}
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2019-11-30 16:19:08 +00:00
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rig_debug(RIG_DEBUG_TRACE, "%s: retval=%d retry=%d\n", __func__, retval, retry);
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}
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while ((retval <= 0) && (--retry > 0));
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2018-03-19 18:23:23 +00:00
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usleep(1000); // 1ms sleep per manual
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2019-11-30 16:19:08 +00:00
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if (data_len != NULL && retval > 0)
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{
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2018-03-19 18:23:23 +00:00
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*data_len = 0;
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2019-11-30 16:19:08 +00:00
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2018-03-19 18:23:23 +00:00
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/* only set data_len non-zero if not a command response */
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2019-11-30 16:19:08 +00:00
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if (retval > 0 && data[0] != 0x00 && data[0] != 0x0d)
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{
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*data_len = retval;
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2018-03-19 18:23:23 +00:00
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}
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}
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2019-11-30 16:19:08 +00:00
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rig_debug(RIG_DEBUG_TRACE, "%s: return data_len=%d retry=%d\n", __func__,
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data_len ? *data_len : 0, retry);
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2018-03-19 18:23:23 +00:00
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return RIG_OK;
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2004-06-14 21:10:11 +00:00
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}
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int ar3030_init(RIG *rig)
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{
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2018-03-19 18:23:23 +00:00
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struct ar3030_priv_data *priv;
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2004-06-14 21:10:11 +00:00
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2018-03-19 18:23:23 +00:00
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priv = malloc(sizeof(struct ar3030_priv_data));
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2004-06-14 21:10:11 +00:00
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2018-03-19 18:23:23 +00:00
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if (!priv)
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2019-11-30 16:19:08 +00:00
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{
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2018-03-19 18:23:23 +00:00
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return -RIG_ENOMEM;
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2019-11-30 16:19:08 +00:00
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}
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2004-06-14 21:10:11 +00:00
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2019-11-30 16:19:08 +00:00
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priv->curr_ch = 99; /* huh! FIXME: get_mem in open() ? */
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2018-03-19 18:23:23 +00:00
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priv->curr_vfo = RIG_VFO_A;
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2004-06-14 21:10:11 +00:00
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2018-03-19 18:23:23 +00:00
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rig->state.priv = priv;
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2004-06-14 21:10:11 +00:00
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2018-03-19 18:23:23 +00:00
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|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int ar3030_cleanup(RIG *rig)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = rig->state.priv;
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
free(priv);
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
2004-07-16 11:47:40 +00:00
|
|
|
int ar3030_close(RIG *rig)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
int retval;
|
|
|
|
struct rig_state *rs;
|
2004-07-16 11:47:40 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
rig_debug(RIG_DEBUG_TRACE, "%s:\n", __func__);
|
2004-07-16 11:47:40 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
rs = &rig->state;
|
|
|
|
serial_flush(&rs->rigport);
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, "Q" CR, strlen("Q" CR), NULL, NULL);
|
|
|
|
rig_debug(RIG_DEBUG_TRACE, "%s: retval=%d\n", __func__, retval);
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
return retval;
|
2004-07-16 11:47:40 +00:00
|
|
|
}
|
2004-06-14 21:10:11 +00:00
|
|
|
|
|
|
|
int ar3030_set_vfo(RIG *rig, vfo_t vfo)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
|
|
|
char *cmd = "";
|
|
|
|
int retval;
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
switch (vfo)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_VFO_CURR:
|
|
|
|
return RIG_OK;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_VFO_VFO:
|
|
|
|
case RIG_VFO_A:
|
|
|
|
cmd = "D" CR;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_VFO_MEM:
|
|
|
|
cmd = "M" CR;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
default:
|
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, cmd, strlen(cmd), NULL, NULL);
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval == RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
priv->curr_vfo = vfo;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
return retval;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int ar3030_get_vfo(RIG *rig, vfo_t *vfo)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
*vfo = priv->curr_vfo;
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ar3030_set_freq
|
|
|
|
* Assumes rig!=NULL
|
|
|
|
*/
|
|
|
|
int ar3030_set_freq(RIG *rig, vfo_t vfo, freq_t freq)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
|
|
|
char freqbuf[BUFSZ];
|
|
|
|
int freq_len, retval;
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
freq_len = sprintf(freqbuf, "%03.6f" CR, ((double)freq) / MHz(1));
|
|
|
|
|
|
|
|
retval = ar3030_transaction(rig, freqbuf, freq_len, NULL, NULL);
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval != RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
priv->curr_vfo = RIG_VFO_A;
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ar3030_get_freq
|
|
|
|
* Assumes rig!=NULL, freq!=NULL
|
|
|
|
*/
|
|
|
|
int ar3030_get_freq(RIG *rig, vfo_t vfo, freq_t *freq)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
|
|
|
char *rfp;
|
|
|
|
int freq_len, retval;
|
|
|
|
char freqbuf[BUFSZ];
|
2019-12-09 23:12:13 +00:00
|
|
|
long lfreq;
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
/*
|
|
|
|
* D Rn Gn Bn Tn Fnnnnnnnn C
|
2004-07-05 14:38:34 +00:00
|
|
|
* Note: spaces are transmitted.
|
2018-03-19 18:23:23 +00:00
|
|
|
*/
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, "D" CR, 2, freqbuf, &freq_len);
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval != RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
priv->curr_vfo = RIG_VFO_A;
|
|
|
|
rfp = strchr(freqbuf, 'F');
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (!rfp)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return -RIG_EPROTO;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
sscanf(rfp + 1, "%ld", &lfreq);
|
2018-03-19 18:23:23 +00:00
|
|
|
*freq = lfreq;
|
2019-11-30 16:19:08 +00:00
|
|
|
rig_debug(RIG_DEBUG_ERR, "%s: read lfreq=%ld, freq=%.6f\n", __func__, lfreq,
|
|
|
|
*freq);
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ar3030_set_mode
|
|
|
|
* Assumes rig!=NULL
|
|
|
|
*/
|
|
|
|
int ar3030_set_mode(RIG *rig, vfo_t vfo, rmode_t mode, pbwidth_t width)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
char mdbuf[BUFSZ];
|
|
|
|
int mdbuf_len, aormode, retval;
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
switch (mode)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_MODE_AM:
|
|
|
|
aormode = 'A';
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_MODE_CW:
|
|
|
|
aormode = 'C';
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_MODE_USB:
|
|
|
|
aormode = 'U';
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_MODE_LSB:
|
|
|
|
aormode = 'L';
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_MODE_FM:
|
|
|
|
aormode = 'N';
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_MODE_AMS:
|
|
|
|
aormode = 'S';
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_MODE_FAX:
|
|
|
|
aormode = 'X';
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
default:
|
2019-11-30 16:19:08 +00:00
|
|
|
rig_debug(RIG_DEBUG_ERR, "%s: unsupported mode %s\n",
|
|
|
|
__func__, rig_strrmode(mode));
|
2018-03-19 18:23:23 +00:00
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
if (width != RIG_PASSBAND_NOCHANGE)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
mdbuf_len = sprintf(mdbuf, "%c" CR, aormode);
|
|
|
|
}
|
2019-11-30 16:19:08 +00:00
|
|
|
else
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
mdbuf_len = sprintf(mdbuf, "%dB%c" CR,
|
2019-11-30 16:19:08 +00:00
|
|
|
width < rig_passband_normal(rig, mode) ? 1 : 0,
|
2018-03-19 18:23:23 +00:00
|
|
|
aormode);
|
|
|
|
}
|
2019-11-30 16:19:08 +00:00
|
|
|
|
|
|
|
retval = ar3030_transaction(rig, mdbuf, mdbuf_len, NULL, NULL);
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
return retval;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ar3030_get_mode
|
|
|
|
* Assumes rig!=NULL, mode!=NULL
|
|
|
|
*/
|
|
|
|
int ar3030_get_mode(RIG *rig, vfo_t vfo, rmode_t *mode, pbwidth_t *width)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
|
|
|
int buf_len, retval;
|
|
|
|
char buf[BUFSZ];
|
|
|
|
|
|
|
|
/*
|
|
|
|
* D Rn Gn Bn Tn Fnnnnnnnn C
|
|
|
|
* Note: spaces are transmitted
|
|
|
|
*/
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, "D" CR, 2, buf, &buf_len);
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval != RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
priv->curr_vfo = RIG_VFO_A;
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
switch (buf[25])
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'A':
|
|
|
|
*mode = RIG_MODE_AM;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'L':
|
|
|
|
*mode = RIG_MODE_LSB;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'U':
|
|
|
|
*mode = RIG_MODE_USB;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'C':
|
|
|
|
*mode = RIG_MODE_CW;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'S':
|
|
|
|
*mode = RIG_MODE_AMS;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'N':
|
|
|
|
*mode = RIG_MODE_FM;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'X':
|
|
|
|
*mode = RIG_MODE_FAX;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
default:
|
2019-11-30 16:19:08 +00:00
|
|
|
rig_debug(RIG_DEBUG_ERR, "%s: unsupported mode '%c'\n",
|
|
|
|
__func__, buf[25]);
|
2018-03-19 18:23:23 +00:00
|
|
|
return -RIG_EPROTO;
|
|
|
|
}
|
|
|
|
|
|
|
|
*width = buf[9] == '1' ? rig_passband_narrow(rig, *mode) :
|
|
|
|
rig_passband_normal(rig, *mode);
|
|
|
|
|
|
|
|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int ar3030_set_mem(RIG *rig, vfo_t vfo, int ch)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
2019-12-06 21:35:52 +00:00
|
|
|
int retval = RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
if (priv->curr_vfo == RIG_VFO_MEM)
|
|
|
|
{
|
2019-12-06 21:35:52 +00:00
|
|
|
char cmdbuf[BUFSZ];
|
|
|
|
int cmd_len = sprintf(cmdbuf, "%02dM" CR, ch);
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, cmdbuf, cmd_len, NULL, NULL);
|
2018-03-19 18:23:23 +00:00
|
|
|
}
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
if (retval == RIG_OK)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
priv->curr_ch = ch;
|
|
|
|
}
|
2004-06-14 21:10:11 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int ar3030_get_mem(RIG *rig, vfo_t vfo, int *ch)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
|
|
|
char infobuf[BUFSZ];
|
|
|
|
int info_len, retval;
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
if (priv->curr_vfo != RIG_VFO_MEM)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
*ch = priv->curr_ch;
|
|
|
|
}
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, "M" CR, 2, infobuf, &info_len);
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval != RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* MnnPnRnGnBnTnFnnnnnnnnC
|
|
|
|
*/
|
2019-11-30 16:19:08 +00:00
|
|
|
if (infobuf[0] != 'M')
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return -RIG_EPROTO;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Is it a blank mem channel ?
|
|
|
|
*/
|
2019-11-30 16:19:08 +00:00
|
|
|
if (infobuf[1] == '-' && infobuf[2] == '-')
|
|
|
|
{
|
|
|
|
*ch = -1; /* FIXME: return error instead? */
|
2018-03-19 18:23:23 +00:00
|
|
|
return RIG_OK;
|
|
|
|
}
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
*ch = priv->curr_ch = atoi(infobuf + 1);
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int ar3030_set_level(RIG *rig, vfo_t vfo, setting_t level, value_t val)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
char *cmd;
|
|
|
|
int retval;
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
switch (level)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_LEVEL_AGC:
|
|
|
|
/* SLOW otherwise */
|
|
|
|
cmd = val.i == RIG_AGC_FAST ? "1G" CR : "0G" CR;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_LEVEL_ATT:
|
|
|
|
cmd = val.i == 0 ? "0R" CR :
|
|
|
|
(val.i == 1 ? "1R" CR : "2R" CR);
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
default:
|
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, cmd, strlen(cmd), NULL, NULL);
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval != RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int ar3030_get_level(RIG *rig, vfo_t vfo, setting_t level, value_t *val)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
|
|
|
int info_len, retval;
|
|
|
|
char infobuf[BUFSZ], *p;
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
switch (level)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_LEVEL_ATT:
|
|
|
|
/*
|
|
|
|
* DRnGnBnTnFnnnnnnnnC
|
|
|
|
*/
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, "D" CR, 2, infobuf, &info_len);
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval != RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
priv->curr_vfo = RIG_VFO_A;
|
|
|
|
p = strchr(infobuf, 'R');
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (!p)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return -RIG_EPROTO;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
val->i = p[1] == '0' ? 0 : rig->caps->attenuator[p[1] - '1'];
|
|
|
|
return RIG_OK;
|
|
|
|
|
|
|
|
case RIG_LEVEL_AGC:
|
|
|
|
/*
|
|
|
|
* DRnGnBnTnFnnnnnnnnC
|
|
|
|
*/
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, "D" CR, 2, infobuf, &info_len);
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval != RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
priv->curr_vfo = RIG_VFO_A;
|
|
|
|
p = strchr(infobuf, 'G');
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (!p)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return -RIG_EPROTO;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
val->i = p[1] == '0' ? RIG_AGC_SLOW : RIG_AGC_FAST;
|
|
|
|
return RIG_OK;
|
|
|
|
|
|
|
|
case RIG_LEVEL_RAWSTR:
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, "Y" CR, 2, infobuf, &info_len);
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval != RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
infobuf[3] = '\0';
|
|
|
|
val->i = strtol(infobuf, (char **)NULL, 16);
|
|
|
|
return RIG_OK;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int ar3030_get_channel(RIG *rig, channel_t *chan)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
|
|
|
char cmdbuf[BUFSZ], infobuf[BUFSZ];
|
|
|
|
int info_len, cmd_len, retval;
|
|
|
|
|
|
|
|
|
|
|
|
cmd_len = sprintf(cmdbuf, "%02dM" CR, chan->channel_num);
|
2019-11-30 16:19:08 +00:00
|
|
|
retval = ar3030_transaction(rig, cmdbuf, cmd_len, infobuf, &info_len);
|
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
if (retval != RIG_OK)
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return retval;
|
2019-11-30 16:19:08 +00:00
|
|
|
}
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
priv->curr_vfo = RIG_VFO_A;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* MnnPnRnGnBnTnFnnnnnnnnC
|
|
|
|
*/
|
2019-11-30 16:19:08 +00:00
|
|
|
if (infobuf[0] != 'M')
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
return -RIG_EPROTO;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Is it a blank mem channel ?
|
|
|
|
*/
|
2019-11-30 16:19:08 +00:00
|
|
|
if (infobuf[1] == '-' && infobuf[2] == '-')
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
chan->freq = RIG_FREQ_NONE;
|
|
|
|
return RIG_OK;
|
|
|
|
}
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
sscanf(infobuf + 14, "%"SCNfreq, &chan->freq);
|
2018-03-19 18:23:23 +00:00
|
|
|
chan->freq *= 10;
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
switch (infobuf[22])
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'A':
|
|
|
|
chan->mode = RIG_MODE_AM;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'L':
|
|
|
|
chan->mode = RIG_MODE_LSB;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'U':
|
|
|
|
chan->mode = RIG_MODE_USB;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'C':
|
|
|
|
chan->mode = RIG_MODE_CW;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'S':
|
|
|
|
chan->mode = RIG_MODE_AMS;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'N':
|
|
|
|
chan->mode = RIG_MODE_FM;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case 'X':
|
|
|
|
chan->mode = RIG_MODE_FAX;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
default:
|
2019-11-30 16:19:08 +00:00
|
|
|
rig_debug(RIG_DEBUG_ERR, "%s: unsupported mode '%c'\n",
|
|
|
|
__func__, infobuf[22]);
|
2018-03-19 18:23:23 +00:00
|
|
|
return -RIG_EPROTO;
|
|
|
|
}
|
|
|
|
|
|
|
|
chan->width = infobuf[10] == '1' ?
|
|
|
|
rig_passband_narrow(rig, chan->mode) :
|
|
|
|
rig_passband_normal(rig, chan->mode);
|
|
|
|
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
chan->levels[LVL_ATT].i = infobuf[6] == '0' ? 0 :
|
|
|
|
rig->caps->attenuator[infobuf[4] - '1'];
|
2018-03-19 18:23:23 +00:00
|
|
|
|
|
|
|
chan->levels[LVL_AGC].i = infobuf[8] == '0' ? RIG_AGC_SLOW : RIG_AGC_FAST;
|
|
|
|
chan->flags = infobuf[4] == '1' ? RIG_CHFLAG_SKIP : RIG_CHFLAG_NONE;
|
|
|
|
|
|
|
|
return RIG_OK;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int ar3030_vfo_op(RIG *rig, vfo_t vfo, vfo_op_t op)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
struct ar3030_priv_data *priv = (struct ar3030_priv_data *)rig->state.priv;
|
|
|
|
char buf[16];
|
|
|
|
int len, retval;
|
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
switch (op)
|
|
|
|
{
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_OP_MCL:
|
2019-11-30 16:19:08 +00:00
|
|
|
len = sprintf(buf, "%02d%%" CR, priv->curr_ch);
|
2018-03-19 18:23:23 +00:00
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
case RIG_OP_FROM_VFO:
|
2019-11-30 16:19:08 +00:00
|
|
|
len = sprintf(buf, "%02dW" CR, priv->curr_ch);
|
2018-03-19 18:23:23 +00:00
|
|
|
priv->curr_vfo = RIG_VFO_MEM;
|
|
|
|
break;
|
2019-11-30 16:19:08 +00:00
|
|
|
|
2018-03-19 18:23:23 +00:00
|
|
|
default:
|
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
retval = ar3030_transaction(rig, buf, len, NULL, NULL);
|
|
|
|
|
|
|
|
return retval;
|
2004-06-14 21:10:11 +00:00
|
|
|
}
|
|
|
|
|