2004-04-16 19:58:10 +00:00
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/*
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* Hamlib AOR backend - AR7030 description
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2006-02-26 19:21:53 +00:00
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* Copyright (c) 2000-2006 by Stephane Fillod & Fritz Melchert
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2004-04-16 19:58:10 +00:00
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*
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*
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2011-08-20 23:16:11 +00:00
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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2004-04-16 19:58:10 +00:00
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*
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2011-08-20 23:16:11 +00:00
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* This library is distributed in the hope that it will be useful,
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2004-04-16 19:58:10 +00:00
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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2011-08-20 23:16:11 +00:00
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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2004-04-16 19:58:10 +00:00
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*
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2011-08-20 23:16:11 +00:00
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* You should have received a copy of the GNU Lesser General Public
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2004-04-16 19:58:10 +00:00
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* License along with this library; if not, write to the Free Software
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2011-08-20 23:16:11 +00:00
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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2004-04-16 19:58:10 +00:00
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*
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*/
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2004-12-08 21:13:25 +00:00
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//
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2005-03-18 16:43:51 +00:00
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// Version 2004.12.13 F.Melchert (DC9RP)
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2004-12-08 21:13:25 +00:00
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// Version 2004.11.29 F.Melchert (DC9RP)
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//
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2011-08-20 23:16:11 +00:00
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2004-04-16 19:58:10 +00:00
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stdio.h>
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#include <string.h>
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2004-12-08 21:13:25 +00:00
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#include <math.h>
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2004-04-16 19:58:10 +00:00
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#include <hamlib/rig.h>
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#include "aor.h"
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#include "serial.h"
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2006-02-26 19:21:53 +00:00
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#include "idx_builtin.h"
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2004-04-16 19:58:10 +00:00
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2011-08-20 23:16:11 +00:00
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/*
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2006-02-26 19:21:53 +00:00
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* Maintainer wanted!
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2004-04-16 19:58:10 +00:00
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*
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* TODO:
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2019-11-30 16:19:08 +00:00
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* - everything: this rig has nothing in common with other aor's.
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2004-04-16 19:58:10 +00:00
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*
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2019-11-30 16:19:08 +00:00
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* set_mem, get_mem, set_channel, get_channel
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2004-04-16 19:58:10 +00:00
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*/
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#define AR7030_MODES (RIG_MODE_AM|RIG_MODE_AMS|RIG_MODE_CW|RIG_MODE_SSB|RIG_MODE_FM)
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#define AR7030_FUNC_ALL (RIG_FUNC_NONE)
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2005-03-18 16:43:51 +00:00
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#define AR7030_LEVEL (RIG_LEVEL_AF | RIG_LEVEL_RF | RIG_LEVEL_SQL | RIG_LEVEL_CWPITCH | RIG_LEVEL_RAWSTR | RIG_LEVEL_AGC | RIG_LEVEL_STRENGTH)
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2004-04-16 19:58:10 +00:00
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#define AR7030_PARM (RIG_PARM_NONE)
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#define AR7030_VFO_OPS (RIG_OP_NONE)
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#define AR7030_VFO (RIG_VFO_A|RIG_VFO_B)
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2005-03-18 16:43:51 +00:00
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2004-04-16 19:58:10 +00:00
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/*
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* Data was obtained from AR7030 pdf on http://www.aoruk.com
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*/
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2004-12-08 21:13:25 +00:00
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/****************************************************************************
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* Misc Routines *
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****************************************************************************/
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static int rxr_writeByte(RIG *rig, unsigned char c)
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{
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2021-12-18 21:49:45 +00:00
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return write_block(&rig->state.rigport, &c, 1);
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2004-12-08 21:13:25 +00:00
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}
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static int rxr_readByte(RIG *rig)
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{
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2019-11-30 16:19:08 +00:00
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unsigned char response[1];
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unsigned char buf[] = {0x71}; // Read command
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int retval;
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2021-12-18 21:49:45 +00:00
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retval = write_block(&rig->state.rigport, buf, 1);
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2019-11-30 16:19:08 +00:00
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if (retval != RIG_OK)
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{
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return retval;
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}
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2021-12-18 21:49:45 +00:00
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retval = read_block(&rig->state.rigport, response, 1);
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2019-11-30 16:19:08 +00:00
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if (retval != RIG_OK)
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{
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return retval;
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}
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return response[0];
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2004-12-08 21:13:25 +00:00
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}
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/*!
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Umwandlung von BCD nach char
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*/
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2005-03-18 16:43:51 +00:00
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static int BCD_To_int(RIG *rig, int c)
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2004-12-08 21:13:25 +00:00
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{
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2019-11-30 16:19:08 +00:00
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if (((c & 0x0F) < 0x0a) && ((c & 0xF0) < 0xa0)) // Test pseudo Tetrade
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{
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return (((c >> 4) * 10) + (c & 0x0F));
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}
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return (-1);
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2004-12-08 21:13:25 +00:00
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}// End of method BCD_To_char(
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/****************************************************************************
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* Routines to set receiver lock levels *
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****************************************************************************/
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/*!
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Locks, or unlocks if called with argument 0, the receiver, disabling the
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front panel controls or updates. The level of locking is determined by the
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argument level which may be in the range 0 (no lock) to 3 (Remote operation
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exclusively). Calling the method without arguments sets the lock level to
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1. It is recommended to lock to this level during any multi byte read or
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writes to prevent data contention between internal and remote access.
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Calls with invalid arguments are ignored.
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*/
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static void unlock(RIG *rig)
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{
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rxr_writeByte(rig, 0x80);
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}
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2019-11-30 16:19:08 +00:00
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// Level 1 = 0x81 IR remote control disabled.
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// Front panel buttons ignored.
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// Front panel spin-wheels logged but not actioned.
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// Display update (frequency & S-meter) continues.
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2004-12-08 21:13:25 +00:00
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static void setLock(RIG *rig, int level)
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{
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2019-11-30 16:19:08 +00:00
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if ((0 <= level) && (level <= 3))
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{
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rxr_writeByte(rig, 0x80 + level);
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}
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2004-12-08 21:13:25 +00:00
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}
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2019-11-30 16:19:08 +00:00
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// Level 2 = 0x82 As level 1, but display update suspended. In revisions before 1.4
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// squelch operation is inhibited, which results in no audio output
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// after a mode change. In revision 1.4 squelch operation continues
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// and mode changing is as expected.
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// Level 3 = 0x83 Remote operation exclusively.
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2004-12-08 21:13:25 +00:00
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2011-08-20 23:16:11 +00:00
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static void setMemPtr(RIG *rig, int page, int address)
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2004-12-08 21:13:25 +00:00
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{
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2019-11-30 16:19:08 +00:00
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rxr_writeByte(rig, 0x50 + page); //Set Page
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Fix spelling errors
Fixed using the following command:
codespell --write-changes --summary --skip=*.m4 --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
codespell --write-changes --summary --skip=aclocal.m4,lib --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
Codespell home page: https://github.com/codespell-project/codespell
2020-07-24 07:02:12 +00:00
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if (address <= 0xFF) //*** <= 8 Bit Address ***
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2019-11-30 16:19:08 +00:00
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{
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rxr_writeByte(rig, 0x30 + (address >> 4)); //Set H-Register 4 Bits
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rxr_writeByte(rig, 0x40 + (address &
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Fix spelling errors
Fixed using the following command:
codespell --write-changes --summary --skip=*.m4 --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
codespell --write-changes --summary --skip=aclocal.m4,lib --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
Codespell home page: https://github.com/codespell-project/codespell
2020-07-24 07:02:12 +00:00
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0x0F)); //Set Address(12 Bits = (4 Bit H Register) + 8 Bit)
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2019-11-30 16:19:08 +00:00
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}
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Fix spelling errors
Fixed using the following command:
codespell --write-changes --summary --skip=*.m4 --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
codespell --write-changes --summary --skip=aclocal.m4,lib --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
Codespell home page: https://github.com/codespell-project/codespell
2020-07-24 07:02:12 +00:00
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else //*** > 8 Bit Address ***
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2019-11-30 16:19:08 +00:00
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{
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rxr_writeByte(rig, 0x30 + ((address >> 4) & 0x0F)) ;//Set H-Register 4 Bits
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rxr_writeByte(rig, 0x40 + (address &
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Fix spelling errors
Fixed using the following command:
codespell --write-changes --summary --skip=*.m4 --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
codespell --write-changes --summary --skip=aclocal.m4,lib --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
Codespell home page: https://github.com/codespell-project/codespell
2020-07-24 07:02:12 +00:00
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0x0F)); //Set Address(12 Bits = (4 Bit H Register) + 8 Bit)
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2019-11-30 16:19:08 +00:00
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rxr_writeByte(rig, 0x10 + (address >>
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Fix spelling errors
Fixed using the following command:
codespell --write-changes --summary --skip=*.m4 --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
codespell --write-changes --summary --skip=aclocal.m4,lib --ignore-words-list="develope,get's,quitt,setts,som,ue,vektor"
Codespell home page: https://github.com/codespell-project/codespell
2020-07-24 07:02:12 +00:00
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8)); //Set Address high(12 Bits=(4 Bit H Register)+8 Bit)
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2019-11-30 16:19:08 +00:00
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}
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2004-12-08 21:13:25 +00:00
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}
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/****************************************************************************
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* Routines *
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****************************************************************************/
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2019-11-30 16:19:08 +00:00
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// Routine 0 Reset Setup receiver as at switch-on.
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2011-08-20 23:16:11 +00:00
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static void Execute_Routine_0(RIG *rig)
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2005-03-18 16:43:51 +00:00
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{
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2019-11-30 16:19:08 +00:00
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//setLock(rig, 1); //Set Lock Level
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rxr_writeByte(rig, 0x20);
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//unlock(rig); //Set UnLock Level
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2005-03-18 16:43:51 +00:00
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}
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2019-11-30 16:19:08 +00:00
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// Routine 1 Set frequency Program local oscillator from frequ area and setup
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// RF filters and oscillator range.
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// Routine 2 Set mode Setup from mode byte in memory and display mode,
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// select preferred filter and PBS, BFO values etc.
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2006-10-07 21:10:11 +00:00
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// currently not used
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#if 0
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2019-11-30 16:19:08 +00:00
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static void Execute_Routine_2_1(RIG *rig, char mp, char ad, int numSteps)
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2005-03-18 16:43:51 +00:00
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{
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2019-11-30 16:19:08 +00:00
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setLock(rig, 1); //Set Lock Level
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setMemPtr(rig, mp, ad); //page, address
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rxr_writeByte(rig, 0x30 | (0x0F & (char)(numSteps >> 4)));
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rxr_writeByte(rig, 0x60 | (0x0F & (char)(numSteps)));
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rxr_writeByte(rig, 0x22);
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unlock(rig); //Set UnLock Level
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2005-03-18 16:43:51 +00:00
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}
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2006-10-07 21:10:11 +00:00
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#endif
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2019-11-30 16:19:08 +00:00
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// Routine 3 Set passband Setup all IF parameters from filter, pbsval and bfoval bytes.
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static void Execute_Routine_3_1(RIG *rig, char mp, char ad, int numSteps)
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2005-03-18 16:43:51 +00:00
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{
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2019-11-30 16:19:08 +00:00
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setLock(rig, 1); //Set Lock Level
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setMemPtr(rig, mp, ad); //page, address
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rxr_writeByte(rig, 0x30 | (0x0F & (char)(numSteps >> 4)));
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rxr_writeByte(rig, 0x60 | (0x0F & (char)(numSteps)));
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rxr_writeByte(rig, 0x23);
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unlock(rig); //Set UnLock Level
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2005-03-18 16:43:51 +00:00
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}
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2019-11-30 16:19:08 +00:00
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// Routine 4 Set all Set all receiver parameters from current memory values
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static void Execute_Routine_4_1(RIG *rig, char mp, char ad, int numSteps)
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2004-12-08 21:13:25 +00:00
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{
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2019-11-30 16:19:08 +00:00
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setLock(rig, 1); //Set Lock Level
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setMemPtr(rig, mp, ad); //page, address
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// 0x30 = Set H-register x ---> H-register (4-bits)
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// The high order 4-bits of each byte sent to the receiver is the operation code,
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// the low order 4-bits is data (shown here as x)
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rxr_writeByte(rig, 0x30 | (0x0F & (char)(numSteps >> 4)));
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// 0x60 = Write data Hx
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// ---> [Page, Address] Address register + 1
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// ---> Address register 0
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// ---> H-register, 0
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// ---> Mask register
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rxr_writeByte(rig, 0x60 | (0x0F & (char)(numSteps)));
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//Execute routine
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//Set all Set all receiver parameters from current memory values
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rxr_writeByte(rig, 0x24);
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unlock(rig); //Set UnLock Level
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2004-12-08 21:13:25 +00:00
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}
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2019-11-30 16:19:08 +00:00
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static void Execute_Routine_4_3(RIG *rig, char mp, char ad, int numSteps)
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2004-12-08 21:13:25 +00:00
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{
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2019-11-30 16:19:08 +00:00
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setLock(rig, 1); //Set Lock Level
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setMemPtr(rig, mp, ad); //page, address
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rxr_writeByte(rig, 0x30 | (0x0F & (char)(numSteps >> 20)));
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rxr_writeByte(rig, 0x60 | (0x0F & (char)(numSteps >> 16)));
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rxr_writeByte(rig, 0x30 | (0x0F & (char)(numSteps >> 12)));
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rxr_writeByte(rig, 0x60 | (0x0F & (char)(numSteps >> 8)));
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rxr_writeByte(rig, 0x30 | (0x0F & (char)(numSteps >> 4)));
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rxr_writeByte(rig, 0x60 | (0x0F & (char)(numSteps)));
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//Execute routine
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//Set all Set all receiver parameters from current memory values
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rxr_writeByte(rig, 0x24);
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unlock(rig); //Set UnLock Level
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2004-12-08 21:13:25 +00:00
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}
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2019-11-30 16:19:08 +00:00
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// Routine 5 Set audio Setup audio controller from memory register values.
|
2006-10-07 21:10:11 +00:00
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// currently not used
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#if 0
|
2019-11-30 16:19:08 +00:00
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static void Execute_Routine_5_1(RIG *rig, char mp, char ad, int numSteps)
|
2005-03-18 16:43:51 +00:00
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{
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2019-11-30 16:19:08 +00:00
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setLock(rig, 1); //Set Lock Level
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setMemPtr(rig, mp, ad); //page, address
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rxr_writeByte(rig, 0x30 | (0x0F & (char)(numSteps >> 4)));
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rxr_writeByte(rig, 0x60 | (0x0F & (char)(numSteps)));
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rxr_writeByte(rig, 0x25);
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unlock(rig); //Set UnLock Level
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2005-03-18 16:43:51 +00:00
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}
|
2006-10-07 21:10:11 +00:00
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#endif
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2019-11-30 16:19:08 +00:00
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|
|
// Routine 6 Set RF-IF Setup RF Gain, IF Gain and AGC speed. Also sets Notch Filter and
|
|
|
|
// Noise Blanker if these options are fitted.
|
|
|
|
static void Execute_Routine_6_1(RIG *rig, char mp, char ad, int numSteps)
|
2004-12-08 21:13:25 +00:00
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
setLock(rig, 1); //Set Lock Level
|
|
|
|
setMemPtr(rig, mp, ad); //page, address
|
|
|
|
rxr_writeByte(rig, 0x30 | (0x0F & (char)(numSteps >> 4)));
|
|
|
|
rxr_writeByte(rig, 0x60 | (0x0F & (char)(numSteps)));
|
|
|
|
rxr_writeByte(rig, 0x26);
|
|
|
|
unlock(rig); //Set UnLock Level
|
2005-03-18 16:43:51 +00:00
|
|
|
}
|
2019-11-30 16:19:08 +00:00
|
|
|
// Routine 14 Read signal strength
|
2011-08-20 23:16:11 +00:00
|
|
|
// Transmits byte representing received signal strength (read from AGC voltage).
|
2005-03-18 16:43:51 +00:00
|
|
|
// Output is 8-bit binary in range 0 to 255.
|
|
|
|
static int Execute_Routine_14(RIG *rig)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
unsigned char response[1];
|
|
|
|
unsigned char buf[] = {0x2e}; // Read command
|
|
|
|
int retval;
|
2021-12-18 21:49:45 +00:00
|
|
|
retval = write_block(&rig->state.rigport, buf, 1);
|
2019-11-30 16:19:08 +00:00
|
|
|
|
|
|
|
if (retval != RIG_OK)
|
|
|
|
{
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2021-12-18 21:49:45 +00:00
|
|
|
retval = read_block(&rig->state.rigport, response, 1);
|
2019-11-30 16:19:08 +00:00
|
|
|
|
|
|
|
if (retval != RIG_OK)
|
|
|
|
{
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
return response[0];
|
2005-03-18 16:43:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// Operate button x
|
|
|
|
// Button codes :-
|
2019-11-30 16:19:08 +00:00
|
|
|
// 0 = None pressed 5 = RF-IF button
|
|
|
|
// 1 = Mode up button 6 = Memory button
|
|
|
|
// 2 = Mode down button 7 = * button
|
|
|
|
// 3 = Fast button 8 = Menu button
|
|
|
|
// 4 = Filter button 9 = Power button
|
2011-08-20 23:16:11 +00:00
|
|
|
static void Execute_Operate_button(RIG *rig, char button)
|
2005-03-18 16:43:51 +00:00
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
// setLock(rig, 1); //Set Lock Level
|
|
|
|
rxr_writeByte(rig, 0xa0 | (0x0F & button));
|
|
|
|
// unlock(rig); //Set UnLock Level
|
2004-12-08 21:13:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
static int ar7030_set_freq(RIG *rig, vfo_t vfo, freq_t freq)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
// frequ Mem_Page=0 Address=1A
|
|
|
|
// 3 bytes 24-bit tuned frequency, value is 376635.2228 / MHz
|
|
|
|
freq = freq * .3766352228;
|
|
|
|
|
|
|
|
if (freq < 0) {freq = 0;}
|
|
|
|
|
|
|
|
if (freq > 12058624) {freq = 12058624;}
|
|
|
|
|
|
|
|
Execute_Routine_4_3(rig, 0, 0x1a, freq);
|
|
|
|
return RIG_OK;
|
2004-12-08 21:13:25 +00:00
|
|
|
}
|
|
|
|
static int ar7030_get_freq(RIG *rig, vfo_t vfo, freq_t *freq)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
// frequ Mem_Page=0 Address=1A
|
|
|
|
// 3 bytes 24-bit tuned frequency, value is 376635.2228 / MHz
|
|
|
|
unsigned int frequ_i = 0;
|
|
|
|
setMemPtr(rig, 0, 0x1a);
|
|
|
|
frequ_i = (int)(rxr_readByte(rig) << 16);
|
|
|
|
frequ_i = frequ_i + (int)(rxr_readByte(rig) << 8);
|
|
|
|
frequ_i = frequ_i + (int)(rxr_readByte(rig));
|
|
|
|
*freq = ((float)(frequ_i) * 2.65508890157896);
|
|
|
|
return RIG_OK;
|
2011-08-20 23:16:11 +00:00
|
|
|
}
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
|
|
|
|
/*!
|
2011-08-20 23:16:11 +00:00
|
|
|
Current mode :-
|
2019-11-30 16:19:08 +00:00
|
|
|
RIG_MODE_NONE = 0, < None
|
|
|
|
1 = AM RIG_MODE_AM = (1<<0), < Amplitude Modulation
|
|
|
|
5 = CW RIG_MODE_CW = (1<<1), < CW
|
|
|
|
7 = USB RIG_MODE_USB = (1<<2), < Upper Side Band
|
|
|
|
6 = LSB RIG_MODE_LSB = (1<<3), < Lower Side Band
|
|
|
|
4 = Data RIG_MODE_RTTY = (1<<4), < Remote Teletype
|
|
|
|
3 = NFM RIG_MODE_FM = (1<<5), < "narrow" band FM
|
|
|
|
RIG_MODE_WFM = (1<<6), < broadcast wide FM
|
|
|
|
RIG_MODE_CWR = (1<<7), < CW reverse sideband
|
|
|
|
RIG_MODE_RTTYR = (1<<8), < RTTY reverse sideband
|
|
|
|
2 = Sync RIG_MODE_AMS = (1<<9), < Amplitude Modulation Synchronous
|
|
|
|
RIG_MODE_PKTLSB = (1<<10),< Packet/Digital LSB mode (dedicated port)
|
|
|
|
RIG_MODE_PKTUSB = (1<<11),< Packet/Digital USB mode (dedicated port)
|
|
|
|
RIG_MODE_PKTFM = (1<<12),< Packet/Digital FM mode (dedicated port)
|
|
|
|
RIG_MODE_ECSSUSB = (1<<13),< Exalted Carrier Single Sideband USB
|
|
|
|
RIG_MODE_ECSSLSB = (1<<14),< Exalted Carrier Single Sideband LSB
|
|
|
|
RIG_MODE_FAX = (1<<15) < Facsimile Mode
|
2004-12-08 21:13:25 +00:00
|
|
|
*/
|
|
|
|
static int ar7030_set_mode(RIG *rig, vfo_t vfo, rmode_t mode, pbwidth_t width)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
int filter_num;
|
2006-02-26 19:21:53 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
// mode Mem_Page=0 Address=1D
|
|
|
|
// Current mode :- 1 = AM 4 = Data 2 = Sync 5 = CW 3 = NFM 6 = LSB 7 = USB.
|
|
|
|
switch (mode)
|
|
|
|
{
|
2004-12-08 21:13:25 +00:00
|
|
|
case RIG_MODE_AM :
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_4_1(rig, 0, 0x1d, 1);
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case RIG_MODE_AMS :
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_4_1(rig, 0, 0x1d, 2);
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case RIG_MODE_FM :
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_4_1(rig, 0, 0x1d, 3);
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case RIG_MODE_RTTY :
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_4_1(rig, 0, 0x1d, 4);
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case RIG_MODE_CW :
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_4_1(rig, 0, 0x1d, 5);
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case RIG_MODE_LSB :
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_4_1(rig, 0, 0x1d, 6);
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case RIG_MODE_USB :
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_4_1(rig, 0, 0x1d, 7);
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
default :
|
2019-11-30 16:19:08 +00:00
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (RIG_PASSBAND_NOCHANGE == width) { return RIG_OK; }
|
|
|
|
|
|
|
|
if (width == RIG_PASSBAND_NORMAL)
|
|
|
|
{
|
|
|
|
width = rig_passband_normal(rig, mode);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* pass-through values 1..6, as filter number
|
|
|
|
* Otherwise find out filter number from passband width
|
|
|
|
*/
|
|
|
|
if (width <= 6)
|
|
|
|
{
|
|
|
|
filter_num = width;
|
|
|
|
}
|
2006-02-26 19:21:53 +00:00
|
|
|
else
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
|
|
|
if (width <= 800)
|
|
|
|
{
|
|
|
|
filter_num = 1;
|
|
|
|
}
|
|
|
|
else if (width <= 2100)
|
|
|
|
{
|
|
|
|
filter_num = 2;
|
|
|
|
}
|
|
|
|
else if (width <= 3700)
|
|
|
|
{
|
|
|
|
filter_num = 3;
|
|
|
|
}
|
|
|
|
else if (width <= 5200)
|
|
|
|
{
|
|
|
|
filter_num = 4;
|
|
|
|
}
|
|
|
|
else if (width <= 9500)
|
|
|
|
{
|
|
|
|
filter_num = 5;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
filter_num = 6;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// filter Mem_Page=0 Address=34
|
|
|
|
// Current filter number (1 to 6).
|
|
|
|
Execute_Routine_4_1(rig, 0, 0x34, filter_num);
|
2006-02-26 19:21:53 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
return RIG_OK;
|
2004-12-08 21:13:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int ar7030_get_mode(RIG *rig, vfo_t vfo, rmode_t *mode, pbwidth_t *width)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
// mode Mem_Page=0 Address=1D
|
|
|
|
// Current mode :- 1 = AM 4 = Data 2 = Sync 5 = CW 3 = NFM 6 = LSB 7 = USB.
|
|
|
|
setMemPtr(rig, 0, 0x1d);
|
|
|
|
|
|
|
|
switch (rxr_readByte(rig))
|
|
|
|
{
|
2004-12-08 21:13:25 +00:00
|
|
|
case 1:
|
2019-11-30 16:19:08 +00:00
|
|
|
*mode = RIG_MODE_AM;
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case 2:
|
2019-11-30 16:19:08 +00:00
|
|
|
*mode = RIG_MODE_AMS;
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case 3:
|
2019-11-30 16:19:08 +00:00
|
|
|
*mode = RIG_MODE_FM;
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case 4:
|
2019-11-30 16:19:08 +00:00
|
|
|
*mode = RIG_MODE_RTTY;
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case 5:
|
2019-11-30 16:19:08 +00:00
|
|
|
*mode = RIG_MODE_CW;
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case 6:
|
2019-11-30 16:19:08 +00:00
|
|
|
*mode = RIG_MODE_LSB;
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
case 7:
|
2019-11-30 16:19:08 +00:00
|
|
|
*mode = RIG_MODE_USB;
|
|
|
|
break;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
default :
|
2019-11-30 16:19:08 +00:00
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
// fltbw Mem_Page=0 Address=38
|
|
|
|
// Filter bandwidth dezimal in Hz.
|
|
|
|
// Filter bandwidth (2 BCD digits : x.x kHz).
|
|
|
|
|
|
|
|
setMemPtr(rig, 0, 0x38);
|
2004-12-08 21:13:25 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
if ((*width = BCD_To_int(rig, rxr_readByte(rig)) * 100) < 0)
|
|
|
|
{
|
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return RIG_OK;
|
2011-08-20 23:16:11 +00:00
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int ar7030_set_level(RIG *rig, vfo_t vfo, setting_t level, value_t val)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
switch (level)
|
|
|
|
{
|
2004-12-08 21:13:25 +00:00
|
|
|
case RIG_LEVEL_AF :
|
2019-11-30 16:19:08 +00:00
|
|
|
// af_vol Mem_Page=0 Address=1E
|
|
|
|
// Main channel volume (6-bits, values 15 to 63)
|
|
|
|
val.f = (val.f * 50) + 15;
|
|
|
|
|
|
|
|
if (val.f < 15) {val.f = 15;}
|
|
|
|
|
|
|
|
if (val.f > 63) {val.f = 63;}
|
|
|
|
|
|
|
|
Execute_Routine_4_1(rig, 0, 0x1e, val.f);
|
|
|
|
return RIG_OK;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_LEVEL_RF :
|
2019-11-30 16:19:08 +00:00
|
|
|
// rfgain Mem_Page=0 Address=30
|
|
|
|
// Current RF gain setting (0 to 5) (0=max gain)
|
|
|
|
val.f = ((val.f * 10) - 1) * -1;
|
|
|
|
|
|
|
|
if (val.f < 0) {val.f = 0;}
|
|
|
|
|
|
|
|
if (val.f > 5) {val.f = 5;}
|
|
|
|
|
|
|
|
Execute_Routine_6_1(rig, 0, 0x30, val.f) ;
|
|
|
|
return RIG_OK;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_LEVEL_SQL :
|
2019-11-30 16:19:08 +00:00
|
|
|
|
|
|
|
// sqlval Mem_Page=0 Address=33
|
|
|
|
// Squelch value (current setting)(values 0 to 150)
|
|
|
|
if (val.f < 0) {val.f = 0;}
|
|
|
|
|
|
|
|
if (val.f > 1) {val.f = 1;}
|
|
|
|
|
|
|
|
Execute_Routine_6_1(rig, 0, 0x33, val.f * 150);
|
|
|
|
return RIG_OK;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_LEVEL_CWPITCH :
|
2019-11-30 16:19:08 +00:00
|
|
|
// bfoval Mem_Page=0 Address=36
|
|
|
|
// BFO offset in Hz (x33.19Hz)(values -4248.320 to 4215.130kHz).
|
|
|
|
val.i = val.i * 100 / 3319;
|
|
|
|
|
|
|
|
if (val.i < -128) {val.i = -128;}
|
|
|
|
|
|
|
|
if (val.i > 127) {val.i = 127;}
|
|
|
|
|
|
|
|
Execute_Routine_3_1(rig, 0, 0x36, val.i);
|
|
|
|
return RIG_OK;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_LEVEL_AGC :
|
2019-11-30 16:19:08 +00:00
|
|
|
|
|
|
|
//ar7030 agcspd 3 > RIG_AGC_OFF
|
|
|
|
// > RIG_AGC_SUPERFAST
|
|
|
|
//ar7030 agcspd 0 > RIG_AGC_FAST
|
|
|
|
//ar7030 agcspd 2 > RIG_AGC_SLOW
|
|
|
|
// > RIG_AGC_USER /*!< user selectable */
|
|
|
|
//ar7030 agcspd 1 > RIG_AGC_MEDIUM
|
|
|
|
// agcspd Mem_Page=0 Address=32
|
|
|
|
// Current AGC speed : 0 = Fast 2 = Slow 1 = Medium 3 = Off
|
|
|
|
switch (val.i)
|
|
|
|
{
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_AGC_OFF:
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_6_1(rig, 0, 0x32, 3);
|
|
|
|
break;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_AGC_SLOW:
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_6_1(rig, 0, 0x32, 2);
|
|
|
|
break;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_AGC_MEDIUM:
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_6_1(rig, 0, 0x32, 1);
|
|
|
|
break;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_AGC_FAST:
|
2019-11-30 16:19:08 +00:00
|
|
|
Execute_Routine_6_1(rig, 0, 0x32, 0);
|
|
|
|
break;
|
|
|
|
|
2005-03-18 16:43:51 +00:00
|
|
|
default:
|
2019-11-30 16:19:08 +00:00
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return RIG_OK;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
default :
|
2019-11-30 16:19:08 +00:00
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
2004-12-08 21:13:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int ar7030_get_level(RIG *rig, vfo_t vfo, setting_t level, value_t *val)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
int smval1;
|
|
|
|
int smval2;
|
|
|
|
|
|
|
|
switch (level)
|
|
|
|
{
|
2004-12-08 21:13:25 +00:00
|
|
|
case RIG_LEVEL_AF :
|
2019-11-30 16:19:08 +00:00
|
|
|
// af_vol Mem_Page=0 Address=1E
|
|
|
|
// Main channel volume (6-bits, values 15 to 63)
|
|
|
|
setMemPtr(rig, 0, 0x1e);
|
|
|
|
val->f = (float)(rxr_readByte(rig) - 15) / 50;
|
|
|
|
return RIG_OK;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_LEVEL_RF :
|
2019-11-30 16:19:08 +00:00
|
|
|
// rfgain Mem_Page=0 Address=30
|
|
|
|
// Current RF gain setting (0 to 5) (0=max gain)
|
|
|
|
setMemPtr(rig, 0, 0x30);
|
|
|
|
val->f = (float)((rxr_readByte(rig) * -1) + 1) / 10;
|
|
|
|
return RIG_OK;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_LEVEL_SQL :
|
2019-11-30 16:19:08 +00:00
|
|
|
// sqlval Mem_Page=0 Address=33
|
|
|
|
// Squelch value (current setting)(values 0 to 150)
|
|
|
|
setMemPtr(rig, 0, 0x33);
|
|
|
|
val->f = (float)rxr_readByte(rig) / 150;
|
|
|
|
return RIG_OK;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_LEVEL_CWPITCH :
|
2019-11-30 16:19:08 +00:00
|
|
|
// bfoval Mem_Page=0 Address=36
|
|
|
|
// BFO offset in Hz (x33.19Hz)(values -4248.320 to 4215.130kHz).
|
|
|
|
setMemPtr(rig, 0, 0x36);
|
|
|
|
val->i = ((char)rxr_readByte(rig) * 3319) / 100;
|
|
|
|
return RIG_OK;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case RIG_LEVEL_AGC :
|
2019-11-30 16:19:08 +00:00
|
|
|
//ar7030 agcspd 3 > RIG_AGC_OFF
|
|
|
|
// > RIG_AGC_SUPERFAST,
|
|
|
|
//ar7030 agcspd 0 > RIG_AGC_FAST,
|
|
|
|
//ar7030 agcspd 2 > RIG_AGC_SLOW
|
|
|
|
// > RIG_AGC_USER,
|
|
|
|
//ar7030 agcspd 1 > RIG_AGC_MEDIUM
|
|
|
|
// agcspd Mem_Page=0 Address=32
|
|
|
|
// Current AGC speed : 0 = Fast 2 = Slow 1 = Medium 3 = Off
|
|
|
|
setMemPtr(rig, 0, 0x32);
|
|
|
|
|
|
|
|
switch (rxr_readByte(rig))
|
|
|
|
{
|
2011-08-20 23:16:11 +00:00
|
|
|
case 0:
|
2019-11-30 16:19:08 +00:00
|
|
|
val->i = RIG_AGC_FAST;
|
|
|
|
break;
|
|
|
|
|
2005-03-18 16:43:51 +00:00
|
|
|
case 1:
|
2019-11-30 16:19:08 +00:00
|
|
|
val->i = RIG_AGC_MEDIUM;
|
|
|
|
break;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case 2:
|
2019-11-30 16:19:08 +00:00
|
|
|
val->i = RIG_AGC_SLOW;
|
|
|
|
break;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
case 3:
|
2019-11-30 16:19:08 +00:00
|
|
|
val->i = RIG_AGC_OFF;
|
|
|
|
break;
|
|
|
|
|
2005-03-18 16:43:51 +00:00
|
|
|
default:
|
2019-11-30 16:19:08 +00:00
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return RIG_OK;
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
// case RIG_LEVEL_LINEOUT :
|
|
|
|
// geht nicht in hamlib
|
2005-03-18 16:43:51 +00:00
|
|
|
// // af_axl Mem_Page=0 Address=23 Bit=0 - 5
|
|
|
|
// setMemPtr(rig ,0 ,0x23);
|
2011-08-20 23:16:11 +00:00
|
|
|
// val->f = ((float)(rxr_readByte(rig) - 27) * 2) / 100;
|
2005-03-18 16:43:51 +00:00
|
|
|
// // af_axr Mem_Page=0 Address=24 Bit=0 - 5
|
|
|
|
// return RIG_OK;
|
|
|
|
|
|
|
|
case RIG_LEVEL_RAWSTR :
|
2019-11-30 16:19:08 +00:00
|
|
|
// Routine 14 Read signal strength
|
|
|
|
// Read signal strength Transmits byte representing received signal strength
|
|
|
|
// (read from AGC voltage). Output is 8-bit binary in range 0 to 255
|
|
|
|
val->i = Execute_Routine_14(rig);
|
|
|
|
return RIG_OK;
|
|
|
|
|
2005-03-18 16:43:51 +00:00
|
|
|
case RIG_LEVEL_STRENGTH :
|
2019-11-30 16:19:08 +00:00
|
|
|
// smval Mem_Page=0 Address=3F - 40
|
|
|
|
// 2 bytes Last S-meter reading (bars + segments)
|
|
|
|
setMemPtr(rig, 0, 0x3f);
|
|
|
|
smval1 = (unsigned char)rxr_readByte(rig);
|
|
|
|
smval2 = (unsigned char)rxr_readByte(rig);
|
|
|
|
|
|
|
|
if (smval1 < 9)
|
|
|
|
{
|
|
|
|
val->i = (smval1 * 6 + smval2) - 127;
|
|
|
|
}
|
|
|
|
else if (smval1 < 11)
|
|
|
|
{
|
|
|
|
/* int ops => int result => round has no effect (besides compiler warning */
|
|
|
|
//val->i = round((smval1 * 6 + smval2) * 10 / 12) - 118;
|
|
|
|
val->i = ((smval1 * 6 + smval2) * 10 / 12) - 118;
|
|
|
|
}
|
2019-12-06 21:39:42 +00:00
|
|
|
else
|
2019-11-30 16:19:08 +00:00
|
|
|
{
|
|
|
|
/* int ops => int result => round has no effect (besides compiler warning */
|
|
|
|
//val->i = round((smval1 * 6 + smval2) * 10 / 6) - 173;
|
|
|
|
val->i = ((smval1 * 6 + smval2) * 10 / 6) - 173;
|
|
|
|
}
|
|
|
|
|
|
|
|
return RIG_OK;
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
default :
|
2019-11-30 16:19:08 +00:00
|
|
|
return -RIG_EINVAL;
|
|
|
|
}
|
2004-12-08 21:13:25 +00:00
|
|
|
}
|
|
|
|
|
2005-03-18 16:43:51 +00:00
|
|
|
static int ar7030_set_powerstat(RIG *rig, powerstat_t status)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
// Radio power state.
|
|
|
|
// 0 > RIG_POWER_OFF Power off
|
|
|
|
// 1 > RIG_POWER_ON Power on
|
|
|
|
// 2 > RIG_POWER_STANDBY Standby
|
|
|
|
switch (status)
|
|
|
|
{
|
|
|
|
|
|
|
|
case RIG_POWER_OFF:
|
|
|
|
// Operate button 9 = Power button
|
|
|
|
Execute_Operate_button(rig, 9);
|
|
|
|
return RIG_OK;
|
|
|
|
|
|
|
|
case RIG_POWER_ON:
|
|
|
|
// Operate button 0 = None pressed
|
|
|
|
Execute_Operate_button(rig, 0);
|
|
|
|
return RIG_OK;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
2006-10-07 21:10:11 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
return -RIG_EINVAL;
|
2005-03-18 16:43:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int ar7030_get_powerstat(RIG *rig, powerstat_t *status)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
// power Mem_Page=0 Address=2E Bit=0 - 0
|
|
|
|
// Power on
|
|
|
|
setMemPtr(rig, 0, 0x2e);
|
|
|
|
*status = (char)rxr_readByte(rig) & 0x01;
|
|
|
|
return RIG_OK;
|
2005-03-18 16:43:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int ar7030_reset(RIG *rig, reset_t reset)
|
|
|
|
{
|
2019-11-30 16:19:08 +00:00
|
|
|
// Reset operation.
|
|
|
|
// 0 > RIG_RESET_NONE No reset
|
|
|
|
// 1 > RIG_RESET_SOFT Software reset
|
|
|
|
// 2 > RIG_RESET_VFO VFO reset
|
|
|
|
// 3 > RIG_RESET_MCALL Memory clear
|
|
|
|
// 4 > RIG_RESET_MASTER Master reset
|
|
|
|
switch (reset)
|
|
|
|
{
|
2011-08-20 23:16:11 +00:00
|
|
|
|
2005-03-18 16:43:51 +00:00
|
|
|
// Routine 0 Reset Setup receiver as at switch-on.
|
2019-11-30 16:19:08 +00:00
|
|
|
case RIG_RESET_SOFT :
|
|
|
|
Execute_Routine_0(rig) ;
|
|
|
|
return RIG_OK;
|
2006-10-07 21:10:11 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
2006-10-07 21:10:11 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
return -RIG_EINVAL;
|
2005-03-18 16:43:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
2011-08-20 23:16:11 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2005-03-18 16:43:51 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
|
2019-11-30 16:19:08 +00:00
|
|
|
const struct rig_caps ar7030_caps =
|
|
|
|
{
|
2020-03-05 14:44:18 +00:00
|
|
|
RIG_MODEL(RIG_MODEL_AR7030),
|
2019-11-30 16:19:08 +00:00
|
|
|
.model_name = "AR7030",
|
|
|
|
.mfg_name = "AOR",
|
2020-03-30 04:03:21 +00:00
|
|
|
.version = "20200324.0",
|
2019-11-30 16:19:08 +00:00
|
|
|
.copyright = "LGPL",
|
2021-09-15 18:50:31 +00:00
|
|
|
.status = RIG_STATUS_STABLE,
|
2019-11-30 16:19:08 +00:00
|
|
|
.rig_type = RIG_TYPE_RECEIVER,
|
|
|
|
.ptt_type = RIG_PTT_NONE,
|
|
|
|
.dcd_type = RIG_DCD_NONE,
|
|
|
|
.port_type = RIG_PORT_SERIAL,
|
|
|
|
.serial_rate_min = 1200,
|
|
|
|
.serial_rate_max = 1200,
|
|
|
|
.serial_data_bits = 8,
|
|
|
|
.serial_stop_bits = 1,
|
|
|
|
.serial_parity = RIG_PARITY_NONE,
|
|
|
|
.serial_handshake = RIG_HANDSHAKE_NONE, /* TBC */
|
|
|
|
.write_delay = 0,
|
|
|
|
.post_write_delay = 0, //Device: /dev/ttyS0
|
|
|
|
//.post_write_delay = 85, //Device: /dev/tts/USB0 < 85 sec timedout after 0 chars
|
|
|
|
.timeout = 500, /* 0.5 second */
|
|
|
|
.retry = 0,
|
|
|
|
.has_get_func = AR7030_FUNC_ALL,
|
|
|
|
.has_set_func = AR7030_FUNC_ALL,
|
|
|
|
.has_get_level = AR7030_LEVEL,
|
|
|
|
.has_set_level = RIG_LEVEL_SET(AR7030_LEVEL),
|
|
|
|
.has_get_parm = AR7030_PARM,
|
|
|
|
.has_set_parm = RIG_PARM_NONE,
|
|
|
|
.level_gran = {
|
2020-09-19 21:09:44 +00:00
|
|
|
// cppcheck-suppress *
|
2019-11-30 16:19:08 +00:00
|
|
|
[LVL_RAWSTR] = { .min = { .i = 0 }, .max = { .i = 255 } },
|
|
|
|
},
|
|
|
|
.parm_gran = {},
|
|
|
|
.ctcss_list = NULL,
|
|
|
|
.dcs_list = NULL,
|
|
|
|
.preamp = { RIG_DBLST_END, },
|
|
|
|
.attenuator = { RIG_DBLST_END, },
|
|
|
|
.max_rit = Hz(0),
|
|
|
|
.max_xit = Hz(0),
|
|
|
|
.max_ifshift = Hz(0),
|
|
|
|
.targetable_vfo = 0,
|
|
|
|
.transceive = RIG_TRN_OFF,
|
|
|
|
.bank_qty = 0,
|
|
|
|
.chan_desc_sz = 100, /* FIXME */
|
|
|
|
.vfo_ops = AR7030_VFO_OPS,
|
|
|
|
|
|
|
|
.chan_list = { RIG_CHAN_END, }, /* FIXME: memory channel list: 1000 memories */
|
|
|
|
|
|
|
|
.rx_range_list1 = {
|
|
|
|
{kHz(10), MHz(2600), AR7030_MODES, -1, -1, AR7030_VFO},
|
|
|
|
RIG_FRNG_END,
|
|
|
|
},
|
|
|
|
.tx_range_list1 = { RIG_FRNG_END, },
|
|
|
|
|
|
|
|
.rx_range_list2 = {
|
|
|
|
{kHz(10), MHz(2600), AR7030_MODES, -1, -1, AR7030_VFO},
|
|
|
|
RIG_FRNG_END,
|
|
|
|
}, /* rx range */
|
|
|
|
.tx_range_list2 = { RIG_FRNG_END, }, /* no tx range, this is a scanner! */
|
|
|
|
|
|
|
|
.tuning_steps = {
|
|
|
|
{AR7030_MODES, 50},
|
|
|
|
{AR7030_MODES, 100},
|
|
|
|
{AR7030_MODES, 200},
|
|
|
|
{AR7030_MODES, 500},
|
|
|
|
{AR7030_MODES, kHz(1)},
|
|
|
|
{AR7030_MODES, kHz(2)},
|
|
|
|
{AR7030_MODES, kHz(5)},
|
|
|
|
{AR7030_MODES, kHz(6.25)},
|
|
|
|
{AR7030_MODES, kHz(9)},
|
|
|
|
{AR7030_MODES, kHz(10)},
|
|
|
|
{AR7030_MODES, 12500},
|
|
|
|
{AR7030_MODES, kHz(20)},
|
|
|
|
{AR7030_MODES, kHz(25)},
|
|
|
|
{AR7030_MODES, kHz(30)},
|
|
|
|
{AR7030_MODES, kHz(50)},
|
|
|
|
{AR7030_MODES, kHz(100)},
|
|
|
|
{AR7030_MODES, kHz(200)},
|
|
|
|
{AR7030_MODES, kHz(250)},
|
|
|
|
{AR7030_MODES, kHz(500)},
|
|
|
|
// {AR7030_MODES,0}, /* any tuning step */
|
|
|
|
RIG_TS_END,
|
|
|
|
},
|
|
|
|
/* mode/filter list, .remember = order matters! */
|
|
|
|
.filters = {
|
2004-04-16 19:58:10 +00:00
|
|
|
/* mode/filter list, .remember = order matters! */
|
2019-11-30 16:19:08 +00:00
|
|
|
{RIG_MODE_SSB | RIG_MODE_CW, kHz(3)},
|
|
|
|
{RIG_MODE_SSB | RIG_MODE_CW, kHz(0.8)}, /* narrow */
|
|
|
|
{RIG_MODE_SSB, kHz(4.8)}, /* wide */
|
|
|
|
{RIG_MODE_CW, kHz(9.5)}, /* wide */
|
|
|
|
{RIG_MODE_FM | RIG_MODE_AM, kHz(15)},
|
|
|
|
{RIG_MODE_FM | RIG_MODE_AM, kHz(6)}, /* narrow */
|
|
|
|
{RIG_MODE_FM | RIG_MODE_AM, kHz(30)}, /* wide */
|
|
|
|
RIG_FLT_END,
|
|
|
|
},
|
|
|
|
|
|
|
|
.priv = NULL, /* priv */
|
2004-04-16 19:58:10 +00:00
|
|
|
|
2004-12-08 21:13:25 +00:00
|
|
|
// .rig_init = ar7030_init,
|
|
|
|
// .rig_cleanup = ar7030_cleanup,
|
|
|
|
// .rig_open = ar7030_open,
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// .rig_close = ar7030_close,
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2004-04-16 19:58:10 +00:00
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2019-11-30 16:19:08 +00:00
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.set_freq = ar7030_set_freq,
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.get_freq = ar7030_get_freq,
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.set_mode = ar7030_set_mode,
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.get_mode = ar7030_get_mode,
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2004-12-08 21:13:25 +00:00
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// .set_vfo = ar7030_set_vfo,
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// .get_vfo = ar7030_get_vfo,
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2011-08-20 23:16:11 +00:00
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2019-11-30 16:19:08 +00:00
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.set_powerstat = ar7030_set_powerstat,
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.get_powerstat = ar7030_get_powerstat,
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.set_level = ar7030_set_level,
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.get_level = ar7030_get_level,
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2004-12-08 21:13:25 +00:00
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// .set_func = ar7030_set_func,
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// .get_func = ar7030_get_func,
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// .set_parm = ar7030_set_parm,
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// .get_parm = ar7030_get_parm,
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// .get_info = ar7030_get_info,
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2019-11-30 16:19:08 +00:00
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// .set_ptt = ar7030_set_ptt,
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// .get_ptt = ar7030_get_ptt,
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// .get_dcd = ar7030_get_dcd,
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// .set_rptr_shift = ar7030_set_rptr_shift,
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// .get_rptr_shift = ar7030_get_rptr_shift,
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// .set_rptr_offs = ar7030_set_rptr_offs,
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// .get_rptr_offs = ar7030_get_rptr_offs,
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// .set_ctcss_tone = ar7030_set_ctcss_tone,
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// .get_ctcss_tone = ar7030_get_ctcss_tone,
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// .set_dcs_code = ar7030_set_dcs_code,
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// .get_dcs_code = ar7030_get_dcs_code,
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// .set_ctcss_sql = ar7030_set_ctcss_sql,
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// .get_ctcss_sql = ar7030_get_ctcss_sql,
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// .set_dcs_sql = ar7030_set_dcs_sql,
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// .get_dcs_sql = ar7030_get_dcs_sql,
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// .set_split_freq = ar7030_set_split_freq,
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// .get_split_freq = ar7030_get_split_freq,
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// .set_split_mode = ar7030_set_split_mode,
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// .get_split_mode = ar7030_get_split_mode,
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// .set_split_vfo = ar7030_set_split_vfo,
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// .get_split_vfo = ar7030_get_split_vfo,
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// .set_rit = ar7030_set_rit,
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// .get_rit = ar7030_get_rit,
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// .set_xit = ar7030_set_xit,
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// .get_xit = ar7030_get_xit,
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// .set_ts = ar7030_set_ts,
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// .get_ts = ar7030_get_ts,
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// .set_ant = ar7030_set_ant,
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// .get_ant = ar7030_get_ant,
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// .set_bank = ar7030_set_bank,
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// .set_mem = ar7030_set_mem,
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// .get_mem = ar7030_get_mem,
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// .vfo_op = ar7030_vfo_op,
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// .scan = ar7030_scan,
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2004-12-08 21:13:25 +00:00
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// .send_dtmf = ar7030_send_dtmf,
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// .recv_dtmf = ar7030_recv_dtmf,
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// .send_morse = ar7030_send_morse,
|
2019-11-30 16:19:08 +00:00
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.reset = ar7030_reset,
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// .set_channel = ar7030_set_channel,
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// .get_channel = ar7030_get_channel,
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// .set_trn = ar7030_set_trn,
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// .get_trn = ar7030_get_trn,
|
2004-12-08 21:13:25 +00:00
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};
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2004-04-16 19:58:10 +00:00
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