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tweakin stuff

pull/89/head
Jessica Schneider 2023-08-14 19:59:42 -05:00
rodzic 7b8f4b6e96
commit a7b31ab91f
14 zmienionych plików z 248811 dodań i 74 usunięć
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152
GRBL_Advanced_F446RE.cscope_file_list 100644
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"X:\GRBL-Advanced-F446ZE\ARM\cmsis\arm_common_tables.h"
"X:\GRBL-Advanced-F446ZE\ARM\cmsis\arm_math.h"
"X:\GRBL-Advanced-F446ZE\ARM\cmsis\core_cm4.h"
"X:\GRBL-Advanced-F446ZE\ARM\cmsis\core_cm4_simd.h"
"X:\GRBL-Advanced-F446ZE\ARM\cmsis\core_cmFunc.h"
"X:\GRBL-Advanced-F446ZE\ARM\cmsis\core_cmInstr.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\misc.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_adc.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_can.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_crc.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_cryp.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_dac.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_dbgmcu.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_dcmi.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_dma.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_exti.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_flash.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_gpio.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_hash.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_i2c.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_iwdg.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_pwr.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_rcc.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_rng.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_rtc.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_sdio.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_spi.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_syscfg.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_tim.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_usart.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\inc\stm32f4xx_wwdg.h"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\misc.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_adc.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_can.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_crc.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_cryp.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_cryp_aes.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_cryp_des.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_cryp_tdes.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_dac.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_dbgmcu.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_dcmi.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_dma.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_exti.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_flash.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_gpio.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_hash.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_hash_md5.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_hash_sha1.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_i2c.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_iwdg.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_pwr.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_rcc.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_rng.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_rtc.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_sdio.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_spi.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_syscfg.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_tim.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_usart.c"
"X:\GRBL-Advanced-F446ZE\ARM\SPL\src\stm32f4xx_wwdg.c"
"X:\GRBL-Advanced-F446ZE\grbl\Config.h"
"X:\GRBL-Advanced-F446ZE\grbl\CoolantControl.c"
"X:\GRBL-Advanced-F446ZE\grbl\CoolantControl.h"
"X:\GRBL-Advanced-F446ZE\grbl\defaults.h"
"X:\GRBL-Advanced-F446ZE\grbl\GCode.c"
"X:\GRBL-Advanced-F446ZE\grbl\GCode.h"
"X:\GRBL-Advanced-F446ZE\grbl\grbl_advance.h"
"X:\GRBL-Advanced-F446ZE\grbl\Jog.c"
"X:\GRBL-Advanced-F446ZE\grbl\Jog.h"
"X:\GRBL-Advanced-F446ZE\grbl\Limits.c"
"X:\GRBL-Advanced-F446ZE\grbl\Limits.h"
"X:\GRBL-Advanced-F446ZE\grbl\MotionControl.c"
"X:\GRBL-Advanced-F446ZE\grbl\MotionControl.h"
"X:\GRBL-Advanced-F446ZE\grbl\Nvm.c"
"X:\GRBL-Advanced-F446ZE\grbl\Nvm.h"
"X:\GRBL-Advanced-F446ZE\grbl\Planner.c"
"X:\GRBL-Advanced-F446ZE\grbl\Planner.h"
"X:\GRBL-Advanced-F446ZE\grbl\Probe.c"
"X:\GRBL-Advanced-F446ZE\grbl\Probe.h"
"X:\GRBL-Advanced-F446ZE\grbl\Protocol.c"
"X:\GRBL-Advanced-F446ZE\grbl\Protocol.h"
"X:\GRBL-Advanced-F446ZE\grbl\Report.c"
"X:\GRBL-Advanced-F446ZE\grbl\Report.h"
"X:\GRBL-Advanced-F446ZE\grbl\Settings.c"
"X:\GRBL-Advanced-F446ZE\grbl\Settings.h"
"X:\GRBL-Advanced-F446ZE\grbl\SpindleControl.c"
"X:\GRBL-Advanced-F446ZE\grbl\SpindleControl.h"
"X:\GRBL-Advanced-F446ZE\grbl\Stepper.c"
"X:\GRBL-Advanced-F446ZE\grbl\Stepper.h"
"X:\GRBL-Advanced-F446ZE\grbl\System.c"
"X:\GRBL-Advanced-F446ZE\grbl\System.h"
"X:\GRBL-Advanced-F446ZE\grbl\ToolChange.c"
"X:\GRBL-Advanced-F446ZE\grbl\ToolChange.h"
"X:\GRBL-Advanced-F446ZE\grbl\ToolTable.c"
"X:\GRBL-Advanced-F446ZE\grbl\ToolTable.h"
"X:\GRBL-Advanced-F446ZE\grbl\util.c"
"X:\GRBL-Advanced-F446ZE\grbl\util.h"
"X:\GRBL-Advanced-F446ZE\HAL\EXTI\EXTI.c"
"X:\GRBL-Advanced-F446ZE\HAL\EXTI\EXTI.h"
"X:\GRBL-Advanced-F446ZE\HAL\FLASH\eeprom.c"
"X:\GRBL-Advanced-F446ZE\HAL\FLASH\eeprom.h"
"X:\GRBL-Advanced-F446ZE\HAL\GPIO\GPIO.c"
"X:\GRBL-Advanced-F446ZE\HAL\GPIO\GPIO.h"
"X:\GRBL-Advanced-F446ZE\HAL\I2C\I2C.c"
"X:\GRBL-Advanced-F446ZE\HAL\I2C\I2C.h"
"X:\GRBL-Advanced-F446ZE\HAL\SPI\SPI.c"
"X:\GRBL-Advanced-F446ZE\HAL\SPI\SPI.h"
"X:\GRBL-Advanced-F446ZE\HAL\STM32\startup_stm32f446zetx.s"
"X:\GRBL-Advanced-F446ZE\HAL\STM32\stm32f4xx.h"
"X:\GRBL-Advanced-F446ZE\HAL\STM32\stm32f4xx_conf.h"
"X:\GRBL-Advanced-F446ZE\HAL\STM32\stm32f4xx_it.c"
"X:\GRBL-Advanced-F446ZE\HAL\STM32\stm32f4xx_it.h"
"X:\GRBL-Advanced-F446ZE\HAL\STM32\system_stm32f4xx.c"
"X:\GRBL-Advanced-F446ZE\HAL\STM32\system_stm32f4xx.h"
"X:\GRBL-Advanced-F446ZE\HAL\System32.c"
"X:\GRBL-Advanced-F446ZE\HAL\System32.h"
"X:\GRBL-Advanced-F446ZE\HAL\TIM\TIM.c"
"X:\GRBL-Advanced-F446ZE\HAL\TIM\TIM.h"
"X:\GRBL-Advanced-F446ZE\HAL\USART\FIFO_USART.c"
"X:\GRBL-Advanced-F446ZE\HAL\USART\FIFO_USART.h"
"X:\GRBL-Advanced-F446ZE\HAL\USART\Usart.c"
"X:\GRBL-Advanced-F446ZE\HAL\USART\Usart.h"
"X:\GRBL-Advanced-F446ZE\Libraries\CRC\CRC.c"
"X:\GRBL-Advanced-F446ZE\Libraries\CRC\CRC.h"
"X:\GRBL-Advanced-F446ZE\Libraries\EEPROM\M24C0X.c"
"X:\GRBL-Advanced-F446ZE\Libraries\EEPROM\M24C0X.h"
"X:\GRBL-Advanced-F446ZE\Libraries\Encoder\Encoder.c"
"X:\GRBL-Advanced-F446ZE\Libraries\Encoder\Encoder.h"
"X:\GRBL-Advanced-F446ZE\Libraries\Ethernet\Ethernet.c"
"X:\GRBL-Advanced-F446ZE\Libraries\Ethernet\Ethernet.h"
"X:\GRBL-Advanced-F446ZE\Libraries\Ethernet\ServerTCP.c"
"X:\GRBL-Advanced-F446ZE\Libraries\Ethernet\ServerTCP.h"
"X:\GRBL-Advanced-F446ZE\Libraries\Ethernet\utility\socket.c"
"X:\GRBL-Advanced-F446ZE\Libraries\Ethernet\utility\socket.h"
"X:\GRBL-Advanced-F446ZE\Libraries\Ethernet\utility\util2.h"
"X:\GRBL-Advanced-F446ZE\Libraries\Ethernet\utility\W5500.c"
"X:\GRBL-Advanced-F446ZE\Libraries\Ethernet\utility\W5500.h"
"X:\GRBL-Advanced-F446ZE\Libraries\GrIP\ComIf.c"
"X:\GRBL-Advanced-F446ZE\Libraries\GrIP\ComIf.h"
"X:\GRBL-Advanced-F446ZE\Libraries\GrIP\GrIP.c"
"X:\GRBL-Advanced-F446ZE\Libraries\GrIP\GrIP.h"
"X:\GRBL-Advanced-F446ZE\Libraries\Printf\Print.c"
"X:\GRBL-Advanced-F446ZE\Libraries\Printf\Print.h"
"X:\GRBL-Advanced-F446ZE\main.c"
"X:\GRBL-Advanced-F446ZE\README.md"
"X:\GRBL-Advanced-F446ZE\Src\debug.h"
"X:\GRBL-Advanced-F446ZE\Src\PID.c"
"X:\GRBL-Advanced-F446ZE\Src\PID.h"
"X:\GRBL-Advanced-F446ZE\Src\Platform.h"
"X:\GRBL-Advanced-F446ZE\STM32F446ZETX_FLASH.ld"
"X:\GRBL-Advanced-F446ZE\STM32F446ZETX_RAM.ld"

74
GRBL_Advanced_F446RE.ebp
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@ -1,7 +1,7 @@
<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<EmBitz_project_file>
<EmBitzVersion release="1.11" revision="0" />
<FileVersion major="1" minor="0" />
<EmBitzVersion release="2.60" revision="0" />
<FileVersion major="2" minor="0" />
<Project>
<Option title="GRBL_Advanced" />
<Option pch_mode="2" />
@ -66,7 +66,7 @@
<Device>
<Add option="$device=cortex-m4" />
<Add option="$fpu=fpv4-sp-d16" />
<Add option="$lscript=./stm32f446re_flash.ld" />
<Add option="$lscript=STM32F446ZETX_FLASH.ld" />
<Add option="$stack=0x0400" />
<Add option="$heap=0x0000" />
</Device>
@ -79,7 +79,7 @@
<Add option="-fno-strict-aliasing" />
<Add symbol="ARM_MATH_CM4" />
<Add symbol="__FPU_USED" />
<Add symbol="STM32F446RE" />
<Add symbol="STM32F446ZE" />
<Add symbol="STM32F446xx" />
<Add symbol="USE_STDPERIPH_DRIVER" />
<Add directory=".\inc" />
@ -311,8 +311,8 @@
<Option compilerVar="CC" />
</Unit>
<Unit filename="HAL\SPI\SPI.h" />
<Unit filename="HAL\STM32\startup_stm32f4xx.S">
<Option compilerVar="CC" />
<Unit filename="HAL\STM32\startup_stm32f446zetx.s">
<Option compilerVar="ASM" />
</Unit>
<Unit filename="HAL\STM32\stm32f4xx.h" />
<Unit filename="HAL\STM32\stm32f4xx_conf.h" />
@ -391,66 +391,16 @@
</Unit>
<Unit filename="Src\PID.h" />
<Unit filename="Src\Platform.h" />
<Unit filename="stm32f446re_flash.ld" />
<Unit filename="STM32F446ZETX_FLASH.ld" />
<Unit filename="STM32F446ZETX_RAM.ld" />
<Extensions>
<code_completion />
<debugger>
<target_debugging_settings target="Debug" active_interface="ST-link">
<debug_interface interface_id="EBlink" ip_address="localhost" ip_port="4242" path="C:\Program Files (x86)\EmBitz\1.11\share\EBlink" executable="eblink.exe" description="" dont_start_server="false" backoff_time="400" options="10" reg_filter="0" active_family="STMicroelectronics" gdb_before_conn="" gdb_after_conn="">
<family_options family_id="STMicroelectronics">
<option opt_id="ID_DEV_ADDR" opt_value="" />
<option opt_id="ID_DEV_SPEED" opt_value="4000" />
<option opt_id="ID_JTAG_SWD" opt_value="swd" />
<option opt_id="ID_RESET_TYPE" opt_value="System" />
<option opt_id="ID_DEVICE_SCRIPT_LIST" opt_value="stm32-auto" />
<option opt_id="ID_VERBOSE_LEVEL" opt_value="" />
<option opt_id="ID_VEC_TABLE" opt_value="1" />
<option opt_id="ID_VECTOR_START" opt_value="0x08000000" />
<option opt_id="ID_RAM_EXEC" opt_value="0" />
<option opt_id="ID_LOAD_PROGRAM" opt_value="1" />
<option opt_id="ID_HOTPLUG_CONNECT" opt_value="0" />
<option opt_id="ID_SEMIHOST_CHECK" opt_value="1" />
<option opt_id="ID_NO_FLASH_CACHE" opt_value="0" />
<option opt_id="ID_NO_GUI_MSGBOX" opt_value="0" />
<option opt_id="ID_SHUTDOWN_AFTER_DISCONNECT" opt_value="1" />
<option opt_id="ID_EBLINK_CMD_LINE" opt_value="" />
<option opt_id="ID_CMD_RESET" opt_value="" />
<option opt_id="ID_BEFORE_CONNECT" opt_value="" />
<option opt_id="ID_AFTER_CONNECT" opt_value="" />
</family_options>
</debug_interface>
<debug_interface interface_id="ST-link" ip_address="localhost" ip_port="4242" path="${EMBITZ}\share\contrib" executable="STLinkGDB.exe" description="" dont_start_server="false" backoff_time="400" options="2" reg_filter="0" active_family="STMicroelectronics" gdb_before_conn="" gdb_after_conn="">
<family_options family_id="STMicroelectronics">
<option opt_id="ID_JTAG_SWD" opt_value="swd" />
<option opt_id="ID_VECTOR_START" opt_value="0x08000000" />
<option opt_id="ID_RESET_TYPE" opt_value="System" />
<option opt_id="ID_LOAD_PROGRAM" opt_value="1" />
<option opt_id="ID_SEMIHOST_CHECK" opt_value="1" />
<option opt_id="ID_RAM_EXEC" opt_value="0" />
<option opt_id="ID_VEC_TABLE" opt_value="1" />
<option opt_id="ID_DONT_CONN_RESET" opt_value="0" />
<option opt_id="ID_ALL_MODE_DEBUG" opt_value="0" />
<option opt_id="ID_DEV_ADDR" opt_value="" />
<option opt_id="ID_VERBOSE_LEVEL" opt_value="3" />
</family_options>
</debug_interface>
<target_debugging_settings target="Debug">
<debug_interface description="" options="10" reg_filter="0" probe="" device="" speed="" bus_address="" serial="" defines="" scripts="" flash_size="" ram_size="" vcc_voltage="" verbose="32" unwind="45392936" rstType="18022400" use_jtag="false" disable_cache="false" enable_semi="false" close_eblink="false" gdb_reset="" gdb_reset_remote="reset" gdb_before_conn="" gdb_after_conn="" use_remote="false" ip_address="localhost" ip_port="4242" path="C:\Program Files (x86)\EmBitz\1.11\share\EBlink" executable="eblink.exe" start_server="false" arguments="" flash_verify="false" flash_run="false" />
</target_debugging_settings>
<target_debugging_settings target="Release" active_interface="ST-link">
<debug_interface interface_id="ST-link" ip_address="localhost" ip_port="4242" path="${EMBITZ}\share\contrib" executable="STLinkGDB.exe" description="" dont_start_server="false" backoff_time="400" options="10" reg_filter="0" active_family="STMicroelectronics" gdb_before_conn="" gdb_after_conn="">
<family_options family_id="STMicroelectronics">
<option opt_id="ID_JTAG_SWD" opt_value="swd" />
<option opt_id="ID_VECTOR_START" opt_value="0x08000000" />
<option opt_id="ID_RESET_TYPE" opt_value="System" />
<option opt_id="ID_LOAD_PROGRAM" opt_value="1" />
<option opt_id="ID_SEMIHOST_CHECK" opt_value="1" />
<option opt_id="ID_RAM_EXEC" opt_value="0" />
<option opt_id="ID_VEC_TABLE" opt_value="1" />
<option opt_id="ID_DONT_CONN_RESET" opt_value="0" />
<option opt_id="ID_ALL_MODE_DEBUG" opt_value="0" />
<option opt_id="ID_DEV_ADDR" opt_value="" />
<option opt_id="ID_VERBOSE_LEVEL" opt_value="3" />
</family_options>
</debug_interface>
<target_debugging_settings target="Release">
<debug_interface description="" options="10" reg_filter="0" probe="STlink" device="auto" speed="" bus_address="" serial="" defines="" scripts="" flash_size="" ram_size="" vcc_voltage="" verbose="4" unwind="2" rstType="0" use_jtag="false" disable_cache="false" enable_semi="false" close_eblink="false" gdb_reset="" gdb_reset_remote="reset;" gdb_before_conn="" gdb_after_conn="" use_remote="false" ip_address="localhost" ip_port="4242" path="${EMBITZ}\share\contrib" executable="STLinkGDB.exe" start_server="false" arguments="" flash_verify="true" flash_run="true" />
</target_debugging_settings>
</debugger>
<envvars />

6
GRBL_Advanced_F446RE.eds 100644
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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<EmBitz_debug_session>
<debuggerLastSession>
<memory_view address="0x0" locked="0" live="0" options="290" />
</debuggerLastSession>
</EmBitz_debug_session>

535
HAL/STM32/startup_stm32f446zetx.s 100644
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/**
******************************************************************************
* @file startup_stm32f446xx.s
* @author MCD Application Team
* @brief STM32F446xx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M4 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
ldr r2, =_sidata
movs r3, #0
b LoopCopyDataInit
CopyDataInit:
ldr r4, [r2, r3]
str r4, [r0, r3]
adds r3, r3, #4
LoopCopyDataInit:
adds r4, r0, r3
cmp r4, r1
bcc CopyDataInit
/* Zero fill the bss segment. */
ldr r2, =_sbss
ldr r4, =_ebss
movs r3, #0
b LoopFillZerobss
FillZerobss:
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
/* Call the clock system initialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
* @param None
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
*******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
/* External Interrupts */
.word WWDG_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EXTI Line detection */
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
.word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line0 */
.word EXTI1_IRQHandler /* EXTI Line1 */
.word EXTI2_IRQHandler /* EXTI Line2 */
.word EXTI3_IRQHandler /* EXTI Line3 */
.word EXTI4_IRQHandler /* EXTI Line4 */
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
.word CAN1_TX_IRQHandler /* CAN1 TX */
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */
.word TIM4_IRQHandler /* TIM4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word USART3_IRQHandler /* USART3 */
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
.word FMC_IRQHandler /* FMC */
.word SDIO_IRQHandler /* SDIO */
.word TIM5_IRQHandler /* TIM5 */
.word SPI3_IRQHandler /* SPI3 */
.word UART4_IRQHandler /* UART4 */
.word UART5_IRQHandler /* UART5 */
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
.word TIM7_IRQHandler /* TIM7 */
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word CAN2_TX_IRQHandler /* CAN2 TX */
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
.word OTG_FS_IRQHandler /* USB OTG FS */
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
.word USART6_IRQHandler /* USART6 */
.word I2C3_EV_IRQHandler /* I2C3 event */
.word I2C3_ER_IRQHandler /* I2C3 error */
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
.word OTG_HS_IRQHandler /* USB OTG HS */
.word DCMI_IRQHandler /* DCMI */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word FPU_IRQHandler /* FPU */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word SPI4_IRQHandler /* SPI4 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word SAI1_IRQHandler /* SAI1 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word SAI2_IRQHandler /* SAI2 */
.word QUADSPI_IRQHandler /* QuadSPI */
.word CEC_IRQHandler /* CEC */
.word SPDIF_RX_IRQHandler /* SPDIF RX */
.word FMPI2C1_EV_IRQHandler /* FMPI2C 1 Event */
.word FMPI2C1_ER_IRQHandler /* FMPI2C 1 Error */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Stream0_IRQHandler
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
.weak DMA1_Stream1_IRQHandler
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
.weak DMA1_Stream2_IRQHandler
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
.weak DMA1_Stream3_IRQHandler
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
.weak DMA1_Stream4_IRQHandler
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
.weak DMA1_Stream5_IRQHandler
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
.weak DMA1_Stream6_IRQHandler
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
.weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Default_Handler
.weak CAN1_TX_IRQHandler
.thumb_set CAN1_TX_IRQHandler,Default_Handler
.weak CAN1_RX0_IRQHandler
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
.weak CAN1_RX1_IRQHandler
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
.weak CAN1_SCE_IRQHandler
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak TIM1_BRK_TIM9_IRQHandler
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
.weak TIM1_UP_TIM10_IRQHandler
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
.weak TIM1_TRG_COM_TIM11_IRQHandler
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak OTG_FS_WKUP_IRQHandler
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
.weak TIM8_BRK_TIM12_IRQHandler
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
.weak TIM8_UP_TIM13_IRQHandler
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
.weak TIM8_TRG_COM_TIM14_IRQHandler
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
.weak TIM8_CC_IRQHandler
.thumb_set TIM8_CC_IRQHandler,Default_Handler
.weak DMA1_Stream7_IRQHandler
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
.weak FMC_IRQHandler
.thumb_set FMC_IRQHandler,Default_Handler
.weak SDIO_IRQHandler
.thumb_set SDIO_IRQHandler,Default_Handler
.weak TIM5_IRQHandler
.thumb_set TIM5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak TIM6_DAC_IRQHandler
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
.weak DMA2_Stream0_IRQHandler
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
.weak DMA2_Stream1_IRQHandler
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
.weak DMA2_Stream2_IRQHandler
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
.weak DMA2_Stream3_IRQHandler
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
.weak DMA2_Stream4_IRQHandler
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
.weak CAN2_TX_IRQHandler
.thumb_set CAN2_TX_IRQHandler,Default_Handler
.weak CAN2_RX0_IRQHandler
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
.weak CAN2_RX1_IRQHandler
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
.weak CAN2_SCE_IRQHandler
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
.weak OTG_FS_IRQHandler
.thumb_set OTG_FS_IRQHandler,Default_Handler
.weak DMA2_Stream5_IRQHandler
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
.weak DMA2_Stream6_IRQHandler
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
.weak DMA2_Stream7_IRQHandler
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
.weak USART6_IRQHandler
.thumb_set USART6_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak OTG_HS_EP1_OUT_IRQHandler
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
.weak OTG_HS_EP1_IN_IRQHandler
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
.weak OTG_HS_WKUP_IRQHandler
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
.weak OTG_HS_IRQHandler
.thumb_set OTG_HS_IRQHandler,Default_Handler
.weak DCMI_IRQHandler
.thumb_set DCMI_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
.weak SPI4_IRQHandler
.thumb_set SPI4_IRQHandler,Default_Handler
.weak SAI1_IRQHandler
.thumb_set SAI1_IRQHandler,Default_Handler
.weak SAI2_IRQHandler
.thumb_set SAI2_IRQHandler,Default_Handler
.weak QUADSPI_IRQHandler
.thumb_set QUADSPI_IRQHandler,Default_Handler
.weak CEC_IRQHandler
.thumb_set CEC_IRQHandler,Default_Handler
.weak SPDIF_RX_IRQHandler
.thumb_set SPDIF_RX_IRQHandler,Default_Handler
.weak FMPI2C1_EV_IRQHandler
.thumb_set FMPI2C1_EV_IRQHandler,Default_Handler
.weak FMPI2C1_ER_IRQHandler
.thumb_set FMPI2C1_ER_IRQHandler,Default_Handler

0
HAL/STM32/startup_stm32f4xx.S → HAL/STM32/startup_stm32f4xx.S.backup
Wyświetl plik

2
HAL/STM32/stm32f4xx_it.c
Wyświetl plik

@ -128,7 +128,7 @@ void ProcessReceive(char c)
}
else {
// Write character to buffer
FifoUsart_Insert(USART2_NUM, USART_DIR_RX, c);
FifoUsart_Insert(USART3_NUM, USART_DIR_RX, c);
}
}
}

6
HAL/STM32/system_stm32f4xx.c
Wyświetl plik

@ -165,14 +165,14 @@
#elif STM32F446xx
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
#define PLL_M 8
#define PLL_N 336
#define PLL_M 4
#define PLL_N 168
/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P 2
/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */
#define PLL_Q 4
#define PLL_Q 7
#else
#warning No clock configuration

8
HAL/USART/Usart.c
Wyświetl plik

@ -168,6 +168,10 @@ void Usart_Put(USART_TypeDef *usart, bool buffered, char c)
{
num = USART2_NUM;
}
else if(usart == USART3)
{
num = USART3_NUM;
}
else if(usart == USART6)
{
num = USART6_NUM;
@ -200,6 +204,10 @@ void Usart_Write(USART_TypeDef *usart, bool buffered, char *data, uint8_t len)
{
num = USART2_NUM;
}
else if(usart == USART3)
{
num = USART3_NUM;
}
else if(usart == USART6)
{
num = USART6_NUM;

9
HAL/USART/Usart.h
Wyświetl plik

@ -23,16 +23,17 @@
// Number of USARTs on this device
#define USART_NUM 3
#define USART_NUM 4
// Numerate available USARTs in ascending order
#define USART1_NUM 0
#define USART2_NUM 1
#define USART6_NUM 2
#define USART3_NUM 2
#define USART6_NUM 3
// Usart used for Printf(...)
#define STDOUT USART2
#define STDOUT_NUM USART2_NUM
#define STDOUT USART3
#define STDOUT_NUM USART3_NUM
// Direction definitions
#define USART_DIR_RX 0

185
STM32F446ZETX_FLASH.ld 100644
Wyświetl plik

@ -0,0 +1,185 @@
/*
******************************************************************************
**
** @file : LinkerScript.ld
**
** @author : Auto-generated by STM32CubeIDE
**
** Abstract : Linker script for NUCLEO-F446ZE Board embedding STM32F446ZETx Device from stm32f4 series
** 512KBytes FLASH
** 128KBytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed as is, without any warranty
** of any kind.
**
******************************************************************************
** @attention
**
** Copyright (c) 2023 STMicroelectronics.
** All rights reserved.
**
** This software is licensed under terms that can be found in the LICENSE file
** in the root directory of this software component.
** If no LICENSE file comes with this software, it is provided AS-IS.
**
******************************************************************************
*/
/* Entry Point */
ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
}
/* Sections */
SECTIONS
{
/* The startup code into "FLASH" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
/* The program code and other data into "FLASH" Rom type memory */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
/* Constant data into "FLASH" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH
.ARM.extab : {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
.ARM : {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >FLASH
.preinit_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >FLASH
.init_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >FLASH
.fini_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >FLASH
/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* Initialized data sections into "RAM" Ram type memory */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM
/* Remove information from the compiler libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}

185
STM32F446ZETX_RAM.ld 100644
Wyświetl plik

@ -0,0 +1,185 @@
/*
******************************************************************************
**
** @file : LinkerScript.ld (debug in RAM dedicated)
**
** @author : Auto-generated by STM32CubeIDE
**
** Abstract : Linker script for NUCLEO-F446ZE Board embedding STM32F446ZETx Device from stm32f4 series
** 512KBytes FLASH
** 128KBytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed as is, without any warranty
** of any kind.
**
******************************************************************************
** @attention
**
** Copyright (c) 2023 STMicroelectronics.
** All rights reserved.
**
** This software is licensed under terms that can be found in the LICENSE file
** in the root directory of this software component.
** If no LICENSE file comes with this software, it is provided AS-IS.
**
******************************************************************************
*/
/* Entry Point */
ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
}
/* Sections */
SECTIONS
{
/* The startup code into "RAM" Ram type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >RAM
/* The program code and other data into "RAM" Ram type memory */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >RAM
/* Constant data into "RAM" Ram type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >RAM
.ARM.extab : {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >RAM
.ARM : {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >RAM
.preinit_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >RAM
.init_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >RAM
.fini_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >RAM
/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* Initialized data sections into "RAM" Ram type memory */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM
/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM
/* Remove information from the compiler libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}

4
Src/Platform.h
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@ -23,8 +23,8 @@
//#define USART6_NUM 2
// USART used for Printf(...)
#define STDOUT USART2
#define STDOUT_NUM USART2_NUM
#define STDOUT USART3
#define STDOUT_NUM USART3_NUM
//#define STDOUT_BAUD 115200

247715
cscope.out 100644
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Plik diff jest za duży Load Diff

4
grbl/util.h
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@ -42,8 +42,8 @@
#define BIT_IS_FALSE(x,mask) ((x & mask) == 0)
#define F_CPU 96000000UL
#define F_TIMER_STEPPER 24000000UL
#define F_CPU 168000000UL
#define F_TIMER_STEPPER 42000000UL
#define N_AXIS 5
#define N_LINEAR_AXIS 3