kopia lustrzana https://github.com/F5OEO/rpitx
DMA working
F5OEO
rodzic
d0d2fd9aff
commit
a2dc4f509c
53
src/dma.cpp
53
src/dma.cpp
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@ -43,7 +43,7 @@ dma::dma(int Channel,uint32_t CBSize,uint32_t UserMemSize) // Fixme! Need to che
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usermem= (unsigned int *)(virtbase+CBSize*sizeof(dma_cb_t)); // user memory is placed after
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//fprintf(stderr,"usermem %p\n", usermem);
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dma_reg.gpioreg[DMA_CS+channel*0x40] = BCM2708_DMA_RESET;
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dma_reg.gpioreg[DMA_CS+channel*0x40] = BCM2708_DMA_RESET|DMA_CS_INT; // Remove int flag
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usleep(100);
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dma_reg.gpioreg[DMA_CONBLK_AD+channel*0x40]=mem_virt_to_phys((void*)cbarray ); // reset to beginning
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}
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@ -138,6 +138,12 @@ bool dma::isrunning()
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return ((dma_reg.gpioreg[DMA_CS+channel*0x40]&DMA_CS_ACTIVE)>0);
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}
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bool dma::isunderflow()
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{
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//if((dma_reg.gpioreg[DMA_CS+channel*0x40]&DMA_CS_INT)>0) fprintf(stderr,"Status:%x\n",dma_reg.gpioreg[DMA_CS+channel*0x40]);
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return ((dma_reg.gpioreg[DMA_CS+channel*0x40]&DMA_CS_INT)>0);
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}
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//**************************************** BUFFER DMA ********************************************************
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bufferdma::bufferdma(int Channel,uint32_t tbuffersize,uint32_t tcbbysample,uint32_t tregisterbysample):dma(Channel,tbuffersize*tcbbysample,tbuffersize*tregisterbysample)
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{
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@ -173,24 +179,29 @@ int bufferdma::GetBufferAvailable()
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}
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else
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{
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fprintf(stderr,"DMA Stopped\n");
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fprintf(stderr,"DMA WEIRD STATE\n");
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current_sample=0;
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}
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//fprintf(stderr,"CurrentCB=%d\n",current_sample);
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diffsample=current_sample-last_sample;
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if(diffsample<=0) diffsample+=buffersize;
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if(diffsample<0) diffsample+=buffersize;
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fprintf(stderr,"cur %d last %d diff%d\n",current_sample,last_sample,diffsample);
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//fprintf(stderr,"cur %d last %d diff%d\n",current_sample,last_sample,diffsample);
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}
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else
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{
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last_sample=buffersize-1;
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//last_sample=buffersize-1;
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diffsample=buffersize;
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current_sample=0;
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fprintf(stderr,"Warning DMA stopped \n");
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fprintf(stderr,"cur %d last %d diff%d\n",current_sample,last_sample,diffsample);
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//fprintf(stderr,"Warning DMA stopped \n");
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//fprintf(stderr,"S:cur %d last %d diff%d\n",current_sample,last_sample,diffsample);
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}
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if(isunderflow())
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{
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fprintf(stderr,"cur %d last %d \n",current_sample,last_sample);
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fprintf(stderr,"Underflow\n");
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}
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return diffsample;
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}
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@ -203,7 +214,7 @@ int bufferdma::GetUserMemIndex()
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if(GetBufferAvailable()>0)
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{
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IndexAvailable=last_sample+1;
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if(IndexAvailable>=(int)buffersize-1) IndexAvailable=0;
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if(IndexAvailable>=(int)buffersize) IndexAvailable=0;
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}
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return IndexAvailable;
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}
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@ -214,16 +225,30 @@ int bufferdma::PushSample(int Index)
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/*dma_cb_t *cbp;
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cbp=&cbarray[last_sample*cbbysample+cbbysample-1];
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cbp->next=mem_virt_to_phys(&cbarray[Index]);
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*/
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cbp->next=mem_virt_to_phys(&cbarray[Index]);*/
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dma_cb_t *cbp;
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cbp=&cbarray[last_sample*cbbysample+cbbysample-1];
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//fprintf(stderr,"Info=%x\n",cbp->info);
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cbp->info=cbp->info&(~BCM2708_DMA_SET_INT);
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//fprintf(stderr,"Info2=%x\n",cbp->info);
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last_sample=Index;
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/*
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cbp=&cbarray[Index*cbbysample+cbbysample-1];
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cbp->next=0;
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*/
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//fprintf(stderr,"Info=%x\n",cbp->info);
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cbp->info=cbp->info|(BCM2708_DMA_SET_INT);
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//fprintf(stderr,"Info2=%x\n",cbp->info);
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/*if(isunderflow())
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{
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fprintf(stderr,"cur %d last %d \n",current_sample,last_sample);
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fprintf(stderr,"Underflow\n");
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}*/
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if(isrunning()==false)
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{
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start();
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if(last_sample>buffersize/4) start(); // 1/4 Fill buffer before starting DMA
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}
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return 0;
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@ -89,6 +89,7 @@ class dma
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int stop();
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int getcbposition();
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bool isrunning();
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bool isunderflow();
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};
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45
src/gpio.cpp
45
src/gpio.cpp
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@ -64,6 +64,7 @@ clkgpio::~clkgpio()
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int clkgpio::SetPllNumber(int PllNo,int MashType)
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{
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//print_clock_tree();
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if(PllNo<8)
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pllnumber=PllNo;
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else
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@ -112,9 +113,9 @@ int clkgpio::SetMasterMultFrac(uint32_t Mult,uint32_t Frac)
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{
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gpioreg[PLLA_CTRL] = (0x5a<<24) | (0x21<<12) | Mult;
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//usleep(10);
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gpioreg[PLLA_FRAC]= 0x5A000000 | Frac ; //4 is START CLK
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// usleep(10);
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usleep(10);
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gpioreg[PLLA_FRAC]= 0x5A000000 | Frac ;
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usleep(10);
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return 0;
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}
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@ -178,6 +179,7 @@ int clkgpio::SetCenterFrequency(uint64_t Frequency)
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//Choose best PLLDiv and Div
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ComputeBestLO(Frequency);
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SetClkDivFrac(PllFixDivider,0); // NO MASH !!!!
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SetFrequency(Frequency);
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}
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else
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{
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@ -200,7 +202,9 @@ void clkgpio::SetAdvancedPllMode(bool Advanced)
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{
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SetPllNumber(clk_plla,0); // Use PPL_A , Do not USE MASH which generates spurious
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gpioreg[0x104/4]=0x5A00020A; // Enable Plla_PER
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usleep(100);
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gpioreg[PLLA_PER]=0x5A000002; // Div ?
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usleep(100);
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}
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}
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@ -361,32 +365,45 @@ uint64_t pwmgpio::GetPllFrequency(int PllNo)
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int pwmgpio::SetFrequency(uint64_t Frequency)
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{
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double Freqresult=(double)Pllfrequency/(double)Frequency;
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Prediv=2; // Fixe for now , need investigation if not 32 !!!! FixMe !
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double Freqresult=(double)Pllfrequency/(double)(Frequency*Prediv);
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uint32_t FreqDivider=(uint32_t)Freqresult;
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uint32_t FreqFractionnal=(uint32_t) (4096*(Freqresult-(double)FreqDivider));
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if((FreqDivider>4096)||(FreqDivider<2)) fprintf(stderr,"Frequency out of range\n");
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fprintf(stderr,"PWM clk=%d / %d\n",FreqDivider,FreqFractionnal);
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clk.gpioreg[PWMCLK_DIV] = 0x5A000000 | ((FreqDivider)<<12) | FreqFractionnal;
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usleep(100);
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clk.gpioreg[PWMCLK_CNTL]= 0x5A000000 | (Mash << 9) | pllnumber|(1 << 4) ; //4 is STAR CLK
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usleep(100);
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usleep(100);
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fprintf(stderr,"PWM Reg %x\n",clk.gpioreg[PWMCLK_CNTL]);
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SetPrediv(Prediv);
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return 0;
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}
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int pwmgpio::SetMode(int Mode) //Mode should be only for SYNC or a Data serializer : Todo
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int pwmgpio::SetPrediv(int predivisor) //Mode should be only for SYNC or a Data serializer : Todo
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{
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gpioreg[PWM_RNG1] = 32;// 250 -> 8KHZ
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Prediv=predivisor;
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if(Prediv>32)
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{
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fprintf(stderr,"PWM Prediv is max 32\n");
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Prediv=2;
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}
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fprintf(stderr,"PWM Prediv %d\n",Prediv);
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gpioreg[PWM_RNG1] = Prediv;// 250 -> 8KHZ
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usleep(100);
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gpioreg[PWM_RNG2] = 32;// 32 Mandatory for Serial Mode without gap
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gpioreg[PWM_RNG2] = Prediv;// 32 Mandatory for Serial Mode without gap
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gpioreg[PWM_FIFO]=0xAAAAAAAA;
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//gpioreg[PWM_FIFO]=0xAAAAAAAA;
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gpioreg[PWM_DMAC] = PWMDMAC_ENAB | PWMDMAC_THRSHLD;
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usleep(100);
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//gpioreg[PWM_CTL] = PWMCTL_CLRF;
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gpioreg[PWM_CTL] = PWMCTL_USEF1 | PWMCTL_PWEN1; //PWM0 in Repeat mode
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gpioreg[PWM_CTL] = PWMCTL_CLRF;
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usleep(100);
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gpioreg[PWM_CTL] = PWMCTL_USEF1 | PWMCTL_PWEN1;
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usleep(100);
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return 0;
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@ -21,6 +21,7 @@ class gpio
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#define BCM2708_DMA_DST_IGNOR (1<<7)
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#define BCM2708_DMA_NO_WIDE_BURSTS (1<<26)
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#define BCM2708_DMA_WAIT_RESP (1<<3)
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#define BCM2708_DMA_SET_INT (1<<0)
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#define BCM2708_DMA_D_DREQ (1<<6)
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#define BCM2708_DMA_PER_MAP(x) ((x)<<16)
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@ -36,6 +37,7 @@ class gpio
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#define DMA_CS_RESET (1<<31)
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#define DMA_CS_ABORT (1<<30)
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#define DMA_CS_DISDEBUG (1<<28)
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#define DMA_CS_INT (1<<2)
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#define DMA_CS_END (1<<1)
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#define DMA_CS_ACTIVE (1<<0)
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#define DMA_CS_PRIORITY(x) ((x)&0xf << 16)
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@ -192,6 +194,7 @@ class pwmgpio:public gpio
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clkgpio clk;
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int pllnumber;
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int Mash;
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int Prediv; //Range of PWM
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uint64_t Pllfrequency;
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public:
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pwmgpio();
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@ -199,7 +202,7 @@ class pwmgpio:public gpio
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int SetPllNumber(int PllNo,int MashType);
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uint64_t GetPllFrequency(int PllNo);
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int SetFrequency(uint64_t Frequency);
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int SetMode(int Mode);
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int SetPrediv(int predivisor);
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};
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//******************************* PCM GPIO (I2S) ***********************************
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@ -12,7 +12,7 @@ ngfmdmasync::ngfmdmasync(uint64_t TuneFrequency,uint32_t SampleRate,int Channel,
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tunefreq=TuneFrequency;
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clkgpio::SetAdvancedPllMode(true);
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clkgpio::SetCenterFrequency(TuneFrequency); // Write Mult Int and Frac : FixMe carrier is already there
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clkgpio::SetFrequency(0);
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/*
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double FloatMult=((double)TuneFrequency)/(double)(XOSC_FREQUENCY);
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@ -28,9 +28,10 @@ ngfmdmasync::ngfmdmasync(uint64_t TuneFrequency,uint32_t SampleRate,int Channel,
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*/
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pwmgpio::SetPllNumber(clk_osc,1);
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//pwmgpio::SetPllNumber(clk_plld,1);
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pwmgpio::SetFrequency(SampleRate);
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pwmgpio::SetMode(0);
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SetDmaAlgo();
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@ -84,7 +85,7 @@ void ngfmdmasync::SetDmaAlgo()
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// Delay
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cbp->info = /*BCM2708_DMA_SRC_IGNOR | */BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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cbp->info = /*BCM2708_DMA_SRC_IGNOR |*/ BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP |BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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cbp->dst = 0x7E000000 + (PWM_FIFO<<2) + PWM_BASE ;
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cbp->length = 4;
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@ -106,24 +107,4 @@ void ngfmdmasync::SetFrequencySample(uint32_t Index,int Frequency)
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PushSample(Index);
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}
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void ngfmdmasync::FillMemory(uint32_t MultInt,uint32_t FirstFrac)
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{
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//if(FirstFrac<usermemsize) FirstFrac=usermemsize;
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uint32_t tempmul=MultInt;
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for (uint32_t samplecnt = 0; samplecnt < usermemsize/2; samplecnt++)
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{
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//uint32_t Frac=(FirstFrac+samplecnt*((samplecnt%2==0)?1:-1))&0xFFFFF;
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uint32_t Frac=(FirstFrac+samplecnt/10)%(1<<20); //10times less than symbolrate
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//fprintf(stderr,"Frac %d\n",Frac);
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if(Frac==0)
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{
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fprintf(stderr,"Cross Int\n");
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tempmul=MultInt+1;
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}
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//usermem[samplecnt*2]=(0x5a<<24) | (0x21<<12) | tempmul;
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//usermem[samplecnt*2+1]=0x5A000000 | Frac;
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usermem[samplecnt*2]=0x5A000000 | FirstFrac;
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}
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}
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@ -13,7 +13,7 @@ class ngfmdmasync:public bufferdma,public clkgpio,public pwmgpio
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ngfmdmasync(uint64_t TuneFrequency,uint32_t SampleRate,int Channel,uint32_t FifoSize);
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~ngfmdmasync();
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void SetDmaAlgo();
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void FillMemory(uint32_t MultInt,uint32_t FirstFrac);
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void SetPhase(bool inversed);
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void SetFrequencySample(uint32_t Index,int Frequency);
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};
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@ -10,8 +10,8 @@ int main(int argc, char* argv[])
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generalgpio generalio;
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generalio.enableclk();
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/*
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clkgpio clk;
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/*clkgpio clk;
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clk.SetPllNumber(clk_plld,1);
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clk.SetAdvancedPllMode(true);
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clk.SetCenterFrequency(144100000);
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@ -20,28 +20,30 @@ int main(int argc, char* argv[])
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clk.SetFrequency(i);
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usleep(10);
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}
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sleep(5);
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*/
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sleep(5);*/
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//dma mydma(14,32,16);
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//bufferdma mydma(14,16,2,1);
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ngfmdmasync ngfmtest(144100000,5000,14,128);
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for(int i=0;i<256;i++)
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ngfmdmasync ngfmtest(144100000,200000,14,512);
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for(int i=0;i<1000000;)
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{
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//usleep(10);
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int Index=ngfmtest.GetUserMemIndex();
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//printf("GetIndex=%d\n",Index);
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if(Index>=0)
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{
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ngfmtest.SetFrequencySample(Index,i*10);
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//ngfmtest.SetFrequencySample(Index,((i%10000)>5000)?1000:0);
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ngfmtest.SetFrequencySample(Index,i%100000);
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i++;
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}
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else
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usleep(10);
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}
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fprintf(stderr,"End\n");
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sleep(10);
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ngfmtest.stop();
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